jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 static int
  63 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  64 {
  65         struct jme_adapter *jme = netdev_priv(netdev);
  66         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  67
  68 read_again:
  69         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  70                                 smi_phy_addr(phy) |
  71                                 smi_reg_addr(reg));
  72
  73         wmb();
  74         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  75                 udelay(20);
  76                 val = jread32(jme, JME_SMI);
  77                 if ((val & SMI_OP_REQ) == 0)
  78                         break;
  79         }
  80
  81         if (i == 0) {
  82                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  83                 return 0;
  84         }
  85
  86         if (again--)
  87                 goto read_again;
  88
  89         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
  90 }
  91
  92 static void
  93 jme_mdio_write(struct net_device *netdev,
  94                                 int phy, int reg, int val)
  95 {
  96         struct jme_adapter *jme = netdev_priv(netdev);
  97         int i;
  98
  99         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 100                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 101                 smi_phy_addr(phy) | smi_reg_addr(reg));
 102
 103         wmb();
 104         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 105                 udelay(20);
 106                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 107                         break;
 108         }
 109
 110         if (i == 0)
 111                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 112 }
 113
 114 static inline void
 115 jme_reset_phy_processor(struct jme_adapter *jme)
 116 {
 117         u32 val;
 118
 119         jme_mdio_write(jme->dev,
 120                         jme->mii_if.phy_id,
 121                         MII_ADVERTISE, ADVERTISE_ALL |
 122                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 123
 124         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 125                 jme_mdio_write(jme->dev,
 126                                 jme->mii_if.phy_id,
 127                                 MII_CTRL1000,
 128                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 129
 130         val = jme_mdio_read(jme->dev,
 131                                 jme->mii_if.phy_id,
 132                                 MII_BMCR);
 133
 134         jme_mdio_write(jme->dev,
 135                         jme->mii_if.phy_id,
 136                         MII_BMCR, val | BMCR_RESET);
 137 }
 138
 139 static void
 140 jme_setup_wakeup_frame(struct jme_adapter *jme,
 141                        const u32 *mask, u32 crc, int fnr)
 142 {
 143         int i;
 144
 145         /*
 146          * Setup CRC pattern
 147          */
 148         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 149         wmb();
 150         jwrite32(jme, JME_WFODP, crc);
 151         wmb();
 152
 153         /*
 154          * Setup Mask
 155          */
 156         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 157                 jwrite32(jme, JME_WFOI,
 158                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 159                                 (fnr & WFOI_FRAME_SEL));
 160                 wmb();
 161                 jwrite32(jme, JME_WFODP, mask[i]);
 162                 wmb();
 163         }
 164 }
 165
 166 static inline void
 167 jme_mac_rxclk_off(struct jme_adapter *jme)
 168 {
 169         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 170         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 171 }
 172
 173 static inline void
 174 jme_mac_rxclk_on(struct jme_adapter *jme)
 175 {
 176         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 177         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 178 }
 179
 180 static inline void
 181 jme_mac_txclk_off(struct jme_adapter *jme)
 182 {
 183         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 184         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 185 }
 186
 187 static inline void
 188 jme_mac_txclk_on(struct jme_adapter *jme)
 189 {
 190         u32 speed = jme->reg_ghc & GHC_SPEED;
 191         if (speed == GHC_SPEED_1000M)
 192                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 193         else
 194                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 195         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 196 }
 197
 198 static inline void
 199 jme_reset_ghc_speed(struct jme_adapter *jme)
 200 {
 201         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 202         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 203 }
 204
 205 static inline void
 206 jme_reset_250A2_workaround(struct jme_adapter *jme)
 207 {
 208         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 209                              GPREG1_RSSPATCH);
 210         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 211 }
 212
 213 static inline void
 214 jme_assert_ghc_reset(struct jme_adapter *jme)
 215 {
 216         jme->reg_ghc |= GHC_SWRST;
 217         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 218 }
 219
 220 static inline void
 221 jme_clear_ghc_reset(struct jme_adapter *jme)
 222 {
 223         jme->reg_ghc &= ~GHC_SWRST;
 224         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 225 }
 226
 227 static inline void
 228 jme_reset_mac_processor(struct jme_adapter *jme)
 229 {
 230         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 231         u32 crc = 0xCDCDCDCD;
 232         u32 gpreg0;
 233         int i;
 234
 235         jme_reset_ghc_speed(jme);
 236         jme_reset_250A2_workaround(jme);
 237
 238         jme_mac_rxclk_on(jme);
 239         jme_mac_txclk_on(jme);
 240         udelay(1);
 241         jme_assert_ghc_reset(jme);
 242         udelay(1);
 243         jme_mac_rxclk_off(jme);
 244         jme_mac_txclk_off(jme);
 245         udelay(1);
 246         jme_clear_ghc_reset(jme);
 247         udelay(1);
 248         jme_mac_rxclk_on(jme);
 249         jme_mac_txclk_on(jme);
 250         udelay(1);
 251         jme_mac_rxclk_off(jme);
 252         jme_mac_txclk_off(jme);
 253
 254         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 255         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 256         jwrite32(jme, JME_RXQDC, 0x00000000);
 257         jwrite32(jme, JME_RXNDA, 0x00000000);
 258         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 259         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 260         jwrite32(jme, JME_TXQDC, 0x00000000);
 261         jwrite32(jme, JME_TXNDA, 0x00000000);
 262
 263         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 264         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 265         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 266                 jme_setup_wakeup_frame(jme, mask, crc, i);
 267         if (jme->fpgaver)
 268                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 269         else
 270                 gpreg0 = GPREG0_DEFAULT;
 271         jwrite32(jme, JME_GPREG0, gpreg0);
 272 }
 273
 274 static inline void
 275 jme_clear_pm(struct jme_adapter *jme)
 276 {
 277         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 278         pci_set_power_state(jme->pdev, PCI_D0);
 279 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
 280         pci_enable_wake(jme->pdev, PCI_D0, false);
 281 #else
 282         device_set_wakeup_enable(&jme->pdev->dev, false);
 283 #endif
 284 }
 285
 286 static int
 287 jme_reload_eeprom(struct jme_adapter *jme)
 288 {
 289         u32 val;
 290         int i;
 291
 292         val = jread32(jme, JME_SMBCSR);
 293
 294         if (val & SMBCSR_EEPROMD) {
 295                 val |= SMBCSR_CNACK;
 296                 jwrite32(jme, JME_SMBCSR, val);
 297                 val |= SMBCSR_RELOAD;
 298                 jwrite32(jme, JME_SMBCSR, val);
 299                 mdelay(12);
 300
 301                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 302                         mdelay(1);
 303                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 304                                 break;
 305                 }
 306
 307                 if (i == 0) {
 308                         pr_err("eeprom reload timeout\n");
 309                         return -EIO;
 310                 }
 311         }
 312
 313         return 0;
 314 }
 315
 316 static void
 317 jme_load_macaddr(struct net_device *netdev)
 318 {
 319         struct jme_adapter *jme = netdev_priv(netdev);
 320         unsigned char macaddr[6];
 321         u32 val;
 322
 323         spin_lock_bh(&jme->macaddr_lock);
 324         val = jread32(jme, JME_RXUMA_LO);
 325         macaddr[0] = (val >>  0) & 0xFF;
 326         macaddr[1] = (val >>  8) & 0xFF;
 327         macaddr[2] = (val >> 16) & 0xFF;
 328         macaddr[3] = (val >> 24) & 0xFF;
 329         val = jread32(jme, JME_RXUMA_HI);
 330         macaddr[4] = (val >>  0) & 0xFF;
 331         macaddr[5] = (val >>  8) & 0xFF;
 332         memcpy(netdev->dev_addr, macaddr, 6);
 333         spin_unlock_bh(&jme->macaddr_lock);
 334 }
 335
 336 static inline void
 337 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 338 {
 339         switch (p) {
 340         case PCC_OFF:
 341                 jwrite32(jme, JME_PCCRX0,
 342                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 343                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 344                 break;
 345         case PCC_P1:
 346                 jwrite32(jme, JME_PCCRX0,
 347                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 348                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 349                 break;
 350         case PCC_P2:
 351                 jwrite32(jme, JME_PCCRX0,
 352                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 353                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 354                 break;
 355         case PCC_P3:
 356                 jwrite32(jme, JME_PCCRX0,
 357                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 358                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 359                 break;
 360         default:
 361                 break;
 362         }
 363         wmb();
 364
 365         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 366                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 367 }
 368
 369 static void
 370 jme_start_irq(struct jme_adapter *jme)
 371 {
 372         register struct dynpcc_info *dpi = &(jme->dpi);
 373
 374         jme_set_rx_pcc(jme, PCC_P1);
 375         dpi->cur                = PCC_P1;
 376         dpi->attempt            = PCC_P1;
 377         dpi->cnt                = 0;
 378
 379         jwrite32(jme, JME_PCCTX,
 380                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 381                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 382                         PCCTXQ0_EN
 383                 );
 384
 385         /*
 386          * Enable Interrupts
 387          */
 388         jwrite32(jme, JME_IENS, INTR_ENABLE);
 389 }
 390
 391 static inline void
 392 jme_stop_irq(struct jme_adapter *jme)
 393 {
 394         /*
 395          * Disable Interrupts
 396          */
 397         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 398 }
 399
 400 static u32
 401 jme_linkstat_from_phy(struct jme_adapter *jme)
 402 {
 403         u32 phylink, bmsr;
 404
 405         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 406         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 407         if (bmsr & BMSR_ANCOMP)
 408                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 409
 410         return phylink;
 411 }
 412
 413 static inline void
 414 jme_set_phyfifo_5level(struct jme_adapter *jme)
 415 {
 416         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 417 }
 418
 419 static inline void
 420 jme_set_phyfifo_8level(struct jme_adapter *jme)
 421 {
 422         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 423 }
 424
 425 static int
 426 jme_check_link(struct net_device *netdev, int testonly)
 427 {
 428         struct jme_adapter *jme = netdev_priv(netdev);
 429         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 430         char linkmsg[64];
 431         int rc = 0;
 432
 433         linkmsg[0] = '\0';
 434
 435         if (jme->fpgaver)
 436                 phylink = jme_linkstat_from_phy(jme);
 437         else
 438                 phylink = jread32(jme, JME_PHY_LINK);
 439
 440         if (phylink & PHY_LINK_UP) {
 441                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 442                         /*
 443                          * If we did not enable AN
 444                          * Speed/Duplex Info should be obtained from SMI
 445                          */
 446                         phylink = PHY_LINK_UP;
 447
 448                         bmcr = jme_mdio_read(jme->dev,
 449                                                 jme->mii_if.phy_id,
 450                                                 MII_BMCR);
 451
 452                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 453                                         (bmcr & BMCR_SPEED100) == 0) ?
 454                                         PHY_LINK_SPEED_1000M :
 455                                         (bmcr & BMCR_SPEED100) ?
 456                                         PHY_LINK_SPEED_100M :
 457                                         PHY_LINK_SPEED_10M;
 458
 459                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 460                                          PHY_LINK_DUPLEX : 0;
 461
 462                         strcat(linkmsg, "Forced: ");
 463                 } else {
 464                         /*
 465                          * Keep polling for speed/duplex resolve complete
 466                          */
 467                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 468                                 --cnt) {
 469
 470                                 udelay(1);
 471
 472                                 if (jme->fpgaver)
 473                                         phylink = jme_linkstat_from_phy(jme);
 474                                 else
 475                                         phylink = jread32(jme, JME_PHY_LINK);
 476                         }
 477                         if (!cnt)
 478                                 pr_err("Waiting speed resolve timeout\n");
 479
 480                         strcat(linkmsg, "ANed: ");
 481                 }
 482
 483                 if (jme->phylink == phylink) {
 484                         rc = 1;
 485                         goto out;
 486                 }
 487                 if (testonly)
 488                         goto out;
 489
 490                 jme->phylink = phylink;
 491
 492                 /*
 493                  * The speed/duplex setting of jme->reg_ghc already cleared
 494                  * by jme_reset_mac_processor()
 495                  */
 496                 switch (phylink & PHY_LINK_SPEED_MASK) {
 497                 case PHY_LINK_SPEED_10M:
 498                         jme->reg_ghc |= GHC_SPEED_10M;
 499                         strcat(linkmsg, "10 Mbps, ");
 500                         break;
 501                 case PHY_LINK_SPEED_100M:
 502                         jme->reg_ghc |= GHC_SPEED_100M;
 503                         strcat(linkmsg, "100 Mbps, ");
 504                         break;
 505                 case PHY_LINK_SPEED_1000M:
 506                         jme->reg_ghc |= GHC_SPEED_1000M;
 507                         strcat(linkmsg, "1000 Mbps, ");
 508                         break;
 509                 default:
 510                         break;
 511                 }
 512
 513                 if (phylink & PHY_LINK_DUPLEX) {
 514                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 515                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 516                         jme->reg_ghc |= GHC_DPX;
 517                 } else {
 518                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 519                                                 TXMCS_BACKOFF |
 520                                                 TXMCS_CARRIERSENSE |
 521                                                 TXMCS_COLLISION);
 522                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 523                 }
 524
 525                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 526
 527                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 528                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 529                                              GPREG1_RSSPATCH);
 530                         if (!(phylink & PHY_LINK_DUPLEX))
 531                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 532                         switch (phylink & PHY_LINK_SPEED_MASK) {
 533                         case PHY_LINK_SPEED_10M:
 534                                 jme_set_phyfifo_8level(jme);
 535                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 536                                 break;
 537                         case PHY_LINK_SPEED_100M:
 538                                 jme_set_phyfifo_5level(jme);
 539                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 540                                 break;
 541                         case PHY_LINK_SPEED_1000M:
 542                                 jme_set_phyfifo_8level(jme);
 543                                 break;
 544                         default:
 545                                 break;
 546                         }
 547                 }
 548                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 549
 550                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 551                                         "Full-Duplex, " :
 552                                         "Half-Duplex, ");
 553                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 554                                         "MDI-X" :
 555                                         "MDI");
 556                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 557                 netif_carrier_on(netdev);
 558         } else {
 559                 if (testonly)
 560                         goto out;
 561
 562                 netif_info(jme, link, jme->dev, "Link is down\n");
 563                 jme->phylink = 0;
 564                 netif_carrier_off(netdev);
 565         }
 566
 567 out:
 568         return rc;
 569 }
 570
 571 static int
 572 jme_setup_tx_resources(struct jme_adapter *jme)
 573 {
 574         struct jme_ring *txring = &(jme->txring[0]);
 575
 576         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 577                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 578                                    &(txring->dmaalloc),
 579                                    GFP_ATOMIC);
 580
 581         if (!txring->alloc)
 582                 goto err_set_null;
 583
 584         /*
 585          * 16 Bytes align
 586          */
 587         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 588                                                 RING_DESC_ALIGN);
 589         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 590         txring->next_to_use     = 0;
 591         atomic_set(&txring->next_to_clean, 0);
 592         atomic_set(&txring->nr_free, jme->tx_ring_size);
 593
 594         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 595                                         jme->tx_ring_size, GFP_ATOMIC);
 596         if (unlikely(!(txring->bufinf)))
 597                 goto err_free_txring;
 598
 599         /*
 600          * Initialize Transmit Descriptors
 601          */
 602         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 603         memset(txring->bufinf, 0,
 604                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 605
 606         return 0;
 607
 608 err_free_txring:
 609         dma_free_coherent(&(jme->pdev->dev),
 610                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 611                           txring->alloc,
 612                           txring->dmaalloc);
 613
 614 err_set_null:
 615         txring->desc = NULL;
 616         txring->dmaalloc = 0;
 617         txring->dma = 0;
 618         txring->bufinf = NULL;
 619
 620         return -ENOMEM;
 621 }
 622
 623 static void
 624 jme_free_tx_resources(struct jme_adapter *jme)
 625 {
 626         int i;
 627         struct jme_ring *txring = &(jme->txring[0]);
 628         struct jme_buffer_info *txbi;
 629
 630         if (txring->alloc) {
 631                 if (txring->bufinf) {
 632                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 633                                 txbi = txring->bufinf + i;
 634                                 if (txbi->skb) {
 635                                         dev_kfree_skb(txbi->skb);
 636                                         txbi->skb = NULL;
 637                                 }
 638                                 txbi->mapping           = 0;
 639                                 txbi->len               = 0;
 640                                 txbi->nr_desc           = 0;
 641                                 txbi->start_xmit        = 0;
 642                         }
 643                         kfree(txring->bufinf);
 644                 }
 645
 646                 dma_free_coherent(&(jme->pdev->dev),
 647                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 648                                   txring->alloc,
 649                                   txring->dmaalloc);
 650
 651                 txring->alloc           = NULL;
 652                 txring->desc            = NULL;
 653                 txring->dmaalloc        = 0;
 654                 txring->dma             = 0;
 655                 txring->bufinf          = NULL;
 656         }
 657         txring->next_to_use     = 0;
 658         atomic_set(&txring->next_to_clean, 0);
 659         atomic_set(&txring->nr_free, 0);
 660 }
 661
 662 static inline void
 663 jme_enable_tx_engine(struct jme_adapter *jme)
 664 {
 665         /*
 666          * Select Queue 0
 667          */
 668         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 669         wmb();
 670
 671         /*
 672          * Setup TX Queue 0 DMA Bass Address
 673          */
 674         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 675         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 676         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 677
 678         /*
 679          * Setup TX Descptor Count
 680          */
 681         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 682
 683         /*
 684          * Enable TX Engine
 685          */
 686         wmb();
 687         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 688                                 TXCS_SELECT_QUEUE0 |
 689                                 TXCS_ENABLE);
 690
 691         /*
 692          * Start clock for TX MAC Processor
 693          */
 694         jme_mac_txclk_on(jme);
 695 }
 696
 697 static inline void
 698 jme_restart_tx_engine(struct jme_adapter *jme)
 699 {
 700         /*
 701          * Restart TX Engine
 702          */
 703         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 704                                 TXCS_SELECT_QUEUE0 |
 705                                 TXCS_ENABLE);
 706 }
 707
 708 static inline void
 709 jme_disable_tx_engine(struct jme_adapter *jme)
 710 {
 711         int i;
 712         u32 val;
 713
 714         /*
 715          * Disable TX Engine
 716          */
 717         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 718         wmb();
 719
 720         val = jread32(jme, JME_TXCS);
 721         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 722                 mdelay(1);
 723                 val = jread32(jme, JME_TXCS);
 724                 rmb();
 725         }
 726
 727         if (!i)
 728                 pr_err("Disable TX engine timeout\n");
 729
 730         /*
 731          * Stop clock for TX MAC Processor
 732          */
 733         jme_mac_txclk_off(jme);
 734 }
 735
 736 static void
 737 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 738 {
 739         struct jme_ring *rxring = &(jme->rxring[0]);
 740         register struct rxdesc *rxdesc = rxring->desc;
 741         struct jme_buffer_info *rxbi = rxring->bufinf;
 742         rxdesc += i;
 743         rxbi += i;
 744
 745         rxdesc->dw[0] = 0;
 746         rxdesc->dw[1] = 0;
 747         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 748         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 749                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 750         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 751         if (jme->dev->features & NETIF_F_HIGHDMA)
 752                 rxdesc->desc1.flags = RXFLAG_64BIT;
 753         wmb();
 754         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 755 }
 756
 757 static int
 758 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 759 {
 760         struct jme_ring *rxring = &(jme->rxring[0]);
 761         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 762         struct sk_buff *skb;
 763
 764         skb = netdev_alloc_skb(jme->dev,
 765                 jme->dev->mtu + RX_EXTRA_LEN);
 766         if (unlikely(!skb))
 767                 return -ENOMEM;
 768 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 769         skb->dev = jme->dev;
 770 #endif
 771
 772         rxbi->skb = skb;
 773         rxbi->len = skb_tailroom(skb);
 774         rxbi->mapping = pci_map_page(jme->pdev,
 775                                         virt_to_page(skb->data),
 776                                         offset_in_page(skb->data),
 777                                         rxbi->len,
 778                                         PCI_DMA_FROMDEVICE);
 779
 780         return 0;
 781 }
 782
 783 static void
 784 jme_free_rx_buf(struct jme_adapter *jme, int i)
 785 {
 786         struct jme_ring *rxring = &(jme->rxring[0]);
 787         struct jme_buffer_info *rxbi = rxring->bufinf;
 788         rxbi += i;
 789
 790         if (rxbi->skb) {
 791                 pci_unmap_page(jme->pdev,
 792                                  rxbi->mapping,
 793                                  rxbi->len,
 794                                  PCI_DMA_FROMDEVICE);
 795                 dev_kfree_skb(rxbi->skb);
 796                 rxbi->skb = NULL;
 797                 rxbi->mapping = 0;
 798                 rxbi->len = 0;
 799         }
 800 }
 801
 802 static void
 803 jme_free_rx_resources(struct jme_adapter *jme)
 804 {
 805         int i;
 806         struct jme_ring *rxring = &(jme->rxring[0]);
 807
 808         if (rxring->alloc) {
 809                 if (rxring->bufinf) {
 810                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 811                                 jme_free_rx_buf(jme, i);
 812                         kfree(rxring->bufinf);
 813                 }
 814
 815                 dma_free_coherent(&(jme->pdev->dev),
 816                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 817                                   rxring->alloc,
 818                                   rxring->dmaalloc);
 819                 rxring->alloc    = NULL;
 820                 rxring->desc     = NULL;
 821                 rxring->dmaalloc = 0;
 822                 rxring->dma      = 0;
 823                 rxring->bufinf   = NULL;
 824         }
 825         rxring->next_to_use   = 0;
 826         atomic_set(&rxring->next_to_clean, 0);
 827 }
 828
 829 static int
 830 jme_setup_rx_resources(struct jme_adapter *jme)
 831 {
 832         int i;
 833         struct jme_ring *rxring = &(jme->rxring[0]);
 834
 835         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 836                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 837                                    &(rxring->dmaalloc),
 838                                    GFP_ATOMIC);
 839         if (!rxring->alloc)
 840                 goto err_set_null;
 841
 842         /*
 843          * 16 Bytes align
 844          */
 845         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 846                                                 RING_DESC_ALIGN);
 847         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 848         rxring->next_to_use     = 0;
 849         atomic_set(&rxring->next_to_clean, 0);
 850
 851         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 852                                         jme->rx_ring_size, GFP_ATOMIC);
 853         if (unlikely(!(rxring->bufinf)))
 854                 goto err_free_rxring;
 855
 856         /*
 857          * Initiallize Receive Descriptors
 858          */
 859         memset(rxring->bufinf, 0,
 860                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 861         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 862                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 863                         jme_free_rx_resources(jme);
 864                         return -ENOMEM;
 865                 }
 866
 867                 jme_set_clean_rxdesc(jme, i);
 868         }
 869
 870         return 0;
 871
 872 err_free_rxring:
 873         dma_free_coherent(&(jme->pdev->dev),
 874                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 875                           rxring->alloc,
 876                           rxring->dmaalloc);
 877 err_set_null:
 878         rxring->desc = NULL;
 879         rxring->dmaalloc = 0;
 880         rxring->dma = 0;
 881         rxring->bufinf = NULL;
 882
 883         return -ENOMEM;
 884 }
 885
 886 static inline void
 887 jme_enable_rx_engine(struct jme_adapter *jme)
 888 {
 889         /*
 890          * Select Queue 0
 891          */
 892         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 893                                 RXCS_QUEUESEL_Q0);
 894         wmb();
 895
 896         /*
 897          * Setup RX DMA Bass Address
 898          */
 899         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 900         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 901         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 902
 903         /*
 904          * Setup RX Descriptor Count
 905          */
 906         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 907
 908         /*
 909          * Setup Unicast Filter
 910          */
 911         jme_set_unicastaddr(jme->dev);
 912         jme_set_multi(jme->dev);
 913
 914         /*
 915          * Enable RX Engine
 916          */
 917         wmb();
 918         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 919                                 RXCS_QUEUESEL_Q0 |
 920                                 RXCS_ENABLE |
 921                                 RXCS_QST);
 922
 923         /*
 924          * Start clock for RX MAC Processor
 925          */
 926         jme_mac_rxclk_on(jme);
 927 }
 928
 929 static inline void
 930 jme_restart_rx_engine(struct jme_adapter *jme)
 931 {
 932         /*
 933          * Start RX Engine
 934          */
 935         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 936                                 RXCS_QUEUESEL_Q0 |
 937                                 RXCS_ENABLE |
 938                                 RXCS_QST);
 939 }
 940
 941 static inline void
 942 jme_disable_rx_engine(struct jme_adapter *jme)
 943 {
 944         int i;
 945         u32 val;
 946
 947         /*
 948          * Disable RX Engine
 949          */
 950         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 951         wmb();
 952
 953         val = jread32(jme, JME_RXCS);
 954         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 955                 mdelay(1);
 956                 val = jread32(jme, JME_RXCS);
 957                 rmb();
 958         }
 959
 960         if (!i)
 961                 pr_err("Disable RX engine timeout\n");
 962
 963         /*
 964          * Stop clock for RX MAC Processor
 965          */
 966         jme_mac_rxclk_off(jme);
 967 }
 968
 969 static u16
 970 jme_udpsum(struct sk_buff *skb)
 971 {
 972         u16 csum = 0xFFFFu;
 973
 974         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
 975                 return csum;
 976         if (skb->protocol != htons(ETH_P_IP))
 977                 return csum;
 978         skb_set_network_header(skb, ETH_HLEN);
 979         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
 980             (skb->len < (ETH_HLEN +
 981                         (ip_hdr(skb)->ihl << 2) +
 982                         sizeof(struct udphdr)))) {
 983                 skb_reset_network_header(skb);
 984                 return csum;
 985         }
 986         skb_set_transport_header(skb,
 987                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
 988         csum = udp_hdr(skb)->check;
 989         skb_reset_transport_header(skb);
 990         skb_reset_network_header(skb);
 991
 992         return csum;
 993 }
 994
 995 static int
 996 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
 997 {
 998         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
 999                 return false;
1000
1001         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
1002                         == RXWBFLAG_TCPON)) {
1003                 if (flags & RXWBFLAG_IPV4)
1004                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1005                 return false;
1006         }
1007
1008         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1009                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1010                 if (flags & RXWBFLAG_IPV4)
1011                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1012                 return false;
1013         }
1014
1015         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1016                         == RXWBFLAG_IPV4)) {
1017                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1018                 return false;
1019         }
1020
1021         return true;
1022 }
1023
1024 static void
1025 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1026 {
1027         struct jme_ring *rxring = &(jme->rxring[0]);
1028         struct rxdesc *rxdesc = rxring->desc;
1029         struct jme_buffer_info *rxbi = rxring->bufinf;
1030         struct sk_buff *skb;
1031         int framesize;
1032
1033         rxdesc += idx;
1034         rxbi += idx;
1035
1036         skb = rxbi->skb;
1037         pci_dma_sync_single_for_cpu(jme->pdev,
1038                                         rxbi->mapping,
1039                                         rxbi->len,
1040                                         PCI_DMA_FROMDEVICE);
1041
1042         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1043                 pci_dma_sync_single_for_device(jme->pdev,
1044                                                 rxbi->mapping,
1045                                                 rxbi->len,
1046                                                 PCI_DMA_FROMDEVICE);
1047
1048                 ++(NET_STAT(jme).rx_dropped);
1049         } else {
1050                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1051                                 - RX_PREPAD_SIZE;
1052
1053                 skb_reserve(skb, RX_PREPAD_SIZE);
1054                 skb_put(skb, framesize);
1055                 skb->protocol = eth_type_trans(skb, jme->dev);
1056
1057                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1058                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1059                 else
1060 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
1061                         skb->ip_summed = CHECKSUM_NONE;
1062 #else
1063                         skb_checksum_none_assert(skb);
1064 #endif
1065
1066                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1067                         if (jme->vlgrp) {
1068                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1069                                         le16_to_cpu(rxdesc->descwb.vlan));
1070                                 NET_STAT(jme).rx_bytes += 4;
1071                         } else {
1072                                 dev_kfree_skb(skb);
1073                         }
1074                 } else {
1075                         jme->jme_rx(skb);
1076                 }
1077
1078                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1079                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1080                         ++(NET_STAT(jme).multicast);
1081
1082                 NET_STAT(jme).rx_bytes += framesize;
1083                 ++(NET_STAT(jme).rx_packets);
1084         }
1085
1086         jme_set_clean_rxdesc(jme, idx);
1087
1088 }
1089
1090 static int
1091 jme_process_receive(struct jme_adapter *jme, int limit)
1092 {
1093         struct jme_ring *rxring = &(jme->rxring[0]);
1094         struct rxdesc *rxdesc = rxring->desc;
1095         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1096
1097         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1098                 goto out_inc;
1099
1100         if (unlikely(atomic_read(&jme->link_changing) != 1))
1101                 goto out_inc;
1102
1103         if (unlikely(!netif_carrier_ok(jme->dev)))
1104                 goto out_inc;
1105
1106         i = atomic_read(&rxring->next_to_clean);
1107         while (limit > 0) {
1108                 rxdesc = rxring->desc;
1109                 rxdesc += i;
1110
1111                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1112                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1113                         goto out;
1114                 --limit;
1115
1116                 rmb();
1117                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1118
1119                 if (unlikely(desccnt > 1 ||
1120                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1121
1122                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1123                                 ++(NET_STAT(jme).rx_crc_errors);
1124                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1125                                 ++(NET_STAT(jme).rx_fifo_errors);
1126                         else
1127                                 ++(NET_STAT(jme).rx_errors);
1128
1129                         if (desccnt > 1)
1130                                 limit -= desccnt - 1;
1131
1132                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1133                                 jme_set_clean_rxdesc(jme, j);
1134                                 j = (j + 1) & (mask);
1135                         }
1136
1137                 } else {
1138                         jme_alloc_and_feed_skb(jme, i);
1139                 }
1140
1141                 i = (i + desccnt) & (mask);
1142         }
1143
1144 out:
1145         atomic_set(&rxring->next_to_clean, i);
1146
1147 out_inc:
1148         atomic_inc(&jme->rx_cleaning);
1149
1150         return limit > 0 ? limit : 0;
1151
1152 }
1153
1154 static void
1155 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1156 {
1157         if (likely(atmp == dpi->cur)) {
1158                 dpi->cnt = 0;
1159                 return;
1160         }
1161
1162         if (dpi->attempt == atmp) {
1163                 ++(dpi->cnt);
1164         } else {
1165                 dpi->attempt = atmp;
1166                 dpi->cnt = 0;
1167         }
1168
1169 }
1170
1171 static void
1172 jme_dynamic_pcc(struct jme_adapter *jme)
1173 {
1174         register struct dynpcc_info *dpi = &(jme->dpi);
1175
1176         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1177                 jme_attempt_pcc(dpi, PCC_P3);
1178         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1179                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1180                 jme_attempt_pcc(dpi, PCC_P2);
1181         else
1182                 jme_attempt_pcc(dpi, PCC_P1);
1183
1184         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1185                 if (dpi->attempt < dpi->cur)
1186                         tasklet_schedule(&jme->rxclean_task);
1187                 jme_set_rx_pcc(jme, dpi->attempt);
1188                 dpi->cur = dpi->attempt;
1189                 dpi->cnt = 0;
1190         }
1191 }
1192
1193 static void
1194 jme_start_pcc_timer(struct jme_adapter *jme)
1195 {
1196         struct dynpcc_info *dpi = &(jme->dpi);
1197         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1198         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1199         dpi->intr_cnt           = 0;
1200         jwrite32(jme, JME_TMCSR,
1201                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1202 }
1203
1204 static inline void
1205 jme_stop_pcc_timer(struct jme_adapter *jme)
1206 {
1207         jwrite32(jme, JME_TMCSR, 0);
1208 }
1209
1210 static void
1211 jme_shutdown_nic(struct jme_adapter *jme)
1212 {
1213         u32 phylink;
1214
1215         phylink = jme_linkstat_from_phy(jme);
1216
1217         if (!(phylink & PHY_LINK_UP)) {
1218                 /*
1219                  * Disable all interrupt before issue timer
1220                  */
1221                 jme_stop_irq(jme);
1222                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1223         }
1224 }
1225
1226 static void
1227 jme_pcc_tasklet(unsigned long arg)
1228 {
1229         struct jme_adapter *jme = (struct jme_adapter *)arg;
1230         struct net_device *netdev = jme->dev;
1231
1232         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1233                 jme_shutdown_nic(jme);
1234                 return;
1235         }
1236
1237         if (unlikely(!netif_carrier_ok(netdev) ||
1238                 (atomic_read(&jme->link_changing) != 1)
1239         )) {
1240                 jme_stop_pcc_timer(jme);
1241                 return;
1242         }
1243
1244         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1245                 jme_dynamic_pcc(jme);
1246
1247         jme_start_pcc_timer(jme);
1248 }
1249
1250 static inline void
1251 jme_polling_mode(struct jme_adapter *jme)
1252 {
1253         jme_set_rx_pcc(jme, PCC_OFF);
1254 }
1255
1256 static inline void
1257 jme_interrupt_mode(struct jme_adapter *jme)
1258 {
1259         jme_set_rx_pcc(jme, PCC_P1);
1260 }
1261
1262 static inline int
1263 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1264 {
1265         u32 apmc;
1266         apmc = jread32(jme, JME_APMC);
1267         return apmc & JME_APMC_PSEUDO_HP_EN;
1268 }
1269
1270 static void
1271 jme_start_shutdown_timer(struct jme_adapter *jme)
1272 {
1273         u32 apmc;
1274
1275         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1276         apmc &= ~JME_APMC_EPIEN_CTRL;
1277         if (!no_extplug) {
1278                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1279                 wmb();
1280         }
1281         jwrite32f(jme, JME_APMC, apmc);
1282
1283         jwrite32f(jme, JME_TIMER2, 0);
1284         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1285         jwrite32(jme, JME_TMCSR,
1286                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1287 }
1288
1289 static void
1290 jme_stop_shutdown_timer(struct jme_adapter *jme)
1291 {
1292         u32 apmc;
1293
1294         jwrite32f(jme, JME_TMCSR, 0);
1295         jwrite32f(jme, JME_TIMER2, 0);
1296         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1297
1298         apmc = jread32(jme, JME_APMC);
1299         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1300         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1301         wmb();
1302         jwrite32f(jme, JME_APMC, apmc);
1303 }
1304
1305 static void
1306 jme_link_change_tasklet(unsigned long arg)
1307 {
1308         struct jme_adapter *jme = (struct jme_adapter *)arg;
1309         struct net_device *netdev = jme->dev;
1310         int rc;
1311
1312         while (!atomic_dec_and_test(&jme->link_changing)) {
1313                 atomic_inc(&jme->link_changing);
1314                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1315                 while (atomic_read(&jme->link_changing) != 1)
1316                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1317         }
1318
1319         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1320                 goto out;
1321
1322         jme->old_mtu = netdev->mtu;
1323         netif_stop_queue(netdev);
1324         if (jme_pseudo_hotplug_enabled(jme))
1325                 jme_stop_shutdown_timer(jme);
1326
1327         jme_stop_pcc_timer(jme);
1328         tasklet_disable(&jme->txclean_task);
1329         tasklet_disable(&jme->rxclean_task);
1330         tasklet_disable(&jme->rxempty_task);
1331
1332         if (netif_carrier_ok(netdev)) {
1333                 jme_disable_rx_engine(jme);
1334                 jme_disable_tx_engine(jme);
1335                 jme_reset_mac_processor(jme);
1336                 jme_free_rx_resources(jme);
1337                 jme_free_tx_resources(jme);
1338
1339                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1340                         jme_polling_mode(jme);
1341
1342                 netif_carrier_off(netdev);
1343         }
1344
1345         jme_check_link(netdev, 0);
1346         if (netif_carrier_ok(netdev)) {
1347                 rc = jme_setup_rx_resources(jme);
1348                 if (rc) {
1349                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1350                         goto out_enable_tasklet;
1351                 }
1352
1353                 rc = jme_setup_tx_resources(jme);
1354                 if (rc) {
1355                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1356                         goto err_out_free_rx_resources;
1357                 }
1358
1359                 jme_enable_rx_engine(jme);
1360                 jme_enable_tx_engine(jme);
1361
1362                 netif_start_queue(netdev);
1363
1364                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1365                         jme_interrupt_mode(jme);
1366
1367                 jme_start_pcc_timer(jme);
1368         } else if (jme_pseudo_hotplug_enabled(jme)) {
1369                 jme_start_shutdown_timer(jme);
1370         }
1371
1372         goto out_enable_tasklet;
1373
1374 err_out_free_rx_resources:
1375         jme_free_rx_resources(jme);
1376 out_enable_tasklet:
1377         tasklet_enable(&jme->txclean_task);
1378         tasklet_hi_enable(&jme->rxclean_task);
1379         tasklet_hi_enable(&jme->rxempty_task);
1380 out:
1381         atomic_inc(&jme->link_changing);
1382 }
1383
1384 static void
1385 jme_rx_clean_tasklet(unsigned long arg)
1386 {
1387         struct jme_adapter *jme = (struct jme_adapter *)arg;
1388         struct dynpcc_info *dpi = &(jme->dpi);
1389
1390         jme_process_receive(jme, jme->rx_ring_size);
1391         ++(dpi->intr_cnt);
1392
1393 }
1394
1395 static int
1396 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1397 {
1398         struct jme_adapter *jme = jme_napi_priv(holder);
1399         DECLARE_NETDEV
1400         int rest;
1401
1402         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1403
1404         while (atomic_read(&jme->rx_empty) > 0) {
1405                 atomic_dec(&jme->rx_empty);
1406                 ++(NET_STAT(jme).rx_dropped);
1407                 jme_restart_rx_engine(jme);
1408         }
1409         atomic_inc(&jme->rx_empty);
1410
1411         if (rest) {
1412                 JME_RX_COMPLETE(netdev, holder);
1413                 jme_interrupt_mode(jme);
1414         }
1415
1416         JME_NAPI_WEIGHT_SET(budget, rest);
1417         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1418 }
1419
1420 static void
1421 jme_rx_empty_tasklet(unsigned long arg)
1422 {
1423         struct jme_adapter *jme = (struct jme_adapter *)arg;
1424
1425         if (unlikely(atomic_read(&jme->link_changing) != 1))
1426                 return;
1427
1428         if (unlikely(!netif_carrier_ok(jme->dev)))
1429                 return;
1430
1431         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1432
1433         jme_rx_clean_tasklet(arg);
1434
1435         while (atomic_read(&jme->rx_empty) > 0) {
1436                 atomic_dec(&jme->rx_empty);
1437                 ++(NET_STAT(jme).rx_dropped);
1438                 jme_restart_rx_engine(jme);
1439         }
1440         atomic_inc(&jme->rx_empty);
1441 }
1442
1443 static void
1444 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1445 {
1446         struct jme_ring *txring = &(jme->txring[0]);
1447
1448         smp_wmb();
1449         if (unlikely(netif_queue_stopped(jme->dev) &&
1450         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1451                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1452                 netif_wake_queue(jme->dev);
1453         }
1454
1455 }
1456
1457 static void
1458 jme_tx_clean_tasklet(unsigned long arg)
1459 {
1460         struct jme_adapter *jme = (struct jme_adapter *)arg;
1461         struct jme_ring *txring = &(jme->txring[0]);
1462         struct txdesc *txdesc = txring->desc;
1463         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1464         int i, j, cnt = 0, max, err, mask;
1465
1466         tx_dbg(jme, "Into txclean\n");
1467
1468         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1469                 goto out;
1470
1471         if (unlikely(atomic_read(&jme->link_changing) != 1))
1472                 goto out;
1473
1474         if (unlikely(!netif_carrier_ok(jme->dev)))
1475                 goto out;
1476
1477         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1478         mask = jme->tx_ring_mask;
1479
1480         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1481
1482                 ctxbi = txbi + i;
1483
1484                 if (likely(ctxbi->skb &&
1485                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1486
1487                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1488                                i, ctxbi->nr_desc, jiffies);
1489
1490                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1491
1492                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1493                                 ttxbi = txbi + ((i + j) & (mask));
1494                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1495
1496                                 pci_unmap_page(jme->pdev,
1497                                                  ttxbi->mapping,
1498                                                  ttxbi->len,
1499                                                  PCI_DMA_TODEVICE);
1500
1501                                 ttxbi->mapping = 0;
1502                                 ttxbi->len = 0;
1503                         }
1504
1505                         dev_kfree_skb(ctxbi->skb);
1506
1507                         cnt += ctxbi->nr_desc;
1508
1509                         if (unlikely(err)) {
1510                                 ++(NET_STAT(jme).tx_carrier_errors);
1511                         } else {
1512                                 ++(NET_STAT(jme).tx_packets);
1513                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1514                         }
1515
1516                         ctxbi->skb = NULL;
1517                         ctxbi->len = 0;
1518                         ctxbi->start_xmit = 0;
1519
1520                 } else {
1521                         break;
1522                 }
1523
1524                 i = (i + ctxbi->nr_desc) & mask;
1525
1526                 ctxbi->nr_desc = 0;
1527         }
1528
1529         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1530         atomic_set(&txring->next_to_clean, i);
1531         atomic_add(cnt, &txring->nr_free);
1532
1533         jme_wake_queue_if_stopped(jme);
1534
1535 out:
1536         atomic_inc(&jme->tx_cleaning);
1537 }
1538
1539 static void
1540 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1541 {
1542         /*
1543          * Disable interrupt
1544          */
1545         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1546
1547         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1548                 /*
1549                  * Link change event is critical
1550                  * all other events are ignored
1551                  */
1552                 jwrite32(jme, JME_IEVE, intrstat);
1553                 tasklet_schedule(&jme->linkch_task);
1554                 goto out_reenable;
1555         }
1556
1557         if (intrstat & INTR_TMINTR) {
1558                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1559                 tasklet_schedule(&jme->pcc_task);
1560         }
1561
1562         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1563                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1564                 tasklet_schedule(&jme->txclean_task);
1565         }
1566
1567         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1568                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1569                                                      INTR_PCCRX0 |
1570                                                      INTR_RX0EMP)) |
1571                                         INTR_RX0);
1572         }
1573
1574         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1575                 if (intrstat & INTR_RX0EMP)
1576                         atomic_inc(&jme->rx_empty);
1577
1578                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1579                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1580                                 jme_polling_mode(jme);
1581                                 JME_RX_SCHEDULE(jme);
1582                         }
1583                 }
1584         } else {
1585                 if (intrstat & INTR_RX0EMP) {
1586                         atomic_inc(&jme->rx_empty);
1587                         tasklet_hi_schedule(&jme->rxempty_task);
1588                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1589                         tasklet_hi_schedule(&jme->rxclean_task);
1590                 }
1591         }
1592
1593 out_reenable:
1594         /*
1595          * Re-enable interrupt
1596          */
1597         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1598 }
1599
1600 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1601 static irqreturn_t
1602 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1603 #else
1604 static irqreturn_t
1605 jme_intr(int irq, void *dev_id)
1606 #endif
1607 {
1608         struct net_device *netdev = dev_id;
1609         struct jme_adapter *jme = netdev_priv(netdev);
1610         u32 intrstat;
1611
1612         intrstat = jread32(jme, JME_IEVE);
1613
1614         /*
1615          * Check if it's really an interrupt for us
1616          */
1617         if (unlikely((intrstat & INTR_ENABLE) == 0))
1618                 return IRQ_NONE;
1619
1620         /*
1621          * Check if the device still exist
1622          */
1623         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1624                 return IRQ_NONE;
1625
1626         jme_intr_msi(jme, intrstat);
1627
1628         return IRQ_HANDLED;
1629 }
1630
1631 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1632 static irqreturn_t
1633 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1634 #else
1635 static irqreturn_t
1636 jme_msi(int irq, void *dev_id)
1637 #endif
1638 {
1639         struct net_device *netdev = dev_id;
1640         struct jme_adapter *jme = netdev_priv(netdev);
1641         u32 intrstat;
1642
1643         intrstat = jread32(jme, JME_IEVE);
1644
1645         jme_intr_msi(jme, intrstat);
1646
1647         return IRQ_HANDLED;
1648 }
1649
1650 static void
1651 jme_reset_link(struct jme_adapter *jme)
1652 {
1653         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1654 }
1655
1656 static void
1657 jme_restart_an(struct jme_adapter *jme)
1658 {
1659         u32 bmcr;
1660
1661         spin_lock_bh(&jme->phy_lock);
1662         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1663         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1664         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1665         spin_unlock_bh(&jme->phy_lock);
1666 }
1667
1668 static int
1669 jme_request_irq(struct jme_adapter *jme)
1670 {
1671         int rc;
1672         struct net_device *netdev = jme->dev;
1673 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1674         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1675         int irq_flags = SA_SHIRQ;
1676 #else
1677         irq_handler_t handler = jme_intr;
1678         int irq_flags = IRQF_SHARED;
1679 #endif
1680
1681         if (!pci_enable_msi(jme->pdev)) {
1682                 set_bit(JME_FLAG_MSI, &jme->flags);
1683                 handler = jme_msi;
1684                 irq_flags = 0;
1685         }
1686
1687         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1688                           netdev);
1689         if (rc) {
1690                 netdev_err(netdev,
1691                            "Unable to request %s interrupt (return: %d)\n",
1692                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1693                            rc);
1694
1695                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1696                         pci_disable_msi(jme->pdev);
1697                         clear_bit(JME_FLAG_MSI, &jme->flags);
1698                 }
1699         } else {
1700                 netdev->irq = jme->pdev->irq;
1701         }
1702
1703         return rc;
1704 }
1705
1706 static void
1707 jme_free_irq(struct jme_adapter *jme)
1708 {
1709         free_irq(jme->pdev->irq, jme->dev);
1710         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1711                 pci_disable_msi(jme->pdev);
1712                 clear_bit(JME_FLAG_MSI, &jme->flags);
1713                 jme->dev->irq = jme->pdev->irq;
1714         }
1715 }
1716
1717 static inline void
1718 jme_new_phy_on(struct jme_adapter *jme)
1719 {
1720         u32 reg;
1721
1722         reg = jread32(jme, JME_PHY_PWR);
1723         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1724                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1725         jwrite32(jme, JME_PHY_PWR, reg);
1726
1727         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1728         reg &= ~PE1_GPREG0_PBG;
1729         reg |= PE1_GPREG0_ENBG;
1730         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1731 }
1732
1733 static inline void
1734 jme_new_phy_off(struct jme_adapter *jme)
1735 {
1736         u32 reg;
1737
1738         reg = jread32(jme, JME_PHY_PWR);
1739         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1740                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1741         jwrite32(jme, JME_PHY_PWR, reg);
1742
1743         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1744         reg &= ~PE1_GPREG0_PBG;
1745         reg |= PE1_GPREG0_PDD3COLD;
1746         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1747 }
1748
1749 static inline void
1750 jme_phy_on(struct jme_adapter *jme)
1751 {
1752         u32 bmcr;
1753
1754         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1755         bmcr &= ~BMCR_PDOWN;
1756         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1757
1758         if (new_phy_power_ctrl(jme->chip_main_rev))
1759                 jme_new_phy_on(jme);
1760 }
1761
1762 static inline void
1763 jme_phy_off(struct jme_adapter *jme)
1764 {
1765         u32 bmcr;
1766
1767         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1768         bmcr |= BMCR_PDOWN;
1769         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1770
1771         if (new_phy_power_ctrl(jme->chip_main_rev))
1772                 jme_new_phy_off(jme);
1773 }
1774
1775 static int
1776 jme_open(struct net_device *netdev)
1777 {
1778         struct jme_adapter *jme = netdev_priv(netdev);
1779         int rc;
1780
1781         jme_clear_pm(jme);
1782         JME_NAPI_ENABLE(jme);
1783
1784         tasklet_enable(&jme->linkch_task);
1785         tasklet_enable(&jme->txclean_task);
1786         tasklet_hi_enable(&jme->rxclean_task);
1787         tasklet_hi_enable(&jme->rxempty_task);
1788
1789         rc = jme_request_irq(jme);
1790         if (rc)
1791                 goto err_out;
1792
1793         jme_start_irq(jme);
1794
1795         jme_phy_on(jme);
1796         if (test_bit(JME_FLAG_SSET, &jme->flags))
1797                 jme_set_settings(netdev, &jme->old_ecmd);
1798         else
1799                 jme_reset_phy_processor(jme);
1800
1801         jme_reset_link(jme);
1802
1803         return 0;
1804
1805 err_out:
1806         netif_stop_queue(netdev);
1807         netif_carrier_off(netdev);
1808         return rc;
1809 }
1810
1811 static void
1812 jme_set_100m_half(struct jme_adapter *jme)
1813 {
1814         u32 bmcr, tmp;
1815
1816         jme_phy_on(jme);
1817         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1818         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1819                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1820         tmp |= BMCR_SPEED100;
1821
1822         if (bmcr != tmp)
1823                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1824
1825         if (jme->fpgaver)
1826                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1827         else
1828                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1829 }
1830
1831 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1832 static void
1833 jme_wait_link(struct jme_adapter *jme)
1834 {
1835         u32 phylink, to = JME_WAIT_LINK_TIME;
1836
1837         mdelay(1000);
1838         phylink = jme_linkstat_from_phy(jme);
1839         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1840                 mdelay(10);
1841                 phylink = jme_linkstat_from_phy(jme);
1842         }
1843 }
1844
1845 static void
1846 jme_powersave_phy(struct jme_adapter *jme)
1847 {
1848         if (jme->reg_pmcs) {
1849                 jme_set_100m_half(jme);
1850
1851                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
1852                         jme_wait_link(jme);
1853
1854                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
1855         } else {
1856                 jme_phy_off(jme);
1857         }
1858 }
1859
1860 static int
1861 jme_close(struct net_device *netdev)
1862 {
1863         struct jme_adapter *jme = netdev_priv(netdev);
1864
1865         netif_stop_queue(netdev);
1866         netif_carrier_off(netdev);
1867
1868         jme_stop_irq(jme);
1869         jme_free_irq(jme);
1870
1871         JME_NAPI_DISABLE(jme);
1872
1873         tasklet_disable(&jme->linkch_task);
1874         tasklet_disable(&jme->txclean_task);
1875         tasklet_disable(&jme->rxclean_task);
1876         tasklet_disable(&jme->rxempty_task);
1877
1878         jme_disable_rx_engine(jme);
1879         jme_disable_tx_engine(jme);
1880         jme_reset_mac_processor(jme);
1881         jme_free_rx_resources(jme);
1882         jme_free_tx_resources(jme);
1883         jme->phylink = 0;
1884         jme_phy_off(jme);
1885
1886         return 0;
1887 }
1888
1889 static int
1890 jme_alloc_txdesc(struct jme_adapter *jme,
1891                         struct sk_buff *skb)
1892 {
1893         struct jme_ring *txring = &(jme->txring[0]);
1894         int idx, nr_alloc, mask = jme->tx_ring_mask;
1895
1896         idx = txring->next_to_use;
1897         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1898
1899         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1900                 return -1;
1901
1902         atomic_sub(nr_alloc, &txring->nr_free);
1903
1904         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1905
1906         return idx;
1907 }
1908
1909 static void
1910 jme_fill_tx_map(struct pci_dev *pdev,
1911                 struct txdesc *txdesc,
1912                 struct jme_buffer_info *txbi,
1913                 struct page *page,
1914                 u32 page_offset,
1915                 u32 len,
1916                 u8 hidma)
1917 {
1918         dma_addr_t dmaaddr;
1919
1920         dmaaddr = pci_map_page(pdev,
1921                                 page,
1922                                 page_offset,
1923                                 len,
1924                                 PCI_DMA_TODEVICE);
1925
1926         pci_dma_sync_single_for_device(pdev,
1927                                        dmaaddr,
1928                                        len,
1929                                        PCI_DMA_TODEVICE);
1930
1931         txdesc->dw[0] = 0;
1932         txdesc->dw[1] = 0;
1933         txdesc->desc2.flags     = TXFLAG_OWN;
1934         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1935         txdesc->desc2.datalen   = cpu_to_le16(len);
1936         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1937         txdesc->desc2.bufaddrl  = cpu_to_le32(
1938                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1939
1940         txbi->mapping = dmaaddr;
1941         txbi->len = len;
1942 }
1943
1944 static void
1945 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1946 {
1947         struct jme_ring *txring = &(jme->txring[0]);
1948         struct txdesc *txdesc = txring->desc, *ctxdesc;
1949         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1950         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1951         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1952         int mask = jme->tx_ring_mask;
1953         struct skb_frag_struct *frag;
1954         u32 len;
1955
1956         for (i = 0 ; i < nr_frags ; ++i) {
1957                 frag = &skb_shinfo(skb)->frags[i];
1958                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1959                 ctxbi = txbi + ((idx + i + 2) & (mask));
1960
1961                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1962                                  frag->page_offset, frag->size, hidma);
1963         }
1964
1965         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1966         ctxdesc = txdesc + ((idx + 1) & (mask));
1967         ctxbi = txbi + ((idx + 1) & (mask));
1968         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1969                         offset_in_page(skb->data), len, hidma);
1970
1971 }
1972
1973 static int
1974 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1975 {
1976         if (unlikely(
1977 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1978         skb_shinfo(skb)->tso_size
1979 #else
1980         skb_shinfo(skb)->gso_size
1981 #endif
1982                         && skb_header_cloned(skb) &&
1983                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1984                 dev_kfree_skb(skb);
1985                 return -1;
1986         }
1987
1988         return 0;
1989 }
1990
1991 static int
1992 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1993 {
1994 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1995         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1996 #else
1997         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1998 #endif
1999         if (*mss) {
2000                 *flags |= TXFLAG_LSEN;
2001
2002                 if (skb->protocol == htons(ETH_P_IP)) {
2003                         struct iphdr *iph = ip_hdr(skb);
2004
2005                         iph->check = 0;
2006                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2007                                                                 iph->daddr, 0,
2008                                                                 IPPROTO_TCP,
2009                                                                 0);
2010                 } else {
2011                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2012
2013                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2014                                                                 &ip6h->daddr, 0,
2015                                                                 IPPROTO_TCP,
2016                                                                 0);
2017                 }
2018
2019                 return 0;
2020         }
2021
2022         return 1;
2023 }
2024
2025 static void
2026 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2027 {
2028 #ifdef CHECKSUM_PARTIAL
2029         if (skb->ip_summed == CHECKSUM_PARTIAL)
2030 #else
2031         if (skb->ip_summed == CHECKSUM_HW)
2032 #endif
2033         {
2034                 u8 ip_proto;
2035
2036 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2037                 if (skb->protocol == htons(ETH_P_IP))
2038                         ip_proto = ip_hdr(skb)->protocol;
2039                 else if (skb->protocol == htons(ETH_P_IPV6))
2040                         ip_proto = ipv6_hdr(skb)->nexthdr;
2041                 else
2042                         ip_proto = 0;
2043 #else
2044                 switch (skb->protocol) {
2045                 case htons(ETH_P_IP):
2046                         ip_proto = ip_hdr(skb)->protocol;
2047                         break;
2048                 case htons(ETH_P_IPV6):
2049                         ip_proto = ipv6_hdr(skb)->nexthdr;
2050                         break;
2051                 default:
2052                         ip_proto = 0;
2053                         break;
2054                 }
2055 #endif
2056
2057                 switch (ip_proto) {
2058                 case IPPROTO_TCP:
2059                         *flags |= TXFLAG_TCPCS;
2060                         break;
2061                 case IPPROTO_UDP:
2062                         *flags |= TXFLAG_UDPCS;
2063                         break;
2064                 default:
2065                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2066                         break;
2067                 }
2068         }
2069 }
2070
2071 static inline void
2072 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2073 {
2074         if (vlan_tx_tag_present(skb)) {
2075                 *flags |= TXFLAG_TAGON;
2076                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2077         }
2078 }
2079
2080 static int
2081 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2082 {
2083         struct jme_ring *txring = &(jme->txring[0]);
2084         struct txdesc *txdesc;
2085         struct jme_buffer_info *txbi;
2086         u8 flags;
2087
2088         txdesc = (struct txdesc *)txring->desc + idx;
2089         txbi = txring->bufinf + idx;
2090
2091         txdesc->dw[0] = 0;
2092         txdesc->dw[1] = 0;
2093         txdesc->dw[2] = 0;
2094         txdesc->dw[3] = 0;
2095         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2096         /*
2097          * Set OWN bit at final.
2098          * When kernel transmit faster than NIC.
2099          * And NIC trying to send this descriptor before we tell
2100          * it to start sending this TX queue.
2101          * Other fields are already filled correctly.
2102          */
2103         wmb();
2104         flags = TXFLAG_OWN | TXFLAG_INT;
2105         /*
2106          * Set checksum flags while not tso
2107          */
2108         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2109                 jme_tx_csum(jme, skb, &flags);
2110         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2111         jme_map_tx_skb(jme, skb, idx);
2112         txdesc->desc1.flags = flags;
2113         /*
2114          * Set tx buffer info after telling NIC to send
2115          * For better tx_clean timing
2116          */
2117         wmb();
2118         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2119         txbi->skb = skb;
2120         txbi->len = skb->len;
2121         txbi->start_xmit = jiffies;
2122         if (!txbi->start_xmit)
2123                 txbi->start_xmit = (0UL-1);
2124
2125         return 0;
2126 }
2127
2128 static void
2129 jme_stop_queue_if_full(struct jme_adapter *jme)
2130 {
2131         struct jme_ring *txring = &(jme->txring[0]);
2132         struct jme_buffer_info *txbi = txring->bufinf;
2133         int idx = atomic_read(&txring->next_to_clean);
2134
2135         txbi += idx;
2136
2137         smp_wmb();
2138         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2139                 netif_stop_queue(jme->dev);
2140                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2141                 smp_wmb();
2142                 if (atomic_read(&txring->nr_free)
2143                         >= (jme->tx_wake_threshold)) {
2144                         netif_wake_queue(jme->dev);
2145                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2146                 }
2147         }
2148
2149         if (unlikely(txbi->start_xmit &&
2150                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2151                         txbi->skb)) {
2152                 netif_stop_queue(jme->dev);
2153                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
2154         }
2155 }
2156
2157 /*
2158  * This function is already protected by netif_tx_lock()
2159  */
2160
2161 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2162 static int
2163 #else
2164 static netdev_tx_t
2165 #endif
2166 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2167 {
2168         struct jme_adapter *jme = netdev_priv(netdev);
2169         int idx;
2170
2171         if (unlikely(jme_expand_header(jme, skb))) {
2172                 ++(NET_STAT(jme).tx_dropped);
2173                 return NETDEV_TX_OK;
2174         }
2175
2176         idx = jme_alloc_txdesc(jme, skb);
2177
2178         if (unlikely(idx < 0)) {
2179                 netif_stop_queue(netdev);
2180                 netif_err(jme, tx_err, jme->dev,
2181                           "BUG! Tx ring full when queue awake!\n");
2182
2183                 return NETDEV_TX_BUSY;
2184         }
2185
2186         jme_fill_tx_desc(jme, skb, idx);
2187
2188         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2189                                 TXCS_SELECT_QUEUE0 |
2190                                 TXCS_QUEUE0S |
2191                                 TXCS_ENABLE);
2192 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2193         netdev->trans_start = jiffies;
2194 #endif
2195
2196         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2197                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2198         jme_stop_queue_if_full(jme);
2199
2200         return NETDEV_TX_OK;
2201 }
2202
2203 static void
2204 jme_set_unicastaddr(struct net_device *netdev)
2205 {
2206         struct jme_adapter *jme = netdev_priv(netdev);
2207         u32 val;
2208
2209         val = (netdev->dev_addr[3] & 0xff) << 24 |
2210               (netdev->dev_addr[2] & 0xff) << 16 |
2211               (netdev->dev_addr[1] & 0xff) <<  8 |
2212               (netdev->dev_addr[0] & 0xff);
2213         jwrite32(jme, JME_RXUMA_LO, val);
2214         val = (netdev->dev_addr[5] & 0xff) << 8 |
2215               (netdev->dev_addr[4] & 0xff);
2216         jwrite32(jme, JME_RXUMA_HI, val);
2217 }
2218
2219 static int
2220 jme_set_macaddr(struct net_device *netdev, void *p)
2221 {
2222         struct jme_adapter *jme = netdev_priv(netdev);
2223         struct sockaddr *addr = p;
2224
2225         if (netif_running(netdev))
2226                 return -EBUSY;
2227
2228         spin_lock_bh(&jme->macaddr_lock);
2229         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2230         jme_set_unicastaddr(netdev);
2231         spin_unlock_bh(&jme->macaddr_lock);
2232
2233         return 0;
2234 }
2235
2236 static void
2237 jme_set_multi(struct net_device *netdev)
2238 {
2239         struct jme_adapter *jme = netdev_priv(netdev);
2240         u32 mc_hash[2] = {};
2241 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2242         int i;
2243 #endif
2244
2245         spin_lock_bh(&jme->rxmcs_lock);
2246
2247         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2248
2249         if (netdev->flags & IFF_PROMISC) {
2250                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2251         } else if (netdev->flags & IFF_ALLMULTI) {
2252                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2253         } else if (netdev->flags & IFF_MULTICAST) {
2254 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2255                 struct dev_mc_list *mclist;
2256 #else
2257                 struct netdev_hw_addr *ha;
2258 #endif
2259                 int bit_nr;
2260
2261                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2262 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2263                 for (i = 0, mclist = netdev->mc_list;
2264                         mclist && i < netdev->mc_count;
2265                         ++i, mclist = mclist->next) {
2266 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2267                 netdev_for_each_mc_addr(mclist, netdev) {
2268 #else
2269                 netdev_for_each_mc_addr(ha, netdev) {
2270 #endif
2271 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2272                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2273 #else
2274                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2275 #endif
2276                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2277                 }
2278
2279                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2280                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2281         }
2282
2283         wmb();
2284         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2285
2286         spin_unlock_bh(&jme->rxmcs_lock);
2287 }
2288
2289 static int
2290 jme_change_mtu(struct net_device *netdev, int new_mtu)
2291 {
2292         struct jme_adapter *jme = netdev_priv(netdev);
2293
2294         if (new_mtu == jme->old_mtu)
2295                 return 0;
2296
2297         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2298                 ((new_mtu) < IPV6_MIN_MTU))
2299                 return -EINVAL;
2300
2301         if (new_mtu > 4000) {
2302                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2303                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2304                 jme_restart_rx_engine(jme);
2305         } else {
2306                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2307                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2308                 jme_restart_rx_engine(jme);
2309         }
2310
2311         if (new_mtu > 1900) {
2312                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2313                                 NETIF_F_TSO | NETIF_F_TSO6);
2314         } else {
2315                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2316                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2317                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2318                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2319         }
2320
2321         netdev->mtu = new_mtu;
2322         jme_reset_link(jme);
2323
2324         return 0;
2325 }
2326
2327 static void
2328 jme_tx_timeout(struct net_device *netdev)
2329 {
2330         struct jme_adapter *jme = netdev_priv(netdev);
2331
2332         jme->phylink = 0;
2333         jme_reset_phy_processor(jme);
2334         if (test_bit(JME_FLAG_SSET, &jme->flags))
2335                 jme_set_settings(netdev, &jme->old_ecmd);
2336
2337         /*
2338          * Force to Reset the link again
2339          */
2340         jme_reset_link(jme);
2341 }
2342
2343 static inline void jme_pause_rx(struct jme_adapter *jme)
2344 {
2345         atomic_dec(&jme->link_changing);
2346
2347         jme_set_rx_pcc(jme, PCC_OFF);
2348         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2349                 JME_NAPI_DISABLE(jme);
2350         } else {
2351                 tasklet_disable(&jme->rxclean_task);
2352                 tasklet_disable(&jme->rxempty_task);
2353         }
2354 }
2355
2356 static inline void jme_resume_rx(struct jme_adapter *jme)
2357 {
2358         struct dynpcc_info *dpi = &(jme->dpi);
2359
2360         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2361                 JME_NAPI_ENABLE(jme);
2362         } else {
2363                 tasklet_hi_enable(&jme->rxclean_task);
2364                 tasklet_hi_enable(&jme->rxempty_task);
2365         }
2366         dpi->cur                = PCC_P1;
2367         dpi->attempt            = PCC_P1;
2368         dpi->cnt                = 0;
2369         jme_set_rx_pcc(jme, PCC_P1);
2370
2371         atomic_inc(&jme->link_changing);
2372 }
2373
2374 static void
2375 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2376 {
2377         struct jme_adapter *jme = netdev_priv(netdev);
2378
2379         jme_pause_rx(jme);
2380         jme->vlgrp = grp;
2381         jme_resume_rx(jme);
2382 }
2383
2384 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2385 static void
2386 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2387 {
2388         struct jme_adapter *jme = netdev_priv(netdev);
2389
2390         if(jme->vlgrp) {
2391                 jme_pause_rx(jme);
2392 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2393                 jme->vlgrp->vlan_devices[vid] = NULL;
2394 #else
2395                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2396 #endif
2397                 jme_resume_rx(jme);
2398         }
2399 }
2400 #endif
2401
2402 static void
2403 jme_get_drvinfo(struct net_device *netdev,
2404                      struct ethtool_drvinfo *info)
2405 {
2406         struct jme_adapter *jme = netdev_priv(netdev);
2407
2408         strcpy(info->driver, DRV_NAME);
2409         strcpy(info->version, DRV_VERSION);
2410         strcpy(info->bus_info, pci_name(jme->pdev));
2411 }
2412
2413 static int
2414 jme_get_regs_len(struct net_device *netdev)
2415 {
2416         return JME_REG_LEN;
2417 }
2418
2419 static void
2420 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2421 {
2422         int i;
2423
2424         for (i = 0 ; i < len ; i += 4)
2425                 p[i >> 2] = jread32(jme, reg + i);
2426 }
2427
2428 static void
2429 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2430 {
2431         int i;
2432         u16 *p16 = (u16 *)p;
2433
2434         for (i = 0 ; i < reg_nr ; ++i)
2435                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2436 }
2437
2438 static void
2439 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2440 {
2441         struct jme_adapter *jme = netdev_priv(netdev);
2442         u32 *p32 = (u32 *)p;
2443
2444         memset(p, 0xFF, JME_REG_LEN);
2445
2446         regs->version = 1;
2447         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2448
2449         p32 += 0x100 >> 2;
2450         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2451
2452         p32 += 0x100 >> 2;
2453         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2454
2455         p32 += 0x100 >> 2;
2456         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2457
2458         p32 += 0x100 >> 2;
2459         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2460 }
2461
2462 static int
2463 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2464 {
2465         struct jme_adapter *jme = netdev_priv(netdev);
2466
2467         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2468         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2469
2470         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2471                 ecmd->use_adaptive_rx_coalesce = false;
2472                 ecmd->rx_coalesce_usecs = 0;
2473                 ecmd->rx_max_coalesced_frames = 0;
2474                 return 0;
2475         }
2476
2477         ecmd->use_adaptive_rx_coalesce = true;
2478
2479         switch (jme->dpi.cur) {
2480         case PCC_P1:
2481                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2482                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2483                 break;
2484         case PCC_P2:
2485                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2486                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2487                 break;
2488         case PCC_P3:
2489                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2490                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2491                 break;
2492         default:
2493                 break;
2494         }
2495
2496         return 0;
2497 }
2498
2499 static int
2500 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2501 {
2502         struct jme_adapter *jme = netdev_priv(netdev);
2503         struct dynpcc_info *dpi = &(jme->dpi);
2504
2505         if (netif_running(netdev))
2506                 return -EBUSY;
2507
2508         if (ecmd->use_adaptive_rx_coalesce &&
2509             test_bit(JME_FLAG_POLL, &jme->flags)) {
2510                 clear_bit(JME_FLAG_POLL, &jme->flags);
2511                 jme->jme_rx = netif_rx;
2512                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2513                 dpi->cur                = PCC_P1;
2514                 dpi->attempt            = PCC_P1;
2515                 dpi->cnt                = 0;
2516                 jme_set_rx_pcc(jme, PCC_P1);
2517                 jme_interrupt_mode(jme);
2518         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2519                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2520                 set_bit(JME_FLAG_POLL, &jme->flags);
2521                 jme->jme_rx = netif_receive_skb;
2522                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2523                 jme_interrupt_mode(jme);
2524         }
2525
2526         return 0;
2527 }
2528
2529 static void
2530 jme_get_pauseparam(struct net_device *netdev,
2531                         struct ethtool_pauseparam *ecmd)
2532 {
2533         struct jme_adapter *jme = netdev_priv(netdev);
2534         u32 val;
2535
2536         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2537         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2538
2539         spin_lock_bh(&jme->phy_lock);
2540         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2541         spin_unlock_bh(&jme->phy_lock);
2542
2543         ecmd->autoneg =
2544                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2545 }
2546
2547 static int
2548 jme_set_pauseparam(struct net_device *netdev,
2549                         struct ethtool_pauseparam *ecmd)
2550 {
2551         struct jme_adapter *jme = netdev_priv(netdev);
2552         u32 val;
2553
2554         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2555                 (ecmd->tx_pause != 0)) {
2556
2557                 if (ecmd->tx_pause)
2558                         jme->reg_txpfc |= TXPFC_PF_EN;
2559                 else
2560                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2561
2562                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2563         }
2564
2565         spin_lock_bh(&jme->rxmcs_lock);
2566         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2567                 (ecmd->rx_pause != 0)) {
2568
2569                 if (ecmd->rx_pause)
2570                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2571                 else
2572                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2573
2574                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2575         }
2576         spin_unlock_bh(&jme->rxmcs_lock);
2577
2578         spin_lock_bh(&jme->phy_lock);
2579         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2580         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2581                 (ecmd->autoneg != 0)) {
2582
2583                 if (ecmd->autoneg)
2584                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2585                 else
2586                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2587
2588                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2589                                 MII_ADVERTISE, val);
2590         }
2591         spin_unlock_bh(&jme->phy_lock);
2592
2593         return 0;
2594 }
2595
2596 static void
2597 jme_get_wol(struct net_device *netdev,
2598                 struct ethtool_wolinfo *wol)
2599 {
2600         struct jme_adapter *jme = netdev_priv(netdev);
2601
2602         wol->supported = WAKE_MAGIC | WAKE_PHY;
2603
2604         wol->wolopts = 0;
2605
2606         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2607                 wol->wolopts |= WAKE_PHY;
2608
2609         if (jme->reg_pmcs & PMCS_MFEN)
2610                 wol->wolopts |= WAKE_MAGIC;
2611
2612 }
2613
2614 static int
2615 jme_set_wol(struct net_device *netdev,
2616                 struct ethtool_wolinfo *wol)
2617 {
2618         struct jme_adapter *jme = netdev_priv(netdev);
2619
2620         if (wol->wolopts & (WAKE_MAGICSECURE |
2621                                 WAKE_UCAST |
2622                                 WAKE_MCAST |
2623                                 WAKE_BCAST |
2624                                 WAKE_ARP))
2625                 return -EOPNOTSUPP;
2626
2627         jme->reg_pmcs = 0;
2628
2629         if (wol->wolopts & WAKE_PHY)
2630                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2631
2632         if (wol->wolopts & WAKE_MAGIC)
2633                 jme->reg_pmcs |= PMCS_MFEN;
2634
2635         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2636
2637 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
2638         device_set_wakeup_enable(&jme->pdev->dev, jme->reg_pmcs);
2639 #endif
2640
2641         return 0;
2642 }
2643
2644 static int
2645 jme_get_settings(struct net_device *netdev,
2646                      struct ethtool_cmd *ecmd)
2647 {
2648         struct jme_adapter *jme = netdev_priv(netdev);
2649         int rc;
2650
2651         spin_lock_bh(&jme->phy_lock);
2652         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2653         spin_unlock_bh(&jme->phy_lock);
2654         return rc;
2655 }
2656
2657 static int
2658 jme_set_settings(struct net_device *netdev,
2659                      struct ethtool_cmd *ecmd)
2660 {
2661         struct jme_adapter *jme = netdev_priv(netdev);
2662         int rc, fdc = 0;
2663
2664         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2665                 return -EINVAL;
2666
2667         /*
2668          * Check If user changed duplex only while force_media.
2669          * Hardware would not generate link change interrupt.
2670          */
2671         if (jme->mii_if.force_media &&
2672         ecmd->autoneg != AUTONEG_ENABLE &&
2673         (jme->mii_if.full_duplex != ecmd->duplex))
2674                 fdc = 1;
2675
2676         spin_lock_bh(&jme->phy_lock);
2677         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2678         spin_unlock_bh(&jme->phy_lock);
2679
2680         if (!rc) {
2681                 if (fdc)
2682                         jme_reset_link(jme);
2683                 jme->old_ecmd = *ecmd;
2684                 set_bit(JME_FLAG_SSET, &jme->flags);
2685         }
2686
2687         return rc;
2688 }
2689
2690 static int
2691 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2692 {
2693         int rc;
2694         struct jme_adapter *jme = netdev_priv(netdev);
2695         struct mii_ioctl_data *mii_data = if_mii(rq);
2696         unsigned int duplex_chg;
2697
2698         if (cmd == SIOCSMIIREG) {
2699                 u16 val = mii_data->val_in;
2700                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2701                     (val & BMCR_SPEED1000))
2702                         return -EINVAL;
2703         }
2704
2705         spin_lock_bh(&jme->phy_lock);
2706         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2707         spin_unlock_bh(&jme->phy_lock);
2708
2709         if (!rc && (cmd == SIOCSMIIREG)) {
2710                 if (duplex_chg)
2711                         jme_reset_link(jme);
2712                 jme_get_settings(netdev, &jme->old_ecmd);
2713                 set_bit(JME_FLAG_SSET, &jme->flags);
2714         }
2715
2716         return rc;
2717 }
2718
2719 static u32
2720 jme_get_link(struct net_device *netdev)
2721 {
2722         struct jme_adapter *jme = netdev_priv(netdev);
2723         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2724 }
2725
2726 static u32
2727 jme_get_msglevel(struct net_device *netdev)
2728 {
2729         struct jme_adapter *jme = netdev_priv(netdev);
2730         return jme->msg_enable;
2731 }
2732
2733 static void
2734 jme_set_msglevel(struct net_device *netdev, u32 value)
2735 {
2736         struct jme_adapter *jme = netdev_priv(netdev);
2737         jme->msg_enable = value;
2738 }
2739
2740 static u32
2741 jme_get_rx_csum(struct net_device *netdev)
2742 {
2743         struct jme_adapter *jme = netdev_priv(netdev);
2744         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2745 }
2746
2747 static int
2748 jme_set_rx_csum(struct net_device *netdev, u32 on)
2749 {
2750         struct jme_adapter *jme = netdev_priv(netdev);
2751
2752         spin_lock_bh(&jme->rxmcs_lock);
2753         if (on)
2754                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2755         else
2756                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2757         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2758         spin_unlock_bh(&jme->rxmcs_lock);
2759
2760         return 0;
2761 }
2762
2763 static int
2764 jme_set_tx_csum(struct net_device *netdev, u32 on)
2765 {
2766         struct jme_adapter *jme = netdev_priv(netdev);
2767
2768         if (on) {
2769                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2770                 if (netdev->mtu <= 1900)
2771                         netdev->features |=
2772                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2773         } else {
2774                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2775                 netdev->features &=
2776                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2777         }
2778
2779         return 0;
2780 }
2781
2782 static int
2783 jme_set_tso(struct net_device *netdev, u32 on)
2784 {
2785         struct jme_adapter *jme = netdev_priv(netdev);
2786
2787         if (on) {
2788                 set_bit(JME_FLAG_TSO, &jme->flags);
2789                 if (netdev->mtu <= 1900)
2790                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2791         } else {
2792                 clear_bit(JME_FLAG_TSO, &jme->flags);
2793                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2794         }
2795
2796         return 0;
2797 }
2798
2799 static int
2800 jme_nway_reset(struct net_device *netdev)
2801 {
2802         struct jme_adapter *jme = netdev_priv(netdev);
2803         jme_restart_an(jme);
2804         return 0;
2805 }
2806
2807 static u8
2808 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2809 {
2810         u32 val;
2811         int to;
2812
2813         val = jread32(jme, JME_SMBCSR);
2814         to = JME_SMB_BUSY_TIMEOUT;
2815         while ((val & SMBCSR_BUSY) && --to) {
2816                 msleep(1);
2817                 val = jread32(jme, JME_SMBCSR);
2818         }
2819         if (!to) {
2820                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2821                 return 0xFF;
2822         }
2823
2824         jwrite32(jme, JME_SMBINTF,
2825                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2826                 SMBINTF_HWRWN_READ |
2827                 SMBINTF_HWCMD);
2828
2829         val = jread32(jme, JME_SMBINTF);
2830         to = JME_SMB_BUSY_TIMEOUT;
2831         while ((val & SMBINTF_HWCMD) && --to) {
2832                 msleep(1);
2833                 val = jread32(jme, JME_SMBINTF);
2834         }
2835         if (!to) {
2836                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2837                 return 0xFF;
2838         }
2839
2840         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2841 }
2842
2843 static void
2844 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2845 {
2846         u32 val;
2847         int to;
2848
2849         val = jread32(jme, JME_SMBCSR);
2850         to = JME_SMB_BUSY_TIMEOUT;
2851         while ((val & SMBCSR_BUSY) && --to) {
2852                 msleep(1);
2853                 val = jread32(jme, JME_SMBCSR);
2854         }
2855         if (!to) {
2856                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2857                 return;
2858         }
2859
2860         jwrite32(jme, JME_SMBINTF,
2861                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2862                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2863                 SMBINTF_HWRWN_WRITE |
2864                 SMBINTF_HWCMD);
2865
2866         val = jread32(jme, JME_SMBINTF);
2867         to = JME_SMB_BUSY_TIMEOUT;
2868         while ((val & SMBINTF_HWCMD) && --to) {
2869                 msleep(1);
2870                 val = jread32(jme, JME_SMBINTF);
2871         }
2872         if (!to) {
2873                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2874                 return;
2875         }
2876
2877         mdelay(2);
2878 }
2879
2880 static int
2881 jme_get_eeprom_len(struct net_device *netdev)
2882 {
2883         struct jme_adapter *jme = netdev_priv(netdev);
2884         u32 val;
2885         val = jread32(jme, JME_SMBCSR);
2886         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2887 }
2888
2889 static int
2890 jme_get_eeprom(struct net_device *netdev,
2891                 struct ethtool_eeprom *eeprom, u8 *data)
2892 {
2893         struct jme_adapter *jme = netdev_priv(netdev);
2894         int i, offset = eeprom->offset, len = eeprom->len;
2895
2896         /*
2897          * ethtool will check the boundary for us
2898          */
2899         eeprom->magic = JME_EEPROM_MAGIC;
2900         for (i = 0 ; i < len ; ++i)
2901                 data[i] = jme_smb_read(jme, i + offset);
2902
2903         return 0;
2904 }
2905
2906 static int
2907 jme_set_eeprom(struct net_device *netdev,
2908                 struct ethtool_eeprom *eeprom, u8 *data)
2909 {
2910         struct jme_adapter *jme = netdev_priv(netdev);
2911         int i, offset = eeprom->offset, len = eeprom->len;
2912
2913         if (eeprom->magic != JME_EEPROM_MAGIC)
2914                 return -EINVAL;
2915
2916         /*
2917          * ethtool will check the boundary for us
2918          */
2919         for (i = 0 ; i < len ; ++i)
2920                 jme_smb_write(jme, i + offset, data[i]);
2921
2922         return 0;
2923 }
2924
2925 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2926 static struct ethtool_ops jme_ethtool_ops = {
2927 #else
2928 static const struct ethtool_ops jme_ethtool_ops = {
2929 #endif
2930         .get_drvinfo            = jme_get_drvinfo,
2931         .get_regs_len           = jme_get_regs_len,
2932         .get_regs               = jme_get_regs,
2933         .get_coalesce           = jme_get_coalesce,
2934         .set_coalesce           = jme_set_coalesce,
2935         .get_pauseparam         = jme_get_pauseparam,
2936         .set_pauseparam         = jme_set_pauseparam,
2937         .get_wol                = jme_get_wol,
2938         .set_wol                = jme_set_wol,
2939         .get_settings           = jme_get_settings,
2940         .set_settings           = jme_set_settings,
2941         .get_link               = jme_get_link,
2942         .get_msglevel           = jme_get_msglevel,
2943         .set_msglevel           = jme_set_msglevel,
2944         .get_rx_csum            = jme_get_rx_csum,
2945         .set_rx_csum            = jme_set_rx_csum,
2946         .set_tx_csum            = jme_set_tx_csum,
2947         .set_tso                = jme_set_tso,
2948         .set_sg                 = ethtool_op_set_sg,
2949         .nway_reset             = jme_nway_reset,
2950         .get_eeprom_len         = jme_get_eeprom_len,
2951         .get_eeprom             = jme_get_eeprom,
2952         .set_eeprom             = jme_set_eeprom,
2953 };
2954
2955 static int
2956 jme_pci_dma64(struct pci_dev *pdev)
2957 {
2958         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2959 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2960             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2961 #else
2962             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2963 #endif
2964            )
2965 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2966                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2967 #else
2968                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2969 #endif
2970                         return 1;
2971
2972         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2973 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2974             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2975 #else
2976             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2977 #endif
2978            )
2979 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2980                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2981 #else
2982                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2983 #endif
2984                         return 1;
2985
2986 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2987         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2988                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2989 #else
2990         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2991                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2992 #endif
2993                         return 0;
2994
2995         return -1;
2996 }
2997
2998 static inline void
2999 jme_phy_init(struct jme_adapter *jme)
3000 {
3001         u16 reg26;
3002
3003         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
3004         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
3005 }
3006
3007 static inline void
3008 jme_check_hw_ver(struct jme_adapter *jme)
3009 {
3010         u32 chipmode;
3011
3012         chipmode = jread32(jme, JME_CHIPMODE);
3013
3014         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3015         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3016         jme->chip_main_rev = jme->chiprev & 0xF;
3017         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3018 }
3019
3020 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3021 static const struct net_device_ops jme_netdev_ops = {
3022         .ndo_open               = jme_open,
3023         .ndo_stop               = jme_close,
3024         .ndo_validate_addr      = eth_validate_addr,
3025         .ndo_do_ioctl           = jme_ioctl,
3026         .ndo_start_xmit         = jme_start_xmit,
3027         .ndo_set_mac_address    = jme_set_macaddr,
3028         .ndo_set_multicast_list = jme_set_multi,
3029         .ndo_change_mtu         = jme_change_mtu,
3030         .ndo_tx_timeout         = jme_tx_timeout,
3031         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3032 };
3033 #endif
3034
3035 static int __devinit
3036 jme_init_one(struct pci_dev *pdev,
3037              const struct pci_device_id *ent)
3038 {
3039         int rc = 0, using_dac, i;
3040         struct net_device *netdev;
3041         struct jme_adapter *jme;
3042         u16 bmcr, bmsr;
3043         u32 apmc;
3044
3045         /*
3046          * set up PCI device basics
3047          */
3048         rc = pci_enable_device(pdev);
3049         if (rc) {
3050                 pr_err("Cannot enable PCI device\n");
3051                 goto err_out;
3052         }
3053
3054         using_dac = jme_pci_dma64(pdev);
3055         if (using_dac < 0) {
3056                 pr_err("Cannot set PCI DMA Mask\n");
3057                 rc = -EIO;
3058                 goto err_out_disable_pdev;
3059         }
3060
3061         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3062                 pr_err("No PCI resource region found\n");
3063                 rc = -ENOMEM;
3064                 goto err_out_disable_pdev;
3065         }
3066
3067         rc = pci_request_regions(pdev, DRV_NAME);
3068         if (rc) {
3069                 pr_err("Cannot obtain PCI resource region\n");
3070                 goto err_out_disable_pdev;
3071         }
3072
3073         pci_set_master(pdev);
3074
3075         /*
3076          * alloc and init net device
3077          */
3078         netdev = alloc_etherdev(sizeof(*jme));
3079         if (!netdev) {
3080                 pr_err("Cannot allocate netdev structure\n");
3081                 rc = -ENOMEM;
3082                 goto err_out_release_regions;
3083         }
3084 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3085         netdev->netdev_ops = &jme_netdev_ops;
3086 #else
3087         netdev->open                    = jme_open;
3088         netdev->stop                    = jme_close;
3089         netdev->do_ioctl                = jme_ioctl;
3090         netdev->hard_start_xmit         = jme_start_xmit;
3091         netdev->set_mac_address         = jme_set_macaddr;
3092         netdev->set_multicast_list      = jme_set_multi;
3093         netdev->change_mtu              = jme_change_mtu;
3094         netdev->tx_timeout              = jme_tx_timeout;
3095         netdev->vlan_rx_register        = jme_vlan_rx_register;
3096 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3097         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3098 #endif
3099         NETDEV_GET_STATS(netdev, &jme_get_stats);
3100 #endif
3101         netdev->ethtool_ops             = &jme_ethtool_ops;
3102         netdev->watchdog_timeo          = TX_TIMEOUT;
3103         netdev->features                =       NETIF_F_IP_CSUM |
3104                                                 NETIF_F_IPV6_CSUM |
3105                                                 NETIF_F_SG |
3106                                                 NETIF_F_TSO |
3107                                                 NETIF_F_TSO6 |
3108                                                 NETIF_F_HW_VLAN_TX |
3109                                                 NETIF_F_HW_VLAN_RX;
3110         if (using_dac)
3111                 netdev->features        |=      NETIF_F_HIGHDMA;
3112
3113         SET_NETDEV_DEV(netdev, &pdev->dev);
3114         pci_set_drvdata(pdev, netdev);
3115
3116         /*
3117          * init adapter info
3118          */
3119         jme = netdev_priv(netdev);
3120         jme->pdev = pdev;
3121         jme->dev = netdev;
3122         jme->jme_rx = netif_rx;
3123         jme->jme_vlan_rx = vlan_hwaccel_rx;
3124         jme->old_mtu = netdev->mtu = 1500;
3125         jme->phylink = 0;
3126         jme->tx_ring_size = 1 << 10;
3127         jme->tx_ring_mask = jme->tx_ring_size - 1;
3128         jme->tx_wake_threshold = 1 << 9;
3129         jme->rx_ring_size = 1 << 9;
3130         jme->rx_ring_mask = jme->rx_ring_size - 1;
3131         jme->msg_enable = JME_DEF_MSG_ENABLE;
3132         jme->regs = ioremap(pci_resource_start(pdev, 0),
3133                              pci_resource_len(pdev, 0));
3134         if (!(jme->regs)) {
3135                 pr_err("Mapping PCI resource region error\n");
3136                 rc = -ENOMEM;
3137                 goto err_out_free_netdev;
3138         }
3139
3140         if (no_pseudohp) {
3141                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3142                 jwrite32(jme, JME_APMC, apmc);
3143         } else if (force_pseudohp) {
3144                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3145                 jwrite32(jme, JME_APMC, apmc);
3146         }
3147
3148         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3149
3150         spin_lock_init(&jme->phy_lock);
3151         spin_lock_init(&jme->macaddr_lock);
3152         spin_lock_init(&jme->rxmcs_lock);
3153
3154         atomic_set(&jme->link_changing, 1);
3155         atomic_set(&jme->rx_cleaning, 1);
3156         atomic_set(&jme->tx_cleaning, 1);
3157         atomic_set(&jme->rx_empty, 1);
3158
3159         tasklet_init(&jme->pcc_task,
3160                      jme_pcc_tasklet,
3161                      (unsigned long) jme);
3162         tasklet_init(&jme->linkch_task,
3163                      jme_link_change_tasklet,
3164                      (unsigned long) jme);
3165         tasklet_init(&jme->txclean_task,
3166                      jme_tx_clean_tasklet,
3167                      (unsigned long) jme);
3168         tasklet_init(&jme->rxclean_task,
3169                      jme_rx_clean_tasklet,
3170                      (unsigned long) jme);
3171         tasklet_init(&jme->rxempty_task,
3172                      jme_rx_empty_tasklet,
3173                      (unsigned long) jme);
3174         tasklet_disable_nosync(&jme->linkch_task);
3175         tasklet_disable_nosync(&jme->txclean_task);
3176         tasklet_disable_nosync(&jme->rxclean_task);
3177         tasklet_disable_nosync(&jme->rxempty_task);
3178         jme->dpi.cur = PCC_P1;
3179
3180         jme->reg_ghc = 0;
3181         jme->reg_rxcs = RXCS_DEFAULT;
3182         jme->reg_rxmcs = RXMCS_DEFAULT;
3183         jme->reg_txpfc = 0;
3184         jme->reg_pmcs = PMCS_MFEN;
3185         jme->reg_gpreg1 = GPREG1_DEFAULT;
3186         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3187         set_bit(JME_FLAG_TSO, &jme->flags);
3188
3189         /*
3190          * Get Max Read Req Size from PCI Config Space
3191          */
3192         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3193         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3194         switch (jme->mrrs) {
3195         case MRRS_128B:
3196                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3197                 break;
3198         case MRRS_256B:
3199                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3200                 break;
3201         default:
3202                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3203                 break;
3204         }
3205
3206         /*
3207          * Must check before reset_mac_processor
3208          */
3209         jme_check_hw_ver(jme);
3210         jme->mii_if.dev = netdev;
3211         if (jme->fpgaver) {
3212                 jme->mii_if.phy_id = 0;
3213                 for (i = 1 ; i < 32 ; ++i) {
3214                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3215                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3216                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3217                                 jme->mii_if.phy_id = i;
3218                                 break;
3219                         }
3220                 }
3221
3222                 if (!jme->mii_if.phy_id) {
3223                         rc = -EIO;
3224                         pr_err("Can not find phy_id\n");
3225                         goto err_out_unmap;
3226                 }
3227
3228                 jme->reg_ghc |= GHC_LINK_POLL;
3229         } else {
3230                 jme->mii_if.phy_id = 1;
3231         }
3232         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3233                 jme->mii_if.supports_gmii = true;
3234         else
3235                 jme->mii_if.supports_gmii = false;
3236         jme->mii_if.phy_id_mask = 0x1F;
3237         jme->mii_if.reg_num_mask = 0x1F;
3238         jme->mii_if.mdio_read = jme_mdio_read;
3239         jme->mii_if.mdio_write = jme_mdio_write;
3240
3241         jme_clear_pm(jme);
3242         jme_set_phyfifo_5level(jme);
3243 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22)
3244         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3245 #else
3246         jme->pcirev = pdev->revision;
3247 #endif
3248         if (!jme->fpgaver)
3249                 jme_phy_init(jme);
3250         jme_phy_off(jme);
3251
3252         /*
3253          * Reset MAC processor and reload EEPROM for MAC Address
3254          */
3255         jme_reset_mac_processor(jme);
3256         rc = jme_reload_eeprom(jme);
3257         if (rc) {
3258                 pr_err("Reload eeprom for reading MAC Address error\n");
3259                 goto err_out_unmap;
3260         }
3261         jme_load_macaddr(netdev);
3262
3263         /*
3264          * Tell stack that we are not ready to work until open()
3265          */
3266         netif_carrier_off(netdev);
3267
3268         rc = register_netdev(netdev);
3269         if (rc) {
3270                 pr_err("Cannot register net device\n");
3271                 goto err_out_unmap;
3272         }
3273
3274         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3275                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3276                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3277                    "JMC250 Gigabit Ethernet" :
3278                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3279                    "JMC260 Fast Ethernet" : "Unknown",
3280                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3281                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3282                    jme->pcirev,
3283                    netdev->dev_addr[0],
3284                    netdev->dev_addr[1],
3285                    netdev->dev_addr[2],
3286                    netdev->dev_addr[3],
3287                    netdev->dev_addr[4],
3288                    netdev->dev_addr[5]);
3289
3290         return 0;
3291
3292 err_out_unmap:
3293         iounmap(jme->regs);
3294 err_out_free_netdev:
3295         pci_set_drvdata(pdev, NULL);
3296         free_netdev(netdev);
3297 err_out_release_regions:
3298         pci_release_regions(pdev);
3299 err_out_disable_pdev:
3300         pci_disable_device(pdev);
3301 err_out:
3302         return rc;
3303 }
3304
3305 static void __devexit
3306 jme_remove_one(struct pci_dev *pdev)
3307 {
3308         struct net_device *netdev = pci_get_drvdata(pdev);
3309         struct jme_adapter *jme = netdev_priv(netdev);
3310
3311         unregister_netdev(netdev);
3312         iounmap(jme->regs);
3313         pci_set_drvdata(pdev, NULL);
3314         free_netdev(netdev);
3315         pci_release_regions(pdev);
3316         pci_disable_device(pdev);
3317
3318 }
3319
3320 static void
3321 jme_shutdown(struct pci_dev *pdev)
3322 {
3323         struct net_device *netdev = pci_get_drvdata(pdev);
3324         struct jme_adapter *jme = netdev_priv(netdev);
3325
3326         jme_powersave_phy(jme);
3327 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3328         pci_enable_wake(pdev, PCI_D3hot, true);
3329 #else
3330         pci_pme_active(pdev, true);
3331 #endif
3332 }
3333
3334 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
3335         #ifdef CONFIG_PM
3336                 #define JME_HAVE_PM
3337         #endif
3338 #else
3339         #ifdef CONFIG_PM_SLEEP
3340                 #define JME_HAVE_PM
3341         #endif
3342 #endif
3343
3344 #ifdef JME_HAVE_PM
3345 static int
3346 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,38)
3347 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3348 #else
3349 jme_suspend(struct device *dev)
3350 #endif
3351 {
3352 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
3353         struct pci_dev *pdev = to_pci_dev(dev);
3354 #endif
3355         struct net_device *netdev = pci_get_drvdata(pdev);
3356         struct jme_adapter *jme = netdev_priv(netdev);
3357
3358         atomic_dec(&jme->link_changing);
3359
3360         netif_device_detach(netdev);
3361         netif_stop_queue(netdev);
3362         jme_stop_irq(jme);
3363
3364         tasklet_disable(&jme->txclean_task);
3365         tasklet_disable(&jme->rxclean_task);
3366         tasklet_disable(&jme->rxempty_task);
3367
3368         if (netif_carrier_ok(netdev)) {
3369                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3370                         jme_polling_mode(jme);
3371
3372                 jme_stop_pcc_timer(jme);
3373                 jme_disable_rx_engine(jme);
3374                 jme_disable_tx_engine(jme);
3375                 jme_reset_mac_processor(jme);
3376                 jme_free_rx_resources(jme);
3377                 jme_free_tx_resources(jme);
3378                 netif_carrier_off(netdev);
3379                 jme->phylink = 0;
3380         }
3381
3382         tasklet_enable(&jme->txclean_task);
3383         tasklet_hi_enable(&jme->rxclean_task);
3384         tasklet_hi_enable(&jme->rxempty_task);
3385
3386         jme_powersave_phy(jme);
3387 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,38)
3388         pci_save_state(pdev);
3389 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3390         pci_enable_wake(pdev, PCI_D3hot, true);
3391 #else
3392         pci_pme_active(pdev, true);
3393 #endif
3394         pci_set_power_state(pdev, PCI_D3hot);
3395 #endif
3396
3397         return 0;
3398 }
3399
3400 static int
3401 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,38)
3402 jme_resume(struct pci_dev *pdev)
3403 #else
3404 jme_resume(struct device *dev)
3405 #endif
3406 {
3407 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
3408         struct pci_dev *pdev = to_pci_dev(dev);
3409 #endif
3410         struct net_device *netdev = pci_get_drvdata(pdev);
3411         struct jme_adapter *jme = netdev_priv(netdev);
3412
3413         jme_clear_pm(jme);
3414 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,38)
3415         pci_restore_state(pdev);
3416 #endif
3417
3418         jme_phy_on(jme);
3419         if (test_bit(JME_FLAG_SSET, &jme->flags))
3420                 jme_set_settings(netdev, &jme->old_ecmd);
3421         else
3422                 jme_reset_phy_processor(jme);
3423
3424         jme_start_irq(jme);
3425         netif_device_attach(netdev);
3426
3427         atomic_inc(&jme->link_changing);
3428
3429         jme_reset_link(jme);
3430
3431         return 0;
3432 }
3433
3434 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
3435 static SIMPLE_DEV_PM_OPS(jme_pm_ops, jme_suspend, jme_resume);
3436 #define JME_PM_OPS (&jme_pm_ops)
3437 #endif
3438
3439 #else
3440
3441 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
3442 #define JME_PM_OPS NULL
3443 #endif
3444 #endif
3445
3446 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3447 static struct pci_device_id jme_pci_tbl[] = {
3448 #else
3449 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3450 #endif
3451         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3452         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3453         { }
3454 };
3455
3456 static struct pci_driver jme_driver = {
3457         .name           = DRV_NAME,
3458         .id_table       = jme_pci_tbl,
3459         .probe          = jme_init_one,
3460         .remove         = __devexit_p(jme_remove_one),
3461         .shutdown       = jme_shutdown,
3462 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,38)
3463         .suspend        = jme_suspend,
3464         .resume         = jme_resume
3465 #else
3466         .driver.pm      = JME_PM_OPS,
3467 #endif
3468 };
3469
3470 static int __init
3471 jme_init_module(void)
3472 {
3473         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3474         return pci_register_driver(&jme_driver);
3475 }
3476
3477 static void __exit
3478 jme_cleanup_module(void)
3479 {
3480         pci_unregister_driver(&jme_driver);
3481 }
3482
3483 module_init(jme_init_module);
3484 module_exit(jme_cleanup_module);
3485
3486 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3487 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3488 MODULE_LICENSE("GPL");
3489 MODULE_VERSION(DRV_VERSION);
3490 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3491