]> bbs.cooldavid.org Git - jme.git/blame_incremental - jme.c
git://bbs.cooldavid.org / jme.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Fix version.h include order
[jme.git] / jme.c
... / ...
CommitLineData
1/*
2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3 *
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
6 *
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24#include <linux/version.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/ethtool.h>
31#include <linux/mii.h>
32#include <linux/crc32.h>
33#include <linux/delay.h>
34#include <linux/spinlock.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
39#include <linux/udp.h>
40#include <linux/if_vlan.h>
41#include <linux/slab.h>
42#include <net/ip6_checksum.h>
43#include "jme.h"
44
45static int force_pseudohp = -1;
46static int no_pseudohp = -1;
47static int no_extplug = -1;
48module_param(force_pseudohp, int, 0);
49MODULE_PARM_DESC(force_pseudohp,
50 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
51module_param(no_pseudohp, int, 0);
52MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
53module_param(no_extplug, int, 0);
54MODULE_PARM_DESC(no_extplug,
55 "Do not use external plug signal for pseudo hot-plug.");
56
57static int
58jme_mdio_read(struct net_device *netdev, int phy, int reg)
59{
60 struct jme_adapter *jme = netdev_priv(netdev);
61 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
62
63read_again:
64 jwrite32(jme, JME_SMI, SMI_OP_REQ |
65 smi_phy_addr(phy) |
66 smi_reg_addr(reg));
67
68 wmb();
69 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
70 udelay(20);
71 val = jread32(jme, JME_SMI);
72 if ((val & SMI_OP_REQ) == 0)
73 break;
74 }
75
76 if (i == 0) {
77 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
78 return 0;
79 }
80
81 if (again--)
82 goto read_again;
83
84 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
85}
86
87static void
88jme_mdio_write(struct net_device *netdev,
89 int phy, int reg, int val)
90{
91 struct jme_adapter *jme = netdev_priv(netdev);
92 int i;
93
94 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
95 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
96 smi_phy_addr(phy) | smi_reg_addr(reg));
97
98 wmb();
99 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
100 udelay(20);
101 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
102 break;
103 }
104
105 if (i == 0)
106 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
107}
108
109static inline void
110jme_reset_phy_processor(struct jme_adapter *jme)
111{
112 u32 val;
113
114 jme_mdio_write(jme->dev,
115 jme->mii_if.phy_id,
116 MII_ADVERTISE, ADVERTISE_ALL |
117 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
118
119 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
120 jme_mdio_write(jme->dev,
121 jme->mii_if.phy_id,
122 MII_CTRL1000,
123 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
124
125 val = jme_mdio_read(jme->dev,
126 jme->mii_if.phy_id,
127 MII_BMCR);
128
129 jme_mdio_write(jme->dev,
130 jme->mii_if.phy_id,
131 MII_BMCR, val | BMCR_RESET);
132}
133
134static void
135jme_setup_wakeup_frame(struct jme_adapter *jme,
136 u32 *mask, u32 crc, int fnr)
137{
138 int i;
139
140 /*
141 * Setup CRC pattern
142 */
143 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
144 wmb();
145 jwrite32(jme, JME_WFODP, crc);
146 wmb();
147
148 /*
149 * Setup Mask
150 */
151 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
152 jwrite32(jme, JME_WFOI,
153 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
154 (fnr & WFOI_FRAME_SEL));
155 wmb();
156 jwrite32(jme, JME_WFODP, mask[i]);
157 wmb();
158 }
159}
160
161static inline void
162jme_reset_mac_processor(struct jme_adapter *jme)
163{
164 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
165 u32 crc = 0xCDCDCDCD;
166 u32 gpreg0;
167 int i;
168
169 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
170 udelay(2);
171 jwrite32(jme, JME_GHC, jme->reg_ghc);
172
173 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
174 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
175 jwrite32(jme, JME_RXQDC, 0x00000000);
176 jwrite32(jme, JME_RXNDA, 0x00000000);
177 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
178 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
179 jwrite32(jme, JME_TXQDC, 0x00000000);
180 jwrite32(jme, JME_TXNDA, 0x00000000);
181
182 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
183 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
184 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
185 jme_setup_wakeup_frame(jme, mask, crc, i);
186 if (jme->fpgaver)
187 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
188 else
189 gpreg0 = GPREG0_DEFAULT;
190 jwrite32(jme, JME_GPREG0, gpreg0);
191 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
192}
193
194static inline void
195jme_reset_ghc_speed(struct jme_adapter *jme)
196{
197 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
198 jwrite32(jme, JME_GHC, jme->reg_ghc);
199}
200
201static inline void
202jme_clear_pm(struct jme_adapter *jme)
203{
204 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
205 pci_set_power_state(jme->pdev, PCI_D0);
206 pci_enable_wake(jme->pdev, PCI_D0, false);
207}
208
209static int
210jme_reload_eeprom(struct jme_adapter *jme)
211{
212 u32 val;
213 int i;
214
215 val = jread32(jme, JME_SMBCSR);
216
217 if (val & SMBCSR_EEPROMD) {
218 val |= SMBCSR_CNACK;
219 jwrite32(jme, JME_SMBCSR, val);
220 val |= SMBCSR_RELOAD;
221 jwrite32(jme, JME_SMBCSR, val);
222 mdelay(12);
223
224 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
225 mdelay(1);
226 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
227 break;
228 }
229
230 if (i == 0) {
231 jeprintk(jme->pdev, "eeprom reload timeout\n");
232 return -EIO;
233 }
234 }
235
236 return 0;
237}
238
239static void
240jme_load_macaddr(struct net_device *netdev)
241{
242 struct jme_adapter *jme = netdev_priv(netdev);
243 unsigned char macaddr[6];
244 u32 val;
245
246 spin_lock_bh(&jme->macaddr_lock);
247 val = jread32(jme, JME_RXUMA_LO);
248 macaddr[0] = (val >> 0) & 0xFF;
249 macaddr[1] = (val >> 8) & 0xFF;
250 macaddr[2] = (val >> 16) & 0xFF;
251 macaddr[3] = (val >> 24) & 0xFF;
252 val = jread32(jme, JME_RXUMA_HI);
253 macaddr[4] = (val >> 0) & 0xFF;
254 macaddr[5] = (val >> 8) & 0xFF;
255 memcpy(netdev->dev_addr, macaddr, 6);
256 spin_unlock_bh(&jme->macaddr_lock);
257}
258
259static inline void
260jme_set_rx_pcc(struct jme_adapter *jme, int p)
261{
262 switch (p) {
263 case PCC_OFF:
264 jwrite32(jme, JME_PCCRX0,
265 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
266 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
267 break;
268 case PCC_P1:
269 jwrite32(jme, JME_PCCRX0,
270 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
271 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
272 break;
273 case PCC_P2:
274 jwrite32(jme, JME_PCCRX0,
275 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
276 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
277 break;
278 case PCC_P3:
279 jwrite32(jme, JME_PCCRX0,
280 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
281 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
282 break;
283 default:
284 break;
285 }
286 wmb();
287
288 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
289#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
290 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
291#else
292 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
293#endif
294}
295
296static void
297jme_start_irq(struct jme_adapter *jme)
298{
299 register struct dynpcc_info *dpi = &(jme->dpi);
300
301 jme_set_rx_pcc(jme, PCC_P1);
302 dpi->cur = PCC_P1;
303 dpi->attempt = PCC_P1;
304 dpi->cnt = 0;
305
306 jwrite32(jme, JME_PCCTX,
307 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
308 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
309 PCCTXQ0_EN
310 );
311
312 /*
313 * Enable Interrupts
314 */
315 jwrite32(jme, JME_IENS, INTR_ENABLE);
316}
317
318static inline void
319jme_stop_irq(struct jme_adapter *jme)
320{
321 /*
322 * Disable Interrupts
323 */
324 jwrite32f(jme, JME_IENC, INTR_ENABLE);
325}
326
327static u32
328jme_linkstat_from_phy(struct jme_adapter *jme)
329{
330 u32 phylink, bmsr;
331
332 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
333 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
334 if (bmsr & BMSR_ANCOMP)
335 phylink |= PHY_LINK_AUTONEG_COMPLETE;
336
337 return phylink;
338}
339
340static inline void
341jme_set_phyfifoa(struct jme_adapter *jme)
342{
343 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
344}
345
346static inline void
347jme_set_phyfifob(struct jme_adapter *jme)
348{
349 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
350}
351
352static int
353jme_check_link(struct net_device *netdev, int testonly)
354{
355 struct jme_adapter *jme = netdev_priv(netdev);
356 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
357 char linkmsg[64];
358 int rc = 0;
359
360 linkmsg[0] = '\0';
361
362 if (jme->fpgaver)
363 phylink = jme_linkstat_from_phy(jme);
364 else
365 phylink = jread32(jme, JME_PHY_LINK);
366
367 if (phylink & PHY_LINK_UP) {
368 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
369 /*
370 * If we did not enable AN
371 * Speed/Duplex Info should be obtained from SMI
372 */
373 phylink = PHY_LINK_UP;
374
375 bmcr = jme_mdio_read(jme->dev,
376 jme->mii_if.phy_id,
377 MII_BMCR);
378
379 phylink |= ((bmcr & BMCR_SPEED1000) &&
380 (bmcr & BMCR_SPEED100) == 0) ?
381 PHY_LINK_SPEED_1000M :
382 (bmcr & BMCR_SPEED100) ?
383 PHY_LINK_SPEED_100M :
384 PHY_LINK_SPEED_10M;
385
386 phylink |= (bmcr & BMCR_FULLDPLX) ?
387 PHY_LINK_DUPLEX : 0;
388
389 strcat(linkmsg, "Forced: ");
390 } else {
391 /*
392 * Keep polling for speed/duplex resolve complete
393 */
394 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
395 --cnt) {
396
397 udelay(1);
398
399 if (jme->fpgaver)
400 phylink = jme_linkstat_from_phy(jme);
401 else
402 phylink = jread32(jme, JME_PHY_LINK);
403 }
404 if (!cnt)
405 jeprintk(jme->pdev,
406 "Waiting speed resolve timeout.\n");
407
408 strcat(linkmsg, "ANed: ");
409 }
410
411 if (jme->phylink == phylink) {
412 rc = 1;
413 goto out;
414 }
415 if (testonly)
416 goto out;
417
418 jme->phylink = phylink;
419
420 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
421 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
422 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
423 switch (phylink & PHY_LINK_SPEED_MASK) {
424 case PHY_LINK_SPEED_10M:
425 ghc |= GHC_SPEED_10M |
426 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
427 strcat(linkmsg, "10 Mbps, ");
428 break;
429 case PHY_LINK_SPEED_100M:
430 ghc |= GHC_SPEED_100M |
431 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
432 strcat(linkmsg, "100 Mbps, ");
433 break;
434 case PHY_LINK_SPEED_1000M:
435 ghc |= GHC_SPEED_1000M |
436 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
437 strcat(linkmsg, "1000 Mbps, ");
438 break;
439 default:
440 break;
441 }
442
443 if (phylink & PHY_LINK_DUPLEX) {
444 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
445 ghc |= GHC_DPX;
446 } else {
447 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
448 TXMCS_BACKOFF |
449 TXMCS_CARRIERSENSE |
450 TXMCS_COLLISION);
451 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
452 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
453 TXTRHD_TXREN |
454 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
455 }
456
457 gpreg1 = GPREG1_DEFAULT;
458 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
459 if (!(phylink & PHY_LINK_DUPLEX))
460 gpreg1 |= GPREG1_HALFMODEPATCH;
461 switch (phylink & PHY_LINK_SPEED_MASK) {
462 case PHY_LINK_SPEED_10M:
463 jme_set_phyfifoa(jme);
464 gpreg1 |= GPREG1_RSSPATCH;
465 break;
466 case PHY_LINK_SPEED_100M:
467 jme_set_phyfifob(jme);
468 gpreg1 |= GPREG1_RSSPATCH;
469 break;
470 case PHY_LINK_SPEED_1000M:
471 jme_set_phyfifoa(jme);
472 break;
473 default:
474 break;
475 }
476 }
477
478 jwrite32(jme, JME_GPREG1, gpreg1);
479 jwrite32(jme, JME_GHC, ghc);
480 jme->reg_ghc = ghc;
481
482 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
483 "Full-Duplex, " :
484 "Half-Duplex, ");
485 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
486 "MDI-X" :
487 "MDI");
488#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
489 msg_link(jme, "Link is up at %s.\n", linkmsg);
490#else
491 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
492#endif
493 netif_carrier_on(netdev);
494 } else {
495 if (testonly)
496 goto out;
497
498#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
499 msg_link(jme, "Link is down.\n");
500#else
501 netif_info(jme, link, jme->dev, "Link is down.\n");
502#endif
503 jme->phylink = 0;
504 netif_carrier_off(netdev);
505 }
506
507out:
508 return rc;
509}
510
511static int
512jme_setup_tx_resources(struct jme_adapter *jme)
513{
514 struct jme_ring *txring = &(jme->txring[0]);
515
516 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
517 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
518 &(txring->dmaalloc),
519 GFP_ATOMIC);
520
521 if (!txring->alloc)
522 goto err_set_null;
523
524 /*
525 * 16 Bytes align
526 */
527 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
528 RING_DESC_ALIGN);
529 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
530 txring->next_to_use = 0;
531 atomic_set(&txring->next_to_clean, 0);
532 atomic_set(&txring->nr_free, jme->tx_ring_size);
533
534 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
535 jme->tx_ring_size, GFP_ATOMIC);
536 if (unlikely(!(txring->bufinf)))
537 goto err_free_txring;
538
539 /*
540 * Initialize Transmit Descriptors
541 */
542 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
543 memset(txring->bufinf, 0,
544 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
545
546 return 0;
547
548err_free_txring:
549 dma_free_coherent(&(jme->pdev->dev),
550 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
551 txring->alloc,
552 txring->dmaalloc);
553
554err_set_null:
555 txring->desc = NULL;
556 txring->dmaalloc = 0;
557 txring->dma = 0;
558 txring->bufinf = NULL;
559
560 return -ENOMEM;
561}
562
563static void
564jme_free_tx_resources(struct jme_adapter *jme)
565{
566 int i;
567 struct jme_ring *txring = &(jme->txring[0]);
568 struct jme_buffer_info *txbi;
569
570 if (txring->alloc) {
571 if (txring->bufinf) {
572 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
573 txbi = txring->bufinf + i;
574 if (txbi->skb) {
575 dev_kfree_skb(txbi->skb);
576 txbi->skb = NULL;
577 }
578 txbi->mapping = 0;
579 txbi->len = 0;
580 txbi->nr_desc = 0;
581 txbi->start_xmit = 0;
582 }
583 kfree(txring->bufinf);
584 }
585
586 dma_free_coherent(&(jme->pdev->dev),
587 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
588 txring->alloc,
589 txring->dmaalloc);
590
591 txring->alloc = NULL;
592 txring->desc = NULL;
593 txring->dmaalloc = 0;
594 txring->dma = 0;
595 txring->bufinf = NULL;
596 }
597 txring->next_to_use = 0;
598 atomic_set(&txring->next_to_clean, 0);
599 atomic_set(&txring->nr_free, 0);
600}
601
602static inline void
603jme_enable_tx_engine(struct jme_adapter *jme)
604{
605 /*
606 * Select Queue 0
607 */
608 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
609 wmb();
610
611 /*
612 * Setup TX Queue 0 DMA Bass Address
613 */
614 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
615 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
616 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
617
618 /*
619 * Setup TX Descptor Count
620 */
621 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
622
623 /*
624 * Enable TX Engine
625 */
626 wmb();
627 jwrite32(jme, JME_TXCS, jme->reg_txcs |
628 TXCS_SELECT_QUEUE0 |
629 TXCS_ENABLE);
630
631}
632
633static inline void
634jme_restart_tx_engine(struct jme_adapter *jme)
635{
636 /*
637 * Restart TX Engine
638 */
639 jwrite32(jme, JME_TXCS, jme->reg_txcs |
640 TXCS_SELECT_QUEUE0 |
641 TXCS_ENABLE);
642}
643
644static inline void
645jme_disable_tx_engine(struct jme_adapter *jme)
646{
647 int i;
648 u32 val;
649
650 /*
651 * Disable TX Engine
652 */
653 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
654 wmb();
655
656 val = jread32(jme, JME_TXCS);
657 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
658 mdelay(1);
659 val = jread32(jme, JME_TXCS);
660 rmb();
661 }
662
663 if (!i)
664 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
665}
666
667static void
668jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
669{
670 struct jme_ring *rxring = &(jme->rxring[0]);
671 register struct rxdesc *rxdesc = rxring->desc;
672 struct jme_buffer_info *rxbi = rxring->bufinf;
673 rxdesc += i;
674 rxbi += i;
675
676 rxdesc->dw[0] = 0;
677 rxdesc->dw[1] = 0;
678 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
679 rxdesc->desc1.bufaddrl = cpu_to_le32(
680 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
681 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
682 if (jme->dev->features & NETIF_F_HIGHDMA)
683 rxdesc->desc1.flags = RXFLAG_64BIT;
684 wmb();
685 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
686}
687
688static int
689jme_make_new_rx_buf(struct jme_adapter *jme, int i)
690{
691 struct jme_ring *rxring = &(jme->rxring[0]);
692 struct jme_buffer_info *rxbi = rxring->bufinf + i;
693 struct sk_buff *skb;
694
695 skb = netdev_alloc_skb(jme->dev,
696 jme->dev->mtu + RX_EXTRA_LEN);
697 if (unlikely(!skb))
698 return -ENOMEM;
699#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
700 skb->dev = jme->dev;
701#endif
702
703 rxbi->skb = skb;
704 rxbi->len = skb_tailroom(skb);
705 rxbi->mapping = pci_map_page(jme->pdev,
706 virt_to_page(skb->data),
707 offset_in_page(skb->data),
708 rxbi->len,
709 PCI_DMA_FROMDEVICE);
710
711 return 0;
712}
713
714static void
715jme_free_rx_buf(struct jme_adapter *jme, int i)
716{
717 struct jme_ring *rxring = &(jme->rxring[0]);
718 struct jme_buffer_info *rxbi = rxring->bufinf;
719 rxbi += i;
720
721 if (rxbi->skb) {
722 pci_unmap_page(jme->pdev,
723 rxbi->mapping,
724 rxbi->len,
725 PCI_DMA_FROMDEVICE);
726 dev_kfree_skb(rxbi->skb);
727 rxbi->skb = NULL;
728 rxbi->mapping = 0;
729 rxbi->len = 0;
730 }
731}
732
733static void
734jme_free_rx_resources(struct jme_adapter *jme)
735{
736 int i;
737 struct jme_ring *rxring = &(jme->rxring[0]);
738
739 if (rxring->alloc) {
740 if (rxring->bufinf) {
741 for (i = 0 ; i < jme->rx_ring_size ; ++i)
742 jme_free_rx_buf(jme, i);
743 kfree(rxring->bufinf);
744 }
745
746 dma_free_coherent(&(jme->pdev->dev),
747 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
748 rxring->alloc,
749 rxring->dmaalloc);
750 rxring->alloc = NULL;
751 rxring->desc = NULL;
752 rxring->dmaalloc = 0;
753 rxring->dma = 0;
754 rxring->bufinf = NULL;
755 }
756 rxring->next_to_use = 0;
757 atomic_set(&rxring->next_to_clean, 0);
758}
759
760static int
761jme_setup_rx_resources(struct jme_adapter *jme)
762{
763 int i;
764 struct jme_ring *rxring = &(jme->rxring[0]);
765
766 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
767 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
768 &(rxring->dmaalloc),
769 GFP_ATOMIC);
770 if (!rxring->alloc)
771 goto err_set_null;
772
773 /*
774 * 16 Bytes align
775 */
776 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
777 RING_DESC_ALIGN);
778 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
779 rxring->next_to_use = 0;
780 atomic_set(&rxring->next_to_clean, 0);
781
782 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
783 jme->rx_ring_size, GFP_ATOMIC);
784 if (unlikely(!(rxring->bufinf)))
785 goto err_free_rxring;
786
787 /*
788 * Initiallize Receive Descriptors
789 */
790 memset(rxring->bufinf, 0,
791 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
792 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
793 if (unlikely(jme_make_new_rx_buf(jme, i))) {
794 jme_free_rx_resources(jme);
795 return -ENOMEM;
796 }
797
798 jme_set_clean_rxdesc(jme, i);
799 }
800
801 return 0;
802
803err_free_rxring:
804 dma_free_coherent(&(jme->pdev->dev),
805 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
806 rxring->alloc,
807 rxring->dmaalloc);
808err_set_null:
809 rxring->desc = NULL;
810 rxring->dmaalloc = 0;
811 rxring->dma = 0;
812 rxring->bufinf = NULL;
813
814 return -ENOMEM;
815}
816
817static inline void
818jme_enable_rx_engine(struct jme_adapter *jme)
819{
820 /*
821 * Select Queue 0
822 */
823 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
824 RXCS_QUEUESEL_Q0);
825 wmb();
826
827 /*
828 * Setup RX DMA Bass Address
829 */
830 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
831 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
832 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
833
834 /*
835 * Setup RX Descriptor Count
836 */
837 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
838
839 /*
840 * Setup Unicast Filter
841 */
842 jme_set_multi(jme->dev);
843
844 /*
845 * Enable RX Engine
846 */
847 wmb();
848 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
849 RXCS_QUEUESEL_Q0 |
850 RXCS_ENABLE |
851 RXCS_QST);
852}
853
854static inline void
855jme_restart_rx_engine(struct jme_adapter *jme)
856{
857 /*
858 * Start RX Engine
859 */
860 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
861 RXCS_QUEUESEL_Q0 |
862 RXCS_ENABLE |
863 RXCS_QST);
864}
865
866static inline void
867jme_disable_rx_engine(struct jme_adapter *jme)
868{
869 int i;
870 u32 val;
871
872 /*
873 * Disable RX Engine
874 */
875 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
876 wmb();
877
878 val = jread32(jme, JME_RXCS);
879 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
880 mdelay(1);
881 val = jread32(jme, JME_RXCS);
882 rmb();
883 }
884
885 if (!i)
886 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
887
888}
889
890static int
891jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
892{
893 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
894 return false;
895
896 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
897 == RXWBFLAG_TCPON)) {
898 if (flags & RXWBFLAG_IPV4)
899#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
900 msg_rx_err(jme, "TCP Checksum error\n");
901#else
902 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
903#endif
904 return false;
905 }
906
907 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
908 == RXWBFLAG_UDPON)) {
909 if (flags & RXWBFLAG_IPV4)
910#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
911 msg_rx_err(jme, "UDP Checksum error.\n");
912#else
913 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
914#endif
915 return false;
916 }
917
918 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
919 == RXWBFLAG_IPV4)) {
920#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
921 msg_rx_err(jme, "IPv4 Checksum error.\n");
922#else
923 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
924#endif
925 return false;
926 }
927
928 return true;
929}
930
931static void
932jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
933{
934 struct jme_ring *rxring = &(jme->rxring[0]);
935 struct rxdesc *rxdesc = rxring->desc;
936 struct jme_buffer_info *rxbi = rxring->bufinf;
937 struct sk_buff *skb;
938 int framesize;
939
940 rxdesc += idx;
941 rxbi += idx;
942
943 skb = rxbi->skb;
944 pci_dma_sync_single_for_cpu(jme->pdev,
945 rxbi->mapping,
946 rxbi->len,
947 PCI_DMA_FROMDEVICE);
948
949 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
950 pci_dma_sync_single_for_device(jme->pdev,
951 rxbi->mapping,
952 rxbi->len,
953 PCI_DMA_FROMDEVICE);
954
955 ++(NET_STAT(jme).rx_dropped);
956 } else {
957 framesize = le16_to_cpu(rxdesc->descwb.framesize)
958 - RX_PREPAD_SIZE;
959
960 skb_reserve(skb, RX_PREPAD_SIZE);
961 skb_put(skb, framesize);
962 skb->protocol = eth_type_trans(skb, jme->dev);
963
964 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
965 skb->ip_summed = CHECKSUM_UNNECESSARY;
966 else
967#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
968 skb->ip_summed = CHECKSUM_NONE;
969#else
970 skb_checksum_none_assert(skb);
971#endif
972
973 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
974 if (jme->vlgrp) {
975 jme->jme_vlan_rx(skb, jme->vlgrp,
976 le16_to_cpu(rxdesc->descwb.vlan));
977 NET_STAT(jme).rx_bytes += 4;
978 } else {
979 dev_kfree_skb(skb);
980 }
981 } else {
982 jme->jme_rx(skb);
983 }
984
985 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
986 cpu_to_le16(RXWBFLAG_DEST_MUL))
987 ++(NET_STAT(jme).multicast);
988
989 NET_STAT(jme).rx_bytes += framesize;
990 ++(NET_STAT(jme).rx_packets);
991 }
992
993 jme_set_clean_rxdesc(jme, idx);
994
995}
996
997static int
998jme_process_receive(struct jme_adapter *jme, int limit)
999{
1000 struct jme_ring *rxring = &(jme->rxring[0]);
1001 struct rxdesc *rxdesc = rxring->desc;
1002 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1003
1004 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1005 goto out_inc;
1006
1007 if (unlikely(atomic_read(&jme->link_changing) != 1))
1008 goto out_inc;
1009
1010 if (unlikely(!netif_carrier_ok(jme->dev)))
1011 goto out_inc;
1012
1013 i = atomic_read(&rxring->next_to_clean);
1014 while (limit > 0) {
1015 rxdesc = rxring->desc;
1016 rxdesc += i;
1017
1018 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1019 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1020 goto out;
1021 --limit;
1022
1023 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1024
1025 if (unlikely(desccnt > 1 ||
1026 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1027
1028 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1029 ++(NET_STAT(jme).rx_crc_errors);
1030 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1031 ++(NET_STAT(jme).rx_fifo_errors);
1032 else
1033 ++(NET_STAT(jme).rx_errors);
1034
1035 if (desccnt > 1)
1036 limit -= desccnt - 1;
1037
1038 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1039 jme_set_clean_rxdesc(jme, j);
1040 j = (j + 1) & (mask);
1041 }
1042
1043 } else {
1044 jme_alloc_and_feed_skb(jme, i);
1045 }
1046
1047 i = (i + desccnt) & (mask);
1048 }
1049
1050out:
1051 atomic_set(&rxring->next_to_clean, i);
1052
1053out_inc:
1054 atomic_inc(&jme->rx_cleaning);
1055
1056 return limit > 0 ? limit : 0;
1057
1058}
1059
1060static void
1061jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1062{
1063 if (likely(atmp == dpi->cur)) {
1064 dpi->cnt = 0;
1065 return;
1066 }
1067
1068 if (dpi->attempt == atmp) {
1069 ++(dpi->cnt);
1070 } else {
1071 dpi->attempt = atmp;
1072 dpi->cnt = 0;
1073 }
1074
1075}
1076
1077static void
1078jme_dynamic_pcc(struct jme_adapter *jme)
1079{
1080 register struct dynpcc_info *dpi = &(jme->dpi);
1081
1082 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1083 jme_attempt_pcc(dpi, PCC_P3);
1084 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1085 dpi->intr_cnt > PCC_INTR_THRESHOLD)
1086 jme_attempt_pcc(dpi, PCC_P2);
1087 else
1088 jme_attempt_pcc(dpi, PCC_P1);
1089
1090 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1091 if (dpi->attempt < dpi->cur)
1092 tasklet_schedule(&jme->rxclean_task);
1093 jme_set_rx_pcc(jme, dpi->attempt);
1094 dpi->cur = dpi->attempt;
1095 dpi->cnt = 0;
1096 }
1097}
1098
1099static void
1100jme_start_pcc_timer(struct jme_adapter *jme)
1101{
1102 struct dynpcc_info *dpi = &(jme->dpi);
1103 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1104 dpi->last_pkts = NET_STAT(jme).rx_packets;
1105 dpi->intr_cnt = 0;
1106 jwrite32(jme, JME_TMCSR,
1107 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1108}
1109
1110static inline void
1111jme_stop_pcc_timer(struct jme_adapter *jme)
1112{
1113 jwrite32(jme, JME_TMCSR, 0);
1114}
1115
1116static void
1117jme_shutdown_nic(struct jme_adapter *jme)
1118{
1119 u32 phylink;
1120
1121 phylink = jme_linkstat_from_phy(jme);
1122
1123 if (!(phylink & PHY_LINK_UP)) {
1124 /*
1125 * Disable all interrupt before issue timer
1126 */
1127 jme_stop_irq(jme);
1128 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1129 }
1130}
1131
1132static void
1133jme_pcc_tasklet(unsigned long arg)
1134{
1135 struct jme_adapter *jme = (struct jme_adapter *)arg;
1136 struct net_device *netdev = jme->dev;
1137
1138 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1139 jme_shutdown_nic(jme);
1140 return;
1141 }
1142
1143 if (unlikely(!netif_carrier_ok(netdev) ||
1144 (atomic_read(&jme->link_changing) != 1)
1145 )) {
1146 jme_stop_pcc_timer(jme);
1147 return;
1148 }
1149
1150 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1151 jme_dynamic_pcc(jme);
1152
1153 jme_start_pcc_timer(jme);
1154}
1155
1156static inline void
1157jme_polling_mode(struct jme_adapter *jme)
1158{
1159 jme_set_rx_pcc(jme, PCC_OFF);
1160}
1161
1162static inline void
1163jme_interrupt_mode(struct jme_adapter *jme)
1164{
1165 jme_set_rx_pcc(jme, PCC_P1);
1166}
1167
1168static inline int
1169jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1170{
1171 u32 apmc;
1172 apmc = jread32(jme, JME_APMC);
1173 return apmc & JME_APMC_PSEUDO_HP_EN;
1174}
1175
1176static void
1177jme_start_shutdown_timer(struct jme_adapter *jme)
1178{
1179 u32 apmc;
1180
1181 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1182 apmc &= ~JME_APMC_EPIEN_CTRL;
1183 if (!no_extplug) {
1184 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1185 wmb();
1186 }
1187 jwrite32f(jme, JME_APMC, apmc);
1188
1189 jwrite32f(jme, JME_TIMER2, 0);
1190 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1191 jwrite32(jme, JME_TMCSR,
1192 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1193}
1194
1195static void
1196jme_stop_shutdown_timer(struct jme_adapter *jme)
1197{
1198 u32 apmc;
1199
1200 jwrite32f(jme, JME_TMCSR, 0);
1201 jwrite32f(jme, JME_TIMER2, 0);
1202 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1203
1204 apmc = jread32(jme, JME_APMC);
1205 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1206 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1207 wmb();
1208 jwrite32f(jme, JME_APMC, apmc);
1209}
1210
1211static void
1212jme_link_change_tasklet(unsigned long arg)
1213{
1214 struct jme_adapter *jme = (struct jme_adapter *)arg;
1215 struct net_device *netdev = jme->dev;
1216 int rc;
1217
1218 while (!atomic_dec_and_test(&jme->link_changing)) {
1219 atomic_inc(&jme->link_changing);
1220#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1221 msg_intr(jme, "Get link change lock failed.\n");
1222#else
1223 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1224#endif
1225 while (atomic_read(&jme->link_changing) != 1)
1226#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1227 msg_intr(jme, "Waiting link change lock.\n");
1228#else
1229 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1230#endif
1231 }
1232
1233 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1234 goto out;
1235
1236 jme->old_mtu = netdev->mtu;
1237 netif_stop_queue(netdev);
1238 if (jme_pseudo_hotplug_enabled(jme))
1239 jme_stop_shutdown_timer(jme);
1240
1241 jme_stop_pcc_timer(jme);
1242 tasklet_disable(&jme->txclean_task);
1243 tasklet_disable(&jme->rxclean_task);
1244 tasklet_disable(&jme->rxempty_task);
1245
1246 if (netif_carrier_ok(netdev)) {
1247 jme_reset_ghc_speed(jme);
1248 jme_disable_rx_engine(jme);
1249 jme_disable_tx_engine(jme);
1250 jme_reset_mac_processor(jme);
1251 jme_free_rx_resources(jme);
1252 jme_free_tx_resources(jme);
1253
1254 if (test_bit(JME_FLAG_POLL, &jme->flags))
1255 jme_polling_mode(jme);
1256
1257 netif_carrier_off(netdev);
1258 }
1259
1260 jme_check_link(netdev, 0);
1261 if (netif_carrier_ok(netdev)) {
1262 rc = jme_setup_rx_resources(jme);
1263 if (rc) {
1264 jeprintk(jme->pdev, "Allocating resources for RX error"
1265 ", Device STOPPED!\n");
1266 goto out_enable_tasklet;
1267 }
1268
1269 rc = jme_setup_tx_resources(jme);
1270 if (rc) {
1271 jeprintk(jme->pdev, "Allocating resources for TX error"
1272 ", Device STOPPED!\n");
1273 goto err_out_free_rx_resources;
1274 }
1275
1276 jme_enable_rx_engine(jme);
1277 jme_enable_tx_engine(jme);
1278
1279 netif_start_queue(netdev);
1280
1281 if (test_bit(JME_FLAG_POLL, &jme->flags))
1282 jme_interrupt_mode(jme);
1283
1284 jme_start_pcc_timer(jme);
1285 } else if (jme_pseudo_hotplug_enabled(jme)) {
1286 jme_start_shutdown_timer(jme);
1287 }
1288
1289 goto out_enable_tasklet;
1290
1291err_out_free_rx_resources:
1292 jme_free_rx_resources(jme);
1293out_enable_tasklet:
1294 tasklet_enable(&jme->txclean_task);
1295 tasklet_hi_enable(&jme->rxclean_task);
1296 tasklet_hi_enable(&jme->rxempty_task);
1297out:
1298 atomic_inc(&jme->link_changing);
1299}
1300
1301static void
1302jme_rx_clean_tasklet(unsigned long arg)
1303{
1304 struct jme_adapter *jme = (struct jme_adapter *)arg;
1305 struct dynpcc_info *dpi = &(jme->dpi);
1306
1307 jme_process_receive(jme, jme->rx_ring_size);
1308 ++(dpi->intr_cnt);
1309
1310}
1311
1312static int
1313jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1314{
1315 struct jme_adapter *jme = jme_napi_priv(holder);
1316 DECLARE_NETDEV
1317 int rest;
1318
1319 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1320
1321 while (atomic_read(&jme->rx_empty) > 0) {
1322 atomic_dec(&jme->rx_empty);
1323 ++(NET_STAT(jme).rx_dropped);
1324 jme_restart_rx_engine(jme);
1325 }
1326 atomic_inc(&jme->rx_empty);
1327
1328 if (rest) {
1329 JME_RX_COMPLETE(netdev, holder);
1330 jme_interrupt_mode(jme);
1331 }
1332
1333 JME_NAPI_WEIGHT_SET(budget, rest);
1334 return JME_NAPI_WEIGHT_VAL(budget) - rest;
1335}
1336
1337static void
1338jme_rx_empty_tasklet(unsigned long arg)
1339{
1340 struct jme_adapter *jme = (struct jme_adapter *)arg;
1341
1342 if (unlikely(atomic_read(&jme->link_changing) != 1))
1343 return;
1344
1345 if (unlikely(!netif_carrier_ok(jme->dev)))
1346 return;
1347
1348#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1349 msg_rx_status(jme, "RX Queue Full!\n");
1350#else
1351 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1352#endif
1353
1354 jme_rx_clean_tasklet(arg);
1355
1356 while (atomic_read(&jme->rx_empty) > 0) {
1357 atomic_dec(&jme->rx_empty);
1358 ++(NET_STAT(jme).rx_dropped);
1359 jme_restart_rx_engine(jme);
1360 }
1361 atomic_inc(&jme->rx_empty);
1362}
1363
1364static void
1365jme_wake_queue_if_stopped(struct jme_adapter *jme)
1366{
1367 struct jme_ring *txring = &(jme->txring[0]);
1368
1369 smp_wmb();
1370 if (unlikely(netif_queue_stopped(jme->dev) &&
1371 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1372#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1373 msg_tx_done(jme, "TX Queue Waked.\n");
1374#else
1375 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1376#endif
1377 netif_wake_queue(jme->dev);
1378 }
1379
1380}
1381
1382static void
1383jme_tx_clean_tasklet(unsigned long arg)
1384{
1385 struct jme_adapter *jme = (struct jme_adapter *)arg;
1386 struct jme_ring *txring = &(jme->txring[0]);
1387 struct txdesc *txdesc = txring->desc;
1388 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1389 int i, j, cnt = 0, max, err, mask;
1390
1391 tx_dbg(jme, "Into txclean.\n");
1392
1393 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1394 goto out;
1395
1396 if (unlikely(atomic_read(&jme->link_changing) != 1))
1397 goto out;
1398
1399 if (unlikely(!netif_carrier_ok(jme->dev)))
1400 goto out;
1401
1402 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1403 mask = jme->tx_ring_mask;
1404
1405 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1406
1407 ctxbi = txbi + i;
1408
1409 if (likely(ctxbi->skb &&
1410 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1411
1412 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1413 i, ctxbi->nr_desc, jiffies);
1414
1415 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1416
1417 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1418 ttxbi = txbi + ((i + j) & (mask));
1419 txdesc[(i + j) & (mask)].dw[0] = 0;
1420
1421 pci_unmap_page(jme->pdev,
1422 ttxbi->mapping,
1423 ttxbi->len,
1424 PCI_DMA_TODEVICE);
1425
1426 ttxbi->mapping = 0;
1427 ttxbi->len = 0;
1428 }
1429
1430 dev_kfree_skb(ctxbi->skb);
1431
1432 cnt += ctxbi->nr_desc;
1433
1434 if (unlikely(err)) {
1435 ++(NET_STAT(jme).tx_carrier_errors);
1436 } else {
1437 ++(NET_STAT(jme).tx_packets);
1438 NET_STAT(jme).tx_bytes += ctxbi->len;
1439 }
1440
1441 ctxbi->skb = NULL;
1442 ctxbi->len = 0;
1443 ctxbi->start_xmit = 0;
1444
1445 } else {
1446 break;
1447 }
1448
1449 i = (i + ctxbi->nr_desc) & mask;
1450
1451 ctxbi->nr_desc = 0;
1452 }
1453
1454 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
1455 atomic_set(&txring->next_to_clean, i);
1456 atomic_add(cnt, &txring->nr_free);
1457
1458 jme_wake_queue_if_stopped(jme);
1459
1460out:
1461 atomic_inc(&jme->tx_cleaning);
1462}
1463
1464static void
1465jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1466{
1467 /*
1468 * Disable interrupt
1469 */
1470 jwrite32f(jme, JME_IENC, INTR_ENABLE);
1471
1472 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1473 /*
1474 * Link change event is critical
1475 * all other events are ignored
1476 */
1477 jwrite32(jme, JME_IEVE, intrstat);
1478 tasklet_schedule(&jme->linkch_task);
1479 goto out_reenable;
1480 }
1481
1482 if (intrstat & INTR_TMINTR) {
1483 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1484 tasklet_schedule(&jme->pcc_task);
1485 }
1486
1487 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1488 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1489 tasklet_schedule(&jme->txclean_task);
1490 }
1491
1492 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1493 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1494 INTR_PCCRX0 |
1495 INTR_RX0EMP)) |
1496 INTR_RX0);
1497 }
1498
1499 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1500 if (intrstat & INTR_RX0EMP)
1501 atomic_inc(&jme->rx_empty);
1502
1503 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1504 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1505 jme_polling_mode(jme);
1506 JME_RX_SCHEDULE(jme);
1507 }
1508 }
1509 } else {
1510 if (intrstat & INTR_RX0EMP) {
1511 atomic_inc(&jme->rx_empty);
1512 tasklet_hi_schedule(&jme->rxempty_task);
1513 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1514 tasklet_hi_schedule(&jme->rxclean_task);
1515 }
1516 }
1517
1518out_reenable:
1519 /*
1520 * Re-enable interrupt
1521 */
1522 jwrite32f(jme, JME_IENS, INTR_ENABLE);
1523}
1524
1525#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1526static irqreturn_t
1527jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1528#else
1529static irqreturn_t
1530jme_intr(int irq, void *dev_id)
1531#endif
1532{
1533 struct net_device *netdev = dev_id;
1534 struct jme_adapter *jme = netdev_priv(netdev);
1535 u32 intrstat;
1536
1537 intrstat = jread32(jme, JME_IEVE);
1538
1539 /*
1540 * Check if it's really an interrupt for us
1541 */
1542 if (unlikely((intrstat & INTR_ENABLE) == 0))
1543 return IRQ_NONE;
1544
1545 /*
1546 * Check if the device still exist
1547 */
1548 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1549 return IRQ_NONE;
1550
1551 jme_intr_msi(jme, intrstat);
1552
1553 return IRQ_HANDLED;
1554}
1555
1556#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1557static irqreturn_t
1558jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1559#else
1560static irqreturn_t
1561jme_msi(int irq, void *dev_id)
1562#endif
1563{
1564 struct net_device *netdev = dev_id;
1565 struct jme_adapter *jme = netdev_priv(netdev);
1566 u32 intrstat;
1567
1568 intrstat = jread32(jme, JME_IEVE);
1569
1570 jme_intr_msi(jme, intrstat);
1571
1572 return IRQ_HANDLED;
1573}
1574
1575static void
1576jme_reset_link(struct jme_adapter *jme)
1577{
1578 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1579}
1580
1581static void
1582jme_restart_an(struct jme_adapter *jme)
1583{
1584 u32 bmcr;
1585
1586 spin_lock_bh(&jme->phy_lock);
1587 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1588 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1589 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1590 spin_unlock_bh(&jme->phy_lock);
1591}
1592
1593static int
1594jme_request_irq(struct jme_adapter *jme)
1595{
1596 int rc;
1597 struct net_device *netdev = jme->dev;
1598#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1599 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1600 int irq_flags = SA_SHIRQ;
1601#else
1602 irq_handler_t handler = jme_intr;
1603 int irq_flags = IRQF_SHARED;
1604#endif
1605
1606 if (!pci_enable_msi(jme->pdev)) {
1607 set_bit(JME_FLAG_MSI, &jme->flags);
1608 handler = jme_msi;
1609 irq_flags = 0;
1610 }
1611
1612 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1613 netdev);
1614 if (rc) {
1615 jeprintk(jme->pdev,
1616 "Unable to request %s interrupt (return: %d)\n",
1617 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1618 rc);
1619
1620 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1621 pci_disable_msi(jme->pdev);
1622 clear_bit(JME_FLAG_MSI, &jme->flags);
1623 }
1624 } else {
1625 netdev->irq = jme->pdev->irq;
1626 }
1627
1628 return rc;
1629}
1630
1631static void
1632jme_free_irq(struct jme_adapter *jme)
1633{
1634 free_irq(jme->pdev->irq, jme->dev);
1635 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1636 pci_disable_msi(jme->pdev);
1637 clear_bit(JME_FLAG_MSI, &jme->flags);
1638 jme->dev->irq = jme->pdev->irq;
1639 }
1640}
1641
1642static int
1643jme_open(struct net_device *netdev)
1644{
1645 struct jme_adapter *jme = netdev_priv(netdev);
1646 int rc;
1647
1648 jme_clear_pm(jme);
1649 JME_NAPI_ENABLE(jme);
1650
1651 tasklet_enable(&jme->linkch_task);
1652 tasklet_enable(&jme->txclean_task);
1653 tasklet_hi_enable(&jme->rxclean_task);
1654 tasklet_hi_enable(&jme->rxempty_task);
1655
1656 rc = jme_request_irq(jme);
1657 if (rc)
1658 goto err_out;
1659
1660 jme_start_irq(jme);
1661
1662 if (test_bit(JME_FLAG_SSET, &jme->flags))
1663 jme_set_settings(netdev, &jme->old_ecmd);
1664 else
1665 jme_reset_phy_processor(jme);
1666
1667 jme_reset_link(jme);
1668
1669 return 0;
1670
1671err_out:
1672 netif_stop_queue(netdev);
1673 netif_carrier_off(netdev);
1674 return rc;
1675}
1676
1677#ifdef CONFIG_PM
1678static void
1679jme_set_100m_half(struct jme_adapter *jme)
1680{
1681 u32 bmcr, tmp;
1682
1683 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1684 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1685 BMCR_SPEED1000 | BMCR_FULLDPLX);
1686 tmp |= BMCR_SPEED100;
1687
1688 if (bmcr != tmp)
1689 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1690
1691 if (jme->fpgaver)
1692 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1693 else
1694 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1695}
1696
1697#define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1698static void
1699jme_wait_link(struct jme_adapter *jme)
1700{
1701 u32 phylink, to = JME_WAIT_LINK_TIME;
1702
1703 mdelay(1000);
1704 phylink = jme_linkstat_from_phy(jme);
1705 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1706 mdelay(10);
1707 phylink = jme_linkstat_from_phy(jme);
1708 }
1709}
1710#endif
1711
1712static inline void
1713jme_phy_off(struct jme_adapter *jme)
1714{
1715 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1716}
1717
1718static int
1719jme_close(struct net_device *netdev)
1720{
1721 struct jme_adapter *jme = netdev_priv(netdev);
1722
1723 netif_stop_queue(netdev);
1724 netif_carrier_off(netdev);
1725
1726 jme_stop_irq(jme);
1727 jme_free_irq(jme);
1728
1729 JME_NAPI_DISABLE(jme);
1730
1731 tasklet_disable(&jme->linkch_task);
1732 tasklet_disable(&jme->txclean_task);
1733 tasklet_disable(&jme->rxclean_task);
1734 tasklet_disable(&jme->rxempty_task);
1735
1736 jme_reset_ghc_speed(jme);
1737 jme_disable_rx_engine(jme);
1738 jme_disable_tx_engine(jme);
1739 jme_reset_mac_processor(jme);
1740 jme_free_rx_resources(jme);
1741 jme_free_tx_resources(jme);
1742 jme->phylink = 0;
1743 jme_phy_off(jme);
1744
1745 return 0;
1746}
1747
1748static int
1749jme_alloc_txdesc(struct jme_adapter *jme,
1750 struct sk_buff *skb)
1751{
1752 struct jme_ring *txring = &(jme->txring[0]);
1753 int idx, nr_alloc, mask = jme->tx_ring_mask;
1754
1755 idx = txring->next_to_use;
1756 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1757
1758 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1759 return -1;
1760
1761 atomic_sub(nr_alloc, &txring->nr_free);
1762
1763 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1764
1765 return idx;
1766}
1767
1768static void
1769jme_fill_tx_map(struct pci_dev *pdev,
1770 struct txdesc *txdesc,
1771 struct jme_buffer_info *txbi,
1772 struct page *page,
1773 u32 page_offset,
1774 u32 len,
1775 u8 hidma)
1776{
1777 dma_addr_t dmaaddr;
1778
1779 dmaaddr = pci_map_page(pdev,
1780 page,
1781 page_offset,
1782 len,
1783 PCI_DMA_TODEVICE);
1784
1785 pci_dma_sync_single_for_device(pdev,
1786 dmaaddr,
1787 len,
1788 PCI_DMA_TODEVICE);
1789
1790 txdesc->dw[0] = 0;
1791 txdesc->dw[1] = 0;
1792 txdesc->desc2.flags = TXFLAG_OWN;
1793 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
1794 txdesc->desc2.datalen = cpu_to_le16(len);
1795 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1796 txdesc->desc2.bufaddrl = cpu_to_le32(
1797 (__u64)dmaaddr & 0xFFFFFFFFUL);
1798
1799 txbi->mapping = dmaaddr;
1800 txbi->len = len;
1801}
1802
1803static void
1804jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1805{
1806 struct jme_ring *txring = &(jme->txring[0]);
1807 struct txdesc *txdesc = txring->desc, *ctxdesc;
1808 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1809 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1810 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1811 int mask = jme->tx_ring_mask;
1812 struct skb_frag_struct *frag;
1813 u32 len;
1814
1815 for (i = 0 ; i < nr_frags ; ++i) {
1816 frag = &skb_shinfo(skb)->frags[i];
1817 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1818 ctxbi = txbi + ((idx + i + 2) & (mask));
1819
1820 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1821 frag->page_offset, frag->size, hidma);
1822 }
1823
1824 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1825 ctxdesc = txdesc + ((idx + 1) & (mask));
1826 ctxbi = txbi + ((idx + 1) & (mask));
1827 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1828 offset_in_page(skb->data), len, hidma);
1829
1830}
1831
1832static int
1833jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1834{
1835 if (unlikely(
1836#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1837 skb_shinfo(skb)->tso_size
1838#else
1839 skb_shinfo(skb)->gso_size
1840#endif
1841 && skb_header_cloned(skb) &&
1842 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1843 dev_kfree_skb(skb);
1844 return -1;
1845 }
1846
1847 return 0;
1848}
1849
1850static int
1851jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1852{
1853#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1854 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1855#else
1856 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1857#endif
1858 if (*mss) {
1859 *flags |= TXFLAG_LSEN;
1860
1861 if (skb->protocol == htons(ETH_P_IP)) {
1862 struct iphdr *iph = ip_hdr(skb);
1863
1864 iph->check = 0;
1865 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1866 iph->daddr, 0,
1867 IPPROTO_TCP,
1868 0);
1869 } else {
1870 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1871
1872 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1873 &ip6h->daddr, 0,
1874 IPPROTO_TCP,
1875 0);
1876 }
1877
1878 return 0;
1879 }
1880
1881 return 1;
1882}
1883
1884static void
1885jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1886{
1887#ifdef CHECKSUM_PARTIAL
1888 if (skb->ip_summed == CHECKSUM_PARTIAL)
1889#else
1890 if (skb->ip_summed == CHECKSUM_HW)
1891#endif
1892 {
1893 u8 ip_proto;
1894
1895#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1896 if (skb->protocol == htons(ETH_P_IP))
1897 ip_proto = ip_hdr(skb)->protocol;
1898 else if (skb->protocol == htons(ETH_P_IPV6))
1899 ip_proto = ipv6_hdr(skb)->nexthdr;
1900 else
1901 ip_proto = 0;
1902#else
1903 switch (skb->protocol) {
1904 case htons(ETH_P_IP):
1905 ip_proto = ip_hdr(skb)->protocol;
1906 break;
1907 case htons(ETH_P_IPV6):
1908 ip_proto = ipv6_hdr(skb)->nexthdr;
1909 break;
1910 default:
1911 ip_proto = 0;
1912 break;
1913 }
1914#endif
1915
1916 switch (ip_proto) {
1917 case IPPROTO_TCP:
1918 *flags |= TXFLAG_TCPCS;
1919 break;
1920 case IPPROTO_UDP:
1921 *flags |= TXFLAG_UDPCS;
1922 break;
1923 default:
1924#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1925 msg_tx_err(jme, "Error upper layer protocol.\n");
1926#else
1927 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1928#endif
1929 break;
1930 }
1931 }
1932}
1933
1934static inline void
1935jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1936{
1937 if (vlan_tx_tag_present(skb)) {
1938 *flags |= TXFLAG_TAGON;
1939 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1940 }
1941}
1942
1943static int
1944jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1945{
1946 struct jme_ring *txring = &(jme->txring[0]);
1947 struct txdesc *txdesc;
1948 struct jme_buffer_info *txbi;
1949 u8 flags;
1950
1951 txdesc = (struct txdesc *)txring->desc + idx;
1952 txbi = txring->bufinf + idx;
1953
1954 txdesc->dw[0] = 0;
1955 txdesc->dw[1] = 0;
1956 txdesc->dw[2] = 0;
1957 txdesc->dw[3] = 0;
1958 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1959 /*
1960 * Set OWN bit at final.
1961 * When kernel transmit faster than NIC.
1962 * And NIC trying to send this descriptor before we tell
1963 * it to start sending this TX queue.
1964 * Other fields are already filled correctly.
1965 */
1966 wmb();
1967 flags = TXFLAG_OWN | TXFLAG_INT;
1968 /*
1969 * Set checksum flags while not tso
1970 */
1971 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1972 jme_tx_csum(jme, skb, &flags);
1973 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1974 jme_map_tx_skb(jme, skb, idx);
1975 txdesc->desc1.flags = flags;
1976 /*
1977 * Set tx buffer info after telling NIC to send
1978 * For better tx_clean timing
1979 */
1980 wmb();
1981 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1982 txbi->skb = skb;
1983 txbi->len = skb->len;
1984 txbi->start_xmit = jiffies;
1985 if (!txbi->start_xmit)
1986 txbi->start_xmit = (0UL-1);
1987
1988 return 0;
1989}
1990
1991static void
1992jme_stop_queue_if_full(struct jme_adapter *jme)
1993{
1994 struct jme_ring *txring = &(jme->txring[0]);
1995 struct jme_buffer_info *txbi = txring->bufinf;
1996 int idx = atomic_read(&txring->next_to_clean);
1997
1998 txbi += idx;
1999
2000 smp_wmb();
2001 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2002 netif_stop_queue(jme->dev);
2003#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2004 msg_tx_queued(jme, "TX Queue Paused.\n");
2005#else
2006 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2007#endif
2008 smp_wmb();
2009 if (atomic_read(&txring->nr_free)
2010 >= (jme->tx_wake_threshold)) {
2011 netif_wake_queue(jme->dev);
2012#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2013 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
2014#else
2015 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2016#endif
2017 }
2018 }
2019
2020 if (unlikely(txbi->start_xmit &&
2021 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2022 txbi->skb)) {
2023 netif_stop_queue(jme->dev);
2024#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2025 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2026#else
2027 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2028#endif
2029 }
2030}
2031
2032/*
2033 * This function is already protected by netif_tx_lock()
2034 */
2035
2036#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2037static int
2038#else
2039static netdev_tx_t
2040#endif
2041jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2042{
2043 struct jme_adapter *jme = netdev_priv(netdev);
2044 int idx;
2045
2046 if (unlikely(jme_expand_header(jme, skb))) {
2047 ++(NET_STAT(jme).tx_dropped);
2048 return NETDEV_TX_OK;
2049 }
2050
2051 idx = jme_alloc_txdesc(jme, skb);
2052
2053 if (unlikely(idx < 0)) {
2054 netif_stop_queue(netdev);
2055#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2056 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
2057#else
2058 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2059#endif
2060
2061 return NETDEV_TX_BUSY;
2062 }
2063
2064 jme_fill_tx_desc(jme, skb, idx);
2065
2066 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2067 TXCS_SELECT_QUEUE0 |
2068 TXCS_QUEUE0S |
2069 TXCS_ENABLE);
2070#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2071 netdev->trans_start = jiffies;
2072#endif
2073
2074 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2075 skb_shinfo(skb)->nr_frags + 2,
2076 jiffies);
2077 jme_stop_queue_if_full(jme);
2078
2079 return NETDEV_TX_OK;
2080}
2081
2082static int
2083jme_set_macaddr(struct net_device *netdev, void *p)
2084{
2085 struct jme_adapter *jme = netdev_priv(netdev);
2086 struct sockaddr *addr = p;
2087 u32 val;
2088
2089 if (netif_running(netdev))
2090 return -EBUSY;
2091
2092 spin_lock_bh(&jme->macaddr_lock);
2093 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2094
2095 val = (addr->sa_data[3] & 0xff) << 24 |
2096 (addr->sa_data[2] & 0xff) << 16 |
2097 (addr->sa_data[1] & 0xff) << 8 |
2098 (addr->sa_data[0] & 0xff);
2099 jwrite32(jme, JME_RXUMA_LO, val);
2100 val = (addr->sa_data[5] & 0xff) << 8 |
2101 (addr->sa_data[4] & 0xff);
2102 jwrite32(jme, JME_RXUMA_HI, val);
2103 spin_unlock_bh(&jme->macaddr_lock);
2104
2105 return 0;
2106}
2107
2108static void
2109jme_set_multi(struct net_device *netdev)
2110{
2111 struct jme_adapter *jme = netdev_priv(netdev);
2112 u32 mc_hash[2] = {};
2113#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2114 int i;
2115#endif
2116
2117 spin_lock_bh(&jme->rxmcs_lock);
2118
2119 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2120
2121 if (netdev->flags & IFF_PROMISC) {
2122 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2123 } else if (netdev->flags & IFF_ALLMULTI) {
2124 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2125 } else if (netdev->flags & IFF_MULTICAST) {
2126#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2127 struct dev_mc_list *mclist;
2128#else
2129 struct netdev_hw_addr *ha;
2130#endif
2131 int bit_nr;
2132
2133 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2134#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2135 for (i = 0, mclist = netdev->mc_list;
2136 mclist && i < netdev->mc_count;
2137 ++i, mclist = mclist->next) {
2138#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2139 netdev_for_each_mc_addr(mclist, netdev) {
2140#else
2141 netdev_for_each_mc_addr(ha, netdev) {
2142#endif
2143#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2144 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2145#else
2146 bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2147#endif
2148 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2149 }
2150
2151 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2152 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2153 }
2154
2155 wmb();
2156 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2157
2158 spin_unlock_bh(&jme->rxmcs_lock);
2159}
2160
2161static int
2162jme_change_mtu(struct net_device *netdev, int new_mtu)
2163{
2164 struct jme_adapter *jme = netdev_priv(netdev);
2165
2166 if (new_mtu == jme->old_mtu)
2167 return 0;
2168
2169 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2170 ((new_mtu) < IPV6_MIN_MTU))
2171 return -EINVAL;
2172
2173 if (new_mtu > 4000) {
2174 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2175 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2176 jme_restart_rx_engine(jme);
2177 } else {
2178 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2179 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2180 jme_restart_rx_engine(jme);
2181 }
2182
2183 if (new_mtu > 1900) {
2184 netdev->features &= ~(NETIF_F_HW_CSUM |
2185 NETIF_F_TSO
2186#ifdef NETIF_F_TSO6
2187 | NETIF_F_TSO6
2188#endif
2189 );
2190 } else {
2191 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2192 netdev->features |= NETIF_F_HW_CSUM;
2193 if (test_bit(JME_FLAG_TSO, &jme->flags))
2194 netdev->features |= NETIF_F_TSO
2195#ifdef NETIF_F_TSO6
2196 | NETIF_F_TSO6
2197#endif
2198 ;
2199 }
2200
2201 netdev->mtu = new_mtu;
2202 jme_reset_link(jme);
2203
2204 return 0;
2205}
2206
2207static void
2208jme_tx_timeout(struct net_device *netdev)
2209{
2210 struct jme_adapter *jme = netdev_priv(netdev);
2211
2212 jme->phylink = 0;
2213 jme_reset_phy_processor(jme);
2214 if (test_bit(JME_FLAG_SSET, &jme->flags))
2215 jme_set_settings(netdev, &jme->old_ecmd);
2216
2217 /*
2218 * Force to Reset the link again
2219 */
2220 jme_reset_link(jme);
2221}
2222
2223static inline void jme_pause_rx(struct jme_adapter *jme)
2224{
2225 atomic_dec(&jme->link_changing);
2226
2227 jme_set_rx_pcc(jme, PCC_OFF);
2228 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2229 JME_NAPI_DISABLE(jme);
2230 } else {
2231 tasklet_disable(&jme->rxclean_task);
2232 tasklet_disable(&jme->rxempty_task);
2233 }
2234}
2235
2236static inline void jme_resume_rx(struct jme_adapter *jme)
2237{
2238 struct dynpcc_info *dpi = &(jme->dpi);
2239
2240 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2241 JME_NAPI_ENABLE(jme);
2242 } else {
2243 tasklet_hi_enable(&jme->rxclean_task);
2244 tasklet_hi_enable(&jme->rxempty_task);
2245 }
2246 dpi->cur = PCC_P1;
2247 dpi->attempt = PCC_P1;
2248 dpi->cnt = 0;
2249 jme_set_rx_pcc(jme, PCC_P1);
2250
2251 atomic_inc(&jme->link_changing);
2252}
2253
2254static void
2255jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2256{
2257 struct jme_adapter *jme = netdev_priv(netdev);
2258
2259 jme_pause_rx(jme);
2260 jme->vlgrp = grp;
2261 jme_resume_rx(jme);
2262}
2263
2264#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2265static void
2266jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2267{
2268 struct jme_adapter *jme = netdev_priv(netdev);
2269
2270 if(jme->vlgrp) {
2271 jme_pause_rx(jme);
2272#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2273 jme->vlgrp->vlan_devices[vid] = NULL;
2274#else
2275 vlan_group_set_device(jme->vlgrp, vid, NULL);
2276#endif
2277 jme_resume_rx(jme);
2278 }
2279}
2280#endif
2281
2282static void
2283jme_get_drvinfo(struct net_device *netdev,
2284 struct ethtool_drvinfo *info)
2285{
2286 struct jme_adapter *jme = netdev_priv(netdev);
2287
2288 strcpy(info->driver, DRV_NAME);
2289 strcpy(info->version, DRV_VERSION);
2290 strcpy(info->bus_info, pci_name(jme->pdev));
2291}
2292
2293static int
2294jme_get_regs_len(struct net_device *netdev)
2295{
2296 return JME_REG_LEN;
2297}
2298
2299static void
2300mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2301{
2302 int i;
2303
2304 for (i = 0 ; i < len ; i += 4)
2305 p[i >> 2] = jread32(jme, reg + i);
2306}
2307
2308static void
2309mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2310{
2311 int i;
2312 u16 *p16 = (u16 *)p;
2313
2314 for (i = 0 ; i < reg_nr ; ++i)
2315 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2316}
2317
2318static void
2319jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2320{
2321 struct jme_adapter *jme = netdev_priv(netdev);
2322 u32 *p32 = (u32 *)p;
2323
2324 memset(p, 0xFF, JME_REG_LEN);
2325
2326 regs->version = 1;
2327 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2328
2329 p32 += 0x100 >> 2;
2330 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2331
2332 p32 += 0x100 >> 2;
2333 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2334
2335 p32 += 0x100 >> 2;
2336 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2337
2338 p32 += 0x100 >> 2;
2339 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2340}
2341
2342static int
2343jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2344{
2345 struct jme_adapter *jme = netdev_priv(netdev);
2346
2347 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2348 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2349
2350 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2351 ecmd->use_adaptive_rx_coalesce = false;
2352 ecmd->rx_coalesce_usecs = 0;
2353 ecmd->rx_max_coalesced_frames = 0;
2354 return 0;
2355 }
2356
2357 ecmd->use_adaptive_rx_coalesce = true;
2358
2359 switch (jme->dpi.cur) {
2360 case PCC_P1:
2361 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2362 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2363 break;
2364 case PCC_P2:
2365 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2366 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2367 break;
2368 case PCC_P3:
2369 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2370 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2371 break;
2372 default:
2373 break;
2374 }
2375
2376 return 0;
2377}
2378
2379static int
2380jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2381{
2382 struct jme_adapter *jme = netdev_priv(netdev);
2383 struct dynpcc_info *dpi = &(jme->dpi);
2384
2385 if (netif_running(netdev))
2386 return -EBUSY;
2387
2388 if (ecmd->use_adaptive_rx_coalesce &&
2389 test_bit(JME_FLAG_POLL, &jme->flags)) {
2390 clear_bit(JME_FLAG_POLL, &jme->flags);
2391 jme->jme_rx = netif_rx;
2392 jme->jme_vlan_rx = vlan_hwaccel_rx;
2393 dpi->cur = PCC_P1;
2394 dpi->attempt = PCC_P1;
2395 dpi->cnt = 0;
2396 jme_set_rx_pcc(jme, PCC_P1);
2397 jme_interrupt_mode(jme);
2398 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2399 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2400 set_bit(JME_FLAG_POLL, &jme->flags);
2401 jme->jme_rx = netif_receive_skb;
2402 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2403 jme_interrupt_mode(jme);
2404 }
2405
2406 return 0;
2407}
2408
2409static void
2410jme_get_pauseparam(struct net_device *netdev,
2411 struct ethtool_pauseparam *ecmd)
2412{
2413 struct jme_adapter *jme = netdev_priv(netdev);
2414 u32 val;
2415
2416 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2417 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2418
2419 spin_lock_bh(&jme->phy_lock);
2420 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2421 spin_unlock_bh(&jme->phy_lock);
2422
2423 ecmd->autoneg =
2424 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2425}
2426
2427static int
2428jme_set_pauseparam(struct net_device *netdev,
2429 struct ethtool_pauseparam *ecmd)
2430{
2431 struct jme_adapter *jme = netdev_priv(netdev);
2432 u32 val;
2433
2434 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2435 (ecmd->tx_pause != 0)) {
2436
2437 if (ecmd->tx_pause)
2438 jme->reg_txpfc |= TXPFC_PF_EN;
2439 else
2440 jme->reg_txpfc &= ~TXPFC_PF_EN;
2441
2442 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2443 }
2444
2445 spin_lock_bh(&jme->rxmcs_lock);
2446 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2447 (ecmd->rx_pause != 0)) {
2448
2449 if (ecmd->rx_pause)
2450 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2451 else
2452 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2453
2454 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2455 }
2456 spin_unlock_bh(&jme->rxmcs_lock);
2457
2458 spin_lock_bh(&jme->phy_lock);
2459 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2460 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2461 (ecmd->autoneg != 0)) {
2462
2463 if (ecmd->autoneg)
2464 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2465 else
2466 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2467
2468 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2469 MII_ADVERTISE, val);
2470 }
2471 spin_unlock_bh(&jme->phy_lock);
2472
2473 return 0;
2474}
2475
2476static void
2477jme_get_wol(struct net_device *netdev,
2478 struct ethtool_wolinfo *wol)
2479{
2480 struct jme_adapter *jme = netdev_priv(netdev);
2481
2482 wol->supported = WAKE_MAGIC | WAKE_PHY;
2483
2484 wol->wolopts = 0;
2485
2486 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2487 wol->wolopts |= WAKE_PHY;
2488
2489 if (jme->reg_pmcs & PMCS_MFEN)
2490 wol->wolopts |= WAKE_MAGIC;
2491
2492}
2493
2494static int
2495jme_set_wol(struct net_device *netdev,
2496 struct ethtool_wolinfo *wol)
2497{
2498 struct jme_adapter *jme = netdev_priv(netdev);
2499
2500 if (wol->wolopts & (WAKE_MAGICSECURE |
2501 WAKE_UCAST |
2502 WAKE_MCAST |
2503 WAKE_BCAST |
2504 WAKE_ARP))
2505 return -EOPNOTSUPP;
2506
2507 jme->reg_pmcs = 0;
2508
2509 if (wol->wolopts & WAKE_PHY)
2510 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2511
2512 if (wol->wolopts & WAKE_MAGIC)
2513 jme->reg_pmcs |= PMCS_MFEN;
2514
2515 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2516
2517 return 0;
2518}
2519
2520static int
2521jme_get_settings(struct net_device *netdev,
2522 struct ethtool_cmd *ecmd)
2523{
2524 struct jme_adapter *jme = netdev_priv(netdev);
2525 int rc;
2526
2527 spin_lock_bh(&jme->phy_lock);
2528 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2529 spin_unlock_bh(&jme->phy_lock);
2530 return rc;
2531}
2532
2533static int
2534jme_set_settings(struct net_device *netdev,
2535 struct ethtool_cmd *ecmd)
2536{
2537 struct jme_adapter *jme = netdev_priv(netdev);
2538 int rc, fdc = 0;
2539
2540 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2541 return -EINVAL;
2542
2543 if (jme->mii_if.force_media &&
2544 ecmd->autoneg != AUTONEG_ENABLE &&
2545 (jme->mii_if.full_duplex != ecmd->duplex))
2546 fdc = 1;
2547
2548 spin_lock_bh(&jme->phy_lock);
2549 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2550 spin_unlock_bh(&jme->phy_lock);
2551
2552 if (!rc && fdc)
2553 jme_reset_link(jme);
2554
2555 if (!rc) {
2556 set_bit(JME_FLAG_SSET, &jme->flags);
2557 jme->old_ecmd = *ecmd;
2558 }
2559
2560 return rc;
2561}
2562
2563static u32
2564jme_get_link(struct net_device *netdev)
2565{
2566 struct jme_adapter *jme = netdev_priv(netdev);
2567 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2568}
2569
2570static u32
2571jme_get_msglevel(struct net_device *netdev)
2572{
2573 struct jme_adapter *jme = netdev_priv(netdev);
2574 return jme->msg_enable;
2575}
2576
2577static void
2578jme_set_msglevel(struct net_device *netdev, u32 value)
2579{
2580 struct jme_adapter *jme = netdev_priv(netdev);
2581 jme->msg_enable = value;
2582}
2583
2584static u32
2585jme_get_rx_csum(struct net_device *netdev)
2586{
2587 struct jme_adapter *jme = netdev_priv(netdev);
2588 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2589}
2590
2591static int
2592jme_set_rx_csum(struct net_device *netdev, u32 on)
2593{
2594 struct jme_adapter *jme = netdev_priv(netdev);
2595
2596 spin_lock_bh(&jme->rxmcs_lock);
2597 if (on)
2598 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2599 else
2600 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2601 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2602 spin_unlock_bh(&jme->rxmcs_lock);
2603
2604 return 0;
2605}
2606
2607static int
2608jme_set_tx_csum(struct net_device *netdev, u32 on)
2609{
2610 struct jme_adapter *jme = netdev_priv(netdev);
2611
2612 if (on) {
2613 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2614 if (netdev->mtu <= 1900)
2615 netdev->features |= NETIF_F_HW_CSUM;
2616 } else {
2617 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2618 netdev->features &= ~NETIF_F_HW_CSUM;
2619 }
2620
2621 return 0;
2622}
2623
2624static int
2625jme_set_tso(struct net_device *netdev, u32 on)
2626{
2627 struct jme_adapter *jme = netdev_priv(netdev);
2628
2629 if (on) {
2630 set_bit(JME_FLAG_TSO, &jme->flags);
2631 if (netdev->mtu <= 1900)
2632 netdev->features |= NETIF_F_TSO
2633#ifdef NETIF_F_TSO6
2634 | NETIF_F_TSO6
2635#endif
2636 ;
2637 } else {
2638 clear_bit(JME_FLAG_TSO, &jme->flags);
2639 netdev->features &= ~(NETIF_F_TSO
2640#ifdef NETIF_F_TSO6
2641 | NETIF_F_TSO6
2642#endif
2643 );
2644 }
2645
2646 return 0;
2647}
2648
2649static int
2650jme_nway_reset(struct net_device *netdev)
2651{
2652 struct jme_adapter *jme = netdev_priv(netdev);
2653 jme_restart_an(jme);
2654 return 0;
2655}
2656
2657static u8
2658jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2659{
2660 u32 val;
2661 int to;
2662
2663 val = jread32(jme, JME_SMBCSR);
2664 to = JME_SMB_BUSY_TIMEOUT;
2665 while ((val & SMBCSR_BUSY) && --to) {
2666 msleep(1);
2667 val = jread32(jme, JME_SMBCSR);
2668 }
2669 if (!to) {
2670#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2671 msg_hw(jme, "SMB Bus Busy.\n");
2672#else
2673 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2674#endif
2675 return 0xFF;
2676 }
2677
2678 jwrite32(jme, JME_SMBINTF,
2679 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2680 SMBINTF_HWRWN_READ |
2681 SMBINTF_HWCMD);
2682
2683 val = jread32(jme, JME_SMBINTF);
2684 to = JME_SMB_BUSY_TIMEOUT;
2685 while ((val & SMBINTF_HWCMD) && --to) {
2686 msleep(1);
2687 val = jread32(jme, JME_SMBINTF);
2688 }
2689 if (!to) {
2690#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2691 msg_hw(jme, "SMB Bus Busy.\n");
2692#else
2693 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2694#endif
2695 return 0xFF;
2696 }
2697
2698 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2699}
2700
2701static void
2702jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2703{
2704 u32 val;
2705 int to;
2706
2707 val = jread32(jme, JME_SMBCSR);
2708 to = JME_SMB_BUSY_TIMEOUT;
2709 while ((val & SMBCSR_BUSY) && --to) {
2710 msleep(1);
2711 val = jread32(jme, JME_SMBCSR);
2712 }
2713 if (!to) {
2714#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2715 msg_hw(jme, "SMB Bus Busy.\n");
2716#else
2717 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2718#endif
2719 return;
2720 }
2721
2722 jwrite32(jme, JME_SMBINTF,
2723 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2724 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2725 SMBINTF_HWRWN_WRITE |
2726 SMBINTF_HWCMD);
2727
2728 val = jread32(jme, JME_SMBINTF);
2729 to = JME_SMB_BUSY_TIMEOUT;
2730 while ((val & SMBINTF_HWCMD) && --to) {
2731 msleep(1);
2732 val = jread32(jme, JME_SMBINTF);
2733 }
2734 if (!to) {
2735#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2736 msg_hw(jme, "SMB Bus Busy.\n");
2737#else
2738 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2739#endif
2740 return;
2741 }
2742
2743 mdelay(2);
2744}
2745
2746static int
2747jme_get_eeprom_len(struct net_device *netdev)
2748{
2749 struct jme_adapter *jme = netdev_priv(netdev);
2750 u32 val;
2751 val = jread32(jme, JME_SMBCSR);
2752 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2753}
2754
2755static int
2756jme_get_eeprom(struct net_device *netdev,
2757 struct ethtool_eeprom *eeprom, u8 *data)
2758{
2759 struct jme_adapter *jme = netdev_priv(netdev);
2760 int i, offset = eeprom->offset, len = eeprom->len;
2761
2762 /*
2763 * ethtool will check the boundary for us
2764 */
2765 eeprom->magic = JME_EEPROM_MAGIC;
2766 for (i = 0 ; i < len ; ++i)
2767 data[i] = jme_smb_read(jme, i + offset);
2768
2769 return 0;
2770}
2771
2772static int
2773jme_set_eeprom(struct net_device *netdev,
2774 struct ethtool_eeprom *eeprom, u8 *data)
2775{
2776 struct jme_adapter *jme = netdev_priv(netdev);
2777 int i, offset = eeprom->offset, len = eeprom->len;
2778
2779 if (eeprom->magic != JME_EEPROM_MAGIC)
2780 return -EINVAL;
2781
2782 /*
2783 * ethtool will check the boundary for us
2784 */
2785 for (i = 0 ; i < len ; ++i)
2786 jme_smb_write(jme, i + offset, data[i]);
2787
2788 return 0;
2789}
2790
2791#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2792static struct ethtool_ops jme_ethtool_ops = {
2793#else
2794static const struct ethtool_ops jme_ethtool_ops = {
2795#endif
2796 .get_drvinfo = jme_get_drvinfo,
2797 .get_regs_len = jme_get_regs_len,
2798 .get_regs = jme_get_regs,
2799 .get_coalesce = jme_get_coalesce,
2800 .set_coalesce = jme_set_coalesce,
2801 .get_pauseparam = jme_get_pauseparam,
2802 .set_pauseparam = jme_set_pauseparam,
2803 .get_wol = jme_get_wol,
2804 .set_wol = jme_set_wol,
2805 .get_settings = jme_get_settings,
2806 .set_settings = jme_set_settings,
2807 .get_link = jme_get_link,
2808 .get_msglevel = jme_get_msglevel,
2809 .set_msglevel = jme_set_msglevel,
2810 .get_rx_csum = jme_get_rx_csum,
2811 .set_rx_csum = jme_set_rx_csum,
2812 .set_tx_csum = jme_set_tx_csum,
2813 .set_tso = jme_set_tso,
2814 .set_sg = ethtool_op_set_sg,
2815 .nway_reset = jme_nway_reset,
2816 .get_eeprom_len = jme_get_eeprom_len,
2817 .get_eeprom = jme_get_eeprom,
2818 .set_eeprom = jme_set_eeprom,
2819};
2820
2821static int
2822jme_pci_dma64(struct pci_dev *pdev)
2823{
2824 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2825#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2826 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2827#else
2828 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2829#endif
2830 )
2831#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2832 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2833#else
2834 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2835#endif
2836 return 1;
2837
2838 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2839#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2840 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2841#else
2842 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2843#endif
2844 )
2845#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2846 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2847#else
2848 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2849#endif
2850 return 1;
2851
2852#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2853 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2854 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2855#else
2856 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2857 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2858#endif
2859 return 0;
2860
2861 return -1;
2862}
2863
2864static inline void
2865jme_phy_init(struct jme_adapter *jme)
2866{
2867 u16 reg26;
2868
2869 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2870 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2871}
2872
2873static inline void
2874jme_check_hw_ver(struct jme_adapter *jme)
2875{
2876 u32 chipmode;
2877
2878 chipmode = jread32(jme, JME_CHIPMODE);
2879
2880 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2881 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2882}
2883
2884#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2885static const struct net_device_ops jme_netdev_ops = {
2886 .ndo_open = jme_open,
2887 .ndo_stop = jme_close,
2888 .ndo_validate_addr = eth_validate_addr,
2889 .ndo_start_xmit = jme_start_xmit,
2890 .ndo_set_mac_address = jme_set_macaddr,
2891 .ndo_set_multicast_list = jme_set_multi,
2892 .ndo_change_mtu = jme_change_mtu,
2893 .ndo_tx_timeout = jme_tx_timeout,
2894 .ndo_vlan_rx_register = jme_vlan_rx_register,
2895};
2896#endif
2897
2898static int __devinit
2899jme_init_one(struct pci_dev *pdev,
2900 const struct pci_device_id *ent)
2901{
2902 int rc = 0, using_dac, i;
2903 struct net_device *netdev;
2904 struct jme_adapter *jme;
2905 u16 bmcr, bmsr;
2906 u32 apmc;
2907
2908 /*
2909 * set up PCI device basics
2910 */
2911 rc = pci_enable_device(pdev);
2912 if (rc) {
2913 jeprintk(pdev, "Cannot enable PCI device.\n");
2914 goto err_out;
2915 }
2916
2917 using_dac = jme_pci_dma64(pdev);
2918 if (using_dac < 0) {
2919 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
2920 rc = -EIO;
2921 goto err_out_disable_pdev;
2922 }
2923
2924 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2925 jeprintk(pdev, "No PCI resource region found.\n");
2926 rc = -ENOMEM;
2927 goto err_out_disable_pdev;
2928 }
2929
2930 rc = pci_request_regions(pdev, DRV_NAME);
2931 if (rc) {
2932 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
2933 goto err_out_disable_pdev;
2934 }
2935
2936 pci_set_master(pdev);
2937
2938 /*
2939 * alloc and init net device
2940 */
2941 netdev = alloc_etherdev(sizeof(*jme));
2942 if (!netdev) {
2943 jeprintk(pdev, "Cannot allocate netdev structure.\n");
2944 rc = -ENOMEM;
2945 goto err_out_release_regions;
2946 }
2947#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2948 netdev->netdev_ops = &jme_netdev_ops;
2949#else
2950 netdev->open = jme_open;
2951 netdev->stop = jme_close;
2952 netdev->hard_start_xmit = jme_start_xmit;
2953 netdev->set_mac_address = jme_set_macaddr;
2954 netdev->set_multicast_list = jme_set_multi;
2955 netdev->change_mtu = jme_change_mtu;
2956 netdev->tx_timeout = jme_tx_timeout;
2957 netdev->vlan_rx_register = jme_vlan_rx_register;
2958#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2959 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2960#endif
2961 NETDEV_GET_STATS(netdev, &jme_get_stats);
2962#endif
2963 netdev->ethtool_ops = &jme_ethtool_ops;
2964 netdev->watchdog_timeo = TX_TIMEOUT;
2965 netdev->features = NETIF_F_HW_CSUM |
2966 NETIF_F_SG |
2967 NETIF_F_TSO |
2968#ifdef NETIF_F_TSO6
2969 NETIF_F_TSO6 |
2970#endif
2971 NETIF_F_HW_VLAN_TX |
2972 NETIF_F_HW_VLAN_RX;
2973 if (using_dac)
2974 netdev->features |= NETIF_F_HIGHDMA;
2975
2976 SET_NETDEV_DEV(netdev, &pdev->dev);
2977 pci_set_drvdata(pdev, netdev);
2978
2979 /*
2980 * init adapter info
2981 */
2982 jme = netdev_priv(netdev);
2983 jme->pdev = pdev;
2984 jme->dev = netdev;
2985 jme->jme_rx = netif_rx;
2986 jme->jme_vlan_rx = vlan_hwaccel_rx;
2987 jme->old_mtu = netdev->mtu = 1500;
2988 jme->phylink = 0;
2989 jme->tx_ring_size = 1 << 10;
2990 jme->tx_ring_mask = jme->tx_ring_size - 1;
2991 jme->tx_wake_threshold = 1 << 9;
2992 jme->rx_ring_size = 1 << 9;
2993 jme->rx_ring_mask = jme->rx_ring_size - 1;
2994 jme->msg_enable = JME_DEF_MSG_ENABLE;
2995 jme->regs = ioremap(pci_resource_start(pdev, 0),
2996 pci_resource_len(pdev, 0));
2997 if (!(jme->regs)) {
2998 jeprintk(pdev, "Mapping PCI resource region error.\n");
2999 rc = -ENOMEM;
3000 goto err_out_free_netdev;
3001 }
3002
3003 if (no_pseudohp) {
3004 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3005 jwrite32(jme, JME_APMC, apmc);
3006 } else if (force_pseudohp) {
3007 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3008 jwrite32(jme, JME_APMC, apmc);
3009 }
3010
3011 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3012
3013 spin_lock_init(&jme->phy_lock);
3014 spin_lock_init(&jme->macaddr_lock);
3015 spin_lock_init(&jme->rxmcs_lock);
3016
3017 atomic_set(&jme->link_changing, 1);
3018 atomic_set(&jme->rx_cleaning, 1);
3019 atomic_set(&jme->tx_cleaning, 1);
3020 atomic_set(&jme->rx_empty, 1);
3021
3022 tasklet_init(&jme->pcc_task,
3023 jme_pcc_tasklet,
3024 (unsigned long) jme);
3025 tasklet_init(&jme->linkch_task,
3026 jme_link_change_tasklet,
3027 (unsigned long) jme);
3028 tasklet_init(&jme->txclean_task,
3029 jme_tx_clean_tasklet,
3030 (unsigned long) jme);
3031 tasklet_init(&jme->rxclean_task,
3032 jme_rx_clean_tasklet,
3033 (unsigned long) jme);
3034 tasklet_init(&jme->rxempty_task,
3035 jme_rx_empty_tasklet,
3036 (unsigned long) jme);
3037 tasklet_disable_nosync(&jme->linkch_task);
3038 tasklet_disable_nosync(&jme->txclean_task);
3039 tasklet_disable_nosync(&jme->rxclean_task);
3040 tasklet_disable_nosync(&jme->rxempty_task);
3041 jme->dpi.cur = PCC_P1;
3042
3043 jme->reg_ghc = 0;
3044 jme->reg_rxcs = RXCS_DEFAULT;
3045 jme->reg_rxmcs = RXMCS_DEFAULT;
3046 jme->reg_txpfc = 0;
3047 jme->reg_pmcs = PMCS_MFEN;
3048 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3049 set_bit(JME_FLAG_TSO, &jme->flags);
3050
3051 /*
3052 * Get Max Read Req Size from PCI Config Space
3053 */
3054 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3055 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3056 switch (jme->mrrs) {
3057 case MRRS_128B:
3058 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3059 break;
3060 case MRRS_256B:
3061 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3062 break;
3063 default:
3064 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3065 break;
3066 }
3067
3068 /*
3069 * Must check before reset_mac_processor
3070 */
3071 jme_check_hw_ver(jme);
3072 jme->mii_if.dev = netdev;
3073 if (jme->fpgaver) {
3074 jme->mii_if.phy_id = 0;
3075 for (i = 1 ; i < 32 ; ++i) {
3076 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3077 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3078 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3079 jme->mii_if.phy_id = i;
3080 break;
3081 }
3082 }
3083
3084 if (!jme->mii_if.phy_id) {
3085 rc = -EIO;
3086 jeprintk(pdev, "Can not find phy_id.\n");
3087 goto err_out_unmap;
3088 }
3089
3090 jme->reg_ghc |= GHC_LINK_POLL;
3091 } else {
3092 jme->mii_if.phy_id = 1;
3093 }
3094 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3095 jme->mii_if.supports_gmii = true;
3096 else
3097 jme->mii_if.supports_gmii = false;
3098 jme->mii_if.mdio_read = jme_mdio_read;
3099 jme->mii_if.mdio_write = jme_mdio_write;
3100
3101 jme_clear_pm(jme);
3102 jme_set_phyfifoa(jme);
3103 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3104 if (!jme->fpgaver)
3105 jme_phy_init(jme);
3106 jme_phy_off(jme);
3107
3108 /*
3109 * Reset MAC processor and reload EEPROM for MAC Address
3110 */
3111 jme_reset_mac_processor(jme);
3112 rc = jme_reload_eeprom(jme);
3113 if (rc) {
3114 jeprintk(pdev,
3115 "Reload eeprom for reading MAC Address error.\n");
3116 goto err_out_unmap;
3117 }
3118 jme_load_macaddr(netdev);
3119
3120 /*
3121 * Tell stack that we are not ready to work until open()
3122 */
3123 netif_carrier_off(netdev);
3124 netif_stop_queue(netdev);
3125
3126 /*
3127 * Register netdev
3128 */
3129 rc = register_netdev(netdev);
3130 if (rc) {
3131 jeprintk(pdev, "Cannot register net device.\n");
3132 goto err_out_unmap;
3133 }
3134
3135#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3136 msg_probe(jme, "%s%s ver:%x rev:%x "
3137 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3138 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3139 "JMC250 Gigabit Ethernet" :
3140 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3141 "JMC260 Fast Ethernet" : "Unknown",
3142 (jme->fpgaver != 0) ? " (FPGA)" : "",
3143 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3144 jme->rev,
3145 netdev->dev_addr[0],
3146 netdev->dev_addr[1],
3147 netdev->dev_addr[2],
3148 netdev->dev_addr[3],
3149 netdev->dev_addr[4],
3150 netdev->dev_addr[5]);
3151#else
3152 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3153 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3154 "JMC250 Gigabit Ethernet" :
3155 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3156 "JMC260 Fast Ethernet" : "Unknown",
3157 (jme->fpgaver != 0) ? " (FPGA)" : "",
3158 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3159 jme->rev, netdev->dev_addr);
3160#endif
3161
3162 return 0;
3163
3164err_out_unmap:
3165 iounmap(jme->regs);
3166err_out_free_netdev:
3167 pci_set_drvdata(pdev, NULL);
3168 free_netdev(netdev);
3169err_out_release_regions:
3170 pci_release_regions(pdev);
3171err_out_disable_pdev:
3172 pci_disable_device(pdev);
3173err_out:
3174 return rc;
3175}
3176
3177static void __devexit
3178jme_remove_one(struct pci_dev *pdev)
3179{
3180 struct net_device *netdev = pci_get_drvdata(pdev);
3181 struct jme_adapter *jme = netdev_priv(netdev);
3182
3183 unregister_netdev(netdev);
3184 iounmap(jme->regs);
3185 pci_set_drvdata(pdev, NULL);
3186 free_netdev(netdev);
3187 pci_release_regions(pdev);
3188 pci_disable_device(pdev);
3189
3190}
3191
3192#ifdef CONFIG_PM
3193static int
3194jme_suspend(struct pci_dev *pdev, pm_message_t state)
3195{
3196 struct net_device *netdev = pci_get_drvdata(pdev);
3197 struct jme_adapter *jme = netdev_priv(netdev);
3198
3199 atomic_dec(&jme->link_changing);
3200
3201 netif_device_detach(netdev);
3202 netif_stop_queue(netdev);
3203 jme_stop_irq(jme);
3204
3205 tasklet_disable(&jme->txclean_task);
3206 tasklet_disable(&jme->rxclean_task);
3207 tasklet_disable(&jme->rxempty_task);
3208
3209 if (netif_carrier_ok(netdev)) {
3210 if (test_bit(JME_FLAG_POLL, &jme->flags))
3211 jme_polling_mode(jme);
3212
3213 jme_stop_pcc_timer(jme);
3214 jme_reset_ghc_speed(jme);
3215 jme_disable_rx_engine(jme);
3216 jme_disable_tx_engine(jme);
3217 jme_reset_mac_processor(jme);
3218 jme_free_rx_resources(jme);
3219 jme_free_tx_resources(jme);
3220 netif_carrier_off(netdev);
3221 jme->phylink = 0;
3222 }
3223
3224 tasklet_enable(&jme->txclean_task);
3225 tasklet_hi_enable(&jme->rxclean_task);
3226 tasklet_hi_enable(&jme->rxempty_task);
3227
3228 pci_save_state(pdev);
3229 if (jme->reg_pmcs) {
3230 jme_set_100m_half(jme);
3231
3232 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3233 jme_wait_link(jme);
3234
3235 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3236
3237 pci_enable_wake(pdev, PCI_D3cold, true);
3238 } else {
3239 jme_phy_off(jme);
3240 }
3241 pci_set_power_state(pdev, PCI_D3cold);
3242
3243 return 0;
3244}
3245
3246static int
3247jme_resume(struct pci_dev *pdev)
3248{
3249 struct net_device *netdev = pci_get_drvdata(pdev);
3250 struct jme_adapter *jme = netdev_priv(netdev);
3251
3252 jme_clear_pm(jme);
3253 pci_restore_state(pdev);
3254
3255 if (test_bit(JME_FLAG_SSET, &jme->flags))
3256 jme_set_settings(netdev, &jme->old_ecmd);
3257 else
3258 jme_reset_phy_processor(jme);
3259
3260 jme_start_irq(jme);
3261 netif_device_attach(netdev);
3262
3263 atomic_inc(&jme->link_changing);
3264
3265 jme_reset_link(jme);
3266
3267 return 0;
3268}
3269#endif
3270
3271#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3272static struct pci_device_id jme_pci_tbl[] = {
3273#else
3274static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3275#endif
3276 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3277 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3278 { }
3279};
3280
3281static struct pci_driver jme_driver = {
3282 .name = DRV_NAME,
3283 .id_table = jme_pci_tbl,
3284 .probe = jme_init_one,
3285 .remove = __devexit_p(jme_remove_one),
3286#ifdef CONFIG_PM
3287 .suspend = jme_suspend,
3288 .resume = jme_resume,
3289#endif /* CONFIG_PM */
3290};
3291
3292static int __init
3293jme_init_module(void)
3294{
3295 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
3296 "driver version %s\n", DRV_VERSION);
3297 return pci_register_driver(&jme_driver);
3298}
3299
3300static void __exit
3301jme_cleanup_module(void)
3302{
3303 pci_unregister_driver(&jme_driver);
3304}
3305
3306module_init(jme_init_module);
3307module_exit(jme_cleanup_module);
3308
3309MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3310MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3311MODULE_LICENSE("GPL");
3312MODULE_VERSION(DRV_VERSION);
3313MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3314
JMicron Ethernet Linux driver