arch/arm/plat-omap/usb.c

   1  /*
   2  * arch/arm/plat-omap/usb.c -- platform level USB initialization
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #undef  DEBUG
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/errno.h>
  27 #include <linux/init.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/usb/otg.h>
  30 #include <linux/io.h>
  31
  32 #include <asm/irq.h>
  33 #include <asm/system.h>
  34 #include <mach/hardware.h>
  35
  36 #include <plat/control.h>
  37 #include <plat/mux.h>
  38 #include <plat/usb.h>
  39 #include <plat/board.h>
  40
  41 #ifdef CONFIG_ARCH_OMAP1
  42
  43 #define INT_USB_IRQ_GEN         IH2_BASE + 20
  44 #define INT_USB_IRQ_NISO        IH2_BASE + 30
  45 #define INT_USB_IRQ_ISO         IH2_BASE + 29
  46 #define INT_USB_IRQ_HGEN        INT_USB_HHC_1
  47 #define INT_USB_IRQ_OTG         IH2_BASE + 8
  48
  49 #else
  50
  51 #define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
  52 #define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
  53 #define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
  54 #define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
  55 #define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
  56
  57 #endif
  58
  59
  60 /* These routines should handle the standard chip-specific modes
  61  * for usb0/1/2 ports, covering basic mux and transceiver setup.
  62  *
  63  * Some board-*.c files will need to set up additional mux options,
  64  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  65  */
  66
  67 /* TESTED ON:
  68  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  69  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  70  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
  71  *  - 1510 Innovator UDC with bundled usb0 cable
  72  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
  73  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  74  *  - 1710 custom development board using alternate pin group
  75  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  76  */
  77
  78 /*-------------------------------------------------------------------------*/
  79
  80 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
  81
  82 static void omap2_usb_devconf_clear(u8 port, u32 mask)
  83 {
  84         u32 r;
  85
  86         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  87         r &= ~USBTXWRMODEI(port, mask);
  88         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  89 }
  90
  91 static void omap2_usb_devconf_set(u8 port, u32 mask)
  92 {
  93         u32 r;
  94
  95         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  96         r |= USBTXWRMODEI(port, mask);
  97         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  98 }
  99
 100 static void omap2_usb2_disable_5pinbitll(void)
 101 {
 102         u32 r;
 103
 104         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 105         r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
 106         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 107 }
 108
 109 static void omap2_usb2_enable_5pinunitll(void)
 110 {
 111         u32 r;
 112
 113         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 114         r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
 115         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 116 }
 117
 118 static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device)
 119 {
 120         u32     syscon1 = 0;
 121
 122         omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
 123
 124         if (nwires == 0)
 125                 return 0;
 126
 127         if (is_device)
 128                 omap_cfg_reg(J20_24XX_USB0_PUEN);
 129
 130         omap_cfg_reg(K18_24XX_USB0_DAT);
 131         omap_cfg_reg(K19_24XX_USB0_TXEN);
 132         omap_cfg_reg(J14_24XX_USB0_SE0);
 133         if (nwires != 3)
 134                 omap_cfg_reg(J18_24XX_USB0_RCV);
 135
 136         switch (nwires) {
 137         case 3:
 138                 syscon1 = 2;
 139                 omap2_usb_devconf_set(0, USB_BIDIR);
 140                 break;
 141         case 4:
 142                 syscon1 = 1;
 143                 omap2_usb_devconf_set(0, USB_BIDIR);
 144                 break;
 145         case 6:
 146                 syscon1 = 3;
 147                 omap_cfg_reg(J19_24XX_USB0_VP);
 148                 omap_cfg_reg(K20_24XX_USB0_VM);
 149                 omap2_usb_devconf_set(0, USB_UNIDIR);
 150                 break;
 151         default:
 152                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 153                         0, nwires);
 154         }
 155
 156         return syscon1 << 16;
 157 }
 158
 159 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 160 {
 161         u32     syscon1 = 0;
 162
 163         if (cpu_is_omap24xx())
 164                 return omap2_usb0_init(nwires, is_device);
 165
 166         if (nwires == 0) {
 167                 if (!cpu_is_omap15xx()) {
 168                         u32 l;
 169
 170                         /* pulldown D+/D- */
 171                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 172                         l &= ~(3 << 1);
 173                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 174                 }
 175                 return 0;
 176         }
 177
 178         if (is_device) {
 179                 if (cpu_is_omap7xx()) {
 180                         omap_cfg_reg(AA17_7XX_USB_DM);
 181                         omap_cfg_reg(W16_7XX_USB_PU_EN);
 182                         omap_cfg_reg(W17_7XX_USB_VBUSI);
 183                         omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
 184                         omap_cfg_reg(W19_7XX_USB_DCRST);
 185                 } else
 186                         omap_cfg_reg(W4_USB_PUEN);
 187         }
 188
 189         if (nwires == 2) {
 190                 u32 l;
 191
 192                 // omap_cfg_reg(P9_USB_DP);
 193                 // omap_cfg_reg(R8_USB_DM);
 194
 195                 if (cpu_is_omap15xx()) {
 196                         /* This works on 1510-Innovator */
 197                         return 0;
 198                 }
 199
 200                 /* NOTES:
 201                  *  - peripheral should configure VBUS detection!
 202                  *  - only peripherals may use the internal D+/D- pulldowns
 203                  *  - OTG support on this port not yet written
 204                  */
 205
 206                 /* Don't do this for omap7xx -- it causes USB to not work correctly */
 207                 if (!cpu_is_omap7xx()) {
 208                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 209                         l &= ~(7 << 4);
 210                         if (!is_device)
 211                                 l |= (3 << 1);
 212                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 213                 }
 214
 215                 return 3 << 16;
 216         }
 217
 218         /* alternate pin config, external transceiver */
 219         if (cpu_is_omap15xx()) {
 220                 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
 221                 return 0;
 222         }
 223
 224         omap_cfg_reg(V6_USB0_TXD);
 225         omap_cfg_reg(W9_USB0_TXEN);
 226         omap_cfg_reg(W5_USB0_SE0);
 227         if (nwires != 3)
 228                 omap_cfg_reg(Y5_USB0_RCV);
 229
 230         /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
 231          * may be able to use I2C requests to set those bits along
 232          * with VBUS switching and overcurrent detection.
 233          */
 234
 235         if (nwires != 6) {
 236                 u32 l;
 237
 238                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 239                 l &= ~CONF_USB2_UNI_R;
 240                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 241         }
 242
 243         switch (nwires) {
 244         case 3:
 245                 syscon1 = 2;
 246                 break;
 247         case 4:
 248                 syscon1 = 1;
 249                 break;
 250         case 6:
 251                 syscon1 = 3;
 252                 {
 253                         u32 l;
 254
 255                         omap_cfg_reg(AA9_USB0_VP);
 256                         omap_cfg_reg(R9_USB0_VM);
 257                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 258                         l |= CONF_USB2_UNI_R;
 259                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 260                 }
 261                 break;
 262         default:
 263                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 264                         0, nwires);
 265         }
 266         return syscon1 << 16;
 267 }
 268
 269 static u32 __init omap2_usb1_init(unsigned nwires)
 270 {
 271         u32     syscon1 = 0;
 272
 273         omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
 274
 275         if (nwires == 0)
 276                 return 0;
 277
 278         /* NOTE:  board-specific code must set up pin muxing for usb1,
 279          * since each signal could come out on either of two balls.
 280          */
 281
 282         switch (nwires) {
 283         case 2:
 284                 /* NOTE: board-specific code must override this setting if
 285                  * this TLL link is not using DP/DM
 286                  */
 287                 syscon1 = 1;
 288                 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
 289                 break;
 290         case 3:
 291                 syscon1 = 2;
 292                 omap2_usb_devconf_set(1, USB_BIDIR);
 293                 break;
 294         case 4:
 295                 syscon1 = 1;
 296                 omap2_usb_devconf_set(1, USB_BIDIR);
 297                 break;
 298         case 6:
 299         default:
 300                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 301                         1, nwires);
 302         }
 303
 304         return syscon1 << 20;
 305 }
 306
 307 static u32 __init omap_usb1_init(unsigned nwires)
 308 {
 309         u32     syscon1 = 0;
 310
 311         if (cpu_is_omap24xx())
 312                 return omap2_usb1_init(nwires);
 313
 314         if (!cpu_is_omap15xx() && nwires != 6) {
 315                 u32 l;
 316
 317                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 318                 l &= ~CONF_USB1_UNI_R;
 319                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 320         }
 321         if (nwires == 0)
 322                 return 0;
 323
 324         /* external transceiver */
 325         omap_cfg_reg(USB1_TXD);
 326         omap_cfg_reg(USB1_TXEN);
 327         if (nwires != 3)
 328                 omap_cfg_reg(USB1_RCV);
 329
 330         if (cpu_is_omap15xx()) {
 331                 omap_cfg_reg(USB1_SEO);
 332                 omap_cfg_reg(USB1_SPEED);
 333                 // SUSP
 334         } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
 335                 omap_cfg_reg(W13_1610_USB1_SE0);
 336                 omap_cfg_reg(R13_1610_USB1_SPEED);
 337                 // SUSP
 338         } else if (cpu_is_omap1710()) {
 339                 omap_cfg_reg(R13_1710_USB1_SE0);
 340                 // SUSP
 341         } else {
 342                 pr_debug("usb%d cpu unrecognized\n", 1);
 343                 return 0;
 344         }
 345
 346         switch (nwires) {
 347         case 2:
 348                 goto bad;
 349         case 3:
 350                 syscon1 = 2;
 351                 break;
 352         case 4:
 353                 syscon1 = 1;
 354                 break;
 355         case 6:
 356                 syscon1 = 3;
 357                 omap_cfg_reg(USB1_VP);
 358                 omap_cfg_reg(USB1_VM);
 359                 if (!cpu_is_omap15xx()) {
 360                         u32 l;
 361
 362                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 363                         l |= CONF_USB1_UNI_R;
 364                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 365                 }
 366                 break;
 367         default:
 368 bad:
 369                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 370                         1, nwires);
 371         }
 372         return syscon1 << 20;
 373 }
 374
 375 static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup)
 376 {
 377         u32     syscon1 = 0;
 378
 379         omap2_usb2_disable_5pinbitll();
 380         alt_pingroup = 0;
 381
 382         /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
 383         if (alt_pingroup || nwires == 0)
 384                 return 0;
 385
 386         omap_cfg_reg(Y11_24XX_USB2_DAT);
 387         omap_cfg_reg(AA10_24XX_USB2_SE0);
 388         if (nwires > 2)
 389                 omap_cfg_reg(AA12_24XX_USB2_TXEN);
 390         if (nwires > 3)
 391                 omap_cfg_reg(AA6_24XX_USB2_RCV);
 392
 393         switch (nwires) {
 394         case 2:
 395                 /* NOTE: board-specific code must override this setting if
 396                  * this TLL link is not using DP/DM
 397                  */
 398                 syscon1 = 1;
 399                 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
 400                 break;
 401         case 3:
 402                 syscon1 = 2;
 403                 omap2_usb_devconf_set(2, USB_BIDIR);
 404                 break;
 405         case 4:
 406                 syscon1 = 1;
 407                 omap2_usb_devconf_set(2, USB_BIDIR);
 408                 break;
 409         case 5:
 410                 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
 411                 /* NOTE: board-specific code must override this setting if
 412                  * this TLL link is not using DP/DM.  Something must also
 413                  * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
 414                  */
 415                 syscon1 = 3;
 416                 omap2_usb2_enable_5pinunitll();
 417                 break;
 418         case 6:
 419         default:
 420                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 421                         2, nwires);
 422         }
 423
 424         return syscon1 << 24;
 425 }
 426
 427 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
 428 {
 429         u32     syscon1 = 0;
 430
 431         if (cpu_is_omap24xx())
 432                 return omap2_usb2_init(nwires, alt_pingroup);
 433
 434         /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
 435         if (alt_pingroup || nwires == 0)
 436                 return 0;
 437
 438         if (!cpu_is_omap15xx() && nwires != 6) {
 439                 u32 l;
 440
 441                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 442                 l &= ~CONF_USB2_UNI_R;
 443                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 444         }
 445
 446         /* external transceiver */
 447         if (cpu_is_omap15xx()) {
 448                 omap_cfg_reg(USB2_TXD);
 449                 omap_cfg_reg(USB2_TXEN);
 450                 omap_cfg_reg(USB2_SEO);
 451                 if (nwires != 3)
 452                         omap_cfg_reg(USB2_RCV);
 453                 /* there is no USB2_SPEED */
 454         } else if (cpu_is_omap16xx()) {
 455                 omap_cfg_reg(V6_USB2_TXD);
 456                 omap_cfg_reg(W9_USB2_TXEN);
 457                 omap_cfg_reg(W5_USB2_SE0);
 458                 if (nwires != 3)
 459                         omap_cfg_reg(Y5_USB2_RCV);
 460                 // FIXME omap_cfg_reg(USB2_SPEED);
 461         } else {
 462                 pr_debug("usb%d cpu unrecognized\n", 1);
 463                 return 0;
 464         }
 465         // omap_cfg_reg(USB2_SUSP);
 466
 467         switch (nwires) {
 468         case 2:
 469                 goto bad;
 470         case 3:
 471                 syscon1 = 2;
 472                 break;
 473         case 4:
 474                 syscon1 = 1;
 475                 break;
 476         case 5:
 477                 goto bad;
 478         case 6:
 479                 syscon1 = 3;
 480                 if (cpu_is_omap15xx()) {
 481                         omap_cfg_reg(USB2_VP);
 482                         omap_cfg_reg(USB2_VM);
 483                 } else {
 484                         u32 l;
 485
 486                         omap_cfg_reg(AA9_USB2_VP);
 487                         omap_cfg_reg(R9_USB2_VM);
 488                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 489                         l |= CONF_USB2_UNI_R;
 490                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 491                 }
 492                 break;
 493         default:
 494 bad:
 495                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 496                         2, nwires);
 497         }
 498         return syscon1 << 24;
 499 }
 500
 501 #endif
 502
 503 /*-------------------------------------------------------------------------*/
 504
 505 #ifdef  CONFIG_USB_GADGET_OMAP
 506
 507 static struct resource udc_resources[] = {
 508         /* order is significant! */
 509         {               /* registers */
 510                 .start          = UDC_BASE,
 511                 .end            = UDC_BASE + 0xff,
 512                 .flags          = IORESOURCE_MEM,
 513         }, {            /* general IRQ */
 514                 .start          = INT_USB_IRQ_GEN,
 515                 .flags          = IORESOURCE_IRQ,
 516         }, {            /* PIO IRQ */
 517                 .start          = INT_USB_IRQ_NISO,
 518                 .flags          = IORESOURCE_IRQ,
 519         }, {            /* SOF IRQ */
 520                 .start          = INT_USB_IRQ_ISO,
 521                 .flags          = IORESOURCE_IRQ,
 522         },
 523 };
 524
 525 static u64 udc_dmamask = ~(u32)0;
 526
 527 static struct platform_device udc_device = {
 528         .name           = "omap_udc",
 529         .id             = -1,
 530         .dev = {
 531                 .dma_mask               = &udc_dmamask,
 532                 .coherent_dma_mask      = 0xffffffff,
 533         },
 534         .num_resources  = ARRAY_SIZE(udc_resources),
 535         .resource       = udc_resources,
 536 };
 537
 538 #endif
 539
 540 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 541
 542 /* The dmamask must be set for OHCI to work */
 543 static u64 ohci_dmamask = ~(u32)0;
 544
 545 static struct resource ohci_resources[] = {
 546         {
 547                 .start  = OMAP_OHCI_BASE,
 548                 .end    = OMAP_OHCI_BASE + 0xff,
 549                 .flags  = IORESOURCE_MEM,
 550         },
 551         {
 552                 .start  = INT_USB_IRQ_HGEN,
 553                 .flags  = IORESOURCE_IRQ,
 554         },
 555 };
 556
 557 static struct platform_device ohci_device = {
 558         .name                   = "ohci",
 559         .id                     = -1,
 560         .dev = {
 561                 .dma_mask               = &ohci_dmamask,
 562                 .coherent_dma_mask      = 0xffffffff,
 563         },
 564         .num_resources  = ARRAY_SIZE(ohci_resources),
 565         .resource               = ohci_resources,
 566 };
 567
 568 #endif
 569
 570 #if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
 571
 572 static struct resource otg_resources[] = {
 573         /* order is significant! */
 574         {
 575                 .start          = OTG_BASE,
 576                 .end            = OTG_BASE + 0xff,
 577                 .flags          = IORESOURCE_MEM,
 578         }, {
 579                 .start          = INT_USB_IRQ_OTG,
 580                 .flags          = IORESOURCE_IRQ,
 581         },
 582 };
 583
 584 static struct platform_device otg_device = {
 585         .name           = "omap_otg",
 586         .id             = -1,
 587         .num_resources  = ARRAY_SIZE(otg_resources),
 588         .resource       = otg_resources,
 589 };
 590
 591 #endif
 592
 593 /*-------------------------------------------------------------------------*/
 594
 595 // FIXME correct answer depends on hmc_mode,
 596 // as does (on omap1) any nonzero value for config->otg port number
 597 #ifdef  CONFIG_USB_GADGET_OMAP
 598 #define is_usb0_device(config)  1
 599 #else
 600 #define is_usb0_device(config)  0
 601 #endif
 602
 603 /*-------------------------------------------------------------------------*/
 604
 605 #ifdef  CONFIG_ARCH_OMAP_OTG
 606
 607 void __init
 608 omap_otg_init(struct omap_usb_config *config)
 609 {
 610         u32             syscon;
 611         int             status;
 612         int             alt_pingroup = 0;
 613
 614         /* NOTE:  no bus or clock setup (yet?) */
 615
 616         syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
 617         if (!(syscon & OTG_RESET_DONE))
 618                 pr_debug("USB resets not complete?\n");
 619
 620         //omap_writew(0, OTG_IRQ_EN);
 621
 622         /* pin muxing and transceiver pinouts */
 623         if (config->pins[0] > 2)        /* alt pingroup 2 */
 624                 alt_pingroup = 1;
 625         syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
 626         syscon |= omap_usb1_init(config->pins[1]);
 627         syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
 628         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 629         omap_writel(syscon, OTG_SYSCON_1);
 630
 631         syscon = config->hmc_mode;
 632         syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
 633 #ifdef  CONFIG_USB_OTG
 634         if (config->otg)
 635                 syscon |= OTG_EN;
 636 #endif
 637         if (cpu_class_is_omap1())
 638                 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
 639                          omap_readl(USB_TRANSCEIVER_CTRL));
 640         pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
 641         omap_writel(syscon, OTG_SYSCON_2);
 642
 643         printk("USB: hmc %d", config->hmc_mode);
 644         if (!alt_pingroup)
 645                 printk(", usb2 alt %d wires", config->pins[2]);
 646         else if (config->pins[0])
 647                 printk(", usb0 %d wires%s", config->pins[0],
 648                         is_usb0_device(config) ? " (dev)" : "");
 649         if (config->pins[1])
 650                 printk(", usb1 %d wires", config->pins[1]);
 651         if (!alt_pingroup && config->pins[2])
 652                 printk(", usb2 %d wires", config->pins[2]);
 653         if (config->otg)
 654                 printk(", Mini-AB on usb%d", config->otg - 1);
 655         printk("\n");
 656
 657         if (cpu_class_is_omap1()) {
 658                 u16 w;
 659
 660                 /* leave USB clocks/controllers off until needed */
 661                 w = omap_readw(ULPD_SOFT_REQ);
 662                 w &= ~SOFT_USB_CLK_REQ;
 663                 omap_writew(w, ULPD_SOFT_REQ);
 664
 665                 w = omap_readw(ULPD_CLOCK_CTRL);
 666                 w &= ~USB_MCLK_EN;
 667                 w |= DIS_USB_PVCI_CLK;
 668                 omap_writew(w, ULPD_CLOCK_CTRL);
 669         }
 670         syscon = omap_readl(OTG_SYSCON_1);
 671         syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
 672
 673 #ifdef  CONFIG_USB_GADGET_OMAP
 674         if (config->otg || config->register_dev) {
 675                 syscon &= ~DEV_IDLE_EN;
 676                 udc_device.dev.platform_data = config;
 677                 /* IRQ numbers for omap7xx */
 678                 if(cpu_is_omap7xx()) {
 679                         udc_resources[1].start = INT_7XX_USB_GENI;
 680                         udc_resources[2].start = INT_7XX_USB_NON_ISO;
 681                         udc_resources[3].start = INT_7XX_USB_ISO;
 682                 }
 683                 status = platform_device_register(&udc_device);
 684                 if (status)
 685                         pr_debug("can't register UDC device, %d\n", status);
 686         }
 687 #endif
 688
 689 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 690         if (config->otg || config->register_host) {
 691                 syscon &= ~HST_IDLE_EN;
 692                 ohci_device.dev.platform_data = config;
 693                 if (cpu_is_omap7xx())
 694                         ohci_resources[1].start = INT_7XX_USB_HHC_1;
 695                 status = platform_device_register(&ohci_device);
 696                 if (status)
 697                         pr_debug("can't register OHCI device, %d\n", status);
 698         }
 699 #endif
 700
 701 #ifdef  CONFIG_USB_OTG
 702         if (config->otg) {
 703                 syscon &= ~OTG_IDLE_EN;
 704                 otg_device.dev.platform_data = config;
 705                 if (cpu_is_omap7xx())
 706                         otg_resources[1].start = INT_7XX_USB_OTG;
 707                 status = platform_device_register(&otg_device);
 708                 if (status)
 709                         pr_debug("can't register OTG device, %d\n", status);
 710         }
 711 #endif
 712         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 713         omap_writel(syscon, OTG_SYSCON_1);
 714
 715         status = 0;
 716 }
 717
 718 #else
 719 static inline void omap_otg_init(struct omap_usb_config *config) {}
 720 #endif
 721
 722 /*-------------------------------------------------------------------------*/
 723
 724 #ifdef  CONFIG_ARCH_OMAP15XX
 725
 726 /* ULPD_DPLL_CTRL */
 727 #define DPLL_IOB                (1 << 13)
 728 #define DPLL_PLL_ENABLE         (1 << 4)
 729 #define DPLL_LOCK               (1 << 0)
 730
 731 /* ULPD_APLL_CTRL */
 732 #define APLL_NDPLL_SWITCH       (1 << 0)
 733
 734
 735 static void __init omap_1510_usb_init(struct omap_usb_config *config)
 736 {
 737         unsigned int val;
 738         u16 w;
 739
 740         omap_usb0_init(config->pins[0], is_usb0_device(config));
 741         omap_usb1_init(config->pins[1]);
 742         omap_usb2_init(config->pins[2], 0);
 743
 744         val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
 745         val |= (config->hmc_mode << 1);
 746         omap_writel(val, MOD_CONF_CTRL_0);
 747
 748         printk("USB: hmc %d", config->hmc_mode);
 749         if (config->pins[0])
 750                 printk(", usb0 %d wires%s", config->pins[0],
 751                         is_usb0_device(config) ? " (dev)" : "");
 752         if (config->pins[1])
 753                 printk(", usb1 %d wires", config->pins[1]);
 754         if (config->pins[2])
 755                 printk(", usb2 %d wires", config->pins[2]);
 756         printk("\n");
 757
 758         /* use DPLL for 48 MHz function clock */
 759         pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
 760                         omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
 761
 762         w = omap_readw(ULPD_APLL_CTRL);
 763         w &= ~APLL_NDPLL_SWITCH;
 764         omap_writew(w, ULPD_APLL_CTRL);
 765
 766         w = omap_readw(ULPD_DPLL_CTRL);
 767         w |= DPLL_IOB | DPLL_PLL_ENABLE;
 768         omap_writew(w, ULPD_DPLL_CTRL);
 769
 770         w = omap_readw(ULPD_SOFT_REQ);
 771         w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
 772         omap_writew(w, ULPD_SOFT_REQ);
 773
 774         while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
 775                 cpu_relax();
 776
 777 #ifdef  CONFIG_USB_GADGET_OMAP
 778         if (config->register_dev) {
 779                 int status;
 780
 781                 udc_device.dev.platform_data = config;
 782                 status = platform_device_register(&udc_device);
 783                 if (status)
 784                         pr_debug("can't register UDC device, %d\n", status);
 785                 /* udc driver gates 48MHz by D+ pullup */
 786         }
 787 #endif
 788
 789 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 790         if (config->register_host) {
 791                 int status;
 792
 793                 ohci_device.dev.platform_data = config;
 794                 status = platform_device_register(&ohci_device);
 795                 if (status)
 796                         pr_debug("can't register OHCI device, %d\n", status);
 797                 /* hcd explicitly gates 48MHz */
 798         }
 799 #endif
 800 }
 801
 802 #else
 803 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
 804 #endif
 805
 806 /*-------------------------------------------------------------------------*/
 807
 808 void __init omap_usb_init(struct omap_usb_config *pdata)
 809 {
 810         if (cpu_is_omap7xx() || cpu_is_omap16xx() || cpu_is_omap24xx())
 811                 omap_otg_init(pdata);
 812         else if (cpu_is_omap15xx())
 813                 omap_1510_usb_init(pdata);
 814         else
 815                 printk(KERN_ERR "USB: No init for your chip yet\n");
 816 }
 817