From 32aa77a4fc06bd1116f83c25bf0389a3e9b80533 Mon Sep 17 00:00:00 2001 From: Alexander Duyck Date: Tue, 16 Nov 2010 19:26:59 -0800 Subject: [PATCH] ixgbe: change vector numbering so that queues end up on correct CPUs This changes the numbering scheme slightly. Previously the ordering was coming out like this: Rx-2 Rx-1 Rx-0 TxRx-0 Which would drop two queues on CPU 0. This change makes it so that the ordering is like this: Rx-3 Rx-2 Rx-1 TxRx-0 This means that each CPU will have it's own Rx queue, and only CPU 0 will have the Tx queue. Signed-off-by: Alexander Duyck Tested-by: Ross Brattain Signed-off-by: Jeff Kirsher --- drivers/net/ixgbe/ixgbe_main.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 1d78b554b0e..5dde7d63c3a 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c @@ -2182,9 +2182,11 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) } else if (handler == &ixgbe_msix_clean_tx) { sprintf(adapter->name[vector], "%s-%s-%d", netdev->name, "tx", ti++); - } else + } else { sprintf(adapter->name[vector], "%s-%s-%d", - netdev->name, "TxRx", vector); + netdev->name, "TxRx", ri++); + ti++; + } err = request_irq(adapter->msix_entries[vector].vector, handler, 0, adapter->name[vector], -- 2.39.3