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tg3: Allow DMAs to cross cacheline boundaries
authorMatt Carlson <mcarlson@broadcom.com>
Fri, 13 Nov 2009 13:03:40 +0000 (13:03 +0000)
committerDavid S. Miller <davem@davemloft.net>
Mon, 16 Nov 2009 06:14:43 +0000 (22:14 -0800)
commitcbf9ca6cf8304beb640a948709c4672bc1d5a55f
treef1941d408d9db7eb4524fc6423de19f3ef16c342tree | snapshot (tar.bz2 tar.gz zip)
parent615774fe598f8ee971a8dfeb1f2ec4211241c433commit | diff
tg3: Allow DMAs to cross cacheline boundaries

By default, the 5717 (and future chips) break up PCIe DMA packets across
cacheline boundaries.  This isn't necessary on x86.  This patch
selectively loosens the restriction.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/tg3.c diff | blob | blame | history
drivers/net/tg3.h diff | blob | blame | history
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