tg3: Fix 5719 internal FIFO overflow problem

[net-next-2.6.git] / drivers / net / tg3.c

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 2624d714d16ee6fd6784079077ad50e599d648d5..226e60dfaeaf41dcdc05dabeada3ce0d34542ddc 100644 (file)
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6985,7 +6985,7 @@ static void tg3_restore_pci_state(struct tg3 *tp)
 
        if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785) {
                if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)
-                       pcie_set_readrq(tp->pdev, 4096);
+                       pcie_set_readrq(tp->pdev, tp->pcie_readrq);
                else {
                        pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
                                              tp->pci_cacheline_sz);
@@ -7179,7 +7179,7 @@ static int tg3_chip_reset(struct tg3 *tp)
                                      tp->pcie_cap + PCI_EXP_DEVCTL,
                                      val16);
 
-               pcie_set_readrq(tp->pdev, 4096);
+               pcie_set_readrq(tp->pdev, tp->pcie_readrq);
 
                /* Clear error status */
                pci_write_config_word(tp->pdev,
@@ -13366,7 +13366,45 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
 
                tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
 
-               pcie_set_readrq(tp->pdev, 4096);
+               tp->pcie_readrq = 4096;
+               if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
+                       u16 word;
+
+                       pci_read_config_word(tp->pdev,
+                                            tp->pcie_cap + PCI_EXP_LNKSTA,
+                                            &word);
+                       switch (word & PCI_EXP_LNKSTA_CLS) {
+                       case PCI_EXP_LNKSTA_CLS_2_5GB:
+                               word &= PCI_EXP_LNKSTA_NLW;
+                               word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
+                               switch (word) {
+                               case 2:
+                                       tp->pcie_readrq = 2048;
+                                       break;
+                               case 4:
+                                       tp->pcie_readrq = 1024;
+                                       break;
+                               }
+                               break;
+
+                       case PCI_EXP_LNKSTA_CLS_5_0GB:
+                               word &= PCI_EXP_LNKSTA_NLW;
+                               word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
+                               switch (word) {
+                               case 1:
+                                       tp->pcie_readrq = 2048;
+                                       break;
+                               case 2:
+                                       tp->pcie_readrq = 1024;
+                                       break;
+                               case 4:
+                                       tp->pcie_readrq = 512;
+                                       break;
+                               }
+                       }
+               }
+
+               pcie_set_readrq(tp->pdev, tp->pcie_readrq);
 
                pci_read_config_word(tp->pdev,
                                     tp->pcie_cap + PCI_EXP_LNKCTL,