drm/radeon/kms/igp: fix possible divide by 0 in bandwidth code (v2)

[net-next-2.6.git] / drivers / gpu / drm / radeon / rs690.c

diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 64b94a815a6dd736a6907615fc82185f25978d0d..f4f0a61bcdce3d188dd01a5737120c4e9a0d6432 100644 (file)
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -79,7 +79,13 @@ void rs690_pm_info(struct radeon_device *rdev)
                        tmp.full = dfixed_const(100);
                        rdev->pm.igp_sideport_mclk.full = dfixed_const(info->info.ulBootUpMemoryClock);
                        rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp);
-                       rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock));
+                       if (info->info.usK8MemoryClock)
+                               rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock));
+                       else if (rdev->clock.default_mclk) {
+                               rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk);
+                               rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp);
+                       } else
+                               rdev->pm.igp_system_mclk.full = dfixed_const(400);
                        rdev->pm.igp_ht_link_clk.full = dfixed_const(le16_to_cpu(info->info.usFSBClock));
                        rdev->pm.igp_ht_link_width.full = dfixed_const(info->info.ucHTLinkWidth);
                        break;
@@ -87,34 +93,31 @@ void rs690_pm_info(struct radeon_device *rdev)
                        tmp.full = dfixed_const(100);
                        rdev->pm.igp_sideport_mclk.full = dfixed_const(info->info_v2.ulBootUpSidePortClock);
                        rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp);
-                       rdev->pm.igp_system_mclk.full = dfixed_const(info->info_v2.ulBootUpUMAClock);
+                       if (info->info_v2.ulBootUpUMAClock)
+                               rdev->pm.igp_system_mclk.full = dfixed_const(info->info_v2.ulBootUpUMAClock);
+                       else if (rdev->clock.default_mclk)
+                               rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk);
+                       else
+                               rdev->pm.igp_system_mclk.full = dfixed_const(66700);
                        rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp);
                        rdev->pm.igp_ht_link_clk.full = dfixed_const(info->info_v2.ulHTLinkFreq);
                        rdev->pm.igp_ht_link_clk.full = dfixed_div(rdev->pm.igp_ht_link_clk, tmp);
                        rdev->pm.igp_ht_link_width.full = dfixed_const(le16_to_cpu(info->info_v2.usMinHTLinkWidth));
                        break;
                default:
-                       tmp.full = dfixed_const(100);
                        /* We assume the slower possible clock ie worst case */
-                       /* DDR 333Mhz */
-                       rdev->pm.igp_sideport_mclk.full = dfixed_const(333);
-                       /* FIXME: system clock ? */
-                       rdev->pm.igp_system_mclk.full = dfixed_const(100);
-                       rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp);
-                       rdev->pm.igp_ht_link_clk.full = dfixed_const(200);
+                       rdev->pm.igp_sideport_mclk.full = dfixed_const(200);
+                       rdev->pm.igp_system_mclk.full = dfixed_const(200);
+                       rdev->pm.igp_ht_link_clk.full = dfixed_const(1000);
                        rdev->pm.igp_ht_link_width.full = dfixed_const(8);
                        DRM_ERROR("No integrated system info for your GPU, using safe default\n");
                        break;
                }
        } else {
-               tmp.full = dfixed_const(100);
                /* We assume the slower possible clock ie worst case */
-               /* DDR 333Mhz */
-               rdev->pm.igp_sideport_mclk.full = dfixed_const(333);
-               /* FIXME: system clock ? */
-               rdev->pm.igp_system_mclk.full = dfixed_const(100);
-               rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp);
-               rdev->pm.igp_ht_link_clk.full = dfixed_const(200);
+               rdev->pm.igp_sideport_mclk.full = dfixed_const(200);
+               rdev->pm.igp_system_mclk.full = dfixed_const(200);
+               rdev->pm.igp_ht_link_clk.full = dfixed_const(1000);
                rdev->pm.igp_ht_link_width.full = dfixed_const(8);
                DRM_ERROR("No integrated system info for your GPU, using safe default\n");
        }