]> bbs.cooldavid.org Git - net-next-2.6.git/blame - sound/pci/ice1712/ice1724.c
[ALSA] Changed Jaroslav Kysela's e-mail from perex@suse.cz to perex@perex.cz
[net-next-2.6.git] / sound / pci / ice1712 / ice1724.c
CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
c1017a4c 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include <sound/driver.h>
26#include <asm/io.h>
27#include <linux/delay.h>
28#include <linux/interrupt.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/moduleparam.h>
62932df8 33#include <linux/mutex.h>
1da177e4
LT
34#include <sound/core.h>
35#include <sound/info.h>
36#include <sound/mpu401.h>
37#include <sound/initval.h>
38
39#include <sound/asoundef.h>
40
41#include "ice1712.h"
42#include "envy24ht.h"
43
44/* lowlevel routines */
45#include "amp.h"
46#include "revo.h"
47#include "aureon.h"
48#include "vt1720_mobo.h"
49#include "pontis.h"
50#include "prodigy192.h"
51#include "juli.h"
52#include "phase.h"
f6cdab5f 53#include "wtm.h"
1da177e4 54
c1017a4c 55MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT
56MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
57MODULE_LICENSE("GPL");
58MODULE_SUPPORTED_DEVICE("{"
59 REVO_DEVICE_DESC
60 AMP_AUDIO2000_DEVICE_DESC
61 AUREON_DEVICE_DESC
62 VT1720_MOBO_DEVICE_DESC
63 PONTIS_DEVICE_DESC
64 PRODIGY192_DEVICE_DESC
65 JULI_DEVICE_DESC
66 PHASE_DEVICE_DESC
f6cdab5f 67 WTM_DEVICE_DESC
1da177e4
LT
68 "{VIA,VT1720},"
69 "{VIA,VT1724},"
70 "{ICEnsemble,Generic ICE1724},"
71 "{ICEnsemble,Generic Envy24HT}"
72 "{ICEnsemble,Generic Envy24PT}}");
73
74static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
75static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
76static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
77static char *model[SNDRV_CARDS];
78
79module_param_array(index, int, NULL, 0444);
80MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
81module_param_array(id, charp, NULL, 0444);
82MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
83module_param_array(enable, bool, NULL, 0444);
84MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
85module_param_array(model, charp, NULL, 0444);
86MODULE_PARM_DESC(model, "Use the given board model.");
87
1da177e4
LT
88
89/* Both VT1720 and VT1724 have the same PCI IDs */
32b47da0 90static const struct pci_device_id snd_vt1724_ids[] = {
1da177e4
LT
91 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
92 { 0, }
93};
94
95MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
96
97
98static int PRO_RATE_LOCKED;
99static int PRO_RATE_RESET = 1;
100static unsigned int PRO_RATE_DEFAULT = 44100;
101
102/*
103 * Basic I/O
104 */
105
106/* check whether the clock mode is spdif-in */
ab0c7d72 107static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT
108{
109 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
110}
111
ab0c7d72 112static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT
113{
114 return is_spdif_master(ice) || PRO_RATE_LOCKED;
115}
116
117/*
118 * ac97 section
119 */
120
ab0c7d72 121static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
1da177e4
LT
122{
123 unsigned char old_cmd;
124 int tm;
125 for (tm = 0; tm < 0x10000; tm++) {
126 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
127 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
128 continue;
129 if (!(old_cmd & VT1724_AC97_READY))
130 continue;
131 return old_cmd;
132 }
133 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
134 return old_cmd;
135}
136
ab0c7d72 137static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
1da177e4
LT
138{
139 int tm;
140 for (tm = 0; tm < 0x10000; tm++)
141 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
142 return 0;
143 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
144 return -EIO;
145}
146
ab0c7d72 147static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT
148 unsigned short reg,
149 unsigned short val)
150{
ab0c7d72 151 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
152 unsigned char old_cmd;
153
154 old_cmd = snd_vt1724_ac97_ready(ice);
155 old_cmd &= ~VT1724_AC97_ID_MASK;
156 old_cmd |= ac97->num;
157 outb(reg, ICEMT1724(ice, AC97_INDEX));
158 outw(val, ICEMT1724(ice, AC97_DATA));
159 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
160 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
161}
162
ab0c7d72 163static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 164{
ab0c7d72 165 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
166 unsigned char old_cmd;
167
168 old_cmd = snd_vt1724_ac97_ready(ice);
169 old_cmd &= ~VT1724_AC97_ID_MASK;
170 old_cmd |= ac97->num;
171 outb(reg, ICEMT1724(ice, AC97_INDEX));
172 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
173 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
174 return ~0;
175 return inw(ICEMT1724(ice, AC97_DATA));
176}
177
178
179/*
180 * GPIO operations
181 */
182
183/* set gpio direction 0 = read, 1 = write */
ab0c7d72 184static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
185{
186 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
187 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
188}
189
190/* set the gpio mask (0 = writable) */
ab0c7d72 191static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
192{
193 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
194 if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
195 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
196 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
197}
198
ab0c7d72 199static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
200{
201 outw(data, ICEREG1724(ice, GPIO_DATA));
202 if (! ice->vt1720)
203 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
204 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
205}
206
ab0c7d72 207static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT
208{
209 unsigned int data;
210 if (! ice->vt1720)
211 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
212 else
213 data = 0;
214 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
215 return data;
216}
217
218/*
219 * Interrupt handler
220 */
221
7d12e780 222static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
1da177e4 223{
ab0c7d72 224 struct snd_ice1712 *ice = dev_id;
1da177e4
LT
225 unsigned char status;
226 int handled = 0;
227
228 while (1) {
229 status = inb(ICEREG1724(ice, IRQSTAT));
230 if (status == 0)
231 break;
232
233 handled = 1;
ab0c7d72
TI
234 /* these should probably be separated at some point,
235 * but as we don't currently have MPU support on the board
236 * I will leave it
237 */
1da177e4
LT
238 if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
239 if (ice->rmidi[0])
7d12e780 240 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
1da177e4
LT
241 outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
242 status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
243 }
244 if (status & VT1724_IRQ_MTPCM) {
245 /*
246 * Multi-track PCM
247 * PCM assignment are:
248 * Playback DMA0 (M/C) = playback_pro_substream
249 * Playback DMA1 = playback_con_substream_ds[0]
250 * Playback DMA2 = playback_con_substream_ds[1]
251 * Playback DMA3 = playback_con_substream_ds[2]
252 * Playback DMA4 (SPDIF) = playback_con_substream
253 * Record DMA0 = capture_pro_substream
254 * Record DMA1 = capture_con_substream
255 */
256 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
257 if (mtstat & VT1724_MULTI_PDMA0) {
258 if (ice->playback_pro_substream)
259 snd_pcm_period_elapsed(ice->playback_pro_substream);
260 }
261 if (mtstat & VT1724_MULTI_RDMA0) {
262 if (ice->capture_pro_substream)
263 snd_pcm_period_elapsed(ice->capture_pro_substream);
264 }
265 if (mtstat & VT1724_MULTI_PDMA1) {
266 if (ice->playback_con_substream_ds[0])
267 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
268 }
269 if (mtstat & VT1724_MULTI_PDMA2) {
270 if (ice->playback_con_substream_ds[1])
271 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
272 }
273 if (mtstat & VT1724_MULTI_PDMA3) {
274 if (ice->playback_con_substream_ds[2])
275 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
276 }
277 if (mtstat & VT1724_MULTI_PDMA4) {
278 if (ice->playback_con_substream)
279 snd_pcm_period_elapsed(ice->playback_con_substream);
280 }
281 if (mtstat & VT1724_MULTI_RDMA1) {
282 if (ice->capture_con_substream)
283 snd_pcm_period_elapsed(ice->capture_con_substream);
284 }
285 /* ack anyway to avoid freeze */
286 outb(mtstat, ICEMT1724(ice, IRQ));
287 /* ought to really handle this properly */
288 if (mtstat & VT1724_MULTI_FIFO_ERR) {
289 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
290 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
291 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
292 /* If I don't do this, I get machine lockup due to continual interrupts */
293 }
294
295 }
296 }
297 return IRQ_RETVAL(handled);
298}
299
300/*
301 * PCM code - professional part (multitrack)
302 */
303
304static unsigned int rates[] = {
305 8000, 9600, 11025, 12000, 16000, 22050, 24000,
306 32000, 44100, 48000, 64000, 88200, 96000,
307 176400, 192000,
308};
309
ab0c7d72 310static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
1da177e4
LT
311 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
312 .list = rates,
313 .mask = 0,
314};
315
ab0c7d72 316static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
1da177e4
LT
317 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
318 .list = rates,
319 .mask = 0,
320};
321
ab0c7d72 322static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
1da177e4
LT
323 .count = ARRAY_SIZE(rates),
324 .list = rates,
325 .mask = 0,
326};
327
328struct vt1724_pcm_reg {
329 unsigned int addr; /* ADDR register offset */
330 unsigned int size; /* SIZE register offset */
331 unsigned int count; /* COUNT register offset */
332 unsigned int start; /* start & pause bit */
333};
334
ab0c7d72 335static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 336{
ab0c7d72 337 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
338 unsigned char what;
339 unsigned char old;
ab0c7d72 340 struct snd_pcm_substream *s;
1da177e4
LT
341
342 what = 0;
ef991b95 343 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL
344 if (snd_pcm_substream_chip(s) == ice) {
345 const struct vt1724_pcm_reg *reg;
346 reg = s->runtime->private_data;
347 what |= reg->start;
348 snd_pcm_trigger_done(s, substream);
349 }
1da177e4
LT
350 }
351
352 switch (cmd) {
353 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
354 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
355 spin_lock(&ice->reg_lock);
356 old = inb(ICEMT1724(ice, DMA_PAUSE));
357 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
358 old |= what;
359 else
360 old &= ~what;
361 outb(old, ICEMT1724(ice, DMA_PAUSE));
362 spin_unlock(&ice->reg_lock);
363 break;
364
365 case SNDRV_PCM_TRIGGER_START:
366 case SNDRV_PCM_TRIGGER_STOP:
367 spin_lock(&ice->reg_lock);
368 old = inb(ICEMT1724(ice, DMA_CONTROL));
369 if (cmd == SNDRV_PCM_TRIGGER_START)
370 old |= what;
371 else
372 old &= ~what;
373 outb(old, ICEMT1724(ice, DMA_CONTROL));
374 spin_unlock(&ice->reg_lock);
375 break;
376
377 default:
378 return -EINVAL;
379 }
380 return 0;
381}
382
383/*
384 */
385
386#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
387 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
388#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
389 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
390
ab0c7d72 391static int get_max_rate(struct snd_ice1712 *ice)
1da177e4
LT
392{
393 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
394 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
395 return 192000;
396 else
397 return 96000;
398 } else
399 return 48000;
400}
401
ab0c7d72
TI
402static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
403 int force)
1da177e4
LT
404{
405 unsigned long flags;
406 unsigned char val, old;
407 unsigned int i, mclk_change;
408
409 if (rate > get_max_rate(ice))
410 return;
411
412 switch (rate) {
413 case 8000: val = 6; break;
414 case 9600: val = 3; break;
415 case 11025: val = 10; break;
416 case 12000: val = 2; break;
417 case 16000: val = 5; break;
418 case 22050: val = 9; break;
419 case 24000: val = 1; break;
420 case 32000: val = 4; break;
421 case 44100: val = 8; break;
422 case 48000: val = 0; break;
423 case 64000: val = 15; break;
424 case 88200: val = 11; break;
425 case 96000: val = 7; break;
426 case 176400: val = 12; break;
427 case 192000: val = 14; break;
428 default:
429 snd_BUG();
430 val = 0;
431 break;
432 }
433
434 spin_lock_irqsave(&ice->reg_lock, flags);
435 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
436 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
437 /* running? we cannot change the rate now... */
438 spin_unlock_irqrestore(&ice->reg_lock, flags);
439 return;
440 }
441 if (!force && is_pro_rate_locked(ice)) {
442 spin_unlock_irqrestore(&ice->reg_lock, flags);
443 return;
444 }
445
446 old = inb(ICEMT1724(ice, RATE));
447 if (force || old != val)
448 outb(val, ICEMT1724(ice, RATE));
449 else if (rate == ice->cur_rate) {
450 spin_unlock_irqrestore(&ice->reg_lock, flags);
451 return;
452 }
453
454 ice->cur_rate = rate;
455
456 /* check MT02 */
457 mclk_change = 0;
458 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
459 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
460 if (rate > 96000)
461 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
462 else
463 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
464 if (val != old) {
465 outb(val, ICEMT1724(ice, I2S_FORMAT));
466 mclk_change = 1;
467 }
468 }
469 spin_unlock_irqrestore(&ice->reg_lock, flags);
470
471 if (mclk_change && ice->gpio.i2s_mclk_changed)
472 ice->gpio.i2s_mclk_changed(ice);
473 if (ice->gpio.set_pro_rate)
474 ice->gpio.set_pro_rate(ice, rate);
475
476 /* set up codecs */
477 for (i = 0; i < ice->akm_codecs; i++) {
478 if (ice->akm[i].ops.set_rate_val)
479 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
480 }
481 if (ice->spdif.ops.setup_rate)
482 ice->spdif.ops.setup_rate(ice, rate);
483}
484
ab0c7d72
TI
485static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
486 struct snd_pcm_hw_params *hw_params)
1da177e4 487{
ab0c7d72 488 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
489 int i, chs;
490
491 chs = params_channels(hw_params);
62932df8 492 mutex_lock(&ice->open_mutex);
1da177e4
LT
493 /* mark surround channels */
494 if (substream == ice->playback_pro_substream) {
495 /* PDMA0 can be multi-channel up to 8 */
496 chs = chs / 2 - 1;
497 for (i = 0; i < chs; i++) {
ab0c7d72
TI
498 if (ice->pcm_reserved[i] &&
499 ice->pcm_reserved[i] != substream) {
62932df8 500 mutex_unlock(&ice->open_mutex);
1da177e4
LT
501 return -EBUSY;
502 }
503 ice->pcm_reserved[i] = substream;
504 }
505 for (; i < 3; i++) {
506 if (ice->pcm_reserved[i] == substream)
507 ice->pcm_reserved[i] = NULL;
508 }
509 } else {
510 for (i = 0; i < 3; i++) {
511 /* check individual playback stream */
512 if (ice->playback_con_substream_ds[i] == substream) {
ab0c7d72
TI
513 if (ice->pcm_reserved[i] &&
514 ice->pcm_reserved[i] != substream) {
62932df8 515 mutex_unlock(&ice->open_mutex);
1da177e4
LT
516 return -EBUSY;
517 }
518 ice->pcm_reserved[i] = substream;
519 break;
520 }
521 }
522 }
62932df8 523 mutex_unlock(&ice->open_mutex);
1da177e4
LT
524 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
525 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
526}
527
ab0c7d72 528static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 529{
ab0c7d72 530 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
531 int i;
532
62932df8 533 mutex_lock(&ice->open_mutex);
1da177e4
LT
534 /* unmark surround channels */
535 for (i = 0; i < 3; i++)
536 if (ice->pcm_reserved[i] == substream)
537 ice->pcm_reserved[i] = NULL;
62932df8 538 mutex_unlock(&ice->open_mutex);
1da177e4
LT
539 return snd_pcm_lib_free_pages(substream);
540}
541
ab0c7d72 542static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 543{
ab0c7d72 544 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
545 unsigned char val;
546 unsigned int size;
547
548 spin_lock_irq(&ice->reg_lock);
549 val = (8 - substream->runtime->channels) >> 1;
550 outb(val, ICEMT1724(ice, BURST));
551
552 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
553
554 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
555 // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
556 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
557 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
558 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
559 // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
560 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
561 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
562
563 spin_unlock_irq(&ice->reg_lock);
564
565 // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
566 return 0;
567}
568
ab0c7d72 569static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 570{
ab0c7d72 571 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
572 size_t ptr;
573
574 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
575 return 0;
576#if 0 /* read PLAYBACK_ADDR */
577 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
578 if (ptr < substream->runtime->dma_addr) {
579 snd_printd("ice1724: invalid negative ptr\n");
580 return 0;
581 }
582 ptr -= substream->runtime->dma_addr;
583 ptr = bytes_to_frames(substream->runtime, ptr);
584 if (ptr >= substream->runtime->buffer_size) {
ab0c7d72
TI
585 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
586 (int)ptr, (int)substream->runtime->period_size);
1da177e4
LT
587 return 0;
588 }
589#else /* read PLAYBACK_SIZE */
590 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
591 ptr = (ptr + 1) << 2;
592 ptr = bytes_to_frames(substream->runtime, ptr);
593 if (! ptr)
594 ;
595 else if (ptr <= substream->runtime->buffer_size)
596 ptr = substream->runtime->buffer_size - ptr;
597 else {
ab0c7d72
TI
598 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
599 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT
600 ptr = 0;
601 }
602#endif
603 return ptr;
604}
605
ab0c7d72 606static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 607{
ab0c7d72 608 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 609 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT
610
611 spin_lock_irq(&ice->reg_lock);
612 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
ab0c7d72
TI
613 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
614 ice->profi_port + reg->size);
615 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
616 ice->profi_port + reg->count);
1da177e4
LT
617 spin_unlock_irq(&ice->reg_lock);
618 return 0;
619}
620
ab0c7d72 621static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 622{
ab0c7d72 623 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 624 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT
625 size_t ptr;
626
627 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
628 return 0;
629#if 0 /* use ADDR register */
630 ptr = inl(ice->profi_port + reg->addr);
631 ptr -= substream->runtime->dma_addr;
632 return bytes_to_frames(substream->runtime, ptr);
633#else /* use SIZE register */
634 ptr = inw(ice->profi_port + reg->size);
635 ptr = (ptr + 1) << 2;
636 ptr = bytes_to_frames(substream->runtime, ptr);
637 if (! ptr)
638 ;
639 else if (ptr <= substream->runtime->buffer_size)
640 ptr = substream->runtime->buffer_size - ptr;
641 else {
ab0c7d72
TI
642 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
643 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT
644 ptr = 0;
645 }
646 return ptr;
647#endif
648}
649
32b47da0 650static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
1da177e4
LT
651 .addr = VT1724_MT_PLAYBACK_ADDR,
652 .size = VT1724_MT_PLAYBACK_SIZE,
653 .count = VT1724_MT_PLAYBACK_COUNT,
654 .start = VT1724_PDMA0_START,
655};
656
32b47da0 657static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
1da177e4
LT
658 .addr = VT1724_MT_CAPTURE_ADDR,
659 .size = VT1724_MT_CAPTURE_SIZE,
660 .count = VT1724_MT_CAPTURE_COUNT,
661 .start = VT1724_RDMA0_START,
662};
663
32b47da0 664static const struct snd_pcm_hardware snd_vt1724_playback_pro =
1da177e4
LT
665{
666 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
667 SNDRV_PCM_INFO_BLOCK_TRANSFER |
668 SNDRV_PCM_INFO_MMAP_VALID |
669 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
670 .formats = SNDRV_PCM_FMTBIT_S32_LE,
671 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
672 .rate_min = 8000,
673 .rate_max = 192000,
674 .channels_min = 2,
675 .channels_max = 8,
676 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
677 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
678 .period_bytes_max = (1UL << 21),
679 .periods_min = 2,
680 .periods_max = 1024,
681};
682
32b47da0 683static const struct snd_pcm_hardware snd_vt1724_spdif =
1da177e4
LT
684{
685 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
686 SNDRV_PCM_INFO_BLOCK_TRANSFER |
687 SNDRV_PCM_INFO_MMAP_VALID |
688 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
689 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2dfbeca9
TI
690 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
691 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
692 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
693 SNDRV_PCM_RATE_192000),
1da177e4 694 .rate_min = 32000,
2dfbeca9 695 .rate_max = 192000,
1da177e4
LT
696 .channels_min = 2,
697 .channels_max = 2,
698 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
699 .period_bytes_min = 2 * 4 * 2,
700 .period_bytes_max = (1UL << 18),
701 .periods_min = 2,
702 .periods_max = 1024,
703};
704
32b47da0 705static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
1da177e4
LT
706{
707 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
708 SNDRV_PCM_INFO_BLOCK_TRANSFER |
709 SNDRV_PCM_INFO_MMAP_VALID |
710 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
711 .formats = SNDRV_PCM_FMTBIT_S32_LE,
712 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
713 .rate_min = 8000,
714 .rate_max = 192000,
715 .channels_min = 2,
716 .channels_max = 2,
717 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
718 .period_bytes_min = 2 * 4 * 2,
719 .period_bytes_max = (1UL << 18),
720 .periods_min = 2,
721 .periods_max = 1024,
722};
723
724/*
725 * set rate constraints
726 */
ab0c7d72
TI
727static int set_rate_constraints(struct snd_ice1712 *ice,
728 struct snd_pcm_substream *substream)
1da177e4 729{
ab0c7d72 730 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
731 if (ice->hw_rates) {
732 /* hardware specific */
733 runtime->hw.rate_min = ice->hw_rates->list[0];
734 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
735 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
ab0c7d72
TI
736 return snd_pcm_hw_constraint_list(runtime, 0,
737 SNDRV_PCM_HW_PARAM_RATE,
738 ice->hw_rates);
1da177e4
LT
739 }
740 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
741 /* I2S */
742 /* VT1720 doesn't support more than 96kHz */
743 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
ab0c7d72
TI
744 return snd_pcm_hw_constraint_list(runtime, 0,
745 SNDRV_PCM_HW_PARAM_RATE,
746 &hw_constraints_rates_192);
1da177e4 747 else {
ab0c7d72
TI
748 runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
749 SNDRV_PCM_RATE_8000_96000;
1da177e4 750 runtime->hw.rate_max = 96000;
ab0c7d72
TI
751 return snd_pcm_hw_constraint_list(runtime, 0,
752 SNDRV_PCM_HW_PARAM_RATE,
753 &hw_constraints_rates_96);
1da177e4
LT
754 }
755 } else if (ice->ac97) {
756 /* ACLINK */
757 runtime->hw.rate_max = 48000;
758 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
ab0c7d72
TI
759 return snd_pcm_hw_constraint_list(runtime, 0,
760 SNDRV_PCM_HW_PARAM_RATE,
761 &hw_constraints_rates_48);
1da177e4
LT
762 }
763 return 0;
764}
765
766/* multi-channel playback needs alignment 8x32bit regardless of the channels
767 * actually used
768 */
769#define VT1724_BUFFER_ALIGN 0x20
770
ab0c7d72 771static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 772{
ab0c7d72
TI
773 struct snd_pcm_runtime *runtime = substream->runtime;
774 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
775 int chs;
776
32b47da0 777 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1da177e4
LT
778 ice->playback_pro_substream = substream;
779 runtime->hw = snd_vt1724_playback_pro;
780 snd_pcm_set_sync(substream);
781 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
782 set_rate_constraints(ice, substream);
62932df8 783 mutex_lock(&ice->open_mutex);
1da177e4
LT
784 /* calculate the currently available channels */
785 for (chs = 0; chs < 3; chs++) {
786 if (ice->pcm_reserved[chs])
787 break;
788 }
789 chs = (chs + 1) * 2;
790 runtime->hw.channels_max = chs;
791 if (chs > 2) /* channels must be even */
792 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
62932df8 793 mutex_unlock(&ice->open_mutex);
1da177e4
LT
794 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
795 VT1724_BUFFER_ALIGN);
796 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
797 VT1724_BUFFER_ALIGN);
798 return 0;
799}
800
ab0c7d72 801static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 802{
ab0c7d72
TI
803 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
804 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 805
32b47da0 806 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1da177e4
LT
807 ice->capture_pro_substream = substream;
808 runtime->hw = snd_vt1724_2ch_stereo;
809 snd_pcm_set_sync(substream);
810 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
811 set_rate_constraints(ice, substream);
812 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
813 VT1724_BUFFER_ALIGN);
814 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
815 VT1724_BUFFER_ALIGN);
816 return 0;
817}
818
ab0c7d72 819static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 820{
ab0c7d72 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
822
823 if (PRO_RATE_RESET)
824 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
825 ice->playback_pro_substream = NULL;
826
827 return 0;
828}
829
ab0c7d72 830static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 831{
ab0c7d72 832 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
833
834 if (PRO_RATE_RESET)
835 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
836 ice->capture_pro_substream = NULL;
837 return 0;
838}
839
ab0c7d72 840static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1da177e4
LT
841 .open = snd_vt1724_playback_pro_open,
842 .close = snd_vt1724_playback_pro_close,
843 .ioctl = snd_pcm_lib_ioctl,
844 .hw_params = snd_vt1724_pcm_hw_params,
845 .hw_free = snd_vt1724_pcm_hw_free,
846 .prepare = snd_vt1724_playback_pro_prepare,
847 .trigger = snd_vt1724_pcm_trigger,
848 .pointer = snd_vt1724_playback_pro_pointer,
849};
850
ab0c7d72 851static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1da177e4
LT
852 .open = snd_vt1724_capture_pro_open,
853 .close = snd_vt1724_capture_pro_close,
854 .ioctl = snd_pcm_lib_ioctl,
855 .hw_params = snd_vt1724_pcm_hw_params,
856 .hw_free = snd_vt1724_pcm_hw_free,
857 .prepare = snd_vt1724_pcm_prepare,
858 .trigger = snd_vt1724_pcm_trigger,
859 .pointer = snd_vt1724_pcm_pointer,
860};
861
ab0c7d72 862static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
1da177e4 863{
ab0c7d72 864 struct snd_pcm *pcm;
1da177e4
LT
865 int err;
866
867 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
868 if (err < 0)
869 return err;
870
871 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
872 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
873
874 pcm->private_data = ice;
875 pcm->info_flags = 0;
876 strcpy(pcm->name, "ICE1724");
877
878 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI
879 snd_dma_pci_data(ice->pci),
880 256*1024, 256*1024);
1da177e4
LT
881
882 ice->pcm_pro = pcm;
883
884 return 0;
885}
886
887
888/*
889 * SPDIF PCM
890 */
891
32b47da0 892static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
1da177e4
LT
893 .addr = VT1724_MT_PDMA4_ADDR,
894 .size = VT1724_MT_PDMA4_SIZE,
895 .count = VT1724_MT_PDMA4_COUNT,
896 .start = VT1724_PDMA4_START,
897};
898
32b47da0 899static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
1da177e4
LT
900 .addr = VT1724_MT_RDMA1_ADDR,
901 .size = VT1724_MT_RDMA1_SIZE,
902 .count = VT1724_MT_RDMA1_COUNT,
903 .start = VT1724_RDMA1_START,
904};
905
906/* update spdif control bits; call with reg_lock */
ab0c7d72 907static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT
908{
909 unsigned char cbit, disabled;
910
911 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
912 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
913 if (cbit != disabled)
914 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
915 outw(val, ICEMT1724(ice, SPDIF_CTRL));
916 if (cbit != disabled)
917 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
918 outw(val, ICEMT1724(ice, SPDIF_CTRL));
919}
920
921/* update SPDIF control bits according to the given rate */
ab0c7d72 922static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1da177e4
LT
923{
924 unsigned int val, nval;
925 unsigned long flags;
926
927 spin_lock_irqsave(&ice->reg_lock, flags);
928 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
929 nval &= ~(7 << 12);
930 switch (rate) {
931 case 44100: break;
932 case 48000: nval |= 2 << 12; break;
933 case 32000: nval |= 3 << 12; break;
2dfbeca9
TI
934 case 88200: nval |= 4 << 12; break;
935 case 96000: nval |= 5 << 12; break;
936 case 192000: nval |= 6 << 12; break;
937 case 176400: nval |= 7 << 12; break;
1da177e4
LT
938 }
939 if (val != nval)
940 update_spdif_bits(ice, nval);
941 spin_unlock_irqrestore(&ice->reg_lock, flags);
942}
943
ab0c7d72 944static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 945{
ab0c7d72 946 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
947 if (! ice->force_pdma4)
948 update_spdif_rate(ice, substream->runtime->rate);
949 return snd_vt1724_pcm_prepare(substream);
950}
951
ab0c7d72 952static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 953{
ab0c7d72
TI
954 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
955 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 956
32b47da0 957 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1da177e4
LT
958 ice->playback_con_substream = substream;
959 if (ice->force_pdma4) {
960 runtime->hw = snd_vt1724_2ch_stereo;
961 set_rate_constraints(ice, substream);
962 } else
963 runtime->hw = snd_vt1724_spdif;
964 snd_pcm_set_sync(substream);
965 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
966 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
967 VT1724_BUFFER_ALIGN);
968 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
969 VT1724_BUFFER_ALIGN);
970 return 0;
971}
972
ab0c7d72 973static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 974{
ab0c7d72 975 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
976
977 if (PRO_RATE_RESET)
978 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
979 ice->playback_con_substream = NULL;
980
981 return 0;
982}
983
ab0c7d72 984static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1da177e4 985{
ab0c7d72
TI
986 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
987 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 988
32b47da0 989 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1da177e4
LT
990 ice->capture_con_substream = substream;
991 if (ice->force_rdma1) {
992 runtime->hw = snd_vt1724_2ch_stereo;
993 set_rate_constraints(ice, substream);
994 } else
995 runtime->hw = snd_vt1724_spdif;
996 snd_pcm_set_sync(substream);
997 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
998 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
999 VT1724_BUFFER_ALIGN);
1000 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1001 VT1724_BUFFER_ALIGN);
1002 return 0;
1003}
1004
ab0c7d72 1005static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1006{
ab0c7d72 1007 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1008
1009 if (PRO_RATE_RESET)
1010 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1011 ice->capture_con_substream = NULL;
1012
1013 return 0;
1014}
1015
ab0c7d72 1016static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1da177e4
LT
1017 .open = snd_vt1724_playback_spdif_open,
1018 .close = snd_vt1724_playback_spdif_close,
1019 .ioctl = snd_pcm_lib_ioctl,
1020 .hw_params = snd_vt1724_pcm_hw_params,
1021 .hw_free = snd_vt1724_pcm_hw_free,
1022 .prepare = snd_vt1724_playback_spdif_prepare,
1023 .trigger = snd_vt1724_pcm_trigger,
1024 .pointer = snd_vt1724_pcm_pointer,
1025};
1026
ab0c7d72 1027static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1da177e4
LT
1028 .open = snd_vt1724_capture_spdif_open,
1029 .close = snd_vt1724_capture_spdif_close,
1030 .ioctl = snd_pcm_lib_ioctl,
1031 .hw_params = snd_vt1724_pcm_hw_params,
1032 .hw_free = snd_vt1724_pcm_hw_free,
1033 .prepare = snd_vt1724_pcm_prepare,
1034 .trigger = snd_vt1724_pcm_trigger,
1035 .pointer = snd_vt1724_pcm_pointer,
1036};
1037
1038
ab0c7d72 1039static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
1da177e4
LT
1040{
1041 char *name;
ab0c7d72 1042 struct snd_pcm *pcm;
1da177e4
LT
1043 int play, capt;
1044 int err;
1045
1046 if (ice->force_pdma4 ||
1047 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1048 play = 1;
1049 ice->has_spdif = 1;
1050 } else
1051 play = 0;
1052 if (ice->force_rdma1 ||
1053 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1054 capt = 1;
1055 ice->has_spdif = 1;
1056 } else
1057 capt = 0;
1058 if (! play && ! capt)
1059 return 0; /* no spdif device */
1060
1061 if (ice->force_pdma4 || ice->force_rdma1)
1062 name = "ICE1724 Secondary";
1063 else
1064 name = "IEC1724 IEC958";
1065 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1066 if (err < 0)
1067 return err;
1068
1069 if (play)
1070 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1071 &snd_vt1724_playback_spdif_ops);
1072 if (capt)
1073 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1074 &snd_vt1724_capture_spdif_ops);
1075
1076 pcm->private_data = ice;
1077 pcm->info_flags = 0;
1078 strcpy(pcm->name, name);
1079
1080 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI
1081 snd_dma_pci_data(ice->pci),
1082 64*1024, 64*1024);
1da177e4
LT
1083
1084 ice->pcm = pcm;
1085
1086 return 0;
1087}
1088
1089
1090/*
1091 * independent surround PCMs
1092 */
1093
32b47da0 1094static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1da177e4
LT
1095 {
1096 .addr = VT1724_MT_PDMA1_ADDR,
1097 .size = VT1724_MT_PDMA1_SIZE,
1098 .count = VT1724_MT_PDMA1_COUNT,
1099 .start = VT1724_PDMA1_START,
1100 },
1101 {
1102 .addr = VT1724_MT_PDMA2_ADDR,
1103 .size = VT1724_MT_PDMA2_SIZE,
1104 .count = VT1724_MT_PDMA2_COUNT,
1105 .start = VT1724_PDMA2_START,
1106 },
1107 {
1108 .addr = VT1724_MT_PDMA3_ADDR,
1109 .size = VT1724_MT_PDMA3_SIZE,
1110 .count = VT1724_MT_PDMA3_COUNT,
1111 .start = VT1724_PDMA3_START,
1112 },
1113};
1114
ab0c7d72 1115static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1da177e4 1116{
ab0c7d72 1117 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1118 unsigned char val;
1119
1120 spin_lock_irq(&ice->reg_lock);
1121 val = 3 - substream->number;
1122 if (inb(ICEMT1724(ice, BURST)) < val)
1123 outb(val, ICEMT1724(ice, BURST));
1124 spin_unlock_irq(&ice->reg_lock);
1125 return snd_vt1724_pcm_prepare(substream);
1126}
1127
ab0c7d72 1128static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1da177e4 1129{
ab0c7d72
TI
1130 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1131 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1132
62932df8 1133 mutex_lock(&ice->open_mutex);
1da177e4
LT
1134 /* already used by PDMA0? */
1135 if (ice->pcm_reserved[substream->number]) {
62932df8 1136 mutex_unlock(&ice->open_mutex);
1da177e4
LT
1137 return -EBUSY; /* FIXME: should handle blocking mode properly */
1138 }
62932df8 1139 mutex_unlock(&ice->open_mutex);
32b47da0 1140 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1da177e4
LT
1141 ice->playback_con_substream_ds[substream->number] = substream;
1142 runtime->hw = snd_vt1724_2ch_stereo;
1143 snd_pcm_set_sync(substream);
1144 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1145 set_rate_constraints(ice, substream);
1146 return 0;
1147}
1148
ab0c7d72 1149static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1da177e4 1150{
ab0c7d72 1151 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1152
1153 if (PRO_RATE_RESET)
1154 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1155 ice->playback_con_substream_ds[substream->number] = NULL;
1156 ice->pcm_reserved[substream->number] = NULL;
1157
1158 return 0;
1159}
1160
ab0c7d72 1161static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1da177e4
LT
1162 .open = snd_vt1724_playback_indep_open,
1163 .close = snd_vt1724_playback_indep_close,
1164 .ioctl = snd_pcm_lib_ioctl,
1165 .hw_params = snd_vt1724_pcm_hw_params,
1166 .hw_free = snd_vt1724_pcm_hw_free,
1167 .prepare = snd_vt1724_playback_indep_prepare,
1168 .trigger = snd_vt1724_pcm_trigger,
1169 .pointer = snd_vt1724_pcm_pointer,
1170};
1171
1172
ab0c7d72 1173static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
1da177e4 1174{
ab0c7d72 1175 struct snd_pcm *pcm;
1da177e4
LT
1176 int play;
1177 int err;
1178
1179 play = ice->num_total_dacs / 2 - 1;
1180 if (play <= 0)
1181 return 0;
1182
1183 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1184 if (err < 0)
1185 return err;
1186
1187 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1188 &snd_vt1724_playback_indep_ops);
1189
1190 pcm->private_data = ice;
1191 pcm->info_flags = 0;
1192 strcpy(pcm->name, "ICE1724 Surround PCM");
1193
1194 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI
1195 snd_dma_pci_data(ice->pci),
1196 64*1024, 64*1024);
1da177e4
LT
1197
1198 ice->pcm_ds = pcm;
1199
1200 return 0;
1201}
1202
1203
1204/*
1205 * Mixer section
1206 */
1207
ab0c7d72 1208static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT
1209{
1210 int err;
1211
1212 if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
ab0c7d72
TI
1213 struct snd_ac97_bus *pbus;
1214 struct snd_ac97_template ac97;
1215 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1216 .write = snd_vt1724_ac97_write,
1217 .read = snd_vt1724_ac97_read,
1218 };
1219
1220 /* cold reset */
1221 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1222 mdelay(5); /* FIXME */
1223 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1224
1225 if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
1226 return err;
1227 memset(&ac97, 0, sizeof(ac97));
1228 ac97.private_data = ice;
1229 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1230 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1231 else
1232 return 0;
1233 }
1234 /* I2S mixer only */
1235 strcat(ice->card->mixername, "ICE1724 - multitrack");
1236 return 0;
1237}
1238
1239/*
1240 *
1241 */
1242
ab0c7d72 1243static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1da177e4
LT
1244{
1245 return (unsigned int)ice->eeprom.data[idx] | \
1246 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1247 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1248}
1249
ab0c7d72
TI
1250static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1251 struct snd_info_buffer *buffer)
1da177e4 1252{
ab0c7d72 1253 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT
1254 unsigned int idx;
1255
1256 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1257 snd_iprintf(buffer, "EEPROM:\n");
1258
1259 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1260 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1261 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
ab0c7d72
TI
1262 snd_iprintf(buffer, " System Config : 0x%x\n",
1263 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1264 snd_iprintf(buffer, " ACLink : 0x%x\n",
1265 ice->eeprom.data[ICE_EEP2_ACLINK]);
1266 snd_iprintf(buffer, " I2S : 0x%x\n",
1267 ice->eeprom.data[ICE_EEP2_I2S]);
1268 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1269 ice->eeprom.data[ICE_EEP2_SPDIF]);
1270 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1271 ice->eeprom.gpiodir);
1272 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1273 ice->eeprom.gpiomask);
1274 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1275 ice->eeprom.gpiostate);
1da177e4 1276 for (idx = 0x12; idx < ice->eeprom.size; idx++)
ab0c7d72
TI
1277 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1278 idx, ice->eeprom.data[idx]);
1da177e4
LT
1279
1280 snd_iprintf(buffer, "\nRegisters:\n");
1281
ab0c7d72
TI
1282 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1283 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1da177e4 1284 for (idx = 0x0; idx < 0x20 ; idx++)
ab0c7d72
TI
1285 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1286 idx, inb(ice->port+idx));
1da177e4 1287 for (idx = 0x0; idx < 0x30 ; idx++)
ab0c7d72
TI
1288 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1289 idx, inb(ice->profi_port+idx));
1da177e4
LT
1290}
1291
ab0c7d72 1292static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
1da177e4 1293{
ab0c7d72 1294 struct snd_info_entry *entry;
1da177e4
LT
1295
1296 if (! snd_card_proc_new(ice->card, "ice1724", &entry))
bf850204 1297 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1da177e4
LT
1298}
1299
1300/*
1301 *
1302 */
1303
ab0c7d72
TI
1304static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1305 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1306{
1307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
ab0c7d72 1308 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT
1309 return 0;
1310}
1311
ab0c7d72
TI
1312static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1313 struct snd_ctl_elem_value *ucontrol)
1da177e4 1314{
ab0c7d72 1315 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1316
1317 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1318 return 0;
1319}
1320
1b60f6b0 1321static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1da177e4
LT
1322 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1323 .name = "ICE1724 EEPROM",
1324 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1325 .info = snd_vt1724_eeprom_info,
1326 .get = snd_vt1724_eeprom_get
1327};
1328
1329/*
1330 */
ab0c7d72
TI
1331static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1332 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1333{
1334 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1335 uinfo->count = 1;
1336 return 0;
1337}
1338
ab0c7d72 1339static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1da177e4 1340{
2dfbeca9 1341 unsigned int val, rbits;
1da177e4
LT
1342
1343 val = diga->status[0] & 0x03; /* professional, non-audio */
1344 if (val & 0x01) {
1345 /* professional */
ab0c7d72
TI
1346 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1347 IEC958_AES0_PRO_EMPHASIS_5015)
1da177e4 1348 val |= 1U << 3;
2dfbeca9
TI
1349 rbits = (diga->status[4] >> 3) & 0x0f;
1350 if (rbits) {
1351 switch (rbits) {
1352 case 2: val |= 5 << 12; break; /* 96k */
1353 case 3: val |= 6 << 12; break; /* 192k */
1354 case 10: val |= 4 << 12; break; /* 88.2k */
1355 case 11: val |= 7 << 12; break; /* 176.4k */
1356 }
1357 } else {
1358 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1359 case IEC958_AES0_PRO_FS_44100:
1360 break;
1361 case IEC958_AES0_PRO_FS_32000:
1362 val |= 3U << 12;
1363 break;
1364 default:
1365 val |= 2U << 12;
1366 break;
1367 }
1da177e4
LT
1368 }
1369 } else {
1370 /* consumer */
1371 val |= diga->status[1] & 0x04; /* copyright */
ab0c7d72
TI
1372 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1373 IEC958_AES0_CON_EMPHASIS_5015)
1da177e4
LT
1374 val |= 1U << 3;
1375 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1376 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1377 }
1378 return val;
1379}
1380
ab0c7d72 1381static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1da177e4
LT
1382{
1383 memset(diga->status, 0, sizeof(diga->status));
1384 diga->status[0] = val & 0x03; /* professional, non-audio */
1385 if (val & 0x01) {
1386 /* professional */
1387 if (val & (1U << 3))
1388 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1389 switch ((val >> 12) & 0x7) {
1390 case 0:
1391 break;
1392 case 2:
1393 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1394 break;
1395 default:
1396 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1397 break;
1398 }
1399 } else {
1400 /* consumer */
1401 diga->status[0] |= val & (1U << 2); /* copyright */
1402 if (val & (1U << 3))
1403 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1404 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1405 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1406 }
1407}
1408
ab0c7d72
TI
1409static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1410 struct snd_ctl_elem_value *ucontrol)
1da177e4 1411{
ab0c7d72 1412 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1413 unsigned int val;
1414 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1415 decode_spdif_bits(&ucontrol->value.iec958, val);
1416 return 0;
1417}
1418
ab0c7d72
TI
1419static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1420 struct snd_ctl_elem_value *ucontrol)
1da177e4 1421{
ab0c7d72 1422 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1423 unsigned int val, old;
1424
1425 val = encode_spdif_bits(&ucontrol->value.iec958);
1426 spin_lock_irq(&ice->reg_lock);
1427 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1428 if (val != old)
1429 update_spdif_bits(ice, val);
1430 spin_unlock_irq(&ice->reg_lock);
1431 return (val != old);
1432}
1433
1b60f6b0 1434static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1da177e4
LT
1435{
1436 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1437 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1438 .info = snd_vt1724_spdif_info,
1439 .get = snd_vt1724_spdif_default_get,
1440 .put = snd_vt1724_spdif_default_put
1441};
1442
ab0c7d72
TI
1443static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1444 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1445{
1446 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1447 IEC958_AES0_PROFESSIONAL |
1448 IEC958_AES0_CON_NOT_COPYRIGHT |
1449 IEC958_AES0_CON_EMPHASIS;
1450 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1451 IEC958_AES1_CON_CATEGORY;
1452 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1453 return 0;
1454}
1455
ab0c7d72
TI
1456static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1457 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1458{
1459 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1460 IEC958_AES0_PROFESSIONAL |
1461 IEC958_AES0_PRO_FS |
1462 IEC958_AES0_PRO_EMPHASIS;
1463 return 0;
1464}
1465
1b60f6b0 1466static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1da177e4
LT
1467{
1468 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1469 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1470 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1471 .info = snd_vt1724_spdif_info,
1472 .get = snd_vt1724_spdif_maskc_get,
1473};
1474
1b60f6b0 1475static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1da177e4
LT
1476{
1477 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1478 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1479 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1480 .info = snd_vt1724_spdif_info,
1481 .get = snd_vt1724_spdif_maskp_get,
1482};
1483
a5ce8890 1484#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1da177e4 1485
ab0c7d72
TI
1486static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1487 struct snd_ctl_elem_value *ucontrol)
1da177e4 1488{
ab0c7d72
TI
1489 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1490 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1491 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1da177e4
LT
1492 return 0;
1493}
1494
ab0c7d72
TI
1495static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1496 struct snd_ctl_elem_value *ucontrol)
1da177e4 1497{
ab0c7d72 1498 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1499 unsigned char old, val;
1500
1501 spin_lock_irq(&ice->reg_lock);
1502 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1503 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1504 if (ucontrol->value.integer.value[0])
1505 val |= VT1724_CFG_SPDIF_OUT_EN;
1506 if (old != val)
1507 outb(val, ICEREG1724(ice, SPDIF_CFG));
1508 spin_unlock_irq(&ice->reg_lock);
1509 return old != val;
1510}
1511
1b60f6b0 1512static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1da177e4
LT
1513{
1514 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1515 /* FIXME: the following conflict with IEC958 Playback Route */
1516 // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
10e8d78a 1517 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT
1518 .info = snd_vt1724_spdif_sw_info,
1519 .get = snd_vt1724_spdif_sw_get,
1520 .put = snd_vt1724_spdif_sw_put
1521};
1522
1523
1524#if 0 /* NOT USED YET */
1525/*
1526 * GPIO access from extern
1527 */
1528
a5ce8890 1529#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1da177e4 1530
ab0c7d72
TI
1531int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1532 struct snd_ctl_elem_value *ucontrol)
1da177e4 1533{
ab0c7d72 1534 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1535 int shift = kcontrol->private_value & 0xff;
1536 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1537
1538 snd_ice1712_save_gpio_status(ice);
ab0c7d72
TI
1539 ucontrol->value.integer.value[0] =
1540 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1da177e4
LT
1541 snd_ice1712_restore_gpio_status(ice);
1542 return 0;
1543}
1544
ab0c7d72
TI
1545int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1546 struct snd_ctl_elem_value *ucontrol)
1da177e4 1547{
ab0c7d72 1548 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1549 int shift = kcontrol->private_value & 0xff;
1550 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1551 unsigned int val, nval;
1552
1553 if (kcontrol->private_value & (1 << 31))
1554 return -EPERM;
1555 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1556 snd_ice1712_save_gpio_status(ice);
1557 val = snd_ice1712_gpio_read(ice);
1558 nval |= val & ~(1 << shift);
1559 if (val != nval)
1560 snd_ice1712_gpio_write(ice, nval);
1561 snd_ice1712_restore_gpio_status(ice);
1562 return val != nval;
1563}
1564#endif /* NOT USED YET */
1565
1566/*
1567 * rate
1568 */
ab0c7d72
TI
1569static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1570 struct snd_ctl_elem_info *uinfo)
1da177e4 1571{
32b47da0 1572 static const char * const texts_1724[] = {
1da177e4
LT
1573 "8000", /* 0: 6 */
1574 "9600", /* 1: 3 */
1575 "11025", /* 2: 10 */
1576 "12000", /* 3: 2 */
1577 "16000", /* 4: 5 */
1578 "22050", /* 5: 9 */
1579 "24000", /* 6: 1 */
1580 "32000", /* 7: 4 */
1581 "44100", /* 8: 8 */
1582 "48000", /* 9: 0 */
1583 "64000", /* 10: 15 */
1584 "88200", /* 11: 11 */
1585 "96000", /* 12: 7 */
1586 "176400", /* 13: 12 */
1587 "192000", /* 14: 14 */
1588 "IEC958 Input", /* 15: -- */
1589 };
32b47da0 1590 static const char * const texts_1720[] = {
1da177e4
LT
1591 "8000", /* 0: 6 */
1592 "9600", /* 1: 3 */
1593 "11025", /* 2: 10 */
1594 "12000", /* 3: 2 */
1595 "16000", /* 4: 5 */
1596 "22050", /* 5: 9 */
1597 "24000", /* 6: 1 */
1598 "32000", /* 7: 4 */
1599 "44100", /* 8: 8 */
1600 "48000", /* 9: 0 */
1601 "64000", /* 10: 15 */
1602 "88200", /* 11: 11 */
1603 "96000", /* 12: 7 */
1604 "IEC958 Input", /* 13: -- */
1605 };
ab0c7d72 1606 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1607
1608 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1609 uinfo->count = 1;
1610 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
1611 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1612 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1613 strcpy(uinfo->value.enumerated.name,
1614 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
1615 texts_1724[uinfo->value.enumerated.item]);
1616 return 0;
1617}
1618
ab0c7d72
TI
1619static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1620 struct snd_ctl_elem_value *ucontrol)
1da177e4 1621{
ab0c7d72 1622 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1623 static const unsigned char xlate[16] = {
1da177e4
LT
1624 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1625 };
1626 unsigned char val;
1627
1628 spin_lock_irq(&ice->reg_lock);
1629 if (is_spdif_master(ice)) {
1630 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
1631 } else {
1632 val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
1633 if (val == 255) {
1634 snd_BUG();
1635 val = 0;
1636 }
1637 ucontrol->value.enumerated.item[0] = val;
1638 }
1639 spin_unlock_irq(&ice->reg_lock);
1640 return 0;
1641}
1642
ab0c7d72
TI
1643static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1644 struct snd_ctl_elem_value *ucontrol)
1da177e4 1645{
ab0c7d72 1646 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1647 unsigned char oval;
1648 int rate;
1649 int change = 0;
1650 int spdif = ice->vt1720 ? 13 : 15;
1651
1652 spin_lock_irq(&ice->reg_lock);
1653 oval = inb(ICEMT1724(ice, RATE));
1654 if (ucontrol->value.enumerated.item[0] == spdif) {
c5a30f85 1655 unsigned char i2s_oval;
1da177e4 1656 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
c5a30f85
PH
1657 /* setting 256fs */
1658 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1659 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X,
1660 ICEMT1724(ice, I2S_FORMAT));
1da177e4
LT
1661 } else {
1662 rate = rates[ucontrol->value.integer.value[0] % 15];
1663 if (rate <= get_max_rate(ice)) {
1664 PRO_RATE_DEFAULT = rate;
1665 spin_unlock_irq(&ice->reg_lock);
1666 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1667 spin_lock_irq(&ice->reg_lock);
1668 }
1669 }
1670 change = inb(ICEMT1724(ice, RATE)) != oval;
1671 spin_unlock_irq(&ice->reg_lock);
1672
ab0c7d72
TI
1673 if ((oval & VT1724_SPDIF_MASTER) !=
1674 (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
1da177e4
LT
1675 /* notify akm chips as well */
1676 if (is_spdif_master(ice)) {
1677 unsigned int i;
1678 for (i = 0; i < ice->akm_codecs; i++) {
1679 if (ice->akm[i].ops.set_rate_val)
1680 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1681 }
1682 }
1683 }
1684 return change;
1685}
1686
1b60f6b0 1687static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1da177e4
LT
1688 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1689 .name = "Multi Track Internal Clock",
1690 .info = snd_vt1724_pro_internal_clock_info,
1691 .get = snd_vt1724_pro_internal_clock_get,
1692 .put = snd_vt1724_pro_internal_clock_put
1693};
1694
a5ce8890 1695#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1696
ab0c7d72
TI
1697static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1698 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1699{
1700 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1701 return 0;
1702}
1703
ab0c7d72
TI
1704static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1705 struct snd_ctl_elem_value *ucontrol)
1da177e4 1706{
ab0c7d72 1707 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1708 int change = 0, nval;
1709
1710 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1711 spin_lock_irq(&ice->reg_lock);
1712 change = PRO_RATE_LOCKED != nval;
1713 PRO_RATE_LOCKED = nval;
1714 spin_unlock_irq(&ice->reg_lock);
1715 return change;
1716}
1717
1b60f6b0 1718static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1da177e4
LT
1719 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1720 .name = "Multi Track Rate Locking",
1721 .info = snd_vt1724_pro_rate_locking_info,
1722 .get = snd_vt1724_pro_rate_locking_get,
1723 .put = snd_vt1724_pro_rate_locking_put
1724};
1725
a5ce8890 1726#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 1727
ab0c7d72
TI
1728static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1729 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1730{
1731 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1732 return 0;
1733}
1734
ab0c7d72
TI
1735static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1736 struct snd_ctl_elem_value *ucontrol)
1da177e4 1737{
ab0c7d72 1738 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1739 int change = 0, nval;
1740
1741 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1742 spin_lock_irq(&ice->reg_lock);
1743 change = PRO_RATE_RESET != nval;
1744 PRO_RATE_RESET = nval;
1745 spin_unlock_irq(&ice->reg_lock);
1746 return change;
1747}
1748
1b60f6b0 1749static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1da177e4
LT
1750 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1751 .name = "Multi Track Rate Reset",
1752 .info = snd_vt1724_pro_rate_reset_info,
1753 .get = snd_vt1724_pro_rate_reset_get,
1754 .put = snd_vt1724_pro_rate_reset_put
1755};
1756
1757
1758/*
1759 * routing
1760 */
ab0c7d72
TI
1761static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1762 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1763{
1764 static char *texts[] = {
1765 "PCM Out", /* 0 */
1766 "H/W In 0", "H/W In 1", /* 1-2 */
1767 "IEC958 In L", "IEC958 In R", /* 3-4 */
1768 };
1769
1770 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1771 uinfo->count = 1;
1772 uinfo->value.enumerated.items = 5;
1773 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1774 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1775 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1776 return 0;
1777}
1778
1779static inline int analog_route_shift(int idx)
1780{
1781 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1782}
1783
1784static inline int digital_route_shift(int idx)
1785{
1786 return idx * 3;
1787}
1788
ab0c7d72 1789static int get_route_val(struct snd_ice1712 *ice, int shift)
1da177e4
LT
1790{
1791 unsigned long val;
1792 unsigned char eitem;
32b47da0 1793 static const unsigned char xlate[8] = {
1da177e4
LT
1794 0, 255, 1, 2, 255, 255, 3, 4,
1795 };
1796
1797 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1798 val >>= shift;
1799 val &= 7; //we now have 3 bits per output
1800 eitem = xlate[val];
1801 if (eitem == 255) {
1802 snd_BUG();
1803 return 0;
1804 }
1805 return eitem;
1806}
1807
ab0c7d72 1808static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
1da177e4
LT
1809{
1810 unsigned int old_val, nval;
1811 int change;
32b47da0 1812 static const unsigned char xroute[8] = {
1da177e4
LT
1813 0, /* PCM */
1814 2, /* PSDIN0 Left */
1815 3, /* PSDIN0 Right */
1816 6, /* SPDIN Left */
1817 7, /* SPDIN Right */
1818 };
1819
1820 nval = xroute[val % 5];
1821 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1822 val &= ~(0x07 << shift);
1823 val |= nval << shift;
1824 change = val != old_val;
1825 if (change)
1826 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1827 return change;
1828}
1829
ab0c7d72
TI
1830static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
1831 struct snd_ctl_elem_value *ucontrol)
1da177e4 1832{
ab0c7d72 1833 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1834 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI
1835 ucontrol->value.enumerated.item[0] =
1836 get_route_val(ice, analog_route_shift(idx));
1da177e4
LT
1837 return 0;
1838}
1839
ab0c7d72
TI
1840static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
1841 struct snd_ctl_elem_value *ucontrol)
1da177e4 1842{
ab0c7d72 1843 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1844 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1845 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1846 analog_route_shift(idx));
1847}
1848
ab0c7d72
TI
1849static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
1850 struct snd_ctl_elem_value *ucontrol)
1da177e4 1851{
ab0c7d72 1852 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1853 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI
1854 ucontrol->value.enumerated.item[0] =
1855 get_route_val(ice, digital_route_shift(idx));
1da177e4
LT
1856 return 0;
1857}
1858
ab0c7d72
TI
1859static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
1860 struct snd_ctl_elem_value *ucontrol)
1da177e4 1861{
ab0c7d72 1862 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1863 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1864 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1865 digital_route_shift(idx));
1866}
1867
1b60f6b0 1868static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
1da177e4
LT
1869 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1870 .name = "H/W Playback Route",
1871 .info = snd_vt1724_pro_route_info,
1872 .get = snd_vt1724_pro_route_analog_get,
1873 .put = snd_vt1724_pro_route_analog_put,
1874};
1875
1b60f6b0 1876static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1da177e4
LT
1877 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1878 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1879 .info = snd_vt1724_pro_route_info,
1880 .get = snd_vt1724_pro_route_spdif_get,
1881 .put = snd_vt1724_pro_route_spdif_put,
1882 .count = 2,
1883};
1884
1885
ab0c7d72
TI
1886static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
1887 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1888{
1889 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1890 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
1891 uinfo->value.integer.min = 0;
1892 uinfo->value.integer.max = 255;
1893 return 0;
1894}
1895
ab0c7d72
TI
1896static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
1897 struct snd_ctl_elem_value *ucontrol)
1da177e4 1898{
ab0c7d72 1899 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1900 int idx;
1901
1902 spin_lock_irq(&ice->reg_lock);
1903 for (idx = 0; idx < 22; idx++) {
1904 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ab0c7d72
TI
1905 ucontrol->value.integer.value[idx] =
1906 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1da177e4
LT
1907 }
1908 spin_unlock_irq(&ice->reg_lock);
1909 return 0;
1910}
1911
1b60f6b0 1912static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
1da177e4
LT
1913 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1914 .name = "Multi Track Peak",
1915 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
1916 .info = snd_vt1724_pro_peak_info,
1917 .get = snd_vt1724_pro_peak_get
1918};
1919
1920/*
1921 *
1922 */
1923
1b60f6b0 1924static struct snd_ice1712_card_info no_matched __devinitdata;
1da177e4 1925
1b60f6b0 1926static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1da177e4
LT
1927 snd_vt1724_revo_cards,
1928 snd_vt1724_amp_cards,
1929 snd_vt1724_aureon_cards,
1930 snd_vt1720_mobo_cards,
1931 snd_vt1720_pontis_cards,
1932 snd_vt1724_prodigy192_cards,
1933 snd_vt1724_juli_cards,
1934 snd_vt1724_phase_cards,
f6cdab5f 1935 snd_vt1724_wtm_cards,
1da177e4
LT
1936 NULL,
1937};
1938
1939
1940/*
1941 */
1942
ab0c7d72 1943static void wait_i2c_busy(struct snd_ice1712 *ice)
1da177e4
LT
1944{
1945 int t = 0x10000;
1946 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
1947 ;
1948 if (t == -1)
1949 printk(KERN_ERR "ice1724: i2c busy timeout\n");
1950}
1951
ab0c7d72
TI
1952unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
1953 unsigned char dev, unsigned char addr)
1da177e4
LT
1954{
1955 unsigned char val;
1956
62932df8 1957 mutex_lock(&ice->i2c_mutex);
1da177e4
LT
1958 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1959 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1960 wait_i2c_busy(ice);
1961 val = inb(ICEREG1724(ice, I2C_DATA));
62932df8 1962 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT
1963 //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
1964 return val;
1965}
1966
ab0c7d72
TI
1967void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
1968 unsigned char dev, unsigned char addr, unsigned char data)
1da177e4 1969{
62932df8 1970 mutex_lock(&ice->i2c_mutex);
1da177e4
LT
1971 wait_i2c_busy(ice);
1972 //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
1973 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1974 outb(data, ICEREG1724(ice, I2C_DATA));
1975 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1976 wait_i2c_busy(ice);
62932df8 1977 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT
1978}
1979
ab0c7d72
TI
1980static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
1981 const char *modelname)
1da177e4
LT
1982{
1983 const int dev = 0xa0; /* EEPROM device address */
1984 unsigned int i, size;
1b60f6b0 1985 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT
1986
1987 if (! modelname || ! *modelname) {
1988 ice->eeprom.subvendor = 0;
1989 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
1990 ice->eeprom.subvendor =
1991 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1992 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
1993 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1994 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
ab0c7d72
TI
1995 if (ice->eeprom.subvendor == 0 ||
1996 ice->eeprom.subvendor == (unsigned int)-1) {
1997 /* invalid subvendor from EEPROM, try the PCI
1998 * subststem ID instead
1999 */
1da177e4 2000 u16 vendor, device;
ab0c7d72
TI
2001 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2002 &vendor);
1da177e4 2003 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ab0c7d72
TI
2004 ice->eeprom.subvendor =
2005 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2006 if (ice->eeprom.subvendor == 0 ||
2007 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT
2008 printk(KERN_ERR "ice1724: No valid ID is found\n");
2009 return -ENXIO;
2010 }
2011 }
2012 }
2013 for (tbl = card_tables; *tbl; tbl++) {
2014 for (c = *tbl; c->subvendor; c++) {
ab0c7d72
TI
2015 if (modelname && c->model &&
2016 ! strcmp(modelname, c->model)) {
2017 printk(KERN_INFO "ice1724: Using board model %s\n",
2018 c->name);
1da177e4
LT
2019 ice->eeprom.subvendor = c->subvendor;
2020 } else if (c->subvendor != ice->eeprom.subvendor)
2021 continue;
2022 if (! c->eeprom_size || ! c->eeprom_data)
2023 goto found;
2024 /* if the EEPROM is given by the driver, use it */
2025 snd_printdd("using the defined eeprom..\n");
2026 ice->eeprom.version = 2;
2027 ice->eeprom.size = c->eeprom_size + 6;
2028 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2029 goto read_skipped;
2030 }
2031 }
ab0c7d72
TI
2032 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2033 ice->eeprom.subvendor);
1da177e4
LT
2034
2035 found:
2036 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2037 if (ice->eeprom.size < 6)
2038 ice->eeprom.size = 32;
2039 else if (ice->eeprom.size > 32) {
ab0c7d72
TI
2040 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2041 ice->eeprom.size);
1da177e4
LT
2042 return -EIO;
2043 }
2044 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2045 if (ice->eeprom.version != 2)
ab0c7d72
TI
2046 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2047 ice->eeprom.version);
1da177e4
LT
2048 size = ice->eeprom.size - 6;
2049 for (i = 0; i < size; i++)
2050 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2051
2052 read_skipped:
2053 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2054 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2055 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2056
2057 return 0;
2058}
2059
2060
2061
ab0c7d72 2062static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
1da177e4
LT
2063{
2064 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2065 udelay(200);
2066 outb(0, ICEREG1724(ice, CONTROL));
2067 udelay(200);
2068 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2069 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2070 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2071 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2072
2073 ice->gpio.write_mask = ice->eeprom.gpiomask;
2074 ice->gpio.direction = ice->eeprom.gpiodir;
2075 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2076 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2077 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2078
2079 outb(0, ICEREG1724(ice, POWERDOWN));
2080
2081 return 0;
2082}
2083
ab0c7d72 2084static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2085{
2086 int err;
ab0c7d72 2087 struct snd_kcontrol *kctl;
1da177e4
LT
2088
2089 snd_assert(ice->pcm != NULL, return -EIO);
2090
2091 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2092 if (err < 0)
2093 return err;
2094
2095 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2096 if (err < 0)
2097 return err;
2098
2099 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2100 if (err < 0)
2101 return err;
2102 kctl->id.device = ice->pcm->device;
2103 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2104 if (err < 0)
2105 return err;
2106 kctl->id.device = ice->pcm->device;
2107 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2108 if (err < 0)
2109 return err;
2110 kctl->id.device = ice->pcm->device;
2111#if 0 /* use default only */
2112 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2113 if (err < 0)
2114 return err;
2115 kctl->id.device = ice->pcm->device;
2116 ice->spdif.stream_ctl = kctl;
2117#endif
2118 return 0;
2119}
2120
2121
ab0c7d72 2122static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2123{
2124 int err;
2125
2126 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2127 if (err < 0)
2128 return err;
2129 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2130 if (err < 0)
2131 return err;
2132
2133 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2134 if (err < 0)
2135 return err;
2136 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2137 if (err < 0)
2138 return err;
2139
2140 if (ice->num_total_dacs > 0) {
ab0c7d72 2141 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
1da177e4
LT
2142 tmp.count = ice->num_total_dacs;
2143 if (ice->vt1720 && tmp.count > 2)
2144 tmp.count = 2;
2145 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2146 if (err < 0)
2147 return err;
2148 }
2149
2150 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2151 if (err < 0)
2152 return err;
2153
2154 return 0;
2155}
2156
ab0c7d72 2157static int snd_vt1724_free(struct snd_ice1712 *ice)
1da177e4
LT
2158{
2159 if (! ice->port)
2160 goto __hw_end;
2161 /* mask all interrupts */
2162 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2163 outb(0xff, ICEREG1724(ice, IRQMASK));
2164 /* --- */
2165 __hw_end:
2166 if (ice->irq >= 0) {
2167 synchronize_irq(ice->irq);
ab0c7d72 2168 free_irq(ice->irq, ice);
1da177e4
LT
2169 }
2170 pci_release_regions(ice->pci);
2171 snd_ice1712_akm4xxx_free(ice);
2172 pci_disable_device(ice->pci);
2173 kfree(ice);
2174 return 0;
2175}
2176
ab0c7d72 2177static int snd_vt1724_dev_free(struct snd_device *device)
1da177e4 2178{
ab0c7d72 2179 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT
2180 return snd_vt1724_free(ice);
2181}
2182
ab0c7d72 2183static int __devinit snd_vt1724_create(struct snd_card *card,
1da177e4
LT
2184 struct pci_dev *pci,
2185 const char *modelname,
ab0c7d72 2186 struct snd_ice1712 ** r_ice1712)
1da177e4 2187{
ab0c7d72 2188 struct snd_ice1712 *ice;
1da177e4
LT
2189 int err;
2190 unsigned char mask;
ab0c7d72 2191 static struct snd_device_ops ops = {
1da177e4
LT
2192 .dev_free = snd_vt1724_dev_free,
2193 };
2194
2195 *r_ice1712 = NULL;
2196
2197 /* enable PCI device */
2198 if ((err = pci_enable_device(pci)) < 0)
2199 return err;
2200
e560d8d8 2201 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT
2202 if (ice == NULL) {
2203 pci_disable_device(pci);
2204 return -ENOMEM;
2205 }
2206 ice->vt1724 = 1;
2207 spin_lock_init(&ice->reg_lock);
62932df8
IM
2208 mutex_init(&ice->gpio_mutex);
2209 mutex_init(&ice->open_mutex);
2210 mutex_init(&ice->i2c_mutex);
1da177e4
LT
2211 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2212 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2213 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2214 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2215 ice->card = card;
2216 ice->pci = pci;
2217 ice->irq = -1;
2218 pci_set_master(pci);
2219 snd_vt1724_proc_init(ice);
2220 synchronize_irq(pci->irq);
2221
2222 if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
2223 kfree(ice);
2224 pci_disable_device(pci);
2225 return err;
2226 }
2227 ice->port = pci_resource_start(pci, 0);
2228 ice->profi_port = pci_resource_start(pci, 1);
2229
ab0c7d72 2230 if (request_irq(pci->irq, snd_vt1724_interrupt,
437a5a46 2231 IRQF_SHARED, "ICE1724", ice)) {
99b359ba 2232 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2233 snd_vt1724_free(ice);
2234 return -EIO;
2235 }
2236
2237 ice->irq = pci->irq;
2238
2239 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2240 snd_vt1724_free(ice);
2241 return -EIO;
2242 }
2243 if (snd_vt1724_chip_init(ice) < 0) {
2244 snd_vt1724_free(ice);
2245 return -EIO;
2246 }
2247
2248 /* unmask used interrupts */
2249 if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
2250 mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
2251 else
2252 mask = 0;
2253 outb(mask, ICEREG1724(ice, IRQMASK));
ab0c7d72
TI
2254 /* don't handle FIFO overrun/underruns (just yet),
2255 * since they cause machine lockups
2256 */
1da177e4
LT
2257 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2258
2259 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2260 snd_vt1724_free(ice);
2261 return err;
2262 }
2263
2264 snd_card_set_dev(card, &pci->dev);
2265
2266 *r_ice1712 = ice;
2267 return 0;
2268}
2269
2270
2271/*
2272 *
2273 * Registration
2274 *
2275 */
2276
2277static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2278 const struct pci_device_id *pci_id)
2279{
2280 static int dev;
ab0c7d72
TI
2281 struct snd_card *card;
2282 struct snd_ice1712 *ice;
1da177e4 2283 int pcm_dev = 0, err;
1b60f6b0 2284 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT
2285
2286 if (dev >= SNDRV_CARDS)
2287 return -ENODEV;
2288 if (!enable[dev]) {
2289 dev++;
2290 return -ENOENT;
2291 }
2292
2293 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2294 if (card == NULL)
2295 return -ENOMEM;
2296
2297 strcpy(card->driver, "ICE1724");
2298 strcpy(card->shortname, "ICEnsemble ICE1724");
2299
2300 if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
2301 snd_card_free(card);
2302 return err;
2303 }
2304
2305 for (tbl = card_tables; *tbl; tbl++) {
2306 for (c = *tbl; c->subvendor; c++) {
2307 if (c->subvendor == ice->eeprom.subvendor) {
2308 strcpy(card->shortname, c->name);
2309 if (c->driver) /* specific driver? */
2310 strcpy(card->driver, c->driver);
2311 if (c->chip_init) {
2312 if ((err = c->chip_init(ice)) < 0) {
2313 snd_card_free(card);
2314 return err;
2315 }
2316 }
2317 goto __found;
2318 }
2319 }
2320 }
2321 c = &no_matched;
2322 __found:
f06934bd
TI
2323 /*
2324 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2325 * ICE1712 has only one for both (mixed up).
2326 *
2327 * Confusingly the analog PCM is named "professional" here because it
2328 * was called so in ice1712 driver, and vt1724 driver is derived from
2329 * ice1712 driver.
2330 */
1da177e4
LT
2331
2332 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2333 snd_card_free(card);
2334 return err;
2335 }
2336
2337 if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
2338 snd_card_free(card);
2339 return err;
2340 }
2341
2342 if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
2343 snd_card_free(card);
2344 return err;
2345 }
2346
2347 if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
2348 snd_card_free(card);
2349 return err;
2350 }
2351
2352 if ((err = snd_vt1724_build_controls(ice)) < 0) {
2353 snd_card_free(card);
2354 return err;
2355 }
2356
2357 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2358 if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
2359 snd_card_free(card);
2360 return err;
2361 }
2362 }
2363
2364 if (c->build_controls) {
2365 if ((err = c->build_controls(ice)) < 0) {
2366 snd_card_free(card);
2367 return err;
2368 }
2369 }
2370
2371 if (! c->no_mpu401) {
2372 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2373 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
302e4c2f
TI
2374 ICEREG1724(ice, MPU_CTRL),
2375 MPU401_INFO_INTEGRATED,
1da177e4
LT
2376 ice->irq, 0,
2377 &ice->rmidi[0])) < 0) {
2378 snd_card_free(card);
2379 return err;
2380 }
2381 }
2382 }
2383
2384 sprintf(card->longname, "%s at 0x%lx, irq %i",
2385 card->shortname, ice->port, ice->irq);
2386
2387 if ((err = snd_card_register(card)) < 0) {
2388 snd_card_free(card);
2389 return err;
2390 }
2391 pci_set_drvdata(pci, card);
2392 dev++;
2393 return 0;
2394}
2395
2396static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2397{
2398 snd_card_free(pci_get_drvdata(pci));
2399 pci_set_drvdata(pci, NULL);
2400}
2401
2402static struct pci_driver driver = {
2403 .name = "ICE1724",
2404 .id_table = snd_vt1724_ids,
2405 .probe = snd_vt1724_probe,
2406 .remove = __devexit_p(snd_vt1724_remove),
2407};
2408
2409static int __init alsa_card_ice1724_init(void)
2410{
01d25d46 2411 return pci_register_driver(&driver);
1da177e4
LT
2412}
2413
2414static void __exit alsa_card_ice1724_exit(void)
2415{
2416 pci_unregister_driver(&driver);
2417}
2418
2419module_init(alsa_card_ice1724_init)
2420module_exit(alsa_card_ice1724_exit)