[net-next-2.6.git] / scripts / Makefile.build

# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

PHONY := __build
__build:

# Init all relevant variables used in kbuild files so
# 1) they have correct type
# 2) they do not inherit any value from the environment
obj-y :=
obj-m :=
lib-y :=
lib-m :=
always :=
targets :=
subdir-y :=
subdir-m :=
EXTRA_AFLAGS   :=
EXTRA_CFLAGS   :=
EXTRA_CPPFLAGS :=
EXTRA_LDFLAGS  :=
asflags-y  :=
ccflags-y  :=
cppflags-y :=
ldflags-y  :=

subdir-asflags-y :=
subdir-ccflags-y :=

# Read auto.conf if it exists, otherwise ignore
-include include/config/auto.conf

include scripts/Kbuild.include

# For backward compatibility check that these variables do not change
save-cflags := $(CFLAGS)

# The filename Kbuild has precedence over Makefile
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
include $(kbuild-file)

# If the save-* variables changed error out
ifeq ($(KBUILD_NOPEDANTIC),)
        ifneq ("$(save-cflags)","$(CFLAGS)")
                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
        endif
endif
include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

# Do not include host rules unless needed
ifneq ($(hostprogs-y)$(hostprogs-m),)
include scripts/Makefile.host
endif

ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))

# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
lib-target := $(obj)/lib.a
endif

ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
builtin-target := $(obj)/built-in.o
endif

modorder-target := $(obj)/modules.order

# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif

# Do section mismatch analysis for each module/built-in.o
ifdef CONFIG_DEBUG_SECTION_MISMATCH
  cmd_secanalysis = ; scripts/mod/modpost $@
endif

# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
modkern_cflags =                                          \
	$(if $(part-of-module),                           \
		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
quiet_modtag := $(empty)   $(empty)

$(real-objs-m)        : part-of-module := y
$(real-objs-m:.o=.i)  : part-of-module := y
$(real-objs-m:.o=.s)  : part-of-module := y
$(real-objs-m:.o=.lst): part-of-module := y

$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
modname = $(basetarget)

$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<

$(obj)/%.s: $(src)/%.c FORCE
	$(call if_changed_dep,cc_s_c)

quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<

$(obj)/%.i: $(src)/%.c FORCE
	$(call if_changed_dep,cc_i_c)

cmd_gensymtypes =                                                           \
    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
    $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH)                              \
     $(if $(KBUILD_PRESERVE),-p)                                            \
     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))

quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
cmd_cc_symtypes_c =                                                         \
    set -e;                                                                 \
    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
    test -s $@ || rm -f $@

$(obj)/%.symtypes : $(src)/%.c FORCE
	$(call cmd,cc_symtypes_c)

# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms

cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_modversions =								\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
		    > $(@D)/.tmp_$(@F:.o=.ver);					\
										\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
			-T $(@D)/.tmp_$(@F:.o=.ver);				\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
	else									\
		mv -f $(@D)/.tmp_$(@F) $@;					\
	fi;
endif

ifdef CONFIG_FTRACE_MCOUNT_RECORD
ifdef BUILD_C_RECORDMCOUNT
# Due to recursion, we must skip empty.o.
# The empty.o file is created in the make process in order to determine
#  the target endianness and word size. It is made before all other C
#  files, including recordmcount.
cmd_record_mcount = if [ $(@) != "scripts/mod/empty.o" ]; then			\
			$(objtree)/scripts/recordmcount "$(@)";			\
		    fi;
else
cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
	"$(if $(CONFIG_64BIT),64,32)" \
	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
	"$(if $(part-of-module),1,0)" "$(@)";
endif
endif

define rule_cc_o_c
	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
	$(cmd_modversions)						  \
	$(call echo-cmd,record_mcount)					  \
	$(cmd_record_mcount)						  \
	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
	                                              $(dot-target).tmp;  \
	rm -f $(depfile);						  \
	mv -f $(dot-target).tmp $(dot-target).cmd
endef

# Built-in and composite module parts
$(obj)/%.o: $(src)/%.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)

quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

$(obj)/%.lst: $(src)/%.c FORCE
	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)

$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)

quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $< 

$(obj)/%.s: $(src)/%.S FORCE
	$(call if_changed_dep,as_s_S)

quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<

$(obj)/%.o: $(src)/%.S FORCE
	$(call if_changed_dep,as_o_S)

targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<

$(obj)/%.lds: $(src)/%.lds.S FORCE
	$(call if_changed_dep,cpp_lds_S)

# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
quiet_cmd_link_o_target = LD      $@
# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
		      $(cmd_secanalysis),\
		      rm -f $@; $(AR) rcs $@)

$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

#
# Rule to create modules.order file
#
# Create commands to either record .ko file or cat modules.order from
# a subdirectory
modorder-cmds =						\
	$(foreach m, $(modorder),			\
		$(if $(filter %/modules.order, $m),	\
			cat $m;, echo kernel/$m;))

$(modorder-target): $(subdir-ym) FORCE
	$(Q)(cat /dev/null; $(modorder-cmds)) > $@

#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)

$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
$($(subst $(obj)/,,$(@:.o=-y)))), $^)
 
quiet_cmd_link_multi-y = LD      $@
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)

quiet_cmd_link_multi-m = LD [M]  $@
cmd_link_multi-m = $(cmd_link_multi-y)

# We would rather have a list of rules like
# 	foo.o: $(foo-objs)
# but that's not so easy, so we rather make all composite objects depend
# on the set of all their parts
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	$(call if_changed,link_multi-y)

$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	$(call if_changed,link_multi-m)
	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)

targets += $(multi-used-y) $(multi-used-m)


# Descending
# ---------------------------------------------------------------------------

PHONY += $(subdir-ym)
$(subdir-ym):
	$(Q)$(MAKE) $(build)=$@

# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

PHONY += FORCE

FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif


# Declare the contents of the .PHONY variable as phony.  We keep that
# information in a variable se we can use it in if_changed and friends.

.PHONY: $(PHONY)
Commit	Line	Data
1da177e4 LT	1	# ==========================================================================
	2	# Building
	3	# ==========================================================================
	4
	5	src := $(obj)
	6
4f193362	7	PHONY := __build
1da177e4 LT	8	__build:
1da177e4 LT	9
d72e5edb SR	10	# Init all relevant variables used in kbuild files so
	11	# 1) they have correct type
	12	# 2) they do not inherit any value from the environment
	13	obj-y :=
	14	obj-m :=
	15	lib-y :=
	16	lib-m :=
	17	always :=
	18	targets :=
	19	subdir-y :=
	20	subdir-m :=
	21	EXTRA_AFLAGS :=
	22	EXTRA_CFLAGS :=
	23	EXTRA_CPPFLAGS :=
	24	EXTRA_LDFLAGS :=
f77bf014 SR	25	asflags-y :=
	26	ccflags-y :=
	27	cppflags-y :=
	28	ldflags-y :=
d72e5edb	29
720097d8 SR	30	subdir-asflags-y :=
	31	subdir-ccflags-y :=
	32
3156fd05	33	# Read auto.conf if it exists, otherwise ignore
c955ccaf	34	-include include/config/auto.conf
1da177e4	35
20a468b5 SR	36	include scripts/Kbuild.include
20a468b5 SR	37
3156fd05	38	# For backward compatibility check that these variables do not change
0c53c8e6 SR	39	save-cflags := $(CFLAGS)
0c53c8e6 SR	40
2a691470	41	# The filename Kbuild has precedence over Makefile
db8c1a7b	42	kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
0c53c8e6 SR	43	kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
	44	include $(kbuild-file)
	45
	46	# If the save-* variables changed error out
	47	ifeq ($(KBUILD_NOPEDANTIC),)
	48	ifneq ("$(save-cflags)","$(CFLAGS)")
	49	$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
	50	endif
	51	endif
1da177e4 LT	52	include scripts/Makefile.lib
	53
	54	ifdef host-progs
	55	ifneq ($(hostprogs-y),$(host-progs))
	56	$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
	57	hostprogs-y += $(host-progs)
	58	endif
	59	endif
	60
3156fd05	61	# Do not include host rules unless needed
1da177e4 LT	62	ifneq ($(hostprogs-y)$(hostprogs-m),)
	63	include scripts/Makefile.host
	64	endif
	65
	66	ifneq ($(KBUILD_SRC),)
	67	# Create output directory if not already present
	68	_dummy := $(shell [ -d $(obj) ] \|\| mkdir -p $(obj))
	69
	70	# Create directories for object files if directory does not exist
	71	# Needed when obj-y := dir/file.o syntax is used
	72	_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] \|\| mkdir -p $(d)))
	73	endif
	74
1da177e4 LT	75	ifndef obj
	76	$(warning kbuild: Makefile.build is included improperly)
	77	endif
	78
	79	# ===========================================================================
	80
	81	ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
	82	lib-target := $(obj)/lib.a
	83	endif
	84
4b024242	85	ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
1da177e4 LT	86	builtin-target := $(obj)/built-in.o
	87	endif
	88
551559e1 TH	89	modorder-target := $(obj)/modules.order
551559e1 TH	90
1da177e4 LT	91	# We keep a list of all modules in $(MODVERDIR)
	92
	93	__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
551559e1	94	$(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
1da177e4 LT	95	$(subdir-ym) $(always)
	96	@:
	97
	98	# Linus' kernel sanity checking tool
	99	ifneq ($(KBUILD_CHECKSRC),0)
	100	ifeq ($(KBUILD_CHECKSRC),2)
	101	quiet_cmd_force_checksrc = CHECK $<
	102	cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
	103	else
	104	quiet_cmd_checksrc = CHECK $<
	105	cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
	106	endif
	107	endif
	108
91341d4b SR	109	# Do section mismatch analysis for each module/built-in.o
	110	ifdef CONFIG_DEBUG_SECTION_MISMATCH
	111	cmd_secanalysis = ; scripts/mod/modpost $@
	112	endif
1da177e4 LT	113
	114	# Compile C sources (.c)
	115	# ---------------------------------------------------------------------------
	116
	117	# Default is built-in, unless we know otherwise
6588169d SR	118	modkern_cflags = \
	119	$(if $(part-of-module), \
	120	$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
80c00ba9	121	$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
1da177e4 LT	122	quiet_modtag := $(empty) $(empty)
1da177e4 LT	123
18c167fd SL	124	$(real-objs-m) : part-of-module := y
	125	$(real-objs-m:.o=.i) : part-of-module := y
	126	$(real-objs-m:.o=.s) : part-of-module := y
	127	$(real-objs-m:.o=.lst): part-of-module := y
1da177e4 LT	128
	129	$(real-objs-m) : quiet_modtag := [M]
	130	$(real-objs-m:.o=.i) : quiet_modtag := [M]
	131	$(real-objs-m:.o=.s) : quiet_modtag := [M]
	132	$(real-objs-m:.o=.lst): quiet_modtag := [M]
	133
	134	$(obj-m) : quiet_modtag := [M]
	135
	136	# Default for not multi-part modules
5e8d780d	137	modname = $(basetarget)
1da177e4 LT	138
	139	$(multi-objs-m) : modname = $(modname-multi)
	140	$(multi-objs-m:.o=.i) : modname = $(modname-multi)
	141	$(multi-objs-m:.o=.s) : modname = $(modname-multi)
	142	$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
	143	$(multi-objs-y) : modname = $(modname-multi)
	144	$(multi-objs-y:.o=.i) : modname = $(modname-multi)
	145	$(multi-objs-y:.o=.s) : modname = $(modname-multi)
	146	$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
	147
	148	quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
7d185983	149	cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
1da177e4	150
767e581d	151	$(obj)/%.s: $(src)/%.c FORCE
1da177e4 LT	152	$(call if_changed_dep,cc_s_c)
	153
	154	quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
	155	cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
	156
767e581d	157	$(obj)/%.i: $(src)/%.c FORCE
1da177e4 LT	158	$(call if_changed_dep,cc_i_c)
1da177e4 LT	159
2ea03891	160	cmd_gensymtypes = \
37a8d9f6	161	$(CPP) -D__GENKSYMS__ $(c_flags) $< \| \
e26d6b83	162	$(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \
37a8d9f6	163	$(if $(KBUILD_PRESERVE),-p) \
e26d6b83	164	-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
37a8d9f6	165
15fde675	166	quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
37a8d9f6 SR	167	cmd_cc_symtypes_c = \
37a8d9f6 SR	168	set -e; \
e26d6b83	169	$(call cmd_gensymtypes,true,$@) >/dev/null; \
37a8d9f6	170	test -s $@ \|\| rm -f $@
15fde675	171
767e581d	172	$(obj)/%.symtypes : $(src)/%.c FORCE
64e6c1e1	173	$(call cmd,cc_symtypes_c)
15fde675	174
1da177e4 LT	175	# C (.c) files
	176	# The C file is compiled and updated dependency information is generated.
	177	# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
	178
	179	quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
	180
	181	ifndef CONFIG_MODVERSIONS
	182	cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
	183
	184	else
	185	# When module versioning is enabled the following steps are executed:
2ea03891 SR	186	# o compile a .tmp_<file>.o from <file>.c
	187	# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
	188	# not export symbols, we just rename .tmp_<file>.o to <file>.o and
1da177e4 LT	189	# are done.
	190	# o otherwise, we calculate symbol versions using the good old
	191	# genksyms on the preprocessed source and postprocess them in a way
2ea03891 SR	192	# that they are usable as a linker script
	193	# o generate <file>.o from .tmp_<file>.o using the linker to
	194	# replace the unresolved symbols __crc_exported_symbol with
	195	# the actual value of the checksum generated by genksyms
1da177e4	196
2ea03891	197	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
e26d6b83 DZ	198	cmd_modversions = \
	199	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
	200	$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
	201	> $(@D)/.tmp_$(@F:.o=.ver); \
	202	\
	203	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
	204	-T $(@D)/.tmp_$(@F:.o=.ver); \
	205	rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
	206	else \
	207	mv -f $(@D)/.tmp_$(@F) $@; \
1da177e4 LT	208	fi;
	209	endif
	210
8da3821b	211	ifdef CONFIG_FTRACE_MCOUNT_RECORD
72441cb1	212	ifdef BUILD_C_RECORDMCOUNT
d7b4d6de SR	213	# Due to recursion, we must skip empty.o.
	214	# The empty.o file is created in the make process in order to determine
	215	# the target endianness and word size. It is made before all other C
	216	# files, including recordmcount.
	217	cmd_record_mcount = if [ $(@) != "scripts/mod/empty.o" ]; then \
	218	$(objtree)/scripts/recordmcount "$(@)"; \
	219	fi;
72441cb1	220	else
66a57062	221	cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
e6299d26	222	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
b3acf29a	223	"$(if $(CONFIG_64BIT),64,32)" \
f9810a82 RV	224	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
f9810a82 RV	225	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
18c167fd	226	"$(if $(part-of-module),1,0)" "$(@)";
8da3821b	227	endif
72441cb1	228	endif
8da3821b	229
1da177e4	230	define rule_cc_o_c
6176aa9a JB	231	$(call echo-cmd,checksrc) $(cmd_checksrc) \
6176aa9a JB	232	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
1da177e4	233	$(cmd_modversions) \
c3c63b6b	234	$(call echo-cmd,record_mcount) \
8da3821b	235	$(cmd_record_mcount) \
48f1f058 SR	236	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
48f1f058 SR	237	$(dot-target).tmp; \
2ea03891	238	rm -f $(depfile); \
48f1f058	239	mv -f $(dot-target).tmp $(dot-target).cmd
1da177e4 LT	240	endef
	241
	242	# Built-in and composite module parts
767e581d	243	$(obj)/%.o: $(src)/%.c FORCE
1da177e4 LT	244	$(call cmd,force_checksrc)
	245	$(call if_changed_rule,cc_o_c)
	246
	247	# Single-part modules are special since we need to mark them in $(MODVERDIR)
	248
767e581d	249	$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
1da177e4 LT	250	$(call cmd,force_checksrc)
	251	$(call if_changed_rule,cc_o_c)
	252	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
	253
	254	quiet_cmd_cc_lst_c = MKLST $@
	255	cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
	256	$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
	257	System.map $(OBJDUMP) > $@
	258
767e581d	259	$(obj)/%.lst: $(src)/%.c FORCE
1da177e4 LT	260	$(call if_changed_dep,cc_lst_c)
	261
	262	# Compile assembler sources (.S)
	263	# ---------------------------------------------------------------------------
	264
80c00ba9	265	modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
1da177e4	266
6588169d SR	267	$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
6588169d SR	268	$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
1da177e4 LT	269
	270	quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
	271	cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
	272
767e581d	273	$(obj)/%.s: $(src)/%.S FORCE
1da177e4 LT	274	$(call if_changed_dep,as_s_S)
	275
	276	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
	277	cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	278
767e581d	279	$(obj)/%.o: $(src)/%.S FORCE
1da177e4 LT	280	$(call if_changed_dep,as_o_S)
	281
	282	targets += $(real-objs-y) $(real-objs-m) $(lib-y)
	283	targets += $(extra-y) $(MAKECMDGOALS) $(always)
	284
	285	# Linker scripts preprocessor (.lds.S -> .lds)
	286	# ---------------------------------------------------------------------------
	287	quiet_cmd_cpp_lds_S = LDS $@
51b563fc	288	cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
42f29a25	289	-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
1da177e4	290
767e581d	291	$(obj)/%.lds: $(src)/%.lds.S FORCE
1da177e4 LT	292	$(call if_changed_dep,cpp_lds_S)
	293
	294	# Build the compiled-in targets
	295	# ---------------------------------------------------------------------------
	296
	297	# To build objects in subdirs, we need to descend into the directories
	298	$(sort $(subdir-obj-y)): $(subdir-ym) ;
	299
	300	#
	301	# Rule to compile a set of .o files into one .o file
	302	#
	303	ifdef builtin-target
	304	quiet_cmd_link_o_target = LD $@
	305	# If the list of objects to link is empty, just create an empty built-in.o
	306	cmd_link_o_target = $(if $(strip $(obj-y)),\
91341d4b SR	307	$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
91341d4b SR	308	$(cmd_secanalysis),\
1da177e4 LT	309	rm -f $@; $(AR) rcs $@)
	310
	311	$(builtin-target): $(obj-y) FORCE
	312	$(call if_changed,link_o_target)
	313
	314	targets += $(builtin-target)
	315	endif # builtin-target
	316
551559e1 TH	317	#
	318	# Rule to create modules.order file
	319	#
	320	# Create commands to either record .ko file or cat modules.order from
	321	# a subdirectory
	322	modorder-cmds = \
	323	$(foreach m, $(modorder), \
	324	$(if $(filter %/modules.order, $m), \
	325	cat $m;, echo kernel/$m;))
	326
	327	$(modorder-target): $(subdir-ym) FORCE
	328	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
	329
1da177e4 LT	330	#
	331	# Rule to compile a set of .o files into one .a file
	332	#
	333	ifdef lib-target
	334	quiet_cmd_link_l_target = AR $@
5e54d5e5	335	cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
1da177e4 LT	336
	337	$(lib-target): $(lib-y) FORCE
	338	$(call if_changed,link_l_target)
	339
	340	targets += $(lib-target)
	341	endif
	342
	343	#
	344	# Rule to link composite objects
	345	#
	346	# Composite objects are specified in kbuild makefile as follows:
	347	# <composite-object>-objs := <list of .o files>
	348	# or
	349	# <composite-object>-y := <list of .o files>
	350	link_multi_deps = \
	351	$(filter $(addprefix $(obj)/, \
	352	$($(subst $(obj)/,,$(@:.o=-objs))) \
	353	$($(subst $(obj)/,,$(@:.o=-y)))), $^)
	354
	355	quiet_cmd_link_multi-y = LD $@
91341d4b	356	cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
1da177e4 LT	357
1da177e4 LT	358	quiet_cmd_link_multi-m = LD [M] $@
114f5157	359	cmd_link_multi-m = $(cmd_link_multi-y)
1da177e4 LT	360
	361	# We would rather have a list of rules like
	362	# foo.o: $(foo-objs)
	363	# but that's not so easy, so we rather make all composite objects depend
	364	# on the set of all their parts
	365	$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	366	$(call if_changed,link_multi-y)
	367
	368	$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	369	$(call if_changed,link_multi-m)
	370	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
	371
	372	targets += $(multi-used-y) $(multi-used-m)
	373
	374
	375	# Descending
	376	# ---------------------------------------------------------------------------
	377
4f193362	378	PHONY += $(subdir-ym)
1da177e4 LT	379	$(subdir-ym):
	380	$(Q)$(MAKE) $(build)=$@
	381
	382	# Add FORCE to the prequisites of a target to force it to be always rebuilt.
	383	# ---------------------------------------------------------------------------
	384
4f193362	385	PHONY += FORCE
1da177e4 LT	386
	387	FORCE:
	388
	389	# Read all saved command lines and dependencies for the $(targets) we
	390	# may be building above, using $(if_changed{,_dep}). As an
	391	# optimization, we don't need to read them if the target does not
	392	# exist, we will rebuild anyway in that case.
	393
	394	targets := $(wildcard $(sort $(targets)))
	395	cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
	396
	397	ifneq ($(cmd_files),)
	398	include $(cmd_files)
	399	endif
4f193362 PS	400
	401
	402	# Declare the contents of the .PHONY variable as phony. We keep that
	403	# information in a variable se we can use it in if_changed and friends.
	404
	405	.PHONY: $(PHONY)