[net-next-2.6.git] / include / linux / scc.h

/* $Id: scc.h,v 1.29 1997/04/02 14:56:45 jreuter Exp jreuter $ */

#ifndef	_SCC_H
#define	_SCC_H


/* selection of hardware types */

#define PA0HZP		0x00	/* hardware type for PA0HZP SCC card and compatible */
#define EAGLE		0x01    /* hardware type for EAGLE card */
#define PC100		0x02	/* hardware type for PC100 card */
#define PRIMUS		0x04	/* hardware type for PRIMUS-PC (DG9BL) card */
#define DRSI		0x08	/* hardware type for DRSI PC*Packet card */
#define BAYCOM		0x10	/* hardware type for BayCom (U)SCC */

/* DEV ioctl() commands */

enum SCC_ioctl_cmds {
	SIOCSCCRESERVED = SIOCDEVPRIVATE,
	SIOCSCCCFG,
	SIOCSCCINI,
	SIOCSCCCHANINI,
	SIOCSCCSMEM,
	SIOCSCCGKISS,
	SIOCSCCSKISS,
	SIOCSCCGSTAT,
	SIOCSCCCAL
};

/* Device parameter control (from WAMPES) */

enum L1_params {
	PARAM_DATA,
	PARAM_TXDELAY,
	PARAM_PERSIST,
	PARAM_SLOTTIME,
	PARAM_TXTAIL,
	PARAM_FULLDUP,
	PARAM_SOFTDCD,		/* was: PARAM_HW */
	PARAM_MUTE,		/* ??? */
	PARAM_DTR,
	PARAM_RTS,
	PARAM_SPEED,
	PARAM_ENDDELAY,		/* ??? */
	PARAM_GROUP,
	PARAM_IDLE,
	PARAM_MIN,
	PARAM_MAXKEY,
	PARAM_WAIT,
	PARAM_MAXDEFER,
	PARAM_TX,
	PARAM_HWEVENT = 31,
	PARAM_RETURN = 255	/* reset kiss mode */
};

/* fulldup parameter */

enum FULLDUP_modes {
	KISS_DUPLEX_HALF,	/* normal CSMA operation */
	KISS_DUPLEX_FULL,	/* fullduplex, key down trx after transmission */
	KISS_DUPLEX_LINK,	/* fullduplex, key down trx after 'idletime' sec */
	KISS_DUPLEX_OPTIMA	/* fullduplex, let the protocol layer control the hw */
};

/* misc. parameters */

#define TIMER_OFF	65535U	/* to switch off timers */
#define NO_SUCH_PARAM	65534U	/* param not implemented */

/* HWEVENT parameter */

enum HWEVENT_opts {
	HWEV_DCD_ON,
	HWEV_DCD_OFF,
	HWEV_ALL_SENT
};

/* channel grouping */

#define RXGROUP		0100	/* if set, only tx when all channels clear */
#define TXGROUP		0200	/* if set, don't transmit simultaneously */

/* Tx/Rx clock sources */

enum CLOCK_sources {
	CLK_DPLL,	/* normal halfduplex operation */
	CLK_EXTERNAL,	/* external clocking (G3RUH/DF9IC modems) */
	CLK_DIVIDER,	/* Rx = DPLL, Tx = divider (fullduplex with */
			/* modems without clock regeneration */
	CLK_BRG		/* experimental fullduplex mode with DPLL/BRG for */
			/* MODEMs without clock recovery */
};

/* Tx state */

enum TX_state {
	TXS_IDLE,	/* Transmitter off, no data pending */
	TXS_BUSY,	/* waiting for permission to send / tailtime */
	TXS_ACTIVE,	/* Transmitter on, sending data */
	TXS_NEWFRAME,	/* reset CRC and send (next) frame */
	TXS_IDLE2,	/* Transmitter on, no data pending */
	TXS_WAIT,	/* Waiting for Mintime to expire */
	TXS_TIMEOUT	/* We had a transmission timeout */
};

typedef unsigned long io_port;	/* type definition for an 'io port address' */

/* SCC statistical information */

struct scc_stat {
        long rxints;            /* Receiver interrupts */
        long txints;            /* Transmitter interrupts */
        long exints;            /* External/status interrupts */
        long spints;            /* Special receiver interrupts */

        long txframes;          /* Packets sent */
        long rxframes;          /* Number of Frames Actually Received */
        long rxerrs;            /* CRC Errors */
        long txerrs;		/* KISS errors */
        
	unsigned int nospace;	/* "Out of buffers" */
	unsigned int rx_over;	/* Receiver Overruns */
	unsigned int tx_under;	/* Transmitter Underruns */

	unsigned int tx_state;	/* Transmitter state */
	int tx_queued;		/* tx frames enqueued */

	unsigned int maxqueue;	/* allocated tx_buffers */
	unsigned int bufsize;	/* used buffersize */
};

struct scc_modem {
	long speed;		/* Line speed, bps */
	char clocksrc;		/* 0 = DPLL, 1 = external, 2 = divider */
	char nrz;		/* NRZ instead of NRZI */	
};

struct scc_kiss_cmd {
	int  	 command;	/* one of the KISS-Commands defined above */
	unsigned param;		/* KISS-Param */
};

struct scc_hw_config {
	io_port data_a;		/* data port channel A */
	io_port ctrl_a;		/* control port channel A */
	io_port data_b;		/* data port channel B */
	io_port ctrl_b;		/* control port channel B */
	io_port vector_latch;	/* INTACK-Latch (#) */
	io_port	special;	/* special function port */

	int	irq;		/* irq */
	long	clock;		/* clock */
	char	option;		/* command for function port */

	char brand;		/* hardware type */
	char escc;		/* use ext. features of a 8580/85180/85280 */
};

/* (#) only one INTACK latch allowed. */


struct scc_mem_config {
	unsigned int dummy;
	unsigned int bufsize;
};

struct scc_calibrate {
	unsigned int time;
	unsigned char pattern;
};

#ifdef __KERNEL__

enum {TX_OFF, TX_ON};	/* command for scc_key_trx() */

/* Vector masks in RR2B */

#define VECTOR_MASK	0x06
#define TXINT		0x00
#define EXINT		0x02
#define RXINT		0x04
#define SPINT		0x06

#ifdef CONFIG_SCC_DELAY
#define Inb(port)	inb_p(port)
#define Outb(port, val)	outb_p(val, port)
#else
#define Inb(port)	inb(port)
#define Outb(port, val)	outb(val, port)
#endif

/* SCC channel control structure for KISS */

struct scc_kiss {
	unsigned char txdelay;		/* Transmit Delay 10 ms/cnt */
	unsigned char persist;		/* Persistence (0-255) as a % */
	unsigned char slottime;		/* Delay to wait on persistence hit */
	unsigned char tailtime;		/* Delay after last byte written */
	unsigned char fulldup;		/* Full Duplex mode 0=CSMA 1=DUP 2=ALWAYS KEYED */
	unsigned char waittime;		/* Waittime before any transmit attempt */
	unsigned int  maxkeyup;		/* Maximum time to transmit (seconds) */
	unsigned int  mintime;		/* Minimal offtime after MAXKEYUP timeout (seconds) */
	unsigned int  idletime;		/* Maximum idle time in ALWAYS KEYED mode (seconds) */
	unsigned int  maxdefer;		/* Timer for CSMA channel busy limit */
	unsigned char tx_inhibit;	/* Transmit is not allowed when set */	
	unsigned char group;		/* Group ID for AX.25 TX interlocking */
	unsigned char mode;		/* 'normal' or 'hwctrl' mode (unused) */
	unsigned char softdcd;		/* Use DPLL instead of DCD pin for carrier detect */
};


/* SCC channel structure */

struct scc_channel {
	int init;			/* channel exists? */

	struct net_device *dev;		/* link to device control structure */
	struct net_device_stats dev_stat;/* device statistics */

	char brand;			/* manufacturer of the board */
	long clock;			/* used clock */

	io_port ctrl;			/* I/O address of CONTROL register */
	io_port	data;			/* I/O address of DATA register */
	io_port special;		/* I/O address of special function port */
	int irq;			/* Number of Interrupt */

	char option;
	char enhanced;			/* Enhanced SCC support */

	unsigned char wreg[16]; 	/* Copy of last written value in WRx */
	unsigned char status;		/* Copy of R0 at last external interrupt */
	unsigned char dcd;		/* DCD status */

        struct scc_kiss kiss;		/* control structure for KISS params */
        struct scc_stat stat;		/* statistical information */
        struct scc_modem modem; 	/* modem information */

        struct sk_buff_head tx_queue;	/* next tx buffer */
        struct sk_buff *rx_buff;	/* pointer to frame currently received */
        struct sk_buff *tx_buff;	/* pointer to frame currently transmitted */

	/* Timer */
	struct timer_list tx_t;		/* tx timer for this channel */
	struct timer_list tx_wdog;	/* tx watchdogs */
	
	/* Channel lock */
	spinlock_t	lock;		/* Channel guard lock */
};

#endif /* defined(__KERNEL__) */
#endif /* defined(_SCC_H) */
Commit	Line	Data
1da177e4 LT	1	/* $Id: scc.h,v 1.29 1997/04/02 14:56:45 jreuter Exp jreuter $ */
	2
	3	#ifndef _SCC_H
	4	#define _SCC_H
	5
1da177e4 LT	6
	7	/* selection of hardware types */
	8
	9	#define PA0HZP 0x00 /* hardware type for PA0HZP SCC card and compatible */
	10	#define EAGLE 0x01 /* hardware type for EAGLE card */
	11	#define PC100 0x02 /* hardware type for PC100 card */
	12	#define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
	13	#define DRSI 0x08 /* hardware type for DRSI PCPacket card /
	14	#define BAYCOM 0x10 /* hardware type for BayCom (U)SCC */
	15
	16	/* DEV ioctl() commands */
	17
	18	enum SCC_ioctl_cmds {
	19	SIOCSCCRESERVED = SIOCDEVPRIVATE,
	20	SIOCSCCCFG,
	21	SIOCSCCINI,
	22	SIOCSCCCHANINI,
	23	SIOCSCCSMEM,
	24	SIOCSCCGKISS,
	25	SIOCSCCSKISS,
	26	SIOCSCCGSTAT,
	27	SIOCSCCCAL
	28	};
	29
	30	/* Device parameter control (from WAMPES) */
	31
	32	enum L1_params {
	33	PARAM_DATA,
	34	PARAM_TXDELAY,
	35	PARAM_PERSIST,
	36	PARAM_SLOTTIME,
	37	PARAM_TXTAIL,
	38	PARAM_FULLDUP,
	39	PARAM_SOFTDCD, /* was: PARAM_HW */
	40	PARAM_MUTE, /* ??? */
	41	PARAM_DTR,
	42	PARAM_RTS,
	43	PARAM_SPEED,
	44	PARAM_ENDDELAY, /* ??? */
	45	PARAM_GROUP,
	46	PARAM_IDLE,
	47	PARAM_MIN,
	48	PARAM_MAXKEY,
	49	PARAM_WAIT,
	50	PARAM_MAXDEFER,
	51	PARAM_TX,
	52	PARAM_HWEVENT = 31,
	53	PARAM_RETURN = 255 /* reset kiss mode */
	54	};
	55
	56	/* fulldup parameter */
	57
	58	enum FULLDUP_modes {
	59	KISS_DUPLEX_HALF, /* normal CSMA operation */
	60	KISS_DUPLEX_FULL, /* fullduplex, key down trx after transmission */
	61	KISS_DUPLEX_LINK, /* fullduplex, key down trx after 'idletime' sec */
	62	KISS_DUPLEX_OPTIMA /* fullduplex, let the protocol layer control the hw */
	63	};
	64
	65	/* misc. parameters */
	66
	67	#define TIMER_OFF 65535U /* to switch off timers */
	68	#define NO_SUCH_PARAM 65534U /* param not implemented */
	69
70	/* HWEVENT parameter */
71
72	enum HWEVENT_opts {
73	HWEV_DCD_ON,
74	HWEV_DCD_OFF,
75	HWEV_ALL_SENT
76	};
77
78	/* channel grouping */
79
80	#define RXGROUP 0100 /* if set, only tx when all channels clear */
81	#define TXGROUP 0200 /* if set, don't transmit simultaneously */
82
83	/* Tx/Rx clock sources */
84
85	enum CLOCK_sources {
86	CLK_DPLL, /* normal halfduplex operation */
87	CLK_EXTERNAL, /* external clocking (G3RUH/DF9IC modems) */
88	CLK_DIVIDER, /* Rx = DPLL, Tx = divider (fullduplex with */
89	/* modems without clock regeneration */
90	CLK_BRG /* experimental fullduplex mode with DPLL/BRG for */
91	/* MODEMs without clock recovery */
92	};
93
94	/* Tx state */
95
96	enum TX_state {
97	TXS_IDLE, /* Transmitter off, no data pending */
98	TXS_BUSY, /* waiting for permission to send / tailtime */
99	TXS_ACTIVE, /* Transmitter on, sending data */
100	TXS_NEWFRAME, /* reset CRC and send (next) frame */
101	TXS_IDLE2, /* Transmitter on, no data pending */
102	TXS_WAIT, /* Waiting for Mintime to expire */
103	TXS_TIMEOUT /* We had a transmission timeout */
104	};
105
106	typedef unsigned long io_port; /* type definition for an 'io port address' */
107
108	/* SCC statistical information */
109
110	struct scc_stat {
111	long rxints; /* Receiver interrupts */
112	long txints; /* Transmitter interrupts */
113	long exints; /* External/status interrupts */
114	long spints; /* Special receiver interrupts */
115
116	long txframes; /* Packets sent */
117	long rxframes; /* Number of Frames Actually Received */
118	long rxerrs; /* CRC Errors */
119	long txerrs; /* KISS errors */
120
121	unsigned int nospace; /* "Out of buffers" */
122	unsigned int rx_over; /* Receiver Overruns */
123	unsigned int tx_under; /* Transmitter Underruns */
124
125	unsigned int tx_state; /* Transmitter state */
126	int tx_queued; /* tx frames enqueued */
127
128	unsigned int maxqueue; /* allocated tx_buffers */
129	unsigned int bufsize; /* used buffersize */
130	};
131
132	struct scc_modem {
133	long speed; /* Line speed, bps */
134	char clocksrc; /* 0 = DPLL, 1 = external, 2 = divider */
135	char nrz; /* NRZ instead of NRZI */
136	};
137
138	struct scc_kiss_cmd {
139	int command; /* one of the KISS-Commands defined above */
140	unsigned param; /* KISS-Param */
141	};
142
143	struct scc_hw_config {
144	io_port data_a; /* data port channel A */
145	io_port ctrl_a; /* control port channel A */
146	io_port data_b; /* data port channel B */
147	io_port ctrl_b; /* control port channel B */
148	io_port vector_latch; /* INTACK-Latch (#) */
149	io_port special; /* special function port */
150
151	int irq; /* irq */
152	long clock; /* clock */
153	char option; /* command for function port */
154
155	char brand; /* hardware type */
156	char escc; /* use ext. features of a 8580/85180/85280 */
157	};
158
159	/* (#) only one INTACK latch allowed. */
160
161
162	struct scc_mem_config {
163	unsigned int dummy;
164	unsigned int bufsize;
165	};
166
167	struct scc_calibrate {
168	unsigned int time;
169	unsigned char pattern;
170	};
171
172	#ifdef __KERNEL__
173
174	enum {TX_OFF, TX_ON}; /* command for scc_key_trx() */
175
176	/* Vector masks in RR2B */
177
178	#define VECTOR_MASK 0x06
179	#define TXINT 0x00
180	#define EXINT 0x02
181	#define RXINT 0x04
182	#define SPINT 0x06
183
184	#ifdef CONFIG_SCC_DELAY
185	#define Inb(port) inb_p(port)
186	#define Outb(port, val) outb_p(val, port)
187	#else
188	#define Inb(port) inb(port)
189	#define Outb(port, val) outb(val, port)
190	#endif
191
192	/* SCC channel control structure for KISS */
193
194	struct scc_kiss {
195	unsigned char txdelay; /* Transmit Delay 10 ms/cnt */
196	unsigned char persist; /* Persistence (0-255) as a % */
197	unsigned char slottime; /* Delay to wait on persistence hit */
198	unsigned char tailtime; /* Delay after last byte written */
199	unsigned char fulldup; /* Full Duplex mode 0=CSMA 1=DUP 2=ALWAYS KEYED */
200	unsigned char waittime; /* Waittime before any transmit attempt */
201	unsigned int maxkeyup; /* Maximum time to transmit (seconds) */
202	unsigned int mintime; /* Minimal offtime after MAXKEYUP timeout (seconds) */
203	unsigned int idletime; /* Maximum idle time in ALWAYS KEYED mode (seconds) */
204	unsigned int maxdefer; /* Timer for CSMA channel busy limit */
205	unsigned char tx_inhibit; /* Transmit is not allowed when set */
206	unsigned char group; /* Group ID for AX.25 TX interlocking */
207	unsigned char mode; /* 'normal' or 'hwctrl' mode (unused) */
208	unsigned char softdcd; /* Use DPLL instead of DCD pin for carrier detect */
209	};
210
211
212	/* SCC channel structure */
213
214	struct scc_channel {
215	int init; /* channel exists? */
216
217	struct net_device dev; / link to device control structure */
218	struct net_device_stats dev_stat;/* device statistics */
219
220	char brand; /* manufacturer of the board */
221	long clock; /* used clock */
222
223	io_port ctrl; /* I/O address of CONTROL register */
224	io_port data; /* I/O address of DATA register */
225	io_port special; /* I/O address of special function port */
226	int irq; /* Number of Interrupt */
227
228	char option;
229	char enhanced; /* Enhanced SCC support */
230
231	unsigned char wreg[16]; /* Copy of last written value in WRx */
232	unsigned char status; /* Copy of R0 at last external interrupt */
233	unsigned char dcd; /* DCD status */
234
235	struct scc_kiss kiss; /* control structure for KISS params */
236	struct scc_stat stat; /* statistical information */
237	struct scc_modem modem; /* modem information */
238
239	struct sk_buff_head tx_queue; /* next tx buffer */
240	struct sk_buff rx_buff; / pointer to frame currently received */
241	struct sk_buff tx_buff; / pointer to frame currently transmitted */
242
243	/* Timer */
244	struct timer_list tx_t; /* tx timer for this channel */
245	struct timer_list tx_wdog; /* tx watchdogs */
246
247	/* Channel lock */
248	spinlock_t lock; /* Channel guard lock */
249	};
250
251	#endif /* defined(__KERNEL__) */
252	#endif /* defined(_SCC_H) */