[net-next-2.6.git] / drivers / spi / spi_nuc900.c

/* linux/drivers/spi/spi_nuc900.c
 *
 * Copyright (c) 2009 Nuvoton technology.
 * Wan ZongShun <mcuos.com@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/slab.h>

#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>

#include <mach/nuc900_spi.h>

/* usi registers offset */
#define USI_CNT		0x00
#define USI_DIV		0x04
#define USI_SSR		0x08
#define USI_RX0		0x10
#define USI_TX0		0x10

/* usi register bit */
#define ENINT		(0x01 << 17)
#define ENFLG		(0x01 << 16)
#define TXNUM		(0x03 << 8)
#define TXNEG		(0x01 << 2)
#define RXNEG		(0x01 << 1)
#define LSB		(0x01 << 10)
#define SELECTLEV	(0x01 << 2)
#define SELECTPOL	(0x01 << 31)
#define SELECTSLAVE	0x01
#define GOBUSY		0x01

struct nuc900_spi {
	struct spi_bitbang	 bitbang;
	struct completion	 done;
	void __iomem		*regs;
	int			 irq;
	int			 len;
	int			 count;
	const unsigned char	*tx;
	unsigned char		*rx;
	struct clk		*clk;
	struct resource		*ioarea;
	struct spi_master	*master;
	struct spi_device	*curdev;
	struct device		*dev;
	struct nuc900_spi_info *pdata;
	spinlock_t		lock;
	struct resource		*res;
};

static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
{
	return spi_master_get_devdata(sdev->master);
}

static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
{
	struct nuc900_spi *hw = to_hw(spi);
	unsigned int val;
	unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
	unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_SSR);

	if (!cs)
		val &= ~SELECTLEV;
	else
		val |= SELECTLEV;

	if (!ssr)
		val &= ~SELECTSLAVE;
	else
		val |= SELECTSLAVE;

	__raw_writel(val, hw->regs + USI_SSR);

	val = __raw_readl(hw->regs + USI_CNT);

	if (!cpol)
		val &= ~SELECTPOL;
	else
		val |= SELECTPOL;

	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_spi_chipsel(struct spi_device *spi, int value)
{
	switch (value) {
	case BITBANG_CS_INACTIVE:
		nuc900_slave_select(spi, 0);
		break;

	case BITBANG_CS_ACTIVE:
		nuc900_slave_select(spi, 1);
		break;
	}
}

static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
							unsigned int txnum)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	if (!txnum)
		val &= ~TXNUM;
	else
		val |= txnum << 0x08;

	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);

}

static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
							unsigned int txbitlen)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	val |= (txbitlen << 0x03);

	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_spi_gobusy(struct nuc900_spi *hw)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	val |= GOBUSY;

	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static int nuc900_spi_setupxfer(struct spi_device *spi,
				 struct spi_transfer *t)
{
	return 0;
}

static int nuc900_spi_setup(struct spi_device *spi)
{
	return 0;
}

static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
{
	return hw->tx ? hw->tx[count] : 0;
}

static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
{
	struct nuc900_spi *hw = to_hw(spi);

	hw->tx = t->tx_buf;
	hw->rx = t->rx_buf;
	hw->len = t->len;
	hw->count = 0;

	__raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);

	nuc900_spi_gobusy(hw);

	wait_for_completion(&hw->done);

	return hw->count;
}

static irqreturn_t nuc900_spi_irq(int irq, void *dev)
{
	struct nuc900_spi *hw = dev;
	unsigned int status;
	unsigned int count = hw->count;

	status = __raw_readl(hw->regs + USI_CNT);
	__raw_writel(status, hw->regs + USI_CNT);

	if (status & ENFLG) {
		hw->count++;

		if (hw->rx)
			hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
		count++;

		if (count < hw->len) {
			__raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
			nuc900_spi_gobusy(hw);
		} else {
			complete(&hw->done);
		}

		return IRQ_HANDLED;
	}

	complete(&hw->done);
	return IRQ_HANDLED;
}

static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	if (edge)
		val |= TXNEG;
	else
		val &= ~TXNEG;
	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	if (edge)
		val |= RXNEG;
	else
		val &= ~RXNEG;
	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	if (lsb)
		val |= LSB;
	else
		val &= ~LSB;
	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	if (sleep)
		val |= (sleep << 12);
	else
		val &= ~(0x0f << 12);
	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_enable_int(struct nuc900_spi *hw)
{
	unsigned int val;
	unsigned long flags;

	spin_lock_irqsave(&hw->lock, flags);

	val = __raw_readl(hw->regs + USI_CNT);

	val |= ENINT;

	__raw_writel(val, hw->regs + USI_CNT);

	spin_unlock_irqrestore(&hw->lock, flags);
}

static void nuc900_set_divider(struct nuc900_spi *hw)
{
	__raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
}

static void nuc900_init_spi(struct nuc900_spi *hw)
{
	clk_enable(hw->clk);
	spin_lock_init(&hw->lock);

	nuc900_tx_edge(hw, hw->pdata->txneg);
	nuc900_rx_edge(hw, hw->pdata->rxneg);
	nuc900_send_first(hw, hw->pdata->lsb);
	nuc900_set_sleep(hw, hw->pdata->sleep);
	nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
	nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
	nuc900_set_divider(hw);
	nuc900_enable_int(hw);
}

static int __devinit nuc900_spi_probe(struct platform_device *pdev)
{
	struct nuc900_spi *hw;
	struct spi_master *master;
	int err = 0;

	master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
	if (master == NULL) {
		dev_err(&pdev->dev, "No memory for spi_master\n");
		err = -ENOMEM;
		goto err_nomem;
	}

	hw = spi_master_get_devdata(master);
	memset(hw, 0, sizeof(struct nuc900_spi));

	hw->master = spi_master_get(master);
	hw->pdata  = pdev->dev.platform_data;
	hw->dev = &pdev->dev;

	if (hw->pdata == NULL) {
		dev_err(&pdev->dev, "No platform data supplied\n");
		err = -ENOENT;
		goto err_pdata;
	}

	platform_set_drvdata(pdev, hw);
	init_completion(&hw->done);

	master->mode_bits          = SPI_MODE_0;
	master->num_chipselect     = hw->pdata->num_cs;
	master->bus_num            = hw->pdata->bus_num;
	hw->bitbang.master         = hw->master;
	hw->bitbang.setup_transfer = nuc900_spi_setupxfer;
	hw->bitbang.chipselect     = nuc900_spi_chipsel;
	hw->bitbang.txrx_bufs      = nuc900_spi_txrx;
	hw->bitbang.master->setup  = nuc900_spi_setup;

	hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (hw->res == NULL) {
		dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
		err = -ENOENT;
		goto err_pdata;
	}

	hw->ioarea = request_mem_region(hw->res->start,
					resource_size(hw->res), pdev->name);

	if (hw->ioarea == NULL) {
		dev_err(&pdev->dev, "Cannot reserve region\n");
		err = -ENXIO;
		goto err_pdata;
	}

	hw->regs = ioremap(hw->res->start, resource_size(hw->res));
	if (hw->regs == NULL) {
		dev_err(&pdev->dev, "Cannot map IO\n");
		err = -ENXIO;
		goto err_iomap;
	}

	hw->irq = platform_get_irq(pdev, 0);
	if (hw->irq < 0) {
		dev_err(&pdev->dev, "No IRQ specified\n");
		err = -ENOENT;
		goto err_irq;
	}

	err = request_irq(hw->irq, nuc900_spi_irq, 0, pdev->name, hw);
	if (err) {
		dev_err(&pdev->dev, "Cannot claim IRQ\n");
		goto err_irq;
	}

	hw->clk = clk_get(&pdev->dev, "spi");
	if (IS_ERR(hw->clk)) {
		dev_err(&pdev->dev, "No clock for device\n");
		err = PTR_ERR(hw->clk);
		goto err_clk;
	}

	mfp_set_groupg(&pdev->dev);
	nuc900_init_spi(hw);

	err = spi_bitbang_start(&hw->bitbang);
	if (err) {
		dev_err(&pdev->dev, "Failed to register SPI master\n");
		goto err_register;
	}

	return 0;

err_register:
	clk_disable(hw->clk);
	clk_put(hw->clk);
err_clk:
	free_irq(hw->irq, hw);
err_irq:
	iounmap(hw->regs);
err_iomap:
	release_mem_region(hw->res->start, resource_size(hw->res));
	kfree(hw->ioarea);
err_pdata:
	spi_master_put(hw->master);;

err_nomem:
	return err;
}

static int __devexit nuc900_spi_remove(struct platform_device *dev)
{
	struct nuc900_spi *hw = platform_get_drvdata(dev);

	free_irq(hw->irq, hw);

	platform_set_drvdata(dev, NULL);

	spi_unregister_master(hw->master);

	clk_disable(hw->clk);
	clk_put(hw->clk);

	iounmap(hw->regs);

	release_mem_region(hw->res->start, resource_size(hw->res));
	kfree(hw->ioarea);

	spi_master_put(hw->master);
	return 0;
}

static struct platform_driver nuc900_spi_driver = {
	.probe		= nuc900_spi_probe,
	.remove		= __devexit_p(nuc900_spi_remove),
	.driver		= {
		.name	= "nuc900-spi",
		.owner	= THIS_MODULE,
	},
};

static int __init nuc900_spi_init(void)
{
	return platform_driver_register(&nuc900_spi_driver);
}

static void __exit nuc900_spi_exit(void)
{
	platform_driver_unregister(&nuc900_spi_driver);
}

module_init(nuc900_spi_init);
module_exit(nuc900_spi_exit);

MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
MODULE_DESCRIPTION("nuc900 spi driver!");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:nuc900-spi");
Commit	Line	Data
30eaed05 WZ	1	/* linux/drivers/spi/spi_nuc900.c
	2	*
	3	* Copyright (c) 2009 Nuvoton technology.
	4	* Wan ZongShun <mcuos.com@gmail.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
	12	#include <linux/init.h>
	13	#include <linux/spinlock.h>
	14	#include <linux/workqueue.h>
	15	#include <linux/interrupt.h>
	16	#include <linux/delay.h>
	17	#include <linux/errno.h>
	18	#include <linux/err.h>
	19	#include <linux/clk.h>
	20	#include <linux/device.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/gpio.h>
	23	#include <linux/io.h>
5a0e3ad6	24	#include <linux/slab.h>
30eaed05 WZ	25
	26	#include <linux/spi/spi.h>
	27	#include <linux/spi/spi_bitbang.h>
	28
	29	#include <mach/nuc900_spi.h>
	30
	31	/* usi registers offset */
	32	#define USI_CNT 0x00
	33	#define USI_DIV 0x04
	34	#define USI_SSR 0x08
	35	#define USI_RX0 0x10
	36	#define USI_TX0 0x10
	37
	38	/* usi register bit */
	39	#define ENINT (0x01 << 17)
	40	#define ENFLG (0x01 << 16)
	41	#define TXNUM (0x03 << 8)
	42	#define TXNEG (0x01 << 2)
	43	#define RXNEG (0x01 << 1)
	44	#define LSB (0x01 << 10)
	45	#define SELECTLEV (0x01 << 2)
	46	#define SELECTPOL (0x01 << 31)
	47	#define SELECTSLAVE 0x01
	48	#define GOBUSY 0x01
	49
	50	struct nuc900_spi {
	51	struct spi_bitbang bitbang;
	52	struct completion done;
	53	void __iomem *regs;
	54	int irq;
	55	int len;
	56	int count;
	57	const unsigned char *tx;
	58	unsigned char *rx;
	59	struct clk *clk;
	60	struct resource *ioarea;
	61	struct spi_master *master;
	62	struct spi_device *curdev;
	63	struct device *dev;
	64	struct nuc900_spi_info *pdata;
	65	spinlock_t lock;
	66	struct resource *res;
	67	};
	68
	69	static inline struct nuc900_spi to_hw(struct spi_device sdev)
	70	{
	71	return spi_master_get_devdata(sdev->master);
	72	}
	73
	74	static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
	75	{
	76	struct nuc900_spi *hw = to_hw(spi);
	77	unsigned int val;
	78	unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
	79	unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
	80	unsigned long flags;
	81
	82	spin_lock_irqsave(&hw->lock, flags);
	83
	84	val = __raw_readl(hw->regs + USI_SSR);
	85
	86	if (!cs)
	87	val &= ~SELECTLEV;
	88	else
89	val \|= SELECTLEV;
90
91	if (!ssr)
92	val &= ~SELECTSLAVE;
93	else
94	val \|= SELECTSLAVE;
95
96	__raw_writel(val, hw->regs + USI_SSR);
97
98	val = __raw_readl(hw->regs + USI_CNT);
99
100	if (!cpol)
101	val &= ~SELECTPOL;
102	else
103	val \|= SELECTPOL;
104
105	__raw_writel(val, hw->regs + USI_CNT);
106
107	spin_unlock_irqrestore(&hw->lock, flags);
108	}
109
110	static void nuc900_spi_chipsel(struct spi_device *spi, int value)
111	{
112	switch (value) {
113	case BITBANG_CS_INACTIVE:
114	nuc900_slave_select(spi, 0);
115	break;
116
117	case BITBANG_CS_ACTIVE:
118	nuc900_slave_select(spi, 1);
119	break;
120	}
121	}
122
123	static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
124	unsigned int txnum)
125	{
126	unsigned int val;
127	unsigned long flags;
128
129	spin_lock_irqsave(&hw->lock, flags);
130
131	val = __raw_readl(hw->regs + USI_CNT);
132
133	if (!txnum)
134	val &= ~TXNUM;
135	else
136	val \|= txnum << 0x08;
137
138	__raw_writel(val, hw->regs + USI_CNT);
139
140	spin_unlock_irqrestore(&hw->lock, flags);
141
142	}
143
144	static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
145	unsigned int txbitlen)
146	{
147	unsigned int val;
148	unsigned long flags;
149
150	spin_lock_irqsave(&hw->lock, flags);
151
152	val = __raw_readl(hw->regs + USI_CNT);
153
154	val \|= (txbitlen << 0x03);
155
156	__raw_writel(val, hw->regs + USI_CNT);
157
158	spin_unlock_irqrestore(&hw->lock, flags);
159	}
160
161	static void nuc900_spi_gobusy(struct nuc900_spi *hw)
162	{
163	unsigned int val;
164	unsigned long flags;
165
166	spin_lock_irqsave(&hw->lock, flags);
167
168	val = __raw_readl(hw->regs + USI_CNT);
169
170	val \|= GOBUSY;
171
172	__raw_writel(val, hw->regs + USI_CNT);
173
174	spin_unlock_irqrestore(&hw->lock, flags);
175	}
176
177	static int nuc900_spi_setupxfer(struct spi_device *spi,
178	struct spi_transfer *t)
179	{
180	return 0;
181	}
182
183	static int nuc900_spi_setup(struct spi_device *spi)
184	{
185	return 0;
186	}
187
188	static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
189	{
190	return hw->tx ? hw->tx[count] : 0;
191	}
192
193	static int nuc900_spi_txrx(struct spi_device spi, struct spi_transfer t)
194	{
195	struct nuc900_spi *hw = to_hw(spi);
196
197	hw->tx = t->tx_buf;
198	hw->rx = t->rx_buf;
199	hw->len = t->len;
200	hw->count = 0;
201
202	__raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
203
204	nuc900_spi_gobusy(hw);
205
206	wait_for_completion(&hw->done);
207
208	return hw->count;
209	}
210
211	static irqreturn_t nuc900_spi_irq(int irq, void *dev)
212	{
213	struct nuc900_spi *hw = dev;
214	unsigned int status;
215	unsigned int count = hw->count;
216
217	status = __raw_readl(hw->regs + USI_CNT);
218	__raw_writel(status, hw->regs + USI_CNT);
219
220	if (status & ENFLG) {
221	hw->count++;
222
223	if (hw->rx)
224	hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
225	count++;
226
227	if (count < hw->len) {
228	__raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
229	nuc900_spi_gobusy(hw);
230	} else {
231	complete(&hw->done);
232	}
233
234	return IRQ_HANDLED;
235	}
236
237	complete(&hw->done);
238	return IRQ_HANDLED;
239	}
240
241	static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
242	{
243	unsigned int val;
244	unsigned long flags;
245
246	spin_lock_irqsave(&hw->lock, flags);
247
248	val = __raw_readl(hw->regs + USI_CNT);
249
250	if (edge)
251	val \|= TXNEG;
252	else
253	val &= ~TXNEG;
254	__raw_writel(val, hw->regs + USI_CNT);
255
256	spin_unlock_irqrestore(&hw->lock, flags);
257	}
258
259	static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
260	{
261	unsigned int val;
262	unsigned long flags;
263
264	spin_lock_irqsave(&hw->lock, flags);
265
266	val = __raw_readl(hw->regs + USI_CNT);
267
268	if (edge)
269	val \|= RXNEG;
270	else
271	val &= ~RXNEG;
272	__raw_writel(val, hw->regs + USI_CNT);
273
274	spin_unlock_irqrestore(&hw->lock, flags);
275	}
276
277	static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
278	{
279	unsigned int val;
280	unsigned long flags;
281
282	spin_lock_irqsave(&hw->lock, flags);
283
284	val = __raw_readl(hw->regs + USI_CNT);
285
286	if (lsb)
287	val \|= LSB;
288	else
289	val &= ~LSB;
290	__raw_writel(val, hw->regs + USI_CNT);
291
292	spin_unlock_irqrestore(&hw->lock, flags);
293	}
294
295	static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
296	{
297	unsigned int val;
298	unsigned long flags;
299
300	spin_lock_irqsave(&hw->lock, flags);
301
302	val = __raw_readl(hw->regs + USI_CNT);
303
304	if (sleep)
305	val \|= (sleep << 12);
306	else
307	val &= ~(0x0f << 12);
308	__raw_writel(val, hw->regs + USI_CNT);
309
310	spin_unlock_irqrestore(&hw->lock, flags);
311	}
312
313	static void nuc900_enable_int(struct nuc900_spi *hw)
314	{
315	unsigned int val;
316	unsigned long flags;
317
318	spin_lock_irqsave(&hw->lock, flags);
319
320	val = __raw_readl(hw->regs + USI_CNT);
321
322	val \|= ENINT;
323
324	__raw_writel(val, hw->regs + USI_CNT);
325
326	spin_unlock_irqrestore(&hw->lock, flags);
327	}
328
329	static void nuc900_set_divider(struct nuc900_spi *hw)
330	{
331	__raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
332	}
333
334	static void nuc900_init_spi(struct nuc900_spi *hw)
335	{
336	clk_enable(hw->clk);
337	spin_lock_init(&hw->lock);
338
339	nuc900_tx_edge(hw, hw->pdata->txneg);
340	nuc900_rx_edge(hw, hw->pdata->rxneg);
341	nuc900_send_first(hw, hw->pdata->lsb);
342	nuc900_set_sleep(hw, hw->pdata->sleep);
343	nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
344	nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
345	nuc900_set_divider(hw);
346	nuc900_enable_int(hw);
347	}
348
349	static int __devinit nuc900_spi_probe(struct platform_device *pdev)
350	{
351	struct nuc900_spi *hw;
352	struct spi_master *master;
353	int err = 0;
354
355	master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
356	if (master == NULL) {
357	dev_err(&pdev->dev, "No memory for spi_master\n");
358	err = -ENOMEM;
359	goto err_nomem;
360	}
361
362	hw = spi_master_get_devdata(master);
363	memset(hw, 0, sizeof(struct nuc900_spi));
364
365	hw->master = spi_master_get(master);
366	hw->pdata = pdev->dev.platform_data;
367	hw->dev = &pdev->dev;
368
369	if (hw->pdata == NULL) {
370	dev_err(&pdev->dev, "No platform data supplied\n");
371	err = -ENOENT;
372	goto err_pdata;
373	}
374
375	platform_set_drvdata(pdev, hw);
376	init_completion(&hw->done);
377
378	master->mode_bits = SPI_MODE_0;
379	master->num_chipselect = hw->pdata->num_cs;
380	master->bus_num = hw->pdata->bus_num;
381	hw->bitbang.master = hw->master;
382	hw->bitbang.setup_transfer = nuc900_spi_setupxfer;
383	hw->bitbang.chipselect = nuc900_spi_chipsel;
384	hw->bitbang.txrx_bufs = nuc900_spi_txrx;
385	hw->bitbang.master->setup = nuc900_spi_setup;
386
387	hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
388	if (hw->res == NULL) {
389	dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
390	err = -ENOENT;
391	goto err_pdata;
392	}
393
394	hw->ioarea = request_mem_region(hw->res->start,
395	resource_size(hw->res), pdev->name);
396
397	if (hw->ioarea == NULL) {
398	dev_err(&pdev->dev, "Cannot reserve region\n");
399	err = -ENXIO;
400	goto err_pdata;
401	}
402
403	hw->regs = ioremap(hw->res->start, resource_size(hw->res));
404	if (hw->regs == NULL) {
405	dev_err(&pdev->dev, "Cannot map IO\n");
406	err = -ENXIO;
407	goto err_iomap;
408	}
409
410	hw->irq = platform_get_irq(pdev, 0);
411	if (hw->irq < 0) {
412	dev_err(&pdev->dev, "No IRQ specified\n");
413	err = -ENOENT;
414	goto err_irq;
415	}
416
417	err = request_irq(hw->irq, nuc900_spi_irq, 0, pdev->name, hw);
418	if (err) {
419	dev_err(&pdev->dev, "Cannot claim IRQ\n");
420	goto err_irq;
421	}
422
423	hw->clk = clk_get(&pdev->dev, "spi");
424	if (IS_ERR(hw->clk)) {
425	dev_err(&pdev->dev, "No clock for device\n");
426	err = PTR_ERR(hw->clk);
427	goto err_clk;
428	}
429
430	mfp_set_groupg(&pdev->dev);
431	nuc900_init_spi(hw);
432
433	err = spi_bitbang_start(&hw->bitbang);
434	if (err) {
435	dev_err(&pdev->dev, "Failed to register SPI master\n");
436	goto err_register;
437	}
438
439	return 0;
440
441	err_register:
442	clk_disable(hw->clk);
443	clk_put(hw->clk);
444	err_clk:
445	free_irq(hw->irq, hw);
446	err_irq:
447	iounmap(hw->regs);
448	err_iomap:
449	release_mem_region(hw->res->start, resource_size(hw->res));
450	kfree(hw->ioarea);
451	err_pdata:
452	spi_master_put(hw->master);;
453
454	err_nomem:
455	return err;
456	}
457
458	static int __devexit nuc900_spi_remove(struct platform_device *dev)
459	{
460	struct nuc900_spi *hw = platform_get_drvdata(dev);
461
462	free_irq(hw->irq, hw);
463
464	platform_set_drvdata(dev, NULL);
465
466	spi_unregister_master(hw->master);
467
468	clk_disable(hw->clk);
469	clk_put(hw->clk);
470
471	iounmap(hw->regs);
472
473	release_mem_region(hw->res->start, resource_size(hw->res));
474	kfree(hw->ioarea);
475
476	spi_master_put(hw->master);
477	return 0;
478	}
479
480	static struct platform_driver nuc900_spi_driver = {
481	.probe = nuc900_spi_probe,
482	.remove = __devexit_p(nuc900_spi_remove),
483	.driver = {
484	.name = "nuc900-spi",
485	.owner = THIS_MODULE,
486	},
487	};
488
489	static int __init nuc900_spi_init(void)
490	{
491	return platform_driver_register(&nuc900_spi_driver);
492	}
493
494	static void __exit nuc900_spi_exit(void)
495	{
496	platform_driver_unregister(&nuc900_spi_driver);
497	}
498
499	module_init(nuc900_spi_init);
500	module_exit(nuc900_spi_exit);
501
502	MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
503	MODULE_DESCRIPTION("nuc900 spi driver!");
504	MODULE_LICENSE("GPL");
505	MODULE_ALIAS("platform:nuc900-spi");