[net-next-2.6.git] / drivers / serial / altera_uart.c

/*
 * altera_uart.c -- Altera UART driver
 *
 * Based on mcf.c -- Freescale ColdFire UART driver
 *
 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/console.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/altera_uart.h>

#define DRV_NAME "altera_uart"
#define SERIAL_ALTERA_MAJOR 204
#define SERIAL_ALTERA_MINOR 213

/*
 * Altera UART register definitions according to the Nios UART datasheet:
 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
 */

#define ALTERA_UART_SIZE		32

#define ALTERA_UART_RXDATA_REG		0
#define ALTERA_UART_TXDATA_REG		4
#define ALTERA_UART_STATUS_REG		8
#define ALTERA_UART_CONTROL_REG		12
#define ALTERA_UART_DIVISOR_REG		16
#define ALTERA_UART_EOP_REG		20

#define ALTERA_UART_STATUS_PE_MSK	0x0001	/* parity error */
#define ALTERA_UART_STATUS_FE_MSK	0x0002	/* framing error */
#define ALTERA_UART_STATUS_BRK_MSK	0x0004	/* break */
#define ALTERA_UART_STATUS_ROE_MSK	0x0008	/* RX overrun error */
#define ALTERA_UART_STATUS_TOE_MSK	0x0010	/* TX overrun error */
#define ALTERA_UART_STATUS_TMT_MSK	0x0020	/* TX shift register state */
#define ALTERA_UART_STATUS_TRDY_MSK	0x0040	/* TX ready */
#define ALTERA_UART_STATUS_RRDY_MSK	0x0080	/* RX ready */
#define ALTERA_UART_STATUS_E_MSK	0x0100	/* exception condition */
#define ALTERA_UART_STATUS_DCTS_MSK	0x0400	/* CTS logic-level change */
#define ALTERA_UART_STATUS_CTS_MSK	0x0800	/* CTS logic state */
#define ALTERA_UART_STATUS_EOP_MSK	0x1000	/* EOP written/read */

						/* Enable interrupt on... */
#define ALTERA_UART_CONTROL_PE_MSK	0x0001	/* ...parity error */
#define ALTERA_UART_CONTROL_FE_MSK	0x0002	/* ...framing error */
#define ALTERA_UART_CONTROL_BRK_MSK	0x0004	/* ...break */
#define ALTERA_UART_CONTROL_ROE_MSK	0x0008	/* ...RX overrun */
#define ALTERA_UART_CONTROL_TOE_MSK	0x0010	/* ...TX overrun */
#define ALTERA_UART_CONTROL_TMT_MSK	0x0020	/* ...TX shift register empty */
#define ALTERA_UART_CONTROL_TRDY_MSK	0x0040	/* ...TX ready */
#define ALTERA_UART_CONTROL_RRDY_MSK	0x0080	/* ...RX ready */
#define ALTERA_UART_CONTROL_E_MSK	0x0100	/* ...exception*/

#define ALTERA_UART_CONTROL_TRBK_MSK	0x0200	/* TX break */
#define ALTERA_UART_CONTROL_DCTS_MSK	0x0400	/* Interrupt on CTS change */
#define ALTERA_UART_CONTROL_RTS_MSK	0x0800	/* RTS signal */
#define ALTERA_UART_CONTROL_EOP_MSK	0x1000	/* Interrupt on EOP */

/*
 * Local per-uart structure.
 */
struct altera_uart {
	struct uart_port port;
	struct timer_list tmr;
	unsigned int sigs;	/* Local copy of line sigs */
	unsigned short imr;	/* Local IMR mirror */
};

static u32 altera_uart_readl(struct uart_port *port, int reg)
{
	struct altera_uart_platform_uart *platp = port->private_data;

	return readl(port->membase + (reg << platp->bus_shift));
}

static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
{
	struct altera_uart_platform_uart *platp = port->private_data;

	writel(dat, port->membase + (reg << platp->bus_shift));
}

static unsigned int altera_uart_tx_empty(struct uart_port *port)
{
	return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
		ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
}

static unsigned int altera_uart_get_mctrl(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned int sigs;

	sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
	     ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
	sigs |= (pp->sigs & TIOCM_RTS);

	return sigs;
}

static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->sigs = sigs;
	if (sigs & TIOCM_RTS)
		pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
	else
		pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_start_tx(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_stop_tx(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_stop_rx(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_break_ctl(struct uart_port *port, int break_state)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;

	spin_lock_irqsave(&port->lock, flags);
	if (break_state == -1)
		pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
	else
		pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
	spin_unlock_irqrestore(&port->lock, flags);
}

static void altera_uart_enable_ms(struct uart_port *port)
{
}

static void altera_uart_set_termios(struct uart_port *port,
				    struct ktermios *termios,
				    struct ktermios *old)
{
	unsigned long flags;
	unsigned int baud, baudclk;

	baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
	baudclk = port->uartclk / baud;

	if (old)
		tty_termios_copy_hw(termios, old);
	tty_termios_encode_baud_rate(termios, baud, baud);

	spin_lock_irqsave(&port->lock, flags);
	uart_update_timeout(port, termios->c_cflag, baud);
	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
	spin_unlock_irqrestore(&port->lock, flags);
}

static void altera_uart_rx_chars(struct altera_uart *pp)
{
	struct uart_port *port = &pp->port;
	unsigned char ch, flag;
	unsigned short status;

	while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
	       ALTERA_UART_STATUS_RRDY_MSK) {
		ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
		flag = TTY_NORMAL;
		port->icount.rx++;

		if (status & ALTERA_UART_STATUS_E_MSK) {
			altera_uart_writel(port, status,
					   ALTERA_UART_STATUS_REG);

			if (status & ALTERA_UART_STATUS_BRK_MSK) {
				port->icount.brk++;
				if (uart_handle_break(port))
					continue;
			} else if (status & ALTERA_UART_STATUS_PE_MSK) {
				port->icount.parity++;
			} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
				port->icount.overrun++;
			} else if (status & ALTERA_UART_STATUS_FE_MSK) {
				port->icount.frame++;
			}

			status &= port->read_status_mask;

			if (status & ALTERA_UART_STATUS_BRK_MSK)
				flag = TTY_BREAK;
			else if (status & ALTERA_UART_STATUS_PE_MSK)
				flag = TTY_PARITY;
			else if (status & ALTERA_UART_STATUS_FE_MSK)
				flag = TTY_FRAME;
		}

		if (uart_handle_sysrq_char(port, ch))
			continue;
		uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
				 flag);
	}

	tty_flip_buffer_push(port->state->port.tty);
}

static void altera_uart_tx_chars(struct altera_uart *pp)
{
	struct uart_port *port = &pp->port;
	struct circ_buf *xmit = &port->state->xmit;

	if (port->x_char) {
		/* Send special char - probably flow control */
		altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
		port->x_char = 0;
		port->icount.tx++;
		return;
	}

	while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
	       ALTERA_UART_STATUS_TRDY_MSK) {
		if (xmit->head == xmit->tail)
			break;
		altera_uart_writel(port, xmit->buf[xmit->tail],
		       ALTERA_UART_TXDATA_REG);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
	}

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (xmit->head == xmit->tail) {
		pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
		altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
	}
}

static irqreturn_t altera_uart_interrupt(int irq, void *data)
{
	struct uart_port *port = data;
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned int isr;

	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;

	spin_lock(&port->lock);
	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
		altera_uart_rx_chars(pp);
	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
		altera_uart_tx_chars(pp);
	spin_unlock(&port->lock);

	return IRQ_RETVAL(isr);
}

static void altera_uart_timer(unsigned long data)
{
	struct uart_port *port = (void *)data;
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	altera_uart_interrupt(0, port);
	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
}

static void altera_uart_config_port(struct uart_port *port, int flags)
{
	port->type = PORT_ALTERA_UART;

	/* Clear mask, so no surprise interrupts. */
	altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
	/* Clear status register */
	altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
}

static int altera_uart_startup(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;
	int ret;

	if (!port->irq) {
		setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
		mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
		return 0;
	}

	ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
			DRV_NAME, port);
	if (ret) {
		pr_err(DRV_NAME ": unable to attach Altera UART %d "
		       "interrupt vector=%d\n", port->line, port->irq);
		return ret;
	}

	spin_lock_irqsave(&port->lock, flags);

	/* Enable RX interrupts now */
	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);

	spin_unlock_irqrestore(&port->lock, flags);

	return 0;
}

static void altera_uart_shutdown(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;

	spin_lock_irqsave(&port->lock, flags);

	/* Disable all interrupts now */
	pp->imr = 0;
	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);

	spin_unlock_irqrestore(&port->lock, flags);

	if (port->irq)
		free_irq(port->irq, port);
	else
		del_timer_sync(&pp->tmr);
}

static const char *altera_uart_type(struct uart_port *port)
{
	return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
}

static int altera_uart_request_port(struct uart_port *port)
{
	/* UARTs always present */
	return 0;
}

static void altera_uart_release_port(struct uart_port *port)
{
	/* Nothing to release... */
}

static int altera_uart_verify_port(struct uart_port *port,
				   struct serial_struct *ser)
{
	if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
		return -EINVAL;
	return 0;
}

/*
 *	Define the basic serial functions we support.
 */
static struct uart_ops altera_uart_ops = {
	.tx_empty	= altera_uart_tx_empty,
	.get_mctrl	= altera_uart_get_mctrl,
	.set_mctrl	= altera_uart_set_mctrl,
	.start_tx	= altera_uart_start_tx,
	.stop_tx	= altera_uart_stop_tx,
	.stop_rx	= altera_uart_stop_rx,
	.enable_ms	= altera_uart_enable_ms,
	.break_ctl	= altera_uart_break_ctl,
	.startup	= altera_uart_startup,
	.shutdown	= altera_uart_shutdown,
	.set_termios	= altera_uart_set_termios,
	.type		= altera_uart_type,
	.request_port	= altera_uart_request_port,
	.release_port	= altera_uart_release_port,
	.config_port	= altera_uart_config_port,
	.verify_port	= altera_uart_verify_port,
};

static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];

#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)

int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
{
	struct uart_port *port;
	int i;

	for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
		port = &altera_uart_ports[i].port;

		port->line = i;
		port->type = PORT_ALTERA_UART;
		port->mapbase = platp[i].mapbase;
		port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
		port->iotype = SERIAL_IO_MEM;
		port->irq = platp[i].irq;
		port->uartclk = platp[i].uartclk;
		port->flags = UPF_BOOT_AUTOCONF;
		port->ops = &altera_uart_ops;
		port->private_data = platp;
	}

	return 0;
}

static void altera_uart_console_putc(struct uart_port *port, const char c)
{
	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
		 ALTERA_UART_STATUS_TRDY_MSK))
		cpu_relax();

	writel(c, port->membase + ALTERA_UART_TXDATA_REG);
}

static void altera_uart_console_write(struct console *co, const char *s,
				      unsigned int count)
{
	struct uart_port *port = &(altera_uart_ports + co->index)->port;

	for (; count; count--, s++) {
		altera_uart_console_putc(port, *s);
		if (*s == '\n')
			altera_uart_console_putc(port, '\r');
	}
}

static int __init altera_uart_console_setup(struct console *co, char *options)
{
	struct uart_port *port;
	int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
		return -EINVAL;
	port = &altera_uart_ports[co->index].port;
	if (!port->membase)
		return -ENODEV;

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

static struct uart_driver altera_uart_driver;

static struct console altera_uart_console = {
	.name	= "ttyAL",
	.write	= altera_uart_console_write,
	.device	= uart_console_device,
	.setup	= altera_uart_console_setup,
	.flags	= CON_PRINTBUFFER,
	.index	= -1,
	.data	= &altera_uart_driver,
};

static int __init altera_uart_console_init(void)
{
	register_console(&altera_uart_console);
	return 0;
}

console_initcall(altera_uart_console_init);

#define	ALTERA_UART_CONSOLE	(&altera_uart_console)

#else

#define	ALTERA_UART_CONSOLE	NULL

#endif /* CONFIG_ALTERA_UART_CONSOLE */

/*
 *	Define the altera_uart UART driver structure.
 */
static struct uart_driver altera_uart_driver = {
	.owner		= THIS_MODULE,
	.driver_name	= DRV_NAME,
	.dev_name	= "ttyAL",
	.major		= SERIAL_ALTERA_MAJOR,
	.minor		= SERIAL_ALTERA_MINOR,
	.nr		= CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
	.cons		= ALTERA_UART_CONSOLE,
};

static int __devinit altera_uart_probe(struct platform_device *pdev)
{
	struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
	struct uart_port *port;
	struct resource *res_mem;
	struct resource *res_irq;
	int i = pdev->id;

	/* -1 emphasizes that the platform must have one port, no .N suffix */
	if (i == -1)
		i = 0;

	if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
		return -EINVAL;

	port = &altera_uart_ports[i].port;

	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res_mem)
		port->mapbase = res_mem->start;
	else if (platp->mapbase)
		port->mapbase = platp->mapbase;
	else
		return -EINVAL;

	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (res_irq)
		port->irq = res_irq->start;
	else if (platp->irq)
		port->irq = platp->irq;

	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
	if (!port->membase)
		return -ENOMEM;

	port->line = i;
	port->type = PORT_ALTERA_UART;
	port->iotype = SERIAL_IO_MEM;
	port->uartclk = platp->uartclk;
	port->ops = &altera_uart_ops;
	port->flags = UPF_BOOT_AUTOCONF;
	port->private_data = platp;

	uart_add_one_port(&altera_uart_driver, port);

	return 0;
}

static int __devexit altera_uart_remove(struct platform_device *pdev)
{
	struct uart_port *port = &altera_uart_ports[pdev->id].port;

	uart_remove_one_port(&altera_uart_driver, port);
	return 0;
}

static struct platform_driver altera_uart_platform_driver = {
	.probe	= altera_uart_probe,
	.remove	= __devexit_p(altera_uart_remove),
	.driver	= {
		.name	= DRV_NAME,
		.owner	= THIS_MODULE,
		.pm	= NULL,
	},
};

static int __init altera_uart_init(void)
{
	int rc;

	rc = uart_register_driver(&altera_uart_driver);
	if (rc)
		return rc;
	rc = platform_driver_register(&altera_uart_platform_driver);
	if (rc) {
		uart_unregister_driver(&altera_uart_driver);
		return rc;
	}
	return 0;
}

static void __exit altera_uart_exit(void)
{
	platform_driver_unregister(&altera_uart_platform_driver);
	uart_unregister_driver(&altera_uart_driver);
}

module_init(altera_uart_init);
module_exit(altera_uart_exit);

MODULE_DESCRIPTION("Altera UART driver");
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
Commit	Line	Data
6b7d8f8b TK	1	/*
	2	* altera_uart.c -- Altera UART driver
	3	*
	4	* Based on mcf.c -- Freescale ColdFire UART driver
	5	*
	6	* (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
	7	* (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
	8	* (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*/
	15
	16	#include <linux/kernel.h>
	17	#include <linux/init.h>
2f8b9c15	18	#include <linux/timer.h>
6b7d8f8b TK	19	#include <linux/interrupt.h>
	20	#include <linux/module.h>
	21	#include <linux/console.h>
	22	#include <linux/tty.h>
	23	#include <linux/tty_flip.h>
	24	#include <linux/serial.h>
	25	#include <linux/serial_core.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/io.h>
	28	#include <linux/altera_uart.h>
	29
	30	#define DRV_NAME "altera_uart"
99793c66 AV	31	#define SERIAL_ALTERA_MAJOR 204
99793c66 AV	32	#define SERIAL_ALTERA_MINOR 213
6b7d8f8b TK	33
	34	/*
	35	* Altera UART register definitions according to the Nios UART datasheet:
	36	* http://www.altera.com/literature/ds/ds_nios_uart.pdf
	37	*/
	38
	39	#define ALTERA_UART_SIZE 32
	40
	41	#define ALTERA_UART_RXDATA_REG 0
	42	#define ALTERA_UART_TXDATA_REG 4
	43	#define ALTERA_UART_STATUS_REG 8
	44	#define ALTERA_UART_CONTROL_REG 12
	45	#define ALTERA_UART_DIVISOR_REG 16
	46	#define ALTERA_UART_EOP_REG 20
	47
	48	#define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
	49	#define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
	50	#define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
	51	#define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
	52	#define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
	53	#define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
	54	#define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
	55	#define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
	56	#define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
	57	#define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
	58	#define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
	59	#define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
	60
	61	/* Enable interrupt on... */
	62	#define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
	63	#define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
	64	#define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
	65	#define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
	66	#define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
	67	#define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
	68	#define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
	69	#define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
	70	#define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
	71
	72	#define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
	73	#define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
	74	#define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
	75	#define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
	76
	77	/*
	78	* Local per-uart structure.
	79	*/
	80	struct altera_uart {
	81	struct uart_port port;
2f8b9c15	82	struct timer_list tmr;
6b7d8f8b TK	83	unsigned int sigs; /* Local copy of line sigs */
	84	unsigned short imr; /* Local IMR mirror */
	85	};
	86
0d426eda AV	87	static u32 altera_uart_readl(struct uart_port *port, int reg)
	88	{
	89	struct altera_uart_platform_uart *platp = port->private_data;
	90
	91	return readl(port->membase + (reg << platp->bus_shift));
	92	}
	93
	94	static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
	95	{
	96	struct altera_uart_platform_uart *platp = port->private_data;
	97
	98	writel(dat, port->membase + (reg << platp->bus_shift));
	99	}
	100
6b7d8f8b TK	101	static unsigned int altera_uart_tx_empty(struct uart_port *port)
6b7d8f8b TK	102	{
0d426eda	103	return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
6b7d8f8b TK	104	ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
	105	}
	106
	107	static unsigned int altera_uart_get_mctrl(struct uart_port *port)
	108	{
	109	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b TK	110	unsigned int sigs;
6b7d8f8b TK	111
0d426eda	112	sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
6b7d8f8b TK	113	ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
6b7d8f8b TK	114	sigs \|= (pp->sigs & TIOCM_RTS);
6b7d8f8b TK	115
	116	return sigs;
	117	}
	118
	119	static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
	120	{
	121	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	122
6b7d8f8b TK	123	pp->sigs = sigs;
	124	if (sigs & TIOCM_RTS)
	125	pp->imr \|= ALTERA_UART_CONTROL_RTS_MSK;
	126	else
	127	pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
0d426eda	128	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	129	}
	130
	131	static void altera_uart_start_tx(struct uart_port *port)
	132	{
	133	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	134
6b7d8f8b	135	pp->imr \|= ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda	136	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	137	}
	138
	139	static void altera_uart_stop_tx(struct uart_port *port)
	140	{
	141	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	142
6b7d8f8b	143	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda	144	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	145	}
	146
	147	static void altera_uart_stop_rx(struct uart_port *port)
	148	{
	149	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	150
6b7d8f8b	151	pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
0d426eda	152	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	153	}
	154
	155	static void altera_uart_break_ctl(struct uart_port *port, int break_state)
	156	{
	157	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	158	unsigned long flags;
	159
	160	spin_lock_irqsave(&port->lock, flags);
	161	if (break_state == -1)
	162	pp->imr \|= ALTERA_UART_CONTROL_TRBK_MSK;
	163	else
	164	pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
0d426eda	165	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	166	spin_unlock_irqrestore(&port->lock, flags);
	167	}
	168
	169	static void altera_uart_enable_ms(struct uart_port *port)
	170	{
	171	}
	172
	173	static void altera_uart_set_termios(struct uart_port *port,
	174	struct ktermios *termios,
	175	struct ktermios *old)
	176	{
	177	unsigned long flags;
	178	unsigned int baud, baudclk;
	179
	180	baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
	181	baudclk = port->uartclk / baud;
	182
	183	if (old)
	184	tty_termios_copy_hw(termios, old);
	185	tty_termios_encode_baud_rate(termios, baud, baud);
	186
	187	spin_lock_irqsave(&port->lock, flags);
2f8b9c15	188	uart_update_timeout(port, termios->c_cflag, baud);
0d426eda	189	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
6b7d8f8b TK	190	spin_unlock_irqrestore(&port->lock, flags);
	191	}
	192
	193	static void altera_uart_rx_chars(struct altera_uart *pp)
	194	{
	195	struct uart_port *port = &pp->port;
	196	unsigned char ch, flag;
	197	unsigned short status;
	198
0d426eda	199	while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
6b7d8f8b	200	ALTERA_UART_STATUS_RRDY_MSK) {
0d426eda	201	ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
6b7d8f8b TK	202	flag = TTY_NORMAL;
	203	port->icount.rx++;
	204
	205	if (status & ALTERA_UART_STATUS_E_MSK) {
0d426eda AV	206	altera_uart_writel(port, status,
0d426eda AV	207	ALTERA_UART_STATUS_REG);
6b7d8f8b TK	208
	209	if (status & ALTERA_UART_STATUS_BRK_MSK) {
	210	port->icount.brk++;
	211	if (uart_handle_break(port))
	212	continue;
	213	} else if (status & ALTERA_UART_STATUS_PE_MSK) {
	214	port->icount.parity++;
	215	} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
	216	port->icount.overrun++;
	217	} else if (status & ALTERA_UART_STATUS_FE_MSK) {
	218	port->icount.frame++;
	219	}
	220
	221	status &= port->read_status_mask;
	222
	223	if (status & ALTERA_UART_STATUS_BRK_MSK)
	224	flag = TTY_BREAK;
	225	else if (status & ALTERA_UART_STATUS_PE_MSK)
	226	flag = TTY_PARITY;
	227	else if (status & ALTERA_UART_STATUS_FE_MSK)
	228	flag = TTY_FRAME;
	229	}
	230
	231	if (uart_handle_sysrq_char(port, ch))
	232	continue;
	233	uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
	234	flag);
	235	}
	236
	237	tty_flip_buffer_push(port->state->port.tty);
	238	}
	239
	240	static void altera_uart_tx_chars(struct altera_uart *pp)
	241	{
	242	struct uart_port *port = &pp->port;
	243	struct circ_buf *xmit = &port->state->xmit;
	244
	245	if (port->x_char) {
	246	/* Send special char - probably flow control */
0d426eda	247	altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
6b7d8f8b TK	248	port->x_char = 0;
	249	port->icount.tx++;
	250	return;
	251	}
	252
0d426eda	253	while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
6b7d8f8b TK	254	ALTERA_UART_STATUS_TRDY_MSK) {
	255	if (xmit->head == xmit->tail)
	256	break;
0d426eda AV	257	altera_uart_writel(port, xmit->buf[xmit->tail],
0d426eda AV	258	ALTERA_UART_TXDATA_REG);
6b7d8f8b TK	259	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	260	port->icount.tx++;
	261	}
	262
	263	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	264	uart_write_wakeup(port);
	265
	266	if (xmit->head == xmit->tail) {
	267	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda	268	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	269	}
	270	}
	271
	272	static irqreturn_t altera_uart_interrupt(int irq, void *data)
	273	{
	274	struct uart_port *port = data;
	275	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	276	unsigned int isr;
	277
0d426eda	278	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
d8d721f4 TK	279
d8d721f4 TK	280	spin_lock(&port->lock);
6b7d8f8b TK	281	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
	282	altera_uart_rx_chars(pp);
	283	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
	284	altera_uart_tx_chars(pp);
d8d721f4 TK	285	spin_unlock(&port->lock);
d8d721f4 TK	286
6b7d8f8b TK	287	return IRQ_RETVAL(isr);
	288	}
	289
2f8b9c15 AV	290	static void altera_uart_timer(unsigned long data)
	291	{
	292	struct uart_port port = (void )data;
	293	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	294
	295	altera_uart_interrupt(0, port);
	296	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
	297	}
	298
6b7d8f8b TK	299	static void altera_uart_config_port(struct uart_port *port, int flags)
	300	{
	301	port->type = PORT_ALTERA_UART;
	302
	303	/* Clear mask, so no surprise interrupts. */
0d426eda	304	altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
6b7d8f8b	305	/* Clear status register */
0d426eda	306	altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
6b7d8f8b TK	307	}
	308
	309	static int altera_uart_startup(struct uart_port *port)
	310	{
	311	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	312	unsigned long flags;
	313	int ret;
	314
2f8b9c15 AV	315	if (!port->irq) {
	316	setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
	317	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
	318	return 0;
	319	}
	320
6b7d8f8b TK	321	ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
	322	DRV_NAME, port);
	323	if (ret) {
	324	pr_err(DRV_NAME ": unable to attach Altera UART %d "
	325	"interrupt vector=%d\n", port->line, port->irq);
	326	return ret;
	327	}
	328
	329	spin_lock_irqsave(&port->lock, flags);
	330
	331	/* Enable RX interrupts now */
	332	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
	333	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
	334
	335	spin_unlock_irqrestore(&port->lock, flags);
	336
	337	return 0;
	338	}
	339
	340	static void altera_uart_shutdown(struct uart_port *port)
	341	{
	342	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	343	unsigned long flags;
	344
	345	spin_lock_irqsave(&port->lock, flags);
	346
	347	/* Disable all interrupts now */
	348	pp->imr = 0;
	349	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
	350
	351	spin_unlock_irqrestore(&port->lock, flags);
	352
2f8b9c15 AV	353	if (port->irq)
	354	free_irq(port->irq, port);
	355	else
	356	del_timer_sync(&pp->tmr);
6b7d8f8b TK	357	}
	358
	359	static const char altera_uart_type(struct uart_port port)
	360	{
	361	return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
	362	}
	363
	364	static int altera_uart_request_port(struct uart_port *port)
	365	{
	366	/* UARTs always present */
	367	return 0;
	368	}
	369
	370	static void altera_uart_release_port(struct uart_port *port)
	371	{
	372	/* Nothing to release... */
	373	}
	374
	375	static int altera_uart_verify_port(struct uart_port *port,
	376	struct serial_struct *ser)
	377	{
	378	if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
	379	return -EINVAL;
	380	return 0;
	381	}
	382
	383	/*
	384	* Define the basic serial functions we support.
	385	*/
	386	static struct uart_ops altera_uart_ops = {
	387	.tx_empty = altera_uart_tx_empty,
	388	.get_mctrl = altera_uart_get_mctrl,
	389	.set_mctrl = altera_uart_set_mctrl,
	390	.start_tx = altera_uart_start_tx,
	391	.stop_tx = altera_uart_stop_tx,
	392	.stop_rx = altera_uart_stop_rx,
	393	.enable_ms = altera_uart_enable_ms,
	394	.break_ctl = altera_uart_break_ctl,
	395	.startup = altera_uart_startup,
	396	.shutdown = altera_uart_shutdown,
	397	.set_termios = altera_uart_set_termios,
	398	.type = altera_uart_type,
	399	.request_port = altera_uart_request_port,
	400	.release_port = altera_uart_release_port,
	401	.config_port = altera_uart_config_port,
	402	.verify_port = altera_uart_verify_port,
	403	};
	404
	405	static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
	406
	407	#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
	408
	409	int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
	410	{
	411	struct uart_port *port;
	412	int i;
	413
	414	for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
	415	port = &altera_uart_ports[i].port;
	416
	417	port->line = i;
	418	port->type = PORT_ALTERA_UART;
	419	port->mapbase = platp[i].mapbase;
	420	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
421	port->iotype = SERIAL_IO_MEM;
422	port->irq = platp[i].irq;
423	port->uartclk = platp[i].uartclk;
288e9feb	424	port->flags = UPF_BOOT_AUTOCONF;
6b7d8f8b	425	port->ops = &altera_uart_ops;
0d426eda	426	port->private_data = platp;
6b7d8f8b TK	427	}
	428
	429	return 0;
	430	}
	431
fadf34f0	432	static void altera_uart_console_putc(struct uart_port *port, const char c)
6b7d8f8b	433	{
0d426eda	434	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
e8dd4757	435	ALTERA_UART_STATUS_TRDY_MSK))
fadf34f0	436	cpu_relax();
6b7d8f8b	437
6b7d8f8b	438	writel(c, port->membase + ALTERA_UART_TXDATA_REG);
6b7d8f8b TK	439	}
	440
	441	static void altera_uart_console_write(struct console co, const char s,
	442	unsigned int count)
	443	{
fadf34f0 TK	444	struct uart_port *port = &(altera_uart_ports + co->index)->port;
fadf34f0 TK	445
6b7d8f8b	446	for (; count; count--, s++) {
fadf34f0	447	altera_uart_console_putc(port, *s);
6b7d8f8b	448	if (*s == '\n')
fadf34f0	449	altera_uart_console_putc(port, '\r');
6b7d8f8b TK	450	}
	451	}
	452
	453	static int __init altera_uart_console_setup(struct console co, char options)
	454	{
	455	struct uart_port *port;
	456	int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
	457	int bits = 8;
	458	int parity = 'n';
	459	int flow = 'n';
	460
	461	if (co->index < 0 \|\| co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
	462	return -EINVAL;
	463	port = &altera_uart_ports[co->index].port;
70eebd0b	464	if (!port->membase)
6b7d8f8b TK	465	return -ENODEV;
	466
	467	if (options)
	468	uart_parse_options(options, &baud, &parity, &bits, &flow);
	469
	470	return uart_set_options(port, co, baud, parity, bits, flow);
	471	}
	472
	473	static struct uart_driver altera_uart_driver;
	474
	475	static struct console altera_uart_console = {
99793c66	476	.name = "ttyAL",
6b7d8f8b TK	477	.write = altera_uart_console_write,
	478	.device = uart_console_device,
	479	.setup = altera_uart_console_setup,
	480	.flags = CON_PRINTBUFFER,
	481	.index = -1,
	482	.data = &altera_uart_driver,
	483	};
	484
	485	static int __init altera_uart_console_init(void)
	486	{
	487	register_console(&altera_uart_console);
	488	return 0;
	489	}
	490
	491	console_initcall(altera_uart_console_init);
	492
	493	#define ALTERA_UART_CONSOLE (&altera_uart_console)
	494
	495	#else
	496
	497	#define ALTERA_UART_CONSOLE NULL
	498
	499	#endif /* CONFIG_ALTERA_UART_CONSOLE */
	500
	501	/*
	502	* Define the altera_uart UART driver structure.
	503	*/
	504	static struct uart_driver altera_uart_driver = {
	505	.owner = THIS_MODULE,
	506	.driver_name = DRV_NAME,
99793c66 AV	507	.dev_name = "ttyAL",
	508	.major = SERIAL_ALTERA_MAJOR,
	509	.minor = SERIAL_ALTERA_MINOR,
6b7d8f8b TK	510	.nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
	511	.cons = ALTERA_UART_CONSOLE,
	512	};
	513
	514	static int __devinit altera_uart_probe(struct platform_device *pdev)
	515	{
	516	struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
	517	struct uart_port *port;
6b5756f1 AV	518	struct resource *res_mem;
	519	struct resource *res_irq;
	520	int i = pdev->id;
6b7d8f8b	521
6b5756f1 AV	522	/* -1 emphasizes that the platform must have one port, no .N suffix */
	523	if (i == -1)
	524	i = 0;
6b7d8f8b	525
6b5756f1 AV	526	if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
6b5756f1 AV	527	return -EINVAL;
6b7d8f8b	528
6b5756f1 AV	529	port = &altera_uart_ports[i].port;
	530
	531	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	532	if (res_mem)
	533	port->mapbase = res_mem->start;
	534	else if (platp->mapbase)
	535	port->mapbase = platp->mapbase;
	536	else
	537	return -EINVAL;
	538
	539	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	540	if (res_irq)
	541	port->irq = res_irq->start;
	542	else if (platp->irq)
	543	port->irq = platp->irq;
	544
	545	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
	546	if (!port->membase)
	547	return -ENOMEM;
	548
	549	port->line = i;
	550	port->type = PORT_ALTERA_UART;
	551	port->iotype = SERIAL_IO_MEM;
	552	port->uartclk = platp->uartclk;
	553	port->ops = &altera_uart_ops;
288e9feb	554	port->flags = UPF_BOOT_AUTOCONF;
0d426eda	555	port->private_data = platp;
6b5756f1 AV	556
6b5756f1 AV	557	uart_add_one_port(&altera_uart_driver, port);
6b7d8f8b TK	558
	559	return 0;
	560	}
	561
c1bfffa9	562	static int __devexit altera_uart_remove(struct platform_device *pdev)
6b7d8f8b	563	{
6b5756f1	564	struct uart_port *port = &altera_uart_ports[pdev->id].port;
6b7d8f8b	565
6b5756f1	566	uart_remove_one_port(&altera_uart_driver, port);
6b7d8f8b TK	567	return 0;
	568	}
	569
	570	static struct platform_driver altera_uart_platform_driver = {
	571	.probe = altera_uart_probe,
	572	.remove = __devexit_p(altera_uart_remove),
	573	.driver = {
	574	.name = DRV_NAME,
	575	.owner = THIS_MODULE,
	576	.pm = NULL,
	577	},
	578	};
	579
	580	static int __init altera_uart_init(void)
	581	{
	582	int rc;
	583
	584	rc = uart_register_driver(&altera_uart_driver);
	585	if (rc)
	586	return rc;
	587	rc = platform_driver_register(&altera_uart_platform_driver);
	588	if (rc) {
	589	uart_unregister_driver(&altera_uart_driver);
	590	return rc;
	591	}
	592	return 0;
	593	}
	594
	595	static void __exit altera_uart_exit(void)
	596	{
	597	platform_driver_unregister(&altera_uart_platform_driver);
	598	uart_unregister_driver(&altera_uart_driver);
	599	}
	600
	601	module_init(altera_uart_init);
	602	module_exit(altera_uart_exit);
	603
	604	MODULE_DESCRIPTION("Altera UART driver");
	605	MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
	606	MODULE_LICENSE("GPL");
	607	MODULE_ALIAS("platform:" DRV_NAME);
99793c66	608	MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);