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PCI: hotplug/cpqphp, fix NULL dereference
[net-next-2.6.git] / drivers / pci / hotplug / cpqphp_core.c
CommitLineData
1da177e4
LT
1/*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
861fefbf 28 * Torben Mathiasen <torben.mathiasen@hp.com>
1da177e4
LT
29 */
30
1da177e4
LT
31#include <linux/module.h>
32#include <linux/moduleparam.h>
33#include <linux/kernel.h>
34#include <linux/types.h>
35#include <linux/proc_fs.h>
36#include <linux/slab.h>
37#include <linux/workqueue.h>
38#include <linux/pci.h>
7a54f25c 39#include <linux/pci_hotplug.h>
1da177e4
LT
40#include <linux/init.h>
41#include <linux/interrupt.h>
42
43#include <asm/uaccess.h>
44
45#include "cpqphp.h"
46#include "cpqphp_nvram.h"
1da177e4
LT
47
48
49/* Global variables */
50int cpqhp_debug;
51int cpqhp_legacy_mode;
52struct controller *cpqhp_ctrl_list; /* = NULL */
53struct pci_func *cpqhp_slot_list[256];
b019ee67 54struct irq_routing_table *cpqhp_routing_table;
1da177e4
LT
55
56/* local variables */
57static void __iomem *smbios_table;
58static void __iomem *smbios_start;
59static void __iomem *cpqhp_rom_start;
60static int power_mode;
61static int debug;
4002307d 62static int initialized;
1da177e4
LT
63
64#define DRIVER_VERSION "0.9.8"
65#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66#define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
67
68MODULE_AUTHOR(DRIVER_AUTHOR);
69MODULE_DESCRIPTION(DRIVER_DESC);
70MODULE_LICENSE("GPL");
71
72module_param(power_mode, bool, 0644);
73MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
74
75module_param(debug, bool, 0644);
76MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
77
78#define CPQHPC_MODULE_MINOR 208
79
1da177e4
LT
80static inline int is_slot64bit(struct slot *slot)
81{
82 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
83}
84
85static inline int is_slot66mhz(struct slot *slot)
86{
87 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
88}
89
90/**
91 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
1da177e4
LT
92 * @begin: begin pointer for region to be scanned.
93 * @end: end pointer for region to be scanned.
94 *
26e6c66e 95 * Returns pointer to the head of the SMBIOS tables (or %NULL).
1da177e4
LT
96 */
97static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
98{
99 void __iomem *fp;
100 void __iomem *endp;
101 u8 temp1, temp2, temp3, temp4;
102 int status = 0;
103
104 endp = (end - sizeof(u32) + 1);
105
106 for (fp = begin; fp <= endp; fp += 16) {
107 temp1 = readb(fp);
108 temp2 = readb(fp+1);
109 temp3 = readb(fp+2);
110 temp4 = readb(fp+3);
111 if (temp1 == '_' &&
112 temp2 == 'S' &&
113 temp3 == 'M' &&
114 temp4 == '_') {
115 status = 1;
116 break;
117 }
118 }
861fefbf 119
1da177e4
LT
120 if (!status)
121 fp = NULL;
122
123 dbg("Discovered SMBIOS Entry point at %p\n", fp);
124
125 return fp;
126}
127
128/**
129 * init_SERR - Initializes the per slot SERR generation.
26e6c66e 130 * @ctrl: controller to use
1da177e4
LT
131 *
132 * For unexpected switch opens
1da177e4
LT
133 */
134static int init_SERR(struct controller * ctrl)
135{
136 u32 tempdword;
137 u32 number_of_slots;
138 u8 physical_slot;
139
140 if (!ctrl)
141 return 1;
142
143 tempdword = ctrl->first_slot;
144
145 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
427438c6 146 /* Loop through slots */
1da177e4
LT
147 while (number_of_slots) {
148 physical_slot = tempdword;
149 writeb(0, ctrl->hpc_reg + SLOT_SERR);
150 tempdword++;
151 number_of_slots--;
152 }
153
154 return 0;
155}
156
b019ee67 157static int init_cpqhp_routing_table(void)
1da177e4 158{
1da177e4 159 int len;
1da177e4 160
b019ee67
AC
161 cpqhp_routing_table = pcibios_get_irq_routing_table();
162 if (cpqhp_routing_table == NULL)
1da177e4 163 return -ENOMEM;
1da177e4 164
b019ee67 165 len = cpqhp_routing_table_length();
1da177e4 166 if (len == 0) {
b019ee67
AC
167 kfree(cpqhp_routing_table);
168 cpqhp_routing_table = NULL;
1da177e4
LT
169 return -1;
170 }
171
b019ee67
AC
172 return 0;
173}
174
175/* nice debugging output */
176static void pci_print_IRQ_route(void)
177{
178 int len;
179 int loop;
180 u8 tbus, tdevice, tslot;
181
182 len = cpqhp_routing_table_length();
1da177e4 183
b019ee67 184 dbg("bus dev func slot\n");
1da177e4 185 for (loop = 0; loop < len; ++loop) {
b019ee67
AC
186 tbus = cpqhp_routing_table->slots[loop].bus;
187 tdevice = cpqhp_routing_table->slots[loop].devfn;
188 tslot = cpqhp_routing_table->slots[loop].slot;
1da177e4
LT
189 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
190
191 }
b019ee67 192 return;
1da177e4
LT
193}
194
195
196/**
197 * get_subsequent_smbios_entry: get the next entry from bios table.
26e6c66e
RD
198 * @smbios_start: where to start in the SMBIOS table
199 * @smbios_table: location of the SMBIOS table
1da177e4
LT
200 * @curr: %NULL or pointer to previously returned structure
201 *
26e6c66e
RD
202 * Gets the first entry if previous == NULL;
203 * otherwise, returns the next entry.
204 * Uses global SMBIOS Table pointer.
205 *
206 * Returns a pointer to an SMBIOS structure or NULL if none found.
1da177e4
LT
207 */
208static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
209 void __iomem *smbios_table,
210 void __iomem *curr)
211{
212 u8 bail = 0;
213 u8 previous_byte = 1;
214 void __iomem *p_temp;
215 void __iomem *p_max;
216
217 if (!smbios_table || !curr)
04225fe7 218 return NULL;
1da177e4 219
427438c6 220 /* set p_max to the end of the table */
1da177e4
LT
221 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
222
223 p_temp = curr;
224 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
225
226 while ((p_temp < p_max) && !bail) {
227 /* Look for the double NULL terminator
228 * The first condition is the previous byte
427438c6
AC
229 * and the second is the curr
230 */
04225fe7 231 if (!previous_byte && !(readb(p_temp)))
1da177e4 232 bail = 1;
1da177e4
LT
233
234 previous_byte = readb(p_temp);
235 p_temp++;
236 }
237
04225fe7 238 if (p_temp < p_max)
1da177e4 239 return p_temp;
04225fe7 240 else
1da177e4 241 return NULL;
1da177e4
LT
242}
243
244
245/**
26e6c66e
RD
246 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
247 * @smbios_start: where to start in the SMBIOS table
248 * @smbios_table: location of the SMBIOS table
249 * @type: SMBIOS structure type to be returned
1da177e4
LT
250 * @previous: %NULL or pointer to previously returned structure
251 *
26e6c66e 252 * Gets the first entry of the specified type if previous == %NULL;
1da177e4 253 * Otherwise, returns the next entry of the given type.
26e6c66e
RD
254 * Uses global SMBIOS Table pointer.
255 * Uses get_subsequent_smbios_entry.
1da177e4 256 *
26e6c66e 257 * Returns a pointer to an SMBIOS structure or %NULL if none found.
1da177e4
LT
258 */
259static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
260 void __iomem *smbios_table,
261 u8 type,
262 void __iomem *previous)
263{
264 if (!smbios_table)
265 return NULL;
266
04225fe7 267 if (!previous)
1da177e4 268 previous = smbios_start;
04225fe7 269 else
1da177e4
LT
270 previous = get_subsequent_smbios_entry(smbios_start,
271 smbios_table, previous);
1da177e4 272
04225fe7
AC
273 while (previous)
274 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
1da177e4
LT
275 previous = get_subsequent_smbios_entry(smbios_start,
276 smbios_table, previous);
04225fe7 277 else
1da177e4 278 break;
1da177e4
LT
279
280 return previous;
281}
282
283static void release_slot(struct hotplug_slot *hotplug_slot)
284{
285 struct slot *slot = hotplug_slot->private;
286
30ac7acd 287 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
288
289 kfree(slot->hotplug_slot->info);
1da177e4
LT
290 kfree(slot->hotplug_slot);
291 kfree(slot);
292}
293
1da177e4
LT
294static int ctrl_slot_cleanup (struct controller * ctrl)
295{
296 struct slot *old_slot, *next_slot;
297
298 old_slot = ctrl->slot;
299 ctrl->slot = NULL;
300
301 while (old_slot) {
302 /* memory will be freed by the release_slot callback */
303 next_slot = old_slot->next;
304 pci_hp_deregister (old_slot->hotplug_slot);
305 old_slot = next_slot;
306 }
307
9f3f4681
GKH
308 cpqhp_remove_debugfs_files(ctrl);
309
427438c6 310 /* Free IRQ associated with hot plug device */
1da177e4 311 free_irq(ctrl->interrupt, ctrl);
427438c6 312 /* Unmap the memory */
1da177e4 313 iounmap(ctrl->hpc_reg);
427438c6 314 /* Finally reclaim PCI mem */
1da177e4
LT
315 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
316 pci_resource_len(ctrl->pci_dev, 0));
317
04225fe7 318 return 0;
1da177e4
LT
319}
320
321
427438c6
AC
322/**
323 * get_slot_mapping - determine logical slot mapping for PCI device
324 *
325 * Won't work for more than one PCI-PCI bridge in a slot.
326 *
327 * @bus_num - bus number of PCI device
328 * @dev_num - device number of PCI device
329 * @slot - Pointer to u8 where slot number will be returned
330 *
331 * Output: SUCCESS or FAILURE
332 */
1da177e4
LT
333static int
334get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
335{
1da177e4
LT
336 u32 work;
337 long len;
338 long loop;
339
340 u8 tbus, tdevice, tslot, bridgeSlot;
341
66bef8c0 342 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
1da177e4
LT
343
344 bridgeSlot = 0xFF;
345
b019ee67 346 len = cpqhp_routing_table_length();
1da177e4 347 for (loop = 0; loop < len; ++loop) {
b019ee67
AC
348 tbus = cpqhp_routing_table->slots[loop].bus;
349 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
350 tslot = cpqhp_routing_table->slots[loop].slot;
1da177e4
LT
351
352 if ((tbus == bus_num) && (tdevice == dev_num)) {
353 *slot = tslot;
1da177e4
LT
354 return 0;
355 } else {
356 /* Did not get a match on the target PCI device. Check
427438c6
AC
357 * if the current IRQ table entry is a PCI-to-PCI
358 * bridge device. If so, and it's secondary bus
359 * matches the bus number for the target device, I need
360 * to save the bridge's slot number. If I can not find
361 * an entry for the target device, I will have to
362 * assume it's on the other side of the bridge, and
363 * assign it the bridge's slot.
364 */
1da177e4
LT
365 bus->number = tbus;
366 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
3799a4e7 367 PCI_CLASS_REVISION, &work);
1da177e4
LT
368
369 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
370 pci_bus_read_config_dword(bus,
371 PCI_DEVFN(tdevice, 0),
372 PCI_PRIMARY_BUS, &work);
373 // See if bridge's secondary bus matches target bus.
04225fe7 374 if (((work >> 8) & 0x000000FF) == (long) bus_num)
1da177e4 375 bridgeSlot = tslot;
1da177e4
LT
376 }
377 }
378
379 }
380
427438c6
AC
381 /* If we got here, we didn't find an entry in the IRQ mapping table for
382 * the target PCI device. If we did determine that the target device
383 * is on the other side of a PCI-to-PCI bridge, return the slot number
384 * for the bridge.
385 */
1da177e4
LT
386 if (bridgeSlot != 0xFF) {
387 *slot = bridgeSlot;
1da177e4
LT
388 return 0;
389 }
427438c6 390 /* Couldn't find an entry in the routing table for this PCI device */
1da177e4
LT
391 return -1;
392}
393
394
395/**
396 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
26e6c66e
RD
397 * @ctrl: struct controller to use
398 * @func: PCI device/function info
399 * @status: LED control flag: 1 = LED on, 0 = LED off
1da177e4
LT
400 */
401static int
402cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
403 u32 status)
404{
405 u8 hp_slot;
406
407 if (func == NULL)
04225fe7 408 return 1;
1da177e4
LT
409
410 hp_slot = func->device - ctrl->slot_device_offset;
411
427438c6 412 /* Wait for exclusive access to hardware */
6aa4cdd0 413 mutex_lock(&ctrl->crit_sect);
1da177e4 414
04225fe7 415 if (status == 1)
1da177e4 416 amber_LED_on (ctrl, hp_slot);
04225fe7 417 else if (status == 0)
1da177e4 418 amber_LED_off (ctrl, hp_slot);
04225fe7 419 else {
427438c6 420 /* Done with exclusive hardware access */
6aa4cdd0 421 mutex_unlock(&ctrl->crit_sect);
04225fe7 422 return 1;
1da177e4
LT
423 }
424
425 set_SOGO(ctrl);
426
427438c6 427 /* Wait for SOBS to be unset */
1da177e4
LT
428 wait_for_ctrl_irq (ctrl);
429
427438c6 430 /* Done with exclusive hardware access */
6aa4cdd0 431 mutex_unlock(&ctrl->crit_sect);
1da177e4 432
04225fe7 433 return 0;
1da177e4
LT
434}
435
436
437/**
438 * set_attention_status - Turns the Amber LED for a slot on or off
26e6c66e
RD
439 * @hotplug_slot: slot to change LED on
440 * @status: LED control flag
1da177e4
LT
441 */
442static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
443{
444 struct pci_func *slot_func;
445 struct slot *slot = hotplug_slot->private;
446 struct controller *ctrl = slot->ctrl;
447 u8 bus;
448 u8 devfn;
449 u8 device;
450 u8 function;
451
30ac7acd 452 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
453
454 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
455 return -ENODEV;
456
457 device = devfn >> 3;
458 function = devfn & 0x7;
459 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
460
461 slot_func = cpqhp_slot_find(bus, device, function);
462 if (!slot_func)
463 return -ENODEV;
464
465 return cpqhp_set_attention_status(ctrl, slot_func, status);
466}
467
468
469static int process_SI(struct hotplug_slot *hotplug_slot)
470{
471 struct pci_func *slot_func;
472 struct slot *slot = hotplug_slot->private;
473 struct controller *ctrl = slot->ctrl;
474 u8 bus;
475 u8 devfn;
476 u8 device;
477 u8 function;
478
30ac7acd 479 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
480
481 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
482 return -ENODEV;
483
484 device = devfn >> 3;
485 function = devfn & 0x7;
486 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
487
488 slot_func = cpqhp_slot_find(bus, device, function);
489 if (!slot_func)
490 return -ENODEV;
491
492 slot_func->bus = bus;
493 slot_func->device = device;
494 slot_func->function = function;
495 slot_func->configured = 0;
496 dbg("board_added(%p, %p)\n", slot_func, ctrl);
497 return cpqhp_process_SI(ctrl, slot_func);
498}
499
500
501static int process_SS(struct hotplug_slot *hotplug_slot)
502{
503 struct pci_func *slot_func;
504 struct slot *slot = hotplug_slot->private;
505 struct controller *ctrl = slot->ctrl;
506 u8 bus;
507 u8 devfn;
508 u8 device;
509 u8 function;
510
30ac7acd 511 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
512
513 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
514 return -ENODEV;
515
516 device = devfn >> 3;
517 function = devfn & 0x7;
518 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
519
520 slot_func = cpqhp_slot_find(bus, device, function);
521 if (!slot_func)
522 return -ENODEV;
523
66bef8c0 524 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
1da177e4
LT
525 return cpqhp_process_SS(ctrl, slot_func);
526}
527
528
529static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
530{
531 struct slot *slot = hotplug_slot->private;
532 struct controller *ctrl = slot->ctrl;
533
30ac7acd 534 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4 535
861fefbf 536 return cpqhp_hardware_test(ctrl, value);
1da177e4
LT
537}
538
539
540static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
541{
542 struct slot *slot = hotplug_slot->private;
543 struct controller *ctrl = slot->ctrl;
544
30ac7acd 545 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
546
547 *value = get_slot_enabled(ctrl, slot);
548 return 0;
549}
550
551static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
552{
553 struct slot *slot = hotplug_slot->private;
554 struct controller *ctrl = slot->ctrl;
861fefbf 555
30ac7acd 556 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
557
558 *value = cpq_get_attention_status(ctrl, slot);
559 return 0;
560}
561
562static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
563{
564 struct slot *slot = hotplug_slot->private;
565 struct controller *ctrl = slot->ctrl;
566
30ac7acd 567 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
568
569 *value = cpq_get_latch_status(ctrl, slot);
570
571 return 0;
572}
573
574static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
575{
576 struct slot *slot = hotplug_slot->private;
577 struct controller *ctrl = slot->ctrl;
578
30ac7acd 579 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
580
581 *value = get_presence_status(ctrl, slot);
582
583 return 0;
584}
585
b4d897a4 586static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
b4d897a4
AC
587 .set_attention_status = set_attention_status,
588 .enable_slot = process_SI,
589 .disable_slot = process_SS,
590 .hardware_test = hardware_test,
591 .get_power_status = get_power_status,
592 .get_attention_status = get_attention_status,
593 .get_latch_status = get_latch_status,
594 .get_adapter_status = get_adapter_status,
b4d897a4
AC
595};
596
597#define SLOT_NAME_SIZE 10
598
599static int ctrl_slot_setup(struct controller *ctrl,
600 void __iomem *smbios_start,
601 void __iomem *smbios_table)
602{
603 struct slot *slot;
604 struct hotplug_slot *hotplug_slot;
605 struct hotplug_slot_info *hotplug_slot_info;
3749c51a 606 struct pci_bus *bus = ctrl->pci_bus;
b4d897a4
AC
607 u8 number_of_slots;
608 u8 slot_device;
609 u8 slot_number;
610 u8 ctrl_slot;
611 u32 tempdword;
612 char name[SLOT_NAME_SIZE];
613 void __iomem *slot_entry= NULL;
614 int result = -ENOMEM;
615
616 dbg("%s\n", __func__);
617
618 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
619
620 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
621 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
622 slot_number = ctrl->first_slot;
623
624 while (number_of_slots) {
625 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
626 if (!slot)
627 goto error;
628
629 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
630 GFP_KERNEL);
631 if (!slot->hotplug_slot)
632 goto error_slot;
633 hotplug_slot = slot->hotplug_slot;
634
04225fe7 635 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
b4d897a4
AC
636 GFP_KERNEL);
637 if (!hotplug_slot->info)
638 goto error_hpslot;
639 hotplug_slot_info = hotplug_slot->info;
640
641 slot->ctrl = ctrl;
642 slot->bus = ctrl->bus;
643 slot->device = slot_device;
644 slot->number = slot_number;
645 dbg("slot->number = %u\n", slot->number);
646
647 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
648 slot_entry);
649
650 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
651 slot->number)) {
652 slot_entry = get_SMBIOS_entry(smbios_start,
653 smbios_table, 9, slot_entry);
654 }
655
656 slot->p_sm_slot = slot_entry;
657
658 init_timer(&slot->task_event);
659 slot->task_event.expires = jiffies + 5 * HZ;
660 slot->task_event.function = cpqhp_pushbutton_thread;
661
662 /*FIXME: these capabilities aren't used but if they are
663 * they need to be correctly implemented
664 */
665 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
666 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
667
668 if (is_slot64bit(slot))
669 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
670 if (is_slot66mhz(slot))
671 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
3749c51a 672 if (bus->cur_bus_speed == PCI_SPEED_66MHz)
b4d897a4
AC
673 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
674
675 ctrl_slot =
676 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
677
678 /* Check presence */
679 slot->capabilities |=
680 ((((~tempdword) >> 23) |
681 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
682 /* Check the switch state */
683 slot->capabilities |=
684 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
685 /* Check the slot enable */
686 slot->capabilities |=
687 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
688
689 /* register this slot with the hotplug pci core */
690 hotplug_slot->release = &release_slot;
691 hotplug_slot->private = slot;
692 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
693 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
694
695 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
696 hotplug_slot_info->attention_status =
697 cpq_get_attention_status(ctrl, slot);
698 hotplug_slot_info->latch_status =
699 cpq_get_latch_status(ctrl, slot);
700 hotplug_slot_info->adapter_status =
701 get_presence_status(ctrl, slot);
702
703 dbg("registering bus %d, dev %d, number %d, "
704 "ctrl->slot_device_offset %d, slot %d\n",
705 slot->bus, slot->device,
706 slot->number, ctrl->slot_device_offset,
707 slot_number);
708 result = pci_hp_register(hotplug_slot,
709 ctrl->pci_dev->bus,
710 slot->device,
711 name);
712 if (result) {
713 err("pci_hp_register failed with error %d\n", result);
714 goto error_info;
715 }
716
717 slot->next = ctrl->slot;
718 ctrl->slot = slot;
719
720 number_of_slots--;
721 slot_device++;
722 slot_number++;
723 }
724
725 return 0;
726error_info:
727 kfree(hotplug_slot_info);
728error_hpslot:
729 kfree(hotplug_slot);
730error_slot:
731 kfree(slot);
732error:
733 return result;
734}
735
736static int one_time_init(void)
737{
738 int loop;
739 int retval = 0;
740
741 if (initialized)
742 return 0;
743
744 power_mode = 0;
745
b019ee67 746 retval = init_cpqhp_routing_table();
b4d897a4
AC
747 if (retval)
748 goto error;
749
b019ee67
AC
750 if (cpqhp_debug)
751 pci_print_IRQ_route();
752
b4d897a4
AC
753 dbg("Initialize + Start the notification mechanism \n");
754
755 retval = cpqhp_event_start_thread();
756 if (retval)
757 goto error;
758
759 dbg("Initialize slot lists\n");
04225fe7 760 for (loop = 0; loop < 256; loop++)
b4d897a4 761 cpqhp_slot_list[loop] = NULL;
b4d897a4
AC
762
763 /* FIXME: We also need to hook the NMI handler eventually.
764 * this also needs to be worked with Christoph
765 * register_NMI_handler();
766 */
767 /* Map rom address */
768 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
769 if (!cpqhp_rom_start) {
770 err ("Could not ioremap memory region for ROM\n");
771 retval = -EIO;
772 goto error;
773 }
774
775 /* Now, map the int15 entry point if we are on compaq specific
776 * hardware
777 */
778 compaq_nvram_init(cpqhp_rom_start);
779
780 /* Map smbios table entry point structure */
781 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
782 cpqhp_rom_start + ROM_PHY_LEN);
783 if (!smbios_table) {
784 err ("Could not find the SMBIOS pointer in memory\n");
785 retval = -EIO;
786 goto error_rom_start;
787 }
788
789 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
790 readw(smbios_table + ST_LENGTH));
791 if (!smbios_start) {
792 err ("Could not ioremap memory region taken from SMBIOS values\n");
793 retval = -EIO;
794 goto error_smbios_start;
795 }
796
797 initialized = 1;
798
799 return retval;
800
801error_smbios_start:
802 iounmap(smbios_start);
803error_rom_start:
804 iounmap(cpqhp_rom_start);
805error:
806 return retval;
807}
808
1da177e4
LT
809static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
810{
811 u8 num_of_slots = 0;
812 u8 hp_slot = 0;
813 u8 device;
1da177e4
LT
814 u8 bus_cap;
815 u16 temp_word;
816 u16 vendor_id;
817 u16 subsystem_vid;
818 u16 subsystem_deviceid;
819 u32 rc;
820 struct controller *ctrl;
821 struct pci_func *func;
3749c51a 822 struct pci_bus *bus;
fe89cf4c
BH
823 int err;
824
825 err = pci_enable_device(pdev);
826 if (err) {
827 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
828 pci_name(pdev), err);
829 return err;
830 }
a7ef7d1f 831
3749c51a 832 bus = pdev->subordinate;
a7ef7d1f
JS
833 if (!bus) {
834 dev_notice(&pdev->dev, "the device is not a bridge, "
835 "skipping\n");
836 rc = -ENODEV;
837 goto err_disable_device;
838 }
1da177e4 839
427438c6
AC
840 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
841 * discovery
842 */
1da177e4
LT
843 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
844 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
845 err(msg_HPC_non_compaq_or_intel);
fe89cf4c
BH
846 rc = -ENODEV;
847 goto err_disable_device;
1da177e4
LT
848 }
849 dbg("Vendor ID: %x\n", vendor_id);
850
44c10138
AK
851 dbg("revision: %d\n", pdev->revision);
852 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
1da177e4 853 err(msg_HPC_rev_error);
fe89cf4c
BH
854 rc = -ENODEV;
855 goto err_disable_device;
1da177e4
LT
856 }
857
88393161 858 /* Check for the proper subsystem ID's
861fefbf 859 * Intel uses a different SSID programming model than Compaq.
1da177e4
LT
860 * For Intel, each SSID bit identifies a PHP capability.
861 * Also Intel HPC's may have RID=0.
862 */
867556fe
AC
863 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
864 err(msg_HPC_not_supported);
865 return -ENODEV;
866 }
867
868 /* TODO: This code can be made to support non-Compaq or Intel
869 * subsystem IDs
870 */
871 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
872 if (rc) {
873 err("%s : pci_read_config_word failed\n", __func__);
874 goto err_disable_device;
875 }
876 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
877 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
878 err(msg_HPC_non_compaq_or_intel);
879 rc = -ENODEV;
880 goto err_disable_device;
881 }
882
883 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
884 if (!ctrl) {
885 err("%s : out of memory\n", __func__);
886 rc = -ENOMEM;
887 goto err_disable_device;
888 }
889
890 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
891 if (rc) {
892 err("%s : pci_read_config_word failed\n", __func__);
893 goto err_free_ctrl;
894 }
895
896 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
897
898 /* Set Vendor ID, so it can be accessed later from other
899 * functions
900 */
901 ctrl->vendor_id = vendor_id;
902
903 switch (subsystem_vid) {
904 case PCI_VENDOR_ID_COMPAQ:
905 if (pdev->revision >= 0x13) { /* CIOBX */
906 ctrl->push_flag = 1;
907 ctrl->slot_switch_type = 1;
908 ctrl->push_button = 1;
909 ctrl->pci_config_space = 1;
910 ctrl->defeature_PHP = 1;
911 ctrl->pcix_support = 1;
912 ctrl->pcix_speed_capability = 1;
913 pci_read_config_byte(pdev, 0x41, &bus_cap);
914 if (bus_cap & 0x80) {
915 dbg("bus max supports 133MHz PCI-X\n");
3749c51a 916 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
867556fe
AC
917 break;
918 }
919 if (bus_cap & 0x40) {
920 dbg("bus max supports 100MHz PCI-X\n");
3749c51a 921 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
867556fe
AC
922 break;
923 }
924 if (bus_cap & 20) {
925 dbg("bus max supports 66MHz PCI-X\n");
3749c51a 926 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
867556fe
AC
927 break;
928 }
929 if (bus_cap & 10) {
930 dbg("bus max supports 66MHz PCI\n");
3749c51a 931 bus->max_bus_speed = PCI_SPEED_66MHz;
867556fe
AC
932 break;
933 }
1da177e4 934
867556fe 935 break;
1da177e4 936 }
1da177e4 937
867556fe
AC
938 switch (subsystem_deviceid) {
939 case PCI_SUB_HPC_ID:
940 /* Original 6500/7000 implementation */
941 ctrl->slot_switch_type = 1;
3749c51a 942 bus->max_bus_speed = PCI_SPEED_33MHz;
867556fe
AC
943 ctrl->push_button = 0;
944 ctrl->pci_config_space = 1;
945 ctrl->defeature_PHP = 1;
946 ctrl->pcix_support = 0;
947 ctrl->pcix_speed_capability = 0;
948 break;
949 case PCI_SUB_HPC_ID2:
950 /* First Pushbutton implementation */
951 ctrl->push_flag = 1;
952 ctrl->slot_switch_type = 1;
3749c51a 953 bus->max_bus_speed = PCI_SPEED_33MHz;
867556fe
AC
954 ctrl->push_button = 1;
955 ctrl->pci_config_space = 1;
956 ctrl->defeature_PHP = 1;
957 ctrl->pcix_support = 0;
958 ctrl->pcix_speed_capability = 0;
959 break;
960 case PCI_SUB_HPC_ID_INTC:
961 /* Third party (6500/7000) */
962 ctrl->slot_switch_type = 1;
3749c51a 963 bus->max_bus_speed = PCI_SPEED_33MHz;
867556fe
AC
964 ctrl->push_button = 0;
965 ctrl->pci_config_space = 1;
966 ctrl->defeature_PHP = 1;
967 ctrl->pcix_support = 0;
968 ctrl->pcix_speed_capability = 0;
969 break;
970 case PCI_SUB_HPC_ID3:
971 /* First 66 Mhz implementation */
972 ctrl->push_flag = 1;
973 ctrl->slot_switch_type = 1;
3749c51a 974 bus->max_bus_speed = PCI_SPEED_66MHz;
867556fe
AC
975 ctrl->push_button = 1;
976 ctrl->pci_config_space = 1;
977 ctrl->defeature_PHP = 1;
978 ctrl->pcix_support = 0;
979 ctrl->pcix_speed_capability = 0;
980 break;
981 case PCI_SUB_HPC_ID4:
982 /* First PCI-X implementation, 100MHz */
983 ctrl->push_flag = 1;
984 ctrl->slot_switch_type = 1;
3749c51a 985 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
867556fe
AC
986 ctrl->push_button = 1;
987 ctrl->pci_config_space = 1;
988 ctrl->defeature_PHP = 1;
989 ctrl->pcix_support = 1;
990 ctrl->pcix_speed_capability = 0;
991 break;
992 default:
993 err(msg_HPC_not_supported);
994 rc = -ENODEV;
1da177e4
LT
995 goto err_free_ctrl;
996 }
867556fe 997 break;
1da177e4 998
867556fe
AC
999 case PCI_VENDOR_ID_INTEL:
1000 /* Check for speed capability (0=33, 1=66) */
1001 if (subsystem_deviceid & 0x0001)
3749c51a 1002 bus->max_bus_speed = PCI_SPEED_66MHz;
867556fe 1003 else
3749c51a 1004 bus->max_bus_speed = PCI_SPEED_33MHz;
1da177e4 1005
867556fe
AC
1006 /* Check for push button */
1007 if (subsystem_deviceid & 0x0002)
1008 ctrl->push_button = 0;
1009 else
1010 ctrl->push_button = 1;
1da177e4 1011
867556fe
AC
1012 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
1013 if (subsystem_deviceid & 0x0004)
1014 ctrl->slot_switch_type = 0;
1015 else
1016 ctrl->slot_switch_type = 1;
1017
1018 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
1019 if (subsystem_deviceid & 0x0008)
1020 ctrl->defeature_PHP = 1; /* PHP supported */
1021 else
1022 ctrl->defeature_PHP = 0; /* PHP not supported */
1023
1024 /* Alternate Base Address Register Interface
1025 * (0=not supported, 1=supported)
1026 */
1027 if (subsystem_deviceid & 0x0010)
1028 ctrl->alternate_base_address = 1;
1029 else
1030 ctrl->alternate_base_address = 0;
1da177e4 1031
867556fe
AC
1032 /* PCI Config Space Index (0=not supported, 1=supported) */
1033 if (subsystem_deviceid & 0x0020)
1034 ctrl->pci_config_space = 1;
1035 else
1036 ctrl->pci_config_space = 0;
1037
1038 /* PCI-X support */
1039 if (subsystem_deviceid & 0x0080) {
1040 ctrl->pcix_support = 1;
1041 if (subsystem_deviceid & 0x0040)
1042 /* 133MHz PCI-X if bit 7 is 1 */
1043 ctrl->pcix_speed_capability = 1;
1044 else
1045 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1046 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1047 ctrl->pcix_speed_capability = 0;
1048 } else {
1049 /* Conventional PCI */
1050 ctrl->pcix_support = 0;
1051 ctrl->pcix_speed_capability = 0;
1da177e4 1052 }
867556fe 1053 break;
1da177e4 1054
867556fe 1055 default:
1da177e4 1056 err(msg_HPC_not_supported);
867556fe
AC
1057 rc = -ENODEV;
1058 goto err_free_ctrl;
1da177e4
LT
1059 }
1060
427438c6 1061 /* Tell the user that we found one. */
1da177e4
LT
1062 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1063 pdev->bus->number);
1064
1065 dbg("Hotplug controller capabilities:\n");
3749c51a 1066 dbg(" speed_capability %d\n", bus->max_bus_speed);
1da177e4
LT
1067 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1068 "switch present" : "no switch");
1069 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1070 "PHP supported" : "PHP not supported");
1071 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1072 "supported" : "not supported");
1073 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1074 "supported" : "not supported");
1075 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1076 "supported" : "not supported");
1077 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1078 "supported" : "not supported");
1079
1080 ctrl->pci_dev = pdev;
1081 pci_set_drvdata(pdev, ctrl);
1082
1083 /* make our own copy of the pci bus structure,
1084 * as we like tweaking it a lot */
8f6bce3c 1085 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1da177e4
LT
1086 if (!ctrl->pci_bus) {
1087 err("out of memory\n");
1088 rc = -ENOMEM;
1089 goto err_free_ctrl;
1090 }
1da177e4
LT
1091
1092 ctrl->bus = pdev->bus->number;
44c10138 1093 ctrl->rev = pdev->revision;
1da177e4
LT
1094 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1095 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1096
6aa4cdd0 1097 mutex_init(&ctrl->crit_sect);
1da177e4
LT
1098 init_waitqueue_head(&ctrl->queue);
1099
1100 /* initialize our threads if they haven't already been started up */
1101 rc = one_time_init();
1102 if (rc) {
1103 goto err_free_bus;
1104 }
861fefbf 1105
1da177e4 1106 dbg("pdev = %p\n", pdev);
1396a8c3
GKH
1107 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1108 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1da177e4
LT
1109
1110 if (!request_mem_region(pci_resource_start(pdev, 0),
1111 pci_resource_len(pdev, 0), MY_NAME)) {
1112 err("cannot reserve MMIO region\n");
1113 rc = -ENOMEM;
1114 goto err_free_bus;
1115 }
1116
1117 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1118 pci_resource_len(pdev, 0));
1119 if (!ctrl->hpc_reg) {
1396a8c3
GKH
1120 err("cannot remap MMIO region %llx @ %llx\n",
1121 (unsigned long long)pci_resource_len(pdev, 0),
1122 (unsigned long long)pci_resource_start(pdev, 0));
1da177e4
LT
1123 rc = -ENODEV;
1124 goto err_free_mem_region;
1125 }
1126
867556fe 1127 /* Check for 66Mhz operation */
3749c51a 1128 bus->cur_bus_speed = get_controller_speed(ctrl);
1da177e4
LT
1129
1130
1131 /********************************************************
1132 *
1133 * Save configuration headers for this and
1134 * subordinate PCI buses
1135 *
1136 ********************************************************/
1137
427438c6 1138 /* find the physical slot number of the first hot plug slot */
1da177e4
LT
1139
1140 /* Get slot won't work for devices behind bridges, but
1141 * in this case it will always be called for the "base"
1142 * bus/dev/func of a slot.
1143 * CS: this is leveraging the PCIIRQ routing code from the kernel
1144 * (pci-pc.c: get_irq_routing_table) */
1145 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1146 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1147 &(ctrl->first_slot));
1148 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1149 ctrl->first_slot, rc);
1150 if (rc) {
1151 err(msg_initialization_err, rc);
1152 goto err_iounmap;
1153 }
1154
427438c6 1155 /* Store PCI Config Space for all devices on this bus */
1da177e4
LT
1156 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1157 if (rc) {
1158 err("%s: unable to save PCI configuration data, error %d\n",
66bef8c0 1159 __func__, rc);
1da177e4
LT
1160 goto err_iounmap;
1161 }
1162
1163 /*
1164 * Get IO, memory, and IRQ resources for new devices
1165 */
427438c6 1166 /* The next line is required for cpqhp_find_available_resources */
1da177e4
LT
1167 ctrl->interrupt = pdev->irq;
1168 if (ctrl->interrupt < 0x10) {
1169 cpqhp_legacy_mode = 1;
1170 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1171 }
1172
1173 ctrl->cfgspc_irq = 0;
1174 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1175
1176 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1177 ctrl->add_support = !rc;
1178 if (rc) {
1179 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1180 err("unable to locate PCI configuration resources for hot plug add.\n");
1181 goto err_iounmap;
1182 }
1183
1184 /*
1185 * Finish setting up the hot plug ctrl device
1186 */
1187 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1188 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1189
1190 ctrl->next_event = 0;
1191
1192 /* Setup the slot information structures */
1193 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1194 if (rc) {
1195 err(msg_initialization_err, 6);
1196 err("%s: unable to save PCI configuration data, error %d\n",
66bef8c0 1197 __func__, rc);
1da177e4
LT
1198 goto err_iounmap;
1199 }
861fefbf 1200
1da177e4
LT
1201 /* Mask all general input interrupts */
1202 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1203
1204 /* set up the interrupt */
1205 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1206 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
6b4486e2 1207 IRQF_SHARED, MY_NAME, ctrl)) {
1da177e4
LT
1208 err("Can't get irq %d for the hotplug pci controller\n",
1209 ctrl->interrupt);
1210 rc = -ENODEV;
1211 goto err_iounmap;
1212 }
1213
427438c6
AC
1214 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1215 * fault
1216 */
1da177e4
LT
1217 temp_word = readw(ctrl->hpc_reg + MISC);
1218 temp_word |= 0x4006;
1219 writew(temp_word, ctrl->hpc_reg + MISC);
1220
427438c6 1221 /* Changed 05/05/97 to clear all interrupts at start */
1da177e4
LT
1222 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1223
1224 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1225
1226 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1227
1228 if (!cpqhp_ctrl_list) {
1229 cpqhp_ctrl_list = ctrl;
1230 ctrl->next = NULL;
1231 } else {
1232 ctrl->next = cpqhp_ctrl_list;
1233 cpqhp_ctrl_list = ctrl;
1234 }
1235
427438c6
AC
1236 /* turn off empty slots here unless command line option "ON" set
1237 * Wait for exclusive access to hardware
1238 */
6aa4cdd0 1239 mutex_lock(&ctrl->crit_sect);
1da177e4
LT
1240
1241 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1242
427438c6 1243 /* find first device number for the ctrl */
1da177e4
LT
1244 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1245
1246 while (num_of_slots) {
1247 dbg("num_of_slots: %d\n", num_of_slots);
1248 func = cpqhp_slot_find(ctrl->bus, device, 0);
1249 if (!func)
1250 break;
1251
1252 hp_slot = func->device - ctrl->slot_device_offset;
1253 dbg("hp_slot: %d\n", hp_slot);
1254
427438c6 1255 /* We have to save the presence info for these slots */
1da177e4
LT
1256 temp_word = ctrl->ctrl_int_comp >> 16;
1257 func->presence_save = (temp_word >> hp_slot) & 0x01;
1258 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1259
04225fe7 1260 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1da177e4 1261 func->switch_save = 0;
04225fe7 1262 else
1da177e4 1263 func->switch_save = 0x10;
1da177e4 1264
04225fe7 1265 if (!power_mode)
1da177e4
LT
1266 if (!func->is_a_board) {
1267 green_LED_off(ctrl, hp_slot);
1268 slot_disable(ctrl, hp_slot);
1269 }
1da177e4
LT
1270
1271 device++;
1272 num_of_slots--;
1273 }
1274
1275 if (!power_mode) {
1276 set_SOGO(ctrl);
427438c6 1277 /* Wait for SOBS to be unset */
1da177e4
LT
1278 wait_for_ctrl_irq(ctrl);
1279 }
1280
1281 rc = init_SERR(ctrl);
1282 if (rc) {
1283 err("init_SERR failed\n");
6aa4cdd0 1284 mutex_unlock(&ctrl->crit_sect);
1da177e4
LT
1285 goto err_free_irq;
1286 }
1287
427438c6 1288 /* Done with exclusive hardware access */
6aa4cdd0 1289 mutex_unlock(&ctrl->crit_sect);
1da177e4 1290
9f3f4681 1291 cpqhp_create_debugfs_files(ctrl);
1da177e4
LT
1292
1293 return 0;
1294
1295err_free_irq:
1296 free_irq(ctrl->interrupt, ctrl);
1297err_iounmap:
1298 iounmap(ctrl->hpc_reg);
1299err_free_mem_region:
1300 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1301err_free_bus:
1302 kfree(ctrl->pci_bus);
1303err_free_ctrl:
1304 kfree(ctrl);
fe89cf4c
BH
1305err_disable_device:
1306 pci_disable_device(pdev);
1da177e4
LT
1307 return rc;
1308}
1309
1da177e4
LT
1310static void __exit unload_cpqphpd(void)
1311{
1312 struct pci_func *next;
1313 struct pci_func *TempSlot;
1314 int loop;
1315 u32 rc;
1316 struct controller *ctrl;
1317 struct controller *tctrl;
1318 struct pci_resource *res;
1319 struct pci_resource *tres;
1320
1321 rc = compaq_nvram_store(cpqhp_rom_start);
1322
1323 ctrl = cpqhp_ctrl_list;
1324
1325 while (ctrl) {
1326 if (ctrl->hpc_reg) {
1327 u16 misc;
1328 rc = read_slot_enable (ctrl);
861fefbf 1329
1da177e4
LT
1330 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1331 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
861fefbf 1332
1da177e4
LT
1333 misc = readw(ctrl->hpc_reg + MISC);
1334 misc &= 0xFFFD;
1335 writew(misc, ctrl->hpc_reg + MISC);
1336 }
1337
1338 ctrl_slot_cleanup(ctrl);
1339
1340 res = ctrl->io_head;
1341 while (res) {
1342 tres = res;
1343 res = res->next;
1344 kfree(tres);
1345 }
1346
1347 res = ctrl->mem_head;
1348 while (res) {
1349 tres = res;
1350 res = res->next;
1351 kfree(tres);
1352 }
1353
1354 res = ctrl->p_mem_head;
1355 while (res) {
1356 tres = res;
1357 res = res->next;
1358 kfree(tres);
1359 }
1360
1361 res = ctrl->bus_head;
1362 while (res) {
1363 tres = res;
1364 res = res->next;
1365 kfree(tres);
1366 }
1367
1368 kfree (ctrl->pci_bus);
1369
1370 tctrl = ctrl;
1371 ctrl = ctrl->next;
1372 kfree(tctrl);
1373 }
1374
1375 for (loop = 0; loop < 256; loop++) {
1376 next = cpqhp_slot_list[loop];
1377 while (next != NULL) {
1378 res = next->io_head;
1379 while (res) {
1380 tres = res;
1381 res = res->next;
1382 kfree(tres);
1383 }
1384
1385 res = next->mem_head;
1386 while (res) {
1387 tres = res;
1388 res = res->next;
1389 kfree(tres);
1390 }
1391
1392 res = next->p_mem_head;
1393 while (res) {
1394 tres = res;
1395 res = res->next;
1396 kfree(tres);
1397 }
1398
1399 res = next->bus_head;
1400 while (res) {
1401 tres = res;
1402 res = res->next;
1403 kfree(tres);
1404 }
1405
1406 TempSlot = next;
1407 next = next->next;
1408 kfree(TempSlot);
1409 }
1410 }
1411
427438c6 1412 /* Stop the notification mechanism */
4002307d
KM
1413 if (initialized)
1414 cpqhp_event_stop_thread();
1da177e4 1415
427438c6 1416 /* unmap the rom address */
1da177e4
LT
1417 if (cpqhp_rom_start)
1418 iounmap(cpqhp_rom_start);
1419 if (smbios_start)
1420 iounmap(smbios_start);
1421}
1422
1da177e4
LT
1423static struct pci_device_id hpcd_pci_tbl[] = {
1424 {
1425 /* handle any PCI Hotplug controller */
1426 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1427 .class_mask = ~0,
861fefbf 1428
1da177e4
LT
1429 /* no matter who makes it */
1430 .vendor = PCI_ANY_ID,
1431 .device = PCI_ANY_ID,
1432 .subvendor = PCI_ANY_ID,
1433 .subdevice = PCI_ANY_ID,
861fefbf 1434
1da177e4
LT
1435 }, { /* end: all zeroes */ }
1436};
1437
1438MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1439
1da177e4
LT
1440static struct pci_driver cpqhpc_driver = {
1441 .name = "compaq_pci_hotplug",
1442 .id_table = hpcd_pci_tbl,
1443 .probe = cpqhpc_probe,
1444 /* remove: cpqhpc_remove_one, */
1445};
1446
1da177e4
LT
1447static int __init cpqhpc_init(void)
1448{
1449 int result;
1450
1451 cpqhp_debug = debug;
1452
1453 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
9f3f4681 1454 cpqhp_initialize_debugfs();
1da177e4
LT
1455 result = pci_register_driver(&cpqhpc_driver);
1456 dbg("pci_register_driver = %d\n", result);
1457 return result;
1458}
1459
1da177e4
LT
1460static void __exit cpqhpc_cleanup(void)
1461{
1462 dbg("unload_cpqphpd()\n");
1463 unload_cpqphpd();
1464
1465 dbg("pci_unregister_driver\n");
1466 pci_unregister_driver(&cpqhpc_driver);
9f3f4681 1467 cpqhp_shutdown_debugfs();
1da177e4
LT
1468}
1469
1da177e4
LT
1470module_init(cpqhpc_init);
1471module_exit(cpqhpc_cleanup);