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Commit | Line | Data |
---|---|---|
876c9d3a MT |
1 | /** |
2 | * This file contains the handling of command | |
3 | * responses as well as events generated by firmware. | |
4 | */ | |
5a0e3ad6 | 5 | #include <linux/slab.h> |
876c9d3a | 6 | #include <linux/delay.h> |
767e366f | 7 | #include <linux/sched.h> |
876c9d3a MT |
8 | #include <linux/if_arp.h> |
9 | #include <linux/netdevice.h> | |
2c5b9e51 | 10 | #include <asm/unaligned.h> |
876c9d3a MT |
11 | #include <net/iw_handler.h> |
12 | ||
13 | #include "host.h" | |
876c9d3a | 14 | #include "decl.h" |
bca61f8a | 15 | #include "cmd.h" |
876c9d3a MT |
16 | #include "defs.h" |
17 | #include "dev.h" | |
697900ac | 18 | #include "assoc.h" |
876c9d3a MT |
19 | #include "wext.h" |
20 | ||
21 | /** | |
22 | * @brief This function handles disconnect event. it | |
23 | * reports disconnect to upper layer, clean tx/rx packets, | |
24 | * reset link state etc. | |
25 | * | |
69f9032d | 26 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
27 | * @return n/a |
28 | */ | |
69f9032d | 29 | void lbs_mac_event_disconnected(struct lbs_private *priv) |
876c9d3a | 30 | { |
aa21c004 | 31 | if (priv->connect_status != LBS_CONNECTED) |
876c9d3a MT |
32 | return; |
33 | ||
91843463 | 34 | lbs_deb_enter(LBS_DEB_ASSOC); |
876c9d3a | 35 | |
876c9d3a MT |
36 | /* |
37 | * Cisco AP sends EAP failure and de-auth in less than 0.5 ms. | |
38 | * It causes problem in the Supplicant | |
39 | */ | |
876c9d3a | 40 | msleep_interruptible(1000); |
fea2b8ec | 41 | lbs_send_disconnect_notification(priv); |
876c9d3a | 42 | |
876c9d3a | 43 | /* report disconnect to upper layer */ |
634b8f49 HS |
44 | netif_stop_queue(priv->dev); |
45 | netif_carrier_off(priv->dev); | |
876c9d3a | 46 | |
a27b9f96 DW |
47 | /* Free Tx and Rx packets */ |
48 | kfree_skb(priv->currenttxskb); | |
49 | priv->currenttxskb = NULL; | |
50 | priv->tx_pending_len = 0; | |
51 | ||
876c9d3a | 52 | /* reset SNR/NF/RSSI values */ |
aa21c004 DW |
53 | memset(priv->SNR, 0x00, sizeof(priv->SNR)); |
54 | memset(priv->NF, 0x00, sizeof(priv->NF)); | |
55 | memset(priv->RSSI, 0x00, sizeof(priv->RSSI)); | |
56 | memset(priv->rawSNR, 0x00, sizeof(priv->rawSNR)); | |
57 | memset(priv->rawNF, 0x00, sizeof(priv->rawNF)); | |
58 | priv->nextSNRNF = 0; | |
59 | priv->numSNRNF = 0; | |
60 | priv->connect_status = LBS_DISCONNECTED; | |
876c9d3a | 61 | |
e76850d6 DW |
62 | /* Clear out associated SSID and BSSID since connection is |
63 | * no longer valid. | |
64 | */ | |
aa21c004 | 65 | memset(&priv->curbssparams.bssid, 0, ETH_ALEN); |
243e84e9 | 66 | memset(&priv->curbssparams.ssid, 0, IEEE80211_MAX_SSID_LEN); |
aa21c004 | 67 | priv->curbssparams.ssid_len = 0; |
876c9d3a | 68 | |
aa21c004 | 69 | if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a | 70 | /* make firmware to exit PS mode */ |
a6c8700f | 71 | lbs_deb_cmd("disconnected, so exit PS mode\n"); |
10078321 | 72 | lbs_ps_wakeup(priv, 0); |
876c9d3a | 73 | } |
52507c20 | 74 | lbs_deb_leave(LBS_DEB_ASSOC); |
876c9d3a MT |
75 | } |
76 | ||
69f9032d | 77 | static int lbs_ret_reg_access(struct lbs_private *priv, |
876c9d3a MT |
78 | u16 type, struct cmd_ds_command *resp) |
79 | { | |
9012b28a | 80 | int ret = 0; |
876c9d3a | 81 | |
9012b28a | 82 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
83 | |
84 | switch (type) { | |
6b63cd0f | 85 | case CMD_RET(CMD_MAC_REG_ACCESS): |
876c9d3a | 86 | { |
981f187b | 87 | struct cmd_ds_mac_reg_access *reg = &resp->params.macreg; |
876c9d3a | 88 | |
aa21c004 DW |
89 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
90 | priv->offsetvalue.value = le32_to_cpu(reg->value); | |
876c9d3a MT |
91 | break; |
92 | } | |
93 | ||
6b63cd0f | 94 | case CMD_RET(CMD_BBP_REG_ACCESS): |
876c9d3a | 95 | { |
981f187b | 96 | struct cmd_ds_bbp_reg_access *reg = &resp->params.bbpreg; |
876c9d3a | 97 | |
aa21c004 DW |
98 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
99 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
100 | break; |
101 | } | |
102 | ||
6b63cd0f | 103 | case CMD_RET(CMD_RF_REG_ACCESS): |
876c9d3a | 104 | { |
981f187b | 105 | struct cmd_ds_rf_reg_access *reg = &resp->params.rfreg; |
876c9d3a | 106 | |
aa21c004 DW |
107 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
108 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
109 | break; |
110 | } | |
111 | ||
112 | default: | |
9012b28a | 113 | ret = -1; |
876c9d3a MT |
114 | } |
115 | ||
8b17d723 | 116 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
9012b28a | 117 | return ret; |
876c9d3a MT |
118 | } |
119 | ||
1309b55b | 120 | static inline int handle_cmd_response(struct lbs_private *priv, |
ddac4526 | 121 | struct cmd_header *cmd_response) |
876c9d3a | 122 | { |
ddac4526 | 123 | struct cmd_ds_command *resp = (struct cmd_ds_command *) cmd_response; |
876c9d3a MT |
124 | int ret = 0; |
125 | unsigned long flags; | |
1309b55b | 126 | uint16_t respcmd = le16_to_cpu(resp->command); |
876c9d3a | 127 | |
a6c8700f HS |
128 | lbs_deb_enter(LBS_DEB_HOST); |
129 | ||
876c9d3a | 130 | switch (respcmd) { |
6b63cd0f HS |
131 | case CMD_RET(CMD_MAC_REG_ACCESS): |
132 | case CMD_RET(CMD_BBP_REG_ACCESS): | |
133 | case CMD_RET(CMD_RF_REG_ACCESS): | |
10078321 | 134 | ret = lbs_ret_reg_access(priv, respcmd, resp); |
876c9d3a MT |
135 | break; |
136 | ||
6b63cd0f HS |
137 | case CMD_RET(CMD_802_11_SET_AFC): |
138 | case CMD_RET(CMD_802_11_GET_AFC): | |
aa21c004 | 139 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 140 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.afc, |
876c9d3a | 141 | sizeof(struct cmd_ds_802_11_afc)); |
aa21c004 | 142 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
143 | |
144 | break; | |
876c9d3a | 145 | |
6b63cd0f | 146 | case CMD_RET(CMD_802_11_BEACON_STOP): |
18c96c34 DW |
147 | break; |
148 | ||
6b63cd0f | 149 | case CMD_RET(CMD_802_11_RSSI): |
10078321 | 150 | ret = lbs_ret_802_11_rssi(priv, resp); |
876c9d3a MT |
151 | break; |
152 | ||
6b63cd0f | 153 | case CMD_RET(CMD_802_11_TPC_CFG): |
aa21c004 | 154 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 155 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.tpccfg, |
876c9d3a | 156 | sizeof(struct cmd_ds_802_11_tpc_cfg)); |
aa21c004 | 157 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 158 | break; |
3a188649 | 159 | |
6b63cd0f | 160 | case CMD_RET(CMD_BT_ACCESS): |
aa21c004 | 161 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
162 | if (priv->cur_cmd->callback_arg) |
163 | memcpy((void *)priv->cur_cmd->callback_arg, | |
876c9d3a | 164 | &resp->params.bt.addr1, 2 * ETH_ALEN); |
aa21c004 | 165 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 166 | break; |
6b63cd0f | 167 | case CMD_RET(CMD_FWT_ACCESS): |
aa21c004 | 168 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
169 | if (priv->cur_cmd->callback_arg) |
170 | memcpy((void *)priv->cur_cmd->callback_arg, &resp->params.fwt, | |
981f187b | 171 | sizeof(resp->params.fwt)); |
aa21c004 | 172 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 173 | break; |
96287ac4 BD |
174 | case CMD_RET(CMD_802_11_BEACON_CTRL): |
175 | ret = lbs_ret_802_11_bcn_ctrl(priv, resp); | |
176 | break; | |
177 | ||
876c9d3a | 178 | default: |
e37fc6e1 DW |
179 | lbs_pr_err("CMD_RESP: unknown cmd response 0x%04x\n", |
180 | le16_to_cpu(resp->command)); | |
876c9d3a MT |
181 | break; |
182 | } | |
a6c8700f | 183 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
184 | return ret; |
185 | } | |
186 | ||
7919b89c | 187 | int lbs_process_command_response(struct lbs_private *priv, u8 *data, u32 len) |
876c9d3a | 188 | { |
e1258177 | 189 | uint16_t respcmd, curcmd; |
ddac4526 | 190 | struct cmd_header *resp; |
876c9d3a | 191 | int ret = 0; |
e1258177 DW |
192 | unsigned long flags; |
193 | uint16_t result; | |
876c9d3a | 194 | |
a6c8700f | 195 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 196 | |
aa21c004 DW |
197 | mutex_lock(&priv->lock); |
198 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 199 | |
aa21c004 | 200 | if (!priv->cur_cmd) { |
a6c8700f | 201 | lbs_deb_host("CMD_RESP: cur_cmd is NULL\n"); |
876c9d3a | 202 | ret = -1; |
aa21c004 | 203 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
204 | goto done; |
205 | } | |
e1258177 | 206 | |
7919b89c | 207 | resp = (void *)data; |
8a96df80 | 208 | curcmd = le16_to_cpu(priv->cur_cmd->cmdbuf->command); |
876c9d3a | 209 | respcmd = le16_to_cpu(resp->command); |
876c9d3a MT |
210 | result = le16_to_cpu(resp->result); |
211 | ||
e5225b39 | 212 | lbs_deb_cmd("CMD_RESP: response 0x%04x, seq %d, size %d\n", |
7919b89c HS |
213 | respcmd, le16_to_cpu(resp->seqnum), len); |
214 | lbs_deb_hex(LBS_DEB_CMD, "CMD_RESP", (void *) resp, len); | |
876c9d3a | 215 | |
6305f498 | 216 | if (resp->seqnum != priv->cur_cmd->cmdbuf->seqnum) { |
e1258177 | 217 | lbs_pr_info("Received CMD_RESP with invalid sequence %d (expected %d)\n", |
6305f498 | 218 | le16_to_cpu(resp->seqnum), le16_to_cpu(priv->cur_cmd->cmdbuf->seqnum)); |
aa21c004 | 219 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
220 | ret = -1; |
221 | goto done; | |
222 | } | |
e1258177 | 223 | if (respcmd != CMD_RET(curcmd) && |
5f0547c2 | 224 | respcmd != CMD_RET_802_11_ASSOCIATE && curcmd != CMD_802_11_ASSOCIATE) { |
e1258177 DW |
225 | lbs_pr_info("Invalid CMD_RESP %x to command %x!\n", respcmd, curcmd); |
226 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
227 | ret = -1; | |
228 | goto done; | |
229 | } | |
230 | ||
8538823f DW |
231 | if (resp->result == cpu_to_le16(0x0004)) { |
232 | /* 0x0004 means -EAGAIN. Drop the response, let it time out | |
233 | and be resubmitted */ | |
234 | lbs_pr_info("Firmware returns DEFER to command %x. Will let it time out...\n", | |
235 | le16_to_cpu(resp->command)); | |
236 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
237 | ret = -1; | |
238 | goto done; | |
239 | } | |
240 | ||
e1258177 DW |
241 | /* Now we got response from FW, cancel the command timer */ |
242 | del_timer(&priv->command_timer); | |
2a345099 | 243 | priv->cmd_timed_out = 0; |
876c9d3a MT |
244 | |
245 | /* Store the response code to cur_cmd_retcode. */ | |
aa21c004 | 246 | priv->cur_cmd_retcode = result; |
876c9d3a | 247 | |
6b63cd0f | 248 | if (respcmd == CMD_RET(CMD_802_11_PS_MODE)) { |
38bfab1a | 249 | struct cmd_ds_802_11_ps_mode *psmode = (void *) &resp[1]; |
981f187b | 250 | u16 action = le16_to_cpu(psmode->action); |
876c9d3a | 251 | |
a6c8700f HS |
252 | lbs_deb_host( |
253 | "CMD_RESP: PS_MODE cmd reply result 0x%x, action 0x%x\n", | |
981f187b | 254 | result, action); |
876c9d3a MT |
255 | |
256 | if (result) { | |
a6c8700f | 257 | lbs_deb_host("CMD_RESP: PS command failed with 0x%x\n", |
981f187b DW |
258 | result); |
259 | /* | |
260 | * We should not re-try enter-ps command in | |
261 | * ad-hoc mode. It takes place in | |
10078321 | 262 | * lbs_execute_next_command(). |
981f187b | 263 | */ |
aa21c004 | 264 | if (priv->mode == IW_MODE_ADHOC && |
0aef64d7 | 265 | action == CMD_SUBCMD_ENTER_PS) |
aa21c004 | 266 | priv->psmode = LBS802_11POWERMODECAM; |
0aef64d7 | 267 | } else if (action == CMD_SUBCMD_ENTER_PS) { |
aa21c004 DW |
268 | priv->needtowakeup = 0; |
269 | priv->psstate = PS_STATE_AWAKE; | |
876c9d3a | 270 | |
a6c8700f | 271 | lbs_deb_host("CMD_RESP: ENTER_PS command response\n"); |
aa21c004 | 272 | if (priv->connect_status != LBS_CONNECTED) { |
876c9d3a MT |
273 | /* |
274 | * When Deauth Event received before Enter_PS command | |
275 | * response, We need to wake up the firmware. | |
276 | */ | |
a6c8700f | 277 | lbs_deb_host( |
10078321 | 278 | "disconnected, invoking lbs_ps_wakeup\n"); |
876c9d3a | 279 | |
aa21c004 DW |
280 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
281 | mutex_unlock(&priv->lock); | |
10078321 | 282 | lbs_ps_wakeup(priv, 0); |
aa21c004 DW |
283 | mutex_lock(&priv->lock); |
284 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 285 | } |
0aef64d7 | 286 | } else if (action == CMD_SUBCMD_EXIT_PS) { |
aa21c004 DW |
287 | priv->needtowakeup = 0; |
288 | priv->psstate = PS_STATE_FULL_POWER; | |
a6c8700f | 289 | lbs_deb_host("CMD_RESP: EXIT_PS command response\n"); |
876c9d3a | 290 | } else { |
a6c8700f | 291 | lbs_deb_host("CMD_RESP: PS action 0x%X\n", action); |
876c9d3a MT |
292 | } |
293 | ||
183aeac1 | 294 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 295 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
296 | |
297 | ret = 0; | |
298 | goto done; | |
299 | } | |
300 | ||
876c9d3a MT |
301 | /* If the command is not successful, cleanup and return failure */ |
302 | if ((result != 0 || !(respcmd & 0x8000))) { | |
a6c8700f HS |
303 | lbs_deb_host("CMD_RESP: error 0x%04x in command reply 0x%04x\n", |
304 | result, respcmd); | |
876c9d3a MT |
305 | /* |
306 | * Handling errors here | |
307 | */ | |
308 | switch (respcmd) { | |
6b63cd0f HS |
309 | case CMD_RET(CMD_GET_HW_SPEC): |
310 | case CMD_RET(CMD_802_11_RESET): | |
a6c8700f | 311 | lbs_deb_host("CMD_RESP: reset failed\n"); |
876c9d3a MT |
312 | break; |
313 | ||
314 | } | |
183aeac1 | 315 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 316 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
317 | |
318 | ret = -1; | |
319 | goto done; | |
320 | } | |
321 | ||
aa21c004 | 322 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
1723047d | 323 | |
7ad994de DW |
324 | if (priv->cur_cmd && priv->cur_cmd->callback) { |
325 | ret = priv->cur_cmd->callback(priv, priv->cur_cmd->callback_arg, | |
ddac4526 | 326 | resp); |
7ad994de | 327 | } else |
e98a88dd | 328 | ret = handle_cmd_response(priv, resp); |
1723047d | 329 | |
aa21c004 | 330 | spin_lock_irqsave(&priv->driver_lock, flags); |
1723047d | 331 | |
aa21c004 | 332 | if (priv->cur_cmd) { |
876c9d3a | 333 | /* Clean up and Put current command back to cmdfreeq */ |
183aeac1 | 334 | lbs_complete_command(priv, priv->cur_cmd, result); |
876c9d3a | 335 | } |
aa21c004 | 336 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
337 | |
338 | done: | |
aa21c004 | 339 | mutex_unlock(&priv->lock); |
a6c8700f | 340 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); |
876c9d3a MT |
341 | return ret; |
342 | } | |
343 | ||
b47ef243 DW |
344 | static int lbs_send_confirmwake(struct lbs_private *priv) |
345 | { | |
f539f2ef | 346 | struct cmd_header cmd; |
b47ef243 DW |
347 | int ret = 0; |
348 | ||
349 | lbs_deb_enter(LBS_DEB_HOST); | |
350 | ||
f539f2ef HS |
351 | cmd.command = cpu_to_le16(CMD_802_11_WAKEUP_CONFIRM); |
352 | cmd.size = cpu_to_le16(sizeof(cmd)); | |
353 | cmd.seqnum = cpu_to_le16(++priv->seqnum); | |
354 | cmd.result = 0; | |
b47ef243 | 355 | |
f539f2ef HS |
356 | lbs_deb_hex(LBS_DEB_HOST, "wake confirm", (u8 *) &cmd, |
357 | sizeof(cmd)); | |
b47ef243 | 358 | |
f539f2ef | 359 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &cmd, sizeof(cmd)); |
b47ef243 DW |
360 | if (ret) |
361 | lbs_pr_alert("SEND_WAKEC_CMD: Host to Card failed for Confirm Wake\n"); | |
362 | ||
363 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | |
364 | return ret; | |
365 | } | |
366 | ||
7919b89c | 367 | int lbs_process_event(struct lbs_private *priv, u32 event) |
876c9d3a MT |
368 | { |
369 | int ret = 0; | |
876c9d3a | 370 | |
9556d212 HS |
371 | lbs_deb_enter(LBS_DEB_CMD); |
372 | ||
7919b89c | 373 | switch (event) { |
876c9d3a | 374 | case MACREG_INT_CODE_LINK_SENSED: |
d4ff0ef6 | 375 | lbs_deb_cmd("EVENT: link sensed\n"); |
876c9d3a MT |
376 | break; |
377 | ||
378 | case MACREG_INT_CODE_DEAUTHENTICATED: | |
a6c8700f | 379 | lbs_deb_cmd("EVENT: deauthenticated\n"); |
10078321 | 380 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
381 | break; |
382 | ||
383 | case MACREG_INT_CODE_DISASSOCIATED: | |
a6c8700f | 384 | lbs_deb_cmd("EVENT: disassociated\n"); |
10078321 | 385 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
386 | break; |
387 | ||
0b3c07ff | 388 | case MACREG_INT_CODE_LINK_LOST_NO_SCAN: |
a6c8700f | 389 | lbs_deb_cmd("EVENT: link lost\n"); |
10078321 | 390 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
391 | break; |
392 | ||
393 | case MACREG_INT_CODE_PS_SLEEP: | |
d4ff0ef6 | 394 | lbs_deb_cmd("EVENT: ps sleep\n"); |
876c9d3a MT |
395 | |
396 | /* handle unexpected PS SLEEP event */ | |
aa21c004 | 397 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 398 | lbs_deb_cmd( |
a6c8700f | 399 | "EVENT: in FULL POWER mode, ignoreing PS_SLEEP\n"); |
876c9d3a MT |
400 | break; |
401 | } | |
aa21c004 | 402 | priv->psstate = PS_STATE_PRE_SLEEP; |
876c9d3a | 403 | |
d4ff0ef6 | 404 | lbs_ps_confirm_sleep(priv); |
876c9d3a MT |
405 | |
406 | break; | |
407 | ||
b47ef243 | 408 | case MACREG_INT_CODE_HOST_AWAKE: |
d4ff0ef6 | 409 | lbs_deb_cmd("EVENT: host awake\n"); |
49125454 AK |
410 | if (priv->reset_deep_sleep_wakeup) |
411 | priv->reset_deep_sleep_wakeup(priv); | |
412 | priv->is_deep_sleep = 0; | |
b47ef243 DW |
413 | lbs_send_confirmwake(priv); |
414 | break; | |
415 | ||
49125454 AK |
416 | case MACREG_INT_CODE_DEEP_SLEEP_AWAKE: |
417 | if (priv->reset_deep_sleep_wakeup) | |
418 | priv->reset_deep_sleep_wakeup(priv); | |
419 | lbs_deb_cmd("EVENT: ds awake\n"); | |
420 | priv->is_deep_sleep = 0; | |
421 | priv->wakeup_dev_required = 0; | |
422 | wake_up_interruptible(&priv->ds_awake_q); | |
423 | break; | |
424 | ||
876c9d3a | 425 | case MACREG_INT_CODE_PS_AWAKE: |
d4ff0ef6 | 426 | lbs_deb_cmd("EVENT: ps awake\n"); |
876c9d3a | 427 | /* handle unexpected PS AWAKE event */ |
aa21c004 | 428 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 429 | lbs_deb_cmd( |
876c9d3a MT |
430 | "EVENT: In FULL POWER mode - ignore PS AWAKE\n"); |
431 | break; | |
432 | } | |
433 | ||
aa21c004 | 434 | priv->psstate = PS_STATE_AWAKE; |
876c9d3a | 435 | |
aa21c004 | 436 | if (priv->needtowakeup) { |
876c9d3a MT |
437 | /* |
438 | * wait for the command processing to finish | |
439 | * before resuming sending | |
aa21c004 | 440 | * priv->needtowakeup will be set to FALSE |
10078321 | 441 | * in lbs_ps_wakeup() |
876c9d3a | 442 | */ |
a6c8700f | 443 | lbs_deb_cmd("waking up ...\n"); |
10078321 | 444 | lbs_ps_wakeup(priv, 0); |
876c9d3a MT |
445 | } |
446 | break; | |
447 | ||
448 | case MACREG_INT_CODE_MIC_ERR_UNICAST: | |
9012b28a | 449 | lbs_deb_cmd("EVENT: UNICAST MIC ERROR\n"); |
560c6338 | 450 | lbs_send_mic_failureevent(priv, event); |
876c9d3a MT |
451 | break; |
452 | ||
453 | case MACREG_INT_CODE_MIC_ERR_MULTICAST: | |
9012b28a | 454 | lbs_deb_cmd("EVENT: MULTICAST MIC ERROR\n"); |
560c6338 | 455 | lbs_send_mic_failureevent(priv, event); |
876c9d3a | 456 | break; |
d4ff0ef6 | 457 | |
876c9d3a | 458 | case MACREG_INT_CODE_MIB_CHANGED: |
d4ff0ef6 HS |
459 | lbs_deb_cmd("EVENT: MIB CHANGED\n"); |
460 | break; | |
876c9d3a | 461 | case MACREG_INT_CODE_INIT_DONE: |
d4ff0ef6 | 462 | lbs_deb_cmd("EVENT: INIT DONE\n"); |
876c9d3a | 463 | break; |
876c9d3a | 464 | case MACREG_INT_CODE_ADHOC_BCN_LOST: |
a6c8700f | 465 | lbs_deb_cmd("EVENT: ADHOC beacon lost\n"); |
876c9d3a | 466 | break; |
876c9d3a | 467 | case MACREG_INT_CODE_RSSI_LOW: |
a6c8700f | 468 | lbs_pr_alert("EVENT: rssi low\n"); |
876c9d3a MT |
469 | break; |
470 | case MACREG_INT_CODE_SNR_LOW: | |
a6c8700f | 471 | lbs_pr_alert("EVENT: snr low\n"); |
876c9d3a MT |
472 | break; |
473 | case MACREG_INT_CODE_MAX_FAIL: | |
a6c8700f | 474 | lbs_pr_alert("EVENT: max fail\n"); |
876c9d3a MT |
475 | break; |
476 | case MACREG_INT_CODE_RSSI_HIGH: | |
a6c8700f | 477 | lbs_pr_alert("EVENT: rssi high\n"); |
876c9d3a MT |
478 | break; |
479 | case MACREG_INT_CODE_SNR_HIGH: | |
a6c8700f | 480 | lbs_pr_alert("EVENT: snr high\n"); |
876c9d3a MT |
481 | break; |
482 | ||
7d8d28b3 | 483 | case MACREG_INT_CODE_MESH_AUTO_STARTED: |
d6ede678 HS |
484 | /* Ignore spurious autostart events */ |
485 | lbs_pr_info("EVENT: MESH_AUTO_STARTED (ignoring)\n"); | |
7d8d28b3 LCCR |
486 | break; |
487 | ||
876c9d3a | 488 | default: |
7919b89c | 489 | lbs_pr_alert("EVENT: unknown event id %d\n", event); |
876c9d3a MT |
490 | break; |
491 | } | |
492 | ||
9556d212 | 493 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
876c9d3a MT |
494 | return ret; |
495 | } |