]>
Commit | Line | Data |
---|---|---|
fb9987d0 S |
1 | /* |
2 | * Copyright (c) 2010 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "htc.h" | |
18 | ||
19 | /******/ | |
20 | /* TX */ | |
21 | /******/ | |
22 | ||
ca74b83b S |
23 | #define ATH9K_HTC_INIT_TXQ(subtype) do { \ |
24 | qi.tqi_subtype = subtype; \ | |
25 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \ | |
26 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \ | |
27 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \ | |
28 | qi.tqi_physCompBuf = 0; \ | |
29 | qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \ | |
30 | TXQ_FLAG_TXDESCINT_ENABLE; \ | |
31 | } while (0) | |
32 | ||
fb9987d0 S |
33 | int get_hw_qnum(u16 queue, int *hwq_map) |
34 | { | |
35 | switch (queue) { | |
36 | case 0: | |
e8c35a77 | 37 | return hwq_map[WME_AC_VO]; |
fb9987d0 | 38 | case 1: |
e8c35a77 | 39 | return hwq_map[WME_AC_VI]; |
fb9987d0 | 40 | case 2: |
e8c35a77 | 41 | return hwq_map[WME_AC_BE]; |
fb9987d0 | 42 | case 3: |
e8c35a77 | 43 | return hwq_map[WME_AC_BK]; |
fb9987d0 | 44 | default: |
e8c35a77 | 45 | return hwq_map[WME_AC_BE]; |
fb9987d0 S |
46 | } |
47 | } | |
48 | ||
e1572c5e S |
49 | int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum, |
50 | struct ath9k_tx_queue_info *qinfo) | |
fb9987d0 S |
51 | { |
52 | struct ath_hw *ah = priv->ah; | |
53 | int error = 0; | |
54 | struct ath9k_tx_queue_info qi; | |
55 | ||
56 | ath9k_hw_get_txq_props(ah, qnum, &qi); | |
57 | ||
58 | qi.tqi_aifs = qinfo->tqi_aifs; | |
59 | qi.tqi_cwmin = qinfo->tqi_cwmin / 2; /* XXX */ | |
60 | qi.tqi_cwmax = qinfo->tqi_cwmax; | |
61 | qi.tqi_burstTime = qinfo->tqi_burstTime; | |
62 | qi.tqi_readyTime = qinfo->tqi_readyTime; | |
63 | ||
64 | if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) { | |
65 | ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, | |
66 | "Unable to update hardware queue %u!\n", qnum); | |
67 | error = -EIO; | |
68 | } else { | |
69 | ath9k_hw_resettxqueue(ah, qnum); | |
70 | } | |
71 | ||
72 | return error; | |
73 | } | |
74 | ||
75 | int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb) | |
76 | { | |
77 | struct ieee80211_hdr *hdr; | |
78 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | |
79 | struct ieee80211_sta *sta = tx_info->control.sta; | |
80 | struct ath9k_htc_sta *ista; | |
fb9987d0 S |
81 | struct ath9k_htc_tx_ctl tx_ctl; |
82 | enum htc_endpoint_id epid; | |
b80841c9 | 83 | u16 qnum; |
fb9987d0 S |
84 | __le16 fc; |
85 | u8 *tx_fhdr; | |
da93f106 | 86 | u8 sta_idx, vif_idx; |
fb9987d0 S |
87 | |
88 | hdr = (struct ieee80211_hdr *) skb->data; | |
89 | fc = hdr->frame_control; | |
90 | ||
da93f106 RM |
91 | if (tx_info->control.vif && |
92 | (struct ath9k_htc_vif *) tx_info->control.vif->drv_priv) | |
93 | vif_idx = ((struct ath9k_htc_vif *) | |
94 | tx_info->control.vif->drv_priv)->index; | |
95 | else | |
96 | vif_idx = priv->nvifs; | |
97 | ||
fb9987d0 S |
98 | if (sta) { |
99 | ista = (struct ath9k_htc_sta *) sta->drv_priv; | |
100 | sta_idx = ista->index; | |
101 | } else { | |
102 | sta_idx = 0; | |
103 | } | |
104 | ||
105 | memset(&tx_ctl, 0, sizeof(struct ath9k_htc_tx_ctl)); | |
106 | ||
107 | if (ieee80211_is_data(fc)) { | |
108 | struct tx_frame_hdr tx_hdr; | |
109 | u8 *qc; | |
110 | ||
111 | memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr)); | |
112 | ||
113 | tx_hdr.node_idx = sta_idx; | |
da93f106 | 114 | tx_hdr.vif_idx = vif_idx; |
fb9987d0 S |
115 | |
116 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { | |
117 | tx_ctl.type = ATH9K_HTC_AMPDU; | |
118 | tx_hdr.data_type = ATH9K_HTC_AMPDU; | |
119 | } else { | |
120 | tx_ctl.type = ATH9K_HTC_NORMAL; | |
121 | tx_hdr.data_type = ATH9K_HTC_NORMAL; | |
122 | } | |
123 | ||
3bf30b56 | 124 | if (ieee80211_is_data_qos(fc)) { |
fb9987d0 S |
125 | qc = ieee80211_get_qos_ctl(hdr); |
126 | tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | |
127 | } | |
128 | ||
129 | /* Check for RTS protection */ | |
130 | if (priv->hw->wiphy->rts_threshold != (u32) -1) | |
131 | if (skb->len > priv->hw->wiphy->rts_threshold) | |
132 | tx_hdr.flags |= ATH9K_HTC_TX_RTSCTS; | |
133 | ||
134 | /* CTS-to-self */ | |
135 | if (!(tx_hdr.flags & ATH9K_HTC_TX_RTSCTS) && | |
136 | (priv->op_flags & OP_PROTECT_ENABLE)) | |
137 | tx_hdr.flags |= ATH9K_HTC_TX_CTSONLY; | |
138 | ||
139 | tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb); | |
140 | if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR) | |
141 | tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID; | |
142 | else | |
143 | tx_hdr.keyix = tx_info->control.hw_key->hw_key_idx; | |
144 | ||
145 | tx_fhdr = skb_push(skb, sizeof(tx_hdr)); | |
146 | memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr)); | |
147 | ||
148 | qnum = skb_get_queue_mapping(skb); | |
fb9987d0 | 149 | |
b80841c9 | 150 | switch (qnum) { |
fb9987d0 | 151 | case 0: |
b80841c9 S |
152 | TX_QSTAT_INC(WME_AC_VO); |
153 | epid = priv->data_vo_ep; | |
fb9987d0 | 154 | break; |
b80841c9 | 155 | case 1: |
2edb4583 | 156 | TX_QSTAT_INC(WME_AC_VI); |
fb9987d0 S |
157 | epid = priv->data_vi_ep; |
158 | break; | |
b80841c9 S |
159 | case 2: |
160 | TX_QSTAT_INC(WME_AC_BE); | |
161 | epid = priv->data_be_ep; | |
fb9987d0 | 162 | break; |
b80841c9 | 163 | case 3: |
fb9987d0 | 164 | default: |
2edb4583 | 165 | TX_QSTAT_INC(WME_AC_BK); |
fb9987d0 S |
166 | epid = priv->data_bk_ep; |
167 | break; | |
168 | } | |
169 | } else { | |
170 | struct tx_mgmt_hdr mgmt_hdr; | |
171 | ||
172 | memset(&mgmt_hdr, 0, sizeof(struct tx_mgmt_hdr)); | |
173 | ||
174 | tx_ctl.type = ATH9K_HTC_NORMAL; | |
175 | ||
176 | mgmt_hdr.node_idx = sta_idx; | |
da93f106 | 177 | mgmt_hdr.vif_idx = vif_idx; |
fb9987d0 S |
178 | mgmt_hdr.tidno = 0; |
179 | mgmt_hdr.flags = 0; | |
180 | ||
181 | mgmt_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb); | |
182 | if (mgmt_hdr.key_type == ATH9K_KEY_TYPE_CLEAR) | |
183 | mgmt_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID; | |
184 | else | |
185 | mgmt_hdr.keyix = tx_info->control.hw_key->hw_key_idx; | |
186 | ||
187 | tx_fhdr = skb_push(skb, sizeof(mgmt_hdr)); | |
188 | memcpy(tx_fhdr, (u8 *) &mgmt_hdr, sizeof(mgmt_hdr)); | |
189 | epid = priv->mgmt_ep; | |
190 | } | |
191 | ||
192 | return htc_send(priv->htc, skb, epid, &tx_ctl); | |
193 | } | |
194 | ||
d7ca2139 S |
195 | static bool ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv, |
196 | struct ath9k_htc_sta *ista, u8 tid) | |
197 | { | |
198 | bool ret = false; | |
199 | ||
200 | spin_lock_bh(&priv->tx_lock); | |
201 | if ((tid < ATH9K_HTC_MAX_TID) && (ista->tid_state[tid] == AGGR_STOP)) | |
202 | ret = true; | |
203 | spin_unlock_bh(&priv->tx_lock); | |
204 | ||
205 | return ret; | |
206 | } | |
207 | ||
fb9987d0 S |
208 | void ath9k_tx_tasklet(unsigned long data) |
209 | { | |
210 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data; | |
211 | struct ieee80211_sta *sta; | |
212 | struct ieee80211_hdr *hdr; | |
213 | struct ieee80211_tx_info *tx_info; | |
214 | struct sk_buff *skb = NULL; | |
215 | __le16 fc; | |
216 | ||
217 | while ((skb = skb_dequeue(&priv->tx_queue)) != NULL) { | |
218 | ||
219 | hdr = (struct ieee80211_hdr *) skb->data; | |
220 | fc = hdr->frame_control; | |
221 | tx_info = IEEE80211_SKB_CB(skb); | |
ef98c3cd S |
222 | |
223 | memset(&tx_info->status, 0, sizeof(tx_info->status)); | |
fb9987d0 S |
224 | |
225 | rcu_read_lock(); | |
226 | ||
ef98c3cd S |
227 | sta = ieee80211_find_sta(priv->vif, hdr->addr1); |
228 | if (!sta) { | |
229 | rcu_read_unlock(); | |
230 | ieee80211_tx_status(priv->hw, skb); | |
231 | continue; | |
232 | } | |
233 | ||
234 | /* Check if we need to start aggregation */ | |
235 | ||
fb9987d0 | 236 | if (sta && conf_is_ht(&priv->hw->conf) && |
d7ca2139 | 237 | !(skb->protocol == cpu_to_be16(ETH_P_PAE))) { |
fb9987d0 S |
238 | if (ieee80211_is_data_qos(fc)) { |
239 | u8 *qc, tid; | |
240 | struct ath9k_htc_sta *ista; | |
241 | ||
242 | qc = ieee80211_get_qos_ctl(hdr); | |
243 | tid = qc[0] & 0xf; | |
244 | ista = (struct ath9k_htc_sta *)sta->drv_priv; | |
245 | ||
d7ca2139 | 246 | if (ath9k_htc_check_tx_aggr(priv, ista, tid)) { |
fb9987d0 | 247 | ieee80211_start_tx_ba_session(sta, tid); |
d7ca2139 | 248 | spin_lock_bh(&priv->tx_lock); |
fb9987d0 | 249 | ista->tid_state[tid] = AGGR_PROGRESS; |
d7ca2139 | 250 | spin_unlock_bh(&priv->tx_lock); |
fb9987d0 S |
251 | } |
252 | } | |
253 | } | |
254 | ||
255 | rcu_read_unlock(); | |
256 | ||
ef98c3cd | 257 | /* Send status to mac80211 */ |
fb9987d0 S |
258 | ieee80211_tx_status(priv->hw, skb); |
259 | } | |
7757dfed S |
260 | |
261 | /* Wake TX queues if needed */ | |
262 | spin_lock_bh(&priv->tx_lock); | |
263 | if (priv->tx_queues_stop) { | |
264 | priv->tx_queues_stop = false; | |
265 | spin_unlock_bh(&priv->tx_lock); | |
266 | ath_print(ath9k_hw_common(priv->ah), ATH_DBG_XMIT, | |
267 | "Waking up TX queues\n"); | |
268 | ieee80211_wake_queues(priv->hw); | |
269 | return; | |
270 | } | |
271 | spin_unlock_bh(&priv->tx_lock); | |
fb9987d0 S |
272 | } |
273 | ||
274 | void ath9k_htc_txep(void *drv_priv, struct sk_buff *skb, | |
275 | enum htc_endpoint_id ep_id, bool txok) | |
276 | { | |
277 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) drv_priv; | |
d439260e | 278 | struct ath_common *common = ath9k_hw_common(priv->ah); |
fb9987d0 S |
279 | struct ieee80211_tx_info *tx_info; |
280 | ||
281 | if (!skb) | |
282 | return; | |
283 | ||
d439260e | 284 | if (ep_id == priv->mgmt_ep) { |
fb9987d0 | 285 | skb_pull(skb, sizeof(struct tx_mgmt_hdr)); |
d439260e S |
286 | } else if ((ep_id == priv->data_bk_ep) || |
287 | (ep_id == priv->data_be_ep) || | |
288 | (ep_id == priv->data_vi_ep) || | |
289 | (ep_id == priv->data_vo_ep)) { | |
fb9987d0 | 290 | skb_pull(skb, sizeof(struct tx_frame_hdr)); |
d439260e S |
291 | } else { |
292 | ath_print(common, ATH_DBG_FATAL, | |
293 | "Unsupported TX EPID: %d\n", ep_id); | |
294 | dev_kfree_skb_any(skb); | |
295 | return; | |
296 | } | |
fb9987d0 S |
297 | |
298 | tx_info = IEEE80211_SKB_CB(skb); | |
299 | ||
300 | if (txok) | |
301 | tx_info->flags |= IEEE80211_TX_STAT_ACK; | |
302 | ||
303 | skb_queue_tail(&priv->tx_queue, skb); | |
304 | tasklet_schedule(&priv->tx_tasklet); | |
305 | } | |
306 | ||
307 | int ath9k_tx_init(struct ath9k_htc_priv *priv) | |
308 | { | |
309 | skb_queue_head_init(&priv->tx_queue); | |
310 | return 0; | |
311 | } | |
312 | ||
313 | void ath9k_tx_cleanup(struct ath9k_htc_priv *priv) | |
314 | { | |
315 | ||
316 | } | |
317 | ||
e8c35a77 | 318 | bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, int subtype) |
fb9987d0 S |
319 | { |
320 | struct ath_hw *ah = priv->ah; | |
321 | struct ath_common *common = ath9k_hw_common(ah); | |
322 | struct ath9k_tx_queue_info qi; | |
323 | int qnum; | |
324 | ||
325 | memset(&qi, 0, sizeof(qi)); | |
ca74b83b | 326 | ATH9K_HTC_INIT_TXQ(subtype); |
fb9987d0 S |
327 | |
328 | qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi); | |
329 | if (qnum == -1) | |
330 | return false; | |
331 | ||
332 | if (qnum >= ARRAY_SIZE(priv->hwq_map)) { | |
333 | ath_print(common, ATH_DBG_FATAL, | |
334 | "qnum %u out of range, max %u!\n", | |
335 | qnum, (unsigned int)ARRAY_SIZE(priv->hwq_map)); | |
336 | ath9k_hw_releasetxqueue(ah, qnum); | |
337 | return false; | |
338 | } | |
339 | ||
340 | priv->hwq_map[subtype] = qnum; | |
341 | return true; | |
342 | } | |
343 | ||
ca74b83b S |
344 | int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv) |
345 | { | |
346 | struct ath9k_tx_queue_info qi; | |
347 | ||
348 | memset(&qi, 0, sizeof(qi)); | |
349 | ATH9K_HTC_INIT_TXQ(0); | |
350 | ||
351 | return ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_CAB, &qi); | |
352 | } | |
353 | ||
fb9987d0 S |
354 | /******/ |
355 | /* RX */ | |
356 | /******/ | |
357 | ||
0995d110 S |
358 | /* |
359 | * Calculate the RX filter to be set in the HW. | |
360 | */ | |
361 | u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv) | |
362 | { | |
363 | #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR) | |
364 | ||
365 | struct ath_hw *ah = priv->ah; | |
366 | u32 rfilt; | |
367 | ||
368 | rfilt = (ath9k_hw_getrxfilter(ah) & RX_FILTER_PRESERVE) | |
369 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST | |
370 | | ATH9K_RX_FILTER_MCAST; | |
371 | ||
94a40c0c | 372 | if (priv->rxfilter & FIF_PROBE_REQ) |
0995d110 S |
373 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; |
374 | ||
375 | /* | |
376 | * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station | |
377 | * mode interface or when in monitor mode. AP mode does not need this | |
378 | * since it receives all in-BSS frames anyway. | |
379 | */ | |
380 | if (((ah->opmode != NL80211_IFTYPE_AP) && | |
381 | (priv->rxfilter & FIF_PROMISC_IN_BSS)) || | |
382 | (ah->opmode == NL80211_IFTYPE_MONITOR)) | |
383 | rfilt |= ATH9K_RX_FILTER_PROM; | |
384 | ||
385 | if (priv->rxfilter & FIF_CONTROL) | |
386 | rfilt |= ATH9K_RX_FILTER_CONTROL; | |
387 | ||
388 | if ((ah->opmode == NL80211_IFTYPE_STATION) && | |
389 | !(priv->rxfilter & FIF_BCN_PRBRESP_PROMISC)) | |
390 | rfilt |= ATH9K_RX_FILTER_MYBEACON; | |
391 | else | |
392 | rfilt |= ATH9K_RX_FILTER_BEACON; | |
393 | ||
394 | if (conf_is_ht(&priv->hw->conf)) | |
395 | rfilt |= ATH9K_RX_FILTER_COMP_BAR; | |
396 | ||
397 | return rfilt; | |
398 | ||
399 | #undef RX_FILTER_PRESERVE | |
400 | } | |
401 | ||
402 | /* | |
403 | * Recv initialization for opmode change. | |
404 | */ | |
405 | static void ath9k_htc_opmode_init(struct ath9k_htc_priv *priv) | |
406 | { | |
407 | struct ath_hw *ah = priv->ah; | |
408 | struct ath_common *common = ath9k_hw_common(ah); | |
409 | ||
410 | u32 rfilt, mfilt[2]; | |
411 | ||
412 | /* configure rx filter */ | |
413 | rfilt = ath9k_htc_calcrxfilter(priv); | |
414 | ath9k_hw_setrxfilter(ah, rfilt); | |
415 | ||
416 | /* configure bssid mask */ | |
364734fa | 417 | ath_hw_setbssidmask(common); |
0995d110 S |
418 | |
419 | /* configure operational mode */ | |
420 | ath9k_hw_setopmode(ah); | |
421 | ||
0995d110 S |
422 | /* calculate and install multicast filter */ |
423 | mfilt[0] = mfilt[1] = ~0; | |
424 | ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]); | |
425 | } | |
426 | ||
fb9987d0 S |
427 | void ath9k_host_rx_init(struct ath9k_htc_priv *priv) |
428 | { | |
429 | ath9k_hw_rxena(priv->ah); | |
0995d110 | 430 | ath9k_htc_opmode_init(priv); |
40346b66 | 431 | ath9k_hw_startpcureceive(priv->ah, (priv->op_flags & OP_SCANNING)); |
fb9987d0 S |
432 | priv->rx.last_rssi = ATH_RSSI_DUMMY_MARKER; |
433 | } | |
434 | ||
435 | static void ath9k_process_rate(struct ieee80211_hw *hw, | |
436 | struct ieee80211_rx_status *rxs, | |
437 | u8 rx_rate, u8 rs_flags) | |
438 | { | |
439 | struct ieee80211_supported_band *sband; | |
440 | enum ieee80211_band band; | |
441 | unsigned int i = 0; | |
442 | ||
443 | if (rx_rate & 0x80) { | |
444 | /* HT rate */ | |
445 | rxs->flag |= RX_FLAG_HT; | |
446 | if (rs_flags & ATH9K_RX_2040) | |
447 | rxs->flag |= RX_FLAG_40MHZ; | |
448 | if (rs_flags & ATH9K_RX_GI) | |
449 | rxs->flag |= RX_FLAG_SHORT_GI; | |
450 | rxs->rate_idx = rx_rate & 0x7f; | |
451 | return; | |
452 | } | |
453 | ||
454 | band = hw->conf.channel->band; | |
455 | sband = hw->wiphy->bands[band]; | |
456 | ||
457 | for (i = 0; i < sband->n_bitrates; i++) { | |
458 | if (sband->bitrates[i].hw_value == rx_rate) { | |
459 | rxs->rate_idx = i; | |
460 | return; | |
461 | } | |
462 | if (sband->bitrates[i].hw_value_short == rx_rate) { | |
463 | rxs->rate_idx = i; | |
464 | rxs->flag |= RX_FLAG_SHORTPRE; | |
465 | return; | |
466 | } | |
467 | } | |
468 | ||
469 | } | |
470 | ||
471 | static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv, | |
472 | struct ath9k_htc_rxbuf *rxbuf, | |
473 | struct ieee80211_rx_status *rx_status) | |
474 | ||
475 | { | |
476 | struct ieee80211_hdr *hdr; | |
477 | struct ieee80211_hw *hw = priv->hw; | |
478 | struct sk_buff *skb = rxbuf->skb; | |
479 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
4f824719 | 480 | struct ath_htc_rx_status *rxstatus; |
fb9987d0 S |
481 | int hdrlen, padpos, padsize; |
482 | int last_rssi = ATH_RSSI_DUMMY_MARKER; | |
483 | __le16 fc; | |
484 | ||
4f824719 S |
485 | if (skb->len <= HTC_RX_FRAME_HEADER_SIZE) { |
486 | ath_print(common, ATH_DBG_FATAL, | |
487 | "Corrupted RX frame, dropping\n"); | |
488 | goto rx_next; | |
489 | } | |
490 | ||
491 | rxstatus = (struct ath_htc_rx_status *)skb->data; | |
492 | ||
493 | if (be16_to_cpu(rxstatus->rs_datalen) - | |
494 | (skb->len - HTC_RX_FRAME_HEADER_SIZE) != 0) { | |
495 | ath_print(common, ATH_DBG_FATAL, | |
496 | "Corrupted RX data len, dropping " | |
497 | "(dlen: %d, skblen: %d)\n", | |
498 | rxstatus->rs_datalen, skb->len); | |
499 | goto rx_next; | |
500 | } | |
501 | ||
502 | /* Get the RX status information */ | |
503 | memcpy(&rxbuf->rxstatus, rxstatus, HTC_RX_FRAME_HEADER_SIZE); | |
504 | skb_pull(skb, HTC_RX_FRAME_HEADER_SIZE); | |
505 | ||
fb9987d0 S |
506 | hdr = (struct ieee80211_hdr *)skb->data; |
507 | fc = hdr->frame_control; | |
508 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); | |
509 | ||
510 | padpos = ath9k_cmn_padpos(fc); | |
511 | ||
512 | padsize = padpos & 3; | |
32fbccaf | 513 | if (padsize && skb->len >= padpos+padsize+FCS_LEN) { |
fb9987d0 S |
514 | memmove(skb->data + padsize, skb->data, padpos); |
515 | skb_pull(skb, padsize); | |
516 | } | |
517 | ||
518 | memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); | |
519 | ||
520 | if (rxbuf->rxstatus.rs_status != 0) { | |
521 | if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_CRC) | |
522 | rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; | |
523 | if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_PHY) | |
524 | goto rx_next; | |
525 | ||
526 | if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT) { | |
527 | /* FIXME */ | |
528 | } else if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_MIC) { | |
529 | if (ieee80211_is_ctl(fc)) | |
530 | /* | |
531 | * Sometimes, we get invalid | |
532 | * MIC failures on valid control frames. | |
533 | * Remove these mic errors. | |
534 | */ | |
535 | rxbuf->rxstatus.rs_status &= ~ATH9K_RXERR_MIC; | |
536 | else | |
537 | rx_status->flag |= RX_FLAG_MMIC_ERROR; | |
538 | } | |
539 | ||
540 | /* | |
541 | * Reject error frames with the exception of | |
542 | * decryption and MIC failures. For monitor mode, | |
543 | * we also ignore the CRC error. | |
544 | */ | |
545 | if (priv->ah->opmode == NL80211_IFTYPE_MONITOR) { | |
546 | if (rxbuf->rxstatus.rs_status & | |
547 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | | |
548 | ATH9K_RXERR_CRC)) | |
549 | goto rx_next; | |
550 | } else { | |
551 | if (rxbuf->rxstatus.rs_status & | |
552 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { | |
553 | goto rx_next; | |
554 | } | |
555 | } | |
556 | } | |
557 | ||
558 | if (!(rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT)) { | |
559 | u8 keyix; | |
560 | keyix = rxbuf->rxstatus.rs_keyix; | |
561 | if (keyix != ATH9K_RXKEYIX_INVALID) { | |
562 | rx_status->flag |= RX_FLAG_DECRYPTED; | |
563 | } else if (ieee80211_has_protected(fc) && | |
564 | skb->len >= hdrlen + 4) { | |
565 | keyix = skb->data[hdrlen + 3] >> 6; | |
566 | if (test_bit(keyix, common->keymap)) | |
567 | rx_status->flag |= RX_FLAG_DECRYPTED; | |
568 | } | |
569 | } | |
570 | ||
571 | ath9k_process_rate(hw, rx_status, rxbuf->rxstatus.rs_rate, | |
572 | rxbuf->rxstatus.rs_flags); | |
573 | ||
574 | if (priv->op_flags & OP_ASSOCIATED) { | |
575 | if (rxbuf->rxstatus.rs_rssi != ATH9K_RSSI_BAD && | |
576 | !rxbuf->rxstatus.rs_moreaggr) | |
577 | ATH_RSSI_LPF(priv->rx.last_rssi, | |
578 | rxbuf->rxstatus.rs_rssi); | |
579 | ||
580 | last_rssi = priv->rx.last_rssi; | |
581 | ||
582 | if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) | |
583 | rxbuf->rxstatus.rs_rssi = ATH_EP_RND(last_rssi, | |
584 | ATH_RSSI_EP_MULTIPLIER); | |
585 | ||
586 | if (rxbuf->rxstatus.rs_rssi < 0) | |
587 | rxbuf->rxstatus.rs_rssi = 0; | |
588 | ||
589 | if (ieee80211_is_beacon(fc)) | |
590 | priv->ah->stats.avgbrssi = rxbuf->rxstatus.rs_rssi; | |
591 | } | |
592 | ||
7f1f5a00 | 593 | rx_status->mactime = be64_to_cpu(rxbuf->rxstatus.rs_tstamp); |
fb9987d0 S |
594 | rx_status->band = hw->conf.channel->band; |
595 | rx_status->freq = hw->conf.channel->center_freq; | |
596 | rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR; | |
597 | rx_status->antenna = rxbuf->rxstatus.rs_antenna; | |
598 | rx_status->flag |= RX_FLAG_TSFT; | |
599 | ||
600 | return true; | |
601 | ||
602 | rx_next: | |
603 | return false; | |
604 | } | |
605 | ||
606 | /* | |
607 | * FIXME: Handle FLUSH later on. | |
608 | */ | |
609 | void ath9k_rx_tasklet(unsigned long data) | |
610 | { | |
611 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data; | |
612 | struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL; | |
613 | struct ieee80211_rx_status rx_status; | |
614 | struct sk_buff *skb; | |
615 | unsigned long flags; | |
bde748a4 | 616 | struct ieee80211_hdr *hdr; |
fb9987d0 S |
617 | |
618 | do { | |
619 | spin_lock_irqsave(&priv->rx.rxbuflock, flags); | |
620 | list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) { | |
621 | if (tmp_buf->in_process) { | |
622 | rxbuf = tmp_buf; | |
623 | break; | |
624 | } | |
625 | } | |
626 | ||
627 | if (rxbuf == NULL) { | |
628 | spin_unlock_irqrestore(&priv->rx.rxbuflock, flags); | |
629 | break; | |
630 | } | |
631 | ||
632 | if (!rxbuf->skb) | |
633 | goto requeue; | |
634 | ||
635 | if (!ath9k_rx_prepare(priv, rxbuf, &rx_status)) { | |
636 | dev_kfree_skb_any(rxbuf->skb); | |
637 | goto requeue; | |
638 | } | |
639 | ||
640 | memcpy(IEEE80211_SKB_RXCB(rxbuf->skb), &rx_status, | |
641 | sizeof(struct ieee80211_rx_status)); | |
642 | skb = rxbuf->skb; | |
bde748a4 VN |
643 | hdr = (struct ieee80211_hdr *) skb->data; |
644 | ||
645 | if (ieee80211_is_beacon(hdr->frame_control) && priv->ps_enabled) | |
646 | ieee80211_queue_work(priv->hw, &priv->ps_work); | |
647 | ||
fb9987d0 S |
648 | spin_unlock_irqrestore(&priv->rx.rxbuflock, flags); |
649 | ||
650 | ieee80211_rx(priv->hw, skb); | |
651 | ||
652 | spin_lock_irqsave(&priv->rx.rxbuflock, flags); | |
653 | requeue: | |
654 | rxbuf->in_process = false; | |
655 | rxbuf->skb = NULL; | |
656 | list_move_tail(&rxbuf->list, &priv->rx.rxbuf); | |
657 | rxbuf = NULL; | |
658 | spin_unlock_irqrestore(&priv->rx.rxbuflock, flags); | |
659 | } while (1); | |
660 | ||
661 | } | |
662 | ||
663 | void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb, | |
664 | enum htc_endpoint_id ep_id) | |
665 | { | |
666 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)drv_priv; | |
667 | struct ath_hw *ah = priv->ah; | |
668 | struct ath_common *common = ath9k_hw_common(ah); | |
669 | struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL; | |
fb9987d0 S |
670 | |
671 | spin_lock(&priv->rx.rxbuflock); | |
672 | list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) { | |
673 | if (!tmp_buf->in_process) { | |
674 | rxbuf = tmp_buf; | |
675 | break; | |
676 | } | |
677 | } | |
678 | spin_unlock(&priv->rx.rxbuflock); | |
679 | ||
680 | if (rxbuf == NULL) { | |
681 | ath_print(common, ATH_DBG_ANY, | |
682 | "No free RX buffer\n"); | |
683 | goto err; | |
684 | } | |
685 | ||
fb9987d0 | 686 | spin_lock(&priv->rx.rxbuflock); |
fb9987d0 S |
687 | rxbuf->skb = skb; |
688 | rxbuf->in_process = true; | |
689 | spin_unlock(&priv->rx.rxbuflock); | |
690 | ||
691 | tasklet_schedule(&priv->rx_tasklet); | |
692 | return; | |
693 | err: | |
694 | dev_kfree_skb_any(skb); | |
fb9987d0 S |
695 | } |
696 | ||
697 | /* FIXME: Locking for cleanup/init */ | |
698 | ||
699 | void ath9k_rx_cleanup(struct ath9k_htc_priv *priv) | |
700 | { | |
701 | struct ath9k_htc_rxbuf *rxbuf, *tbuf; | |
702 | ||
703 | list_for_each_entry_safe(rxbuf, tbuf, &priv->rx.rxbuf, list) { | |
704 | list_del(&rxbuf->list); | |
705 | if (rxbuf->skb) | |
706 | dev_kfree_skb_any(rxbuf->skb); | |
707 | kfree(rxbuf); | |
708 | } | |
709 | } | |
710 | ||
711 | int ath9k_rx_init(struct ath9k_htc_priv *priv) | |
712 | { | |
713 | struct ath_hw *ah = priv->ah; | |
714 | struct ath_common *common = ath9k_hw_common(ah); | |
715 | struct ath9k_htc_rxbuf *rxbuf; | |
716 | int i = 0; | |
717 | ||
718 | INIT_LIST_HEAD(&priv->rx.rxbuf); | |
719 | spin_lock_init(&priv->rx.rxbuflock); | |
720 | ||
721 | for (i = 0; i < ATH9K_HTC_RXBUF; i++) { | |
722 | rxbuf = kzalloc(sizeof(struct ath9k_htc_rxbuf), GFP_KERNEL); | |
723 | if (rxbuf == NULL) { | |
724 | ath_print(common, ATH_DBG_FATAL, | |
725 | "Unable to allocate RX buffers\n"); | |
726 | goto err; | |
727 | } | |
728 | list_add_tail(&rxbuf->list, &priv->rx.rxbuf); | |
729 | } | |
730 | ||
731 | return 0; | |
732 | ||
733 | err: | |
734 | ath9k_rx_cleanup(priv); | |
735 | return -ENOMEM; | |
736 | } |