]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/vxge/vxge-main.c
drivers/net/s2io.c: Remove unnecessary casts of pci_get_drvdata
[net-next-2.6.git] / drivers / net / vxge / vxge-main.c
CommitLineData
703da5a1
RV
1/******************************************************************************
2* This software may be used and distributed according to the terms of
3* the GNU General Public License (GPL), incorporated herein by reference.
4* Drivers based on or derived from this code fall under the GPL and must
5* retain the authorship, copyright and license notice. This file is not
6* a complete program and may only be used when the entire operating
7* system is licensed under the GPL.
8* See the file COPYING in this distribution for more information.
9*
926bd900 10* vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
703da5a1 11* Virtualized Server Adapter.
926bd900 12* Copyright(c) 2002-2010 Exar Corp.
703da5a1
RV
13*
14* The module loadable parameters that are supported by the driver and a brief
15* explanation of all the variables:
16* vlan_tag_strip:
17* Strip VLAN Tag enable/disable. Instructs the device to remove
18* the VLAN tag from all received tagged frames that are not
19* replicated at the internal L2 switch.
20* 0 - Do not strip the VLAN tag.
21* 1 - Strip the VLAN tag.
22*
23* addr_learn_en:
24* Enable learning the mac address of the guest OS interface in
25* a virtualization environment.
26* 0 - DISABLE
27* 1 - ENABLE
28*
29* max_config_port:
30* Maximum number of port to be supported.
31* MIN -1 and MAX - 2
32*
33* max_config_vpath:
34* This configures the maximum no of VPATH configures for each
35* device function.
36* MIN - 1 and MAX - 17
37*
38* max_config_dev:
39* This configures maximum no of Device function to be enabled.
40* MIN - 1 and MAX - 17
41*
42******************************************************************************/
43
75f5e1c6
JP
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
703da5a1
RV
46#include <linux/if_vlan.h>
47#include <linux/pci.h>
5a0e3ad6 48#include <linux/slab.h>
2b05e002 49#include <linux/tcp.h>
703da5a1
RV
50#include <net/ip.h>
51#include <linux/netdevice.h>
52#include <linux/etherdevice.h>
e8ac1756 53#include <linux/firmware.h>
b81b3733 54#include <linux/net_tstamp.h>
703da5a1
RV
55#include "vxge-main.h"
56#include "vxge-reg.h"
57
58MODULE_LICENSE("Dual BSD/GPL");
59MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
60 "Virtualized Server Adapter");
61
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
703da5a1
RV
63 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
64 PCI_ANY_ID},
65 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
66 PCI_ANY_ID},
67 {0}
68};
69
70MODULE_DEVICE_TABLE(pci, vxge_id_table);
71
72VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
73VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
74VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
75VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
76VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
77VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
78
79static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
80 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
81static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
82 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
83module_param_array(bw_percentage, uint, NULL, 0);
84
85static struct vxge_drv_config *driver_config;
86
42821a5b 87static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
88 struct macInfo *mac);
89static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
90 struct macInfo *mac);
91static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac);
92static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac);
93static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath);
94static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath);
42821a5b 95
703da5a1
RV
96static inline int is_vxge_card_up(struct vxgedev *vdev)
97{
98 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
99}
100
101static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
102{
ff67df55
BL
103 struct sk_buff **skb_ptr = NULL;
104 struct sk_buff **temp;
105#define NR_SKB_COMPLETED 128
106 struct sk_buff *completed[NR_SKB_COMPLETED];
107 int more;
703da5a1 108
ff67df55
BL
109 do {
110 more = 0;
111 skb_ptr = completed;
112
98f45da2 113 if (__netif_tx_trylock(fifo->txq)) {
ff67df55
BL
114 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
115 NR_SKB_COMPLETED, &more);
98f45da2 116 __netif_tx_unlock(fifo->txq);
ff67df55 117 }
98f45da2 118
ff67df55
BL
119 /* free SKBs */
120 for (temp = completed; temp != skb_ptr; temp++)
121 dev_kfree_skb_irq(*temp);
98f45da2 122 } while (more);
703da5a1
RV
123}
124
125static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
126{
127 int i;
128
129 /* Complete all transmits */
130 for (i = 0; i < vdev->no_of_vpath; i++)
131 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
132}
133
134static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
135{
136 int i;
137 struct vxge_ring *ring;
138
139 /* Complete all receives*/
140 for (i = 0; i < vdev->no_of_vpath; i++) {
141 ring = &vdev->vpaths[i].ring;
142 vxge_hw_vpath_poll_rx(ring->handle);
143 }
144}
145
703da5a1
RV
146/*
147 * vxge_callback_link_up
148 *
149 * This function is called during interrupt context to notify link up state
150 * change.
151 */
42821a5b 152static void
703da5a1
RV
153vxge_callback_link_up(struct __vxge_hw_device *hldev)
154{
155 struct net_device *dev = hldev->ndev;
5f54cebb 156 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV
157
158 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
159 vdev->ndev->name, __func__, __LINE__);
75f5e1c6 160 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV
161 vdev->stats.link_up++;
162
163 netif_carrier_on(vdev->ndev);
d03848e0 164 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV
165
166 vxge_debug_entryexit(VXGE_TRACE,
167 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
168}
169
170/*
171 * vxge_callback_link_down
172 *
173 * This function is called during interrupt context to notify link down state
174 * change.
175 */
42821a5b 176static void
703da5a1
RV
177vxge_callback_link_down(struct __vxge_hw_device *hldev)
178{
179 struct net_device *dev = hldev->ndev;
5f54cebb 180 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV
181
182 vxge_debug_entryexit(VXGE_TRACE,
183 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
75f5e1c6 184 netdev_notice(vdev->ndev, "Link Down\n");
703da5a1
RV
185
186 vdev->stats.link_down++;
187 netif_carrier_off(vdev->ndev);
d03848e0 188 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
189
190 vxge_debug_entryexit(VXGE_TRACE,
191 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
192}
193
194/*
195 * vxge_rx_alloc
196 *
197 * Allocate SKB.
198 */
199static struct sk_buff*
200vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
201{
202 struct net_device *dev;
203 struct sk_buff *skb;
204 struct vxge_rx_priv *rx_priv;
205
206 dev = ring->ndev;
207 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
208 ring->ndev->name, __func__, __LINE__);
209
210 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
211
212 /* try to allocate skb first. this one may fail */
213 skb = netdev_alloc_skb(dev, skb_size +
214 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
215 if (skb == NULL) {
216 vxge_debug_mem(VXGE_ERR,
217 "%s: out of memory to allocate SKB", dev->name);
218 ring->stats.skb_alloc_fail++;
219 return NULL;
220 }
221
222 vxge_debug_mem(VXGE_TRACE,
223 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
224 __func__, __LINE__, skb);
225
226 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
227
228 rx_priv->skb = skb;
ea11bbe0 229 rx_priv->skb_data = NULL;
703da5a1
RV
230 rx_priv->data_size = skb_size;
231 vxge_debug_entryexit(VXGE_TRACE,
232 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
233
234 return skb;
235}
236
237/*
238 * vxge_rx_map
239 */
240static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
241{
242 struct vxge_rx_priv *rx_priv;
243 dma_addr_t dma_addr;
244
245 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
246 ring->ndev->name, __func__, __LINE__);
247 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
248
ea11bbe0
BL
249 rx_priv->skb_data = rx_priv->skb->data;
250 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
703da5a1
RV
251 rx_priv->data_size, PCI_DMA_FROMDEVICE);
252
fa15e99b 253 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
703da5a1
RV
254 ring->stats.pci_map_fail++;
255 return -EIO;
256 }
257 vxge_debug_mem(VXGE_TRACE,
258 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
259 ring->ndev->name, __func__, __LINE__,
260 (unsigned long long)dma_addr);
261 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
262
263 rx_priv->data_dma = dma_addr;
264 vxge_debug_entryexit(VXGE_TRACE,
265 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
266
267 return 0;
268}
269
270/*
271 * vxge_rx_initial_replenish
272 * Allocation of RxD as an initial replenish procedure.
273 */
274static enum vxge_hw_status
275vxge_rx_initial_replenish(void *dtrh, void *userdata)
276{
277 struct vxge_ring *ring = (struct vxge_ring *)userdata;
278 struct vxge_rx_priv *rx_priv;
279
280 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
281 ring->ndev->name, __func__, __LINE__);
282 if (vxge_rx_alloc(dtrh, ring,
283 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
284 return VXGE_HW_FAIL;
285
286 if (vxge_rx_map(dtrh, ring)) {
287 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
288 dev_kfree_skb(rx_priv->skb);
289
290 return VXGE_HW_FAIL;
291 }
292 vxge_debug_entryexit(VXGE_TRACE,
293 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
294
295 return VXGE_HW_OK;
296}
297
298static inline void
299vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
300 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
301{
302
303 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
304 ring->ndev->name, __func__, __LINE__);
305 skb_record_rx_queue(skb, ring->driver_id);
306 skb->protocol = eth_type_trans(skb, ring->ndev);
307
308 ring->stats.rx_frms++;
309 ring->stats.rx_bytes += pkt_length;
310
311 if (skb->pkt_type == PACKET_MULTICAST)
312 ring->stats.rx_mcast++;
313
314 vxge_debug_rx(VXGE_TRACE,
315 "%s: %s:%d skb protocol = %d",
316 ring->ndev->name, __func__, __LINE__, skb->protocol);
317
318 if (ring->gro_enable) {
319 if (ring->vlgrp && ext_info->vlan &&
320 (ring->vlan_tag_strip ==
321 VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
a5d165b5 322 vlan_gro_receive(ring->napi_p, ring->vlgrp,
703da5a1
RV
323 ext_info->vlan, skb);
324 else
a5d165b5 325 napi_gro_receive(ring->napi_p, skb);
703da5a1
RV
326 } else {
327 if (ring->vlgrp && vlan &&
328 (ring->vlan_tag_strip ==
329 VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
330 vlan_hwaccel_receive_skb(skb, ring->vlgrp, vlan);
331 else
332 netif_receive_skb(skb);
333 }
334 vxge_debug_entryexit(VXGE_TRACE,
335 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
336}
337
338static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
339 struct vxge_rx_priv *rx_priv)
340{
341 pci_dma_sync_single_for_device(ring->pdev,
342 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
343
344 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
345 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
346}
347
348static inline void vxge_post(int *dtr_cnt, void **first_dtr,
349 void *post_dtr, struct __vxge_hw_ring *ringh)
350{
351 int dtr_count = *dtr_cnt;
352 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
353 if (*first_dtr)
354 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
355 *first_dtr = post_dtr;
356 } else
357 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
358 dtr_count++;
359 *dtr_cnt = dtr_count;
360}
361
362/*
363 * vxge_rx_1b_compl
364 *
365 * If the interrupt is because of a received frame or if the receive ring
366 * contains fresh as yet un-processed frames, this function is called.
367 */
42821a5b 368static enum vxge_hw_status
703da5a1
RV
369vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
370 u8 t_code, void *userdata)
371{
372 struct vxge_ring *ring = (struct vxge_ring *)userdata;
b81b3733 373 struct net_device *dev = ring->ndev;
703da5a1
RV
374 unsigned int dma_sizes;
375 void *first_dtr = NULL;
376 int dtr_cnt = 0;
377 int data_size;
378 dma_addr_t data_dma;
379 int pkt_length;
380 struct sk_buff *skb;
381 struct vxge_rx_priv *rx_priv;
382 struct vxge_hw_ring_rxd_info ext_info;
383 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
384 ring->ndev->name, __func__, __LINE__);
385 ring->pkts_processed = 0;
386
3363276f 387 vxge_hw_ring_replenish(ringh);
703da5a1
RV
388
389 do {
3f23e436 390 prefetch((char *)dtr + L1_CACHE_BYTES);
703da5a1
RV
391 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
392 skb = rx_priv->skb;
393 data_size = rx_priv->data_size;
394 data_dma = rx_priv->data_dma;
ea11bbe0 395 prefetch(rx_priv->skb_data);
703da5a1
RV
396
397 vxge_debug_rx(VXGE_TRACE,
398 "%s: %s:%d skb = 0x%p",
399 ring->ndev->name, __func__, __LINE__, skb);
400
401 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
402 pkt_length = dma_sizes;
403
22fa125e
SH
404 pkt_length -= ETH_FCS_LEN;
405
703da5a1
RV
406 vxge_debug_rx(VXGE_TRACE,
407 "%s: %s:%d Packet Length = %d",
408 ring->ndev->name, __func__, __LINE__, pkt_length);
409
410 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
411
412 /* check skb validity */
413 vxge_assert(skb);
414
415 prefetch((char *)skb + L1_CACHE_BYTES);
416 if (unlikely(t_code)) {
417
418 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
419 VXGE_HW_OK) {
420
421 ring->stats.rx_errors++;
422 vxge_debug_rx(VXGE_TRACE,
423 "%s: %s :%d Rx T_code is %d",
424 ring->ndev->name, __func__,
425 __LINE__, t_code);
426
427 /* If the t_code is not supported and if the
428 * t_code is other than 0x5 (unparseable packet
429 * such as unknown UPV6 header), Drop it !!!
430 */
431 vxge_re_pre_post(dtr, ring, rx_priv);
432
433 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
434 ring->stats.rx_dropped++;
435 continue;
436 }
437 }
438
439 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
440
441 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
442
443 if (!vxge_rx_map(dtr, ring)) {
444 skb_put(skb, pkt_length);
445
446 pci_unmap_single(ring->pdev, data_dma,
447 data_size, PCI_DMA_FROMDEVICE);
448
449 vxge_hw_ring_rxd_pre_post(ringh, dtr);
450 vxge_post(&dtr_cnt, &first_dtr, dtr,
451 ringh);
452 } else {
453 dev_kfree_skb(rx_priv->skb);
454 rx_priv->skb = skb;
455 rx_priv->data_size = data_size;
456 vxge_re_pre_post(dtr, ring, rx_priv);
457
458 vxge_post(&dtr_cnt, &first_dtr, dtr,
459 ringh);
460 ring->stats.rx_dropped++;
461 break;
462 }
463 } else {
464 vxge_re_pre_post(dtr, ring, rx_priv);
465
466 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
467 ring->stats.rx_dropped++;
468 break;
469 }
470 } else {
471 struct sk_buff *skb_up;
472
473 skb_up = netdev_alloc_skb(dev, pkt_length +
474 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
475 if (skb_up != NULL) {
476 skb_reserve(skb_up,
477 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
478
479 pci_dma_sync_single_for_cpu(ring->pdev,
480 data_dma, data_size,
481 PCI_DMA_FROMDEVICE);
482
483 vxge_debug_mem(VXGE_TRACE,
484 "%s: %s:%d skb_up = %p",
485 ring->ndev->name, __func__,
486 __LINE__, skb);
487 memcpy(skb_up->data, skb->data, pkt_length);
488
489 vxge_re_pre_post(dtr, ring, rx_priv);
490
491 vxge_post(&dtr_cnt, &first_dtr, dtr,
492 ringh);
493 /* will netif_rx small SKB instead */
494 skb = skb_up;
495 skb_put(skb, pkt_length);
496 } else {
497 vxge_re_pre_post(dtr, ring, rx_priv);
498
499 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
500 vxge_debug_rx(VXGE_ERR,
501 "%s: vxge_rx_1b_compl: out of "
502 "memory", dev->name);
503 ring->stats.skb_alloc_fail++;
504 break;
505 }
506 }
507
508 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
509 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
510 ring->rx_csum && /* Offload Rx side CSUM */
511 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
512 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
513 skb->ip_summed = CHECKSUM_UNNECESSARY;
514 else
bc8acf2c 515 skb_checksum_none_assert(skb);
703da5a1 516
b81b3733
JM
517
518 if (ring->rx_hwts) {
519 struct skb_shared_hwtstamps *skb_hwts;
520 u32 ns = *(u32 *)(skb->head + pkt_length);
521
522 skb_hwts = skb_hwtstamps(skb);
523 skb_hwts->hwtstamp = ns_to_ktime(ns);
524 skb_hwts->syststamp.tv64 = 0;
525 }
526
47f01db4
JM
527 /* rth_hash_type and rth_it_hit are non-zero regardless of
528 * whether rss is enabled. Only the rth_value is zero/non-zero
529 * if rss is disabled/enabled, so key off of that.
530 */
531 if (ext_info.rth_value)
532 skb->rxhash = ext_info.rth_value;
533
703da5a1
RV
534 vxge_rx_complete(ring, skb, ext_info.vlan,
535 pkt_length, &ext_info);
536
537 ring->budget--;
538 ring->pkts_processed++;
539 if (!ring->budget)
540 break;
541
542 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
543 &t_code) == VXGE_HW_OK);
544
545 if (first_dtr)
546 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
547
703da5a1
RV
548 vxge_debug_entryexit(VXGE_TRACE,
549 "%s:%d Exiting...",
550 __func__, __LINE__);
551 return VXGE_HW_OK;
552}
553
554/*
555 * vxge_xmit_compl
556 *
557 * If an interrupt was raised to indicate DMA complete of the Tx packet,
558 * this function is called. It identifies the last TxD whose buffer was
559 * freed and frees all skbs whose data have already DMA'ed into the NICs
560 * internal memory.
561 */
42821a5b 562static enum vxge_hw_status
703da5a1
RV
563vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
564 enum vxge_hw_fifo_tcode t_code, void *userdata,
ff67df55 565 struct sk_buff ***skb_ptr, int nr_skb, int *more)
703da5a1
RV
566{
567 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
ff67df55 568 struct sk_buff *skb, **done_skb = *skb_ptr;
703da5a1
RV
569 int pkt_cnt = 0;
570
571 vxge_debug_entryexit(VXGE_TRACE,
572 "%s:%d Entered....", __func__, __LINE__);
573
574 do {
575 int frg_cnt;
576 skb_frag_t *frag;
577 int i = 0, j;
578 struct vxge_tx_priv *txd_priv =
579 vxge_hw_fifo_txdl_private_get(dtr);
580
581 skb = txd_priv->skb;
582 frg_cnt = skb_shinfo(skb)->nr_frags;
583 frag = &skb_shinfo(skb)->frags[0];
584
585 vxge_debug_tx(VXGE_TRACE,
586 "%s: %s:%d fifo_hw = %p dtr = %p "
587 "tcode = 0x%x", fifo->ndev->name, __func__,
588 __LINE__, fifo_hw, dtr, t_code);
589 /* check skb validity */
590 vxge_assert(skb);
591 vxge_debug_tx(VXGE_TRACE,
592 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
593 fifo->ndev->name, __func__, __LINE__,
594 skb, txd_priv, frg_cnt);
595 if (unlikely(t_code)) {
596 fifo->stats.tx_errors++;
597 vxge_debug_tx(VXGE_ERR,
598 "%s: tx: dtr %p completed due to "
599 "error t_code %01x", fifo->ndev->name,
600 dtr, t_code);
601 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
602 }
603
604 /* for unfragmented skb */
605 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
606 skb_headlen(skb), PCI_DMA_TODEVICE);
607
608 for (j = 0; j < frg_cnt; j++) {
609 pci_unmap_page(fifo->pdev,
610 txd_priv->dma_buffers[i++],
611 frag->size, PCI_DMA_TODEVICE);
612 frag += 1;
613 }
614
615 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
616
617 /* Updating the statistics block */
618 fifo->stats.tx_frms++;
619 fifo->stats.tx_bytes += skb->len;
620
ff67df55
BL
621 *done_skb++ = skb;
622
623 if (--nr_skb <= 0) {
624 *more = 1;
625 break;
626 }
703da5a1
RV
627
628 pkt_cnt++;
629 if (pkt_cnt > fifo->indicate_max_pkts)
630 break;
631
632 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
633 &dtr, &t_code) == VXGE_HW_OK);
634
ff67df55 635 *skb_ptr = done_skb;
98f45da2
JM
636 if (netif_tx_queue_stopped(fifo->txq))
637 netif_tx_wake_queue(fifo->txq);
703da5a1 638
703da5a1
RV
639 vxge_debug_entryexit(VXGE_TRACE,
640 "%s: %s:%d Exiting...",
641 fifo->ndev->name, __func__, __LINE__);
642 return VXGE_HW_OK;
643}
644
28679751 645/* select a vpath to transmit the packet */
98f45da2 646static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
703da5a1
RV
647{
648 u16 queue_len, counter = 0;
649 if (skb->protocol == htons(ETH_P_IP)) {
650 struct iphdr *ip;
651 struct tcphdr *th;
652
653 ip = ip_hdr(skb);
654
655 if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
656 th = (struct tcphdr *)(((unsigned char *)ip) +
657 ip->ihl*4);
658
659 queue_len = vdev->no_of_vpath;
660 counter = (ntohs(th->source) +
661 ntohs(th->dest)) &
662 vdev->vpath_selector[queue_len - 1];
663 if (counter >= queue_len)
664 counter = queue_len - 1;
703da5a1
RV
665 }
666 }
667 return counter;
668}
669
670static enum vxge_hw_status vxge_search_mac_addr_in_list(
671 struct vxge_vpath *vpath, u64 del_mac)
672{
673 struct list_head *entry, *next;
674 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
675 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
676 return TRUE;
677 }
678 return FALSE;
679}
680
681static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
682{
683 struct macInfo mac_info;
684 u8 *mac_address = NULL;
685 u64 mac_addr = 0, vpath_vector = 0;
686 int vpath_idx = 0;
687 enum vxge_hw_status status = VXGE_HW_OK;
688 struct vxge_vpath *vpath = NULL;
689 struct __vxge_hw_device *hldev;
690
2c91308f 691 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
703da5a1
RV
692
693 mac_address = (u8 *)&mac_addr;
694 memcpy(mac_address, mac_header, ETH_ALEN);
695
696 /* Is this mac address already in the list? */
697 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
698 vpath = &vdev->vpaths[vpath_idx];
699 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
700 return vpath_idx;
701 }
702
703 memset(&mac_info, 0, sizeof(struct macInfo));
704 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
705
706 /* Any vpath has room to add mac address to its da table? */
707 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
708 vpath = &vdev->vpaths[vpath_idx];
709 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
710 /* Add this mac address to this vpath */
711 mac_info.vpath_no = vpath_idx;
712 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
713 status = vxge_add_mac_addr(vdev, &mac_info);
714 if (status != VXGE_HW_OK)
715 return -EPERM;
716 return vpath_idx;
717 }
718 }
719
720 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
721 vpath_idx = 0;
722 mac_info.vpath_no = vpath_idx;
723 /* Is the first vpath already selected as catch-basin ? */
724 vpath = &vdev->vpaths[vpath_idx];
725 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
726 /* Add this mac address to this vpath */
727 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
728 return -EPERM;
729 return vpath_idx;
730 }
731
732 /* Select first vpath as catch-basin */
733 vpath_vector = vxge_mBIT(vpath->device_id);
734 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
735 vxge_hw_mgmt_reg_type_mrpcim,
736 0,
737 (ulong)offsetof(
738 struct vxge_hw_mrpcim_reg,
739 rts_mgr_cbasin_cfg),
740 vpath_vector);
741 if (status != VXGE_HW_OK) {
742 vxge_debug_tx(VXGE_ERR,
743 "%s: Unable to set the vpath-%d in catch-basin mode",
744 VXGE_DRIVER_NAME, vpath->device_id);
745 return -EPERM;
746 }
747
748 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
749 return -EPERM;
750
751 return vpath_idx;
752}
753
754/**
755 * vxge_xmit
756 * @skb : the socket buffer containing the Tx data.
757 * @dev : device pointer.
758 *
759 * This function is the Tx entry point of the driver. Neterion NIC supports
760 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
703da5a1 761*/
61357325 762static netdev_tx_t
703da5a1
RV
763vxge_xmit(struct sk_buff *skb, struct net_device *dev)
764{
765 struct vxge_fifo *fifo = NULL;
766 void *dtr_priv;
767 void *dtr = NULL;
768 struct vxgedev *vdev = NULL;
769 enum vxge_hw_status status;
770 int frg_cnt, first_frg_len;
771 skb_frag_t *frag;
772 int i = 0, j = 0, avail;
773 u64 dma_pointer;
774 struct vxge_tx_priv *txdl_priv = NULL;
775 struct __vxge_hw_fifo *fifo_hw;
703da5a1 776 int offload_type;
703da5a1 777 int vpath_no = 0;
703da5a1
RV
778
779 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
780 dev->name, __func__, __LINE__);
781
782 /* A buffer with no data will be dropped */
783 if (unlikely(skb->len <= 0)) {
784 vxge_debug_tx(VXGE_ERR,
785 "%s: Buffer has no data..", dev->name);
786 dev_kfree_skb(skb);
787 return NETDEV_TX_OK;
788 }
789
5f54cebb 790 vdev = netdev_priv(dev);
703da5a1
RV
791
792 if (unlikely(!is_vxge_card_up(vdev))) {
793 vxge_debug_tx(VXGE_ERR,
794 "%s: vdev not initialized", dev->name);
795 dev_kfree_skb(skb);
796 return NETDEV_TX_OK;
797 }
798
799 if (vdev->config.addr_learn_en) {
800 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
801 if (vpath_no == -EPERM) {
802 vxge_debug_tx(VXGE_ERR,
803 "%s: Failed to store the mac address",
804 dev->name);
805 dev_kfree_skb(skb);
806 return NETDEV_TX_OK;
807 }
808 }
809
810 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
811 vpath_no = skb_get_queue_mapping(skb);
812 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
98f45da2 813 vpath_no = vxge_get_vpath_no(vdev, skb);
703da5a1
RV
814
815 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
816
817 if (vpath_no >= vdev->no_of_vpath)
818 vpath_no = 0;
819
820 fifo = &vdev->vpaths[vpath_no].fifo;
821 fifo_hw = fifo->handle;
822
98f45da2 823 if (netif_tx_queue_stopped(fifo->txq))
d03848e0 824 return NETDEV_TX_BUSY;
d03848e0 825
703da5a1
RV
826 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
827 if (avail == 0) {
828 vxge_debug_tx(VXGE_ERR,
829 "%s: No free TXDs available", dev->name);
830 fifo->stats.txd_not_free++;
98f45da2 831 goto _exit0;
703da5a1
RV
832 }
833
4403b371
BL
834 /* Last TXD? Stop tx queue to avoid dropping packets. TX
835 * completion will resume the queue.
836 */
837 if (avail == 1)
98f45da2 838 netif_tx_stop_queue(fifo->txq);
4403b371 839
703da5a1
RV
840 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
841 if (unlikely(status != VXGE_HW_OK)) {
842 vxge_debug_tx(VXGE_ERR,
843 "%s: Out of descriptors .", dev->name);
844 fifo->stats.txd_out_of_desc++;
98f45da2 845 goto _exit0;
703da5a1
RV
846 }
847
848 vxge_debug_tx(VXGE_TRACE,
849 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
850 dev->name, __func__, __LINE__,
851 fifo_hw, dtr, dtr_priv);
852
eab6d18d 853 if (vlan_tx_tag_present(skb)) {
703da5a1
RV
854 u16 vlan_tag = vlan_tx_tag_get(skb);
855 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
856 }
857
858 first_frg_len = skb_headlen(skb);
859
860 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
861 PCI_DMA_TODEVICE);
862
863 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
864 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
703da5a1 865 fifo->stats.pci_map_fail++;
98f45da2 866 goto _exit0;
703da5a1
RV
867 }
868
869 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
870 txdl_priv->skb = skb;
871 txdl_priv->dma_buffers[j] = dma_pointer;
872
873 frg_cnt = skb_shinfo(skb)->nr_frags;
874 vxge_debug_tx(VXGE_TRACE,
875 "%s: %s:%d skb = %p txdl_priv = %p "
876 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
877 __func__, __LINE__, skb, txdl_priv,
878 frg_cnt, (unsigned long long)dma_pointer);
879
880 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
881 first_frg_len);
882
883 frag = &skb_shinfo(skb)->frags[0];
884 for (i = 0; i < frg_cnt; i++) {
885 /* ignore 0 length fragment */
886 if (!frag->size)
887 continue;
888
98f45da2 889 dma_pointer = (u64) pci_map_page(fifo->pdev, frag->page,
703da5a1
RV
890 frag->page_offset, frag->size,
891 PCI_DMA_TODEVICE);
892
893 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
98f45da2 894 goto _exit2;
703da5a1
RV
895 vxge_debug_tx(VXGE_TRACE,
896 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
897 dev->name, __func__, __LINE__, i,
898 (unsigned long long)dma_pointer);
899
900 txdl_priv->dma_buffers[j] = dma_pointer;
901 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
902 frag->size);
903 frag += 1;
904 }
905
906 offload_type = vxge_offload_type(skb);
907
908 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
703da5a1
RV
909 int mss = vxge_tcp_mss(skb);
910 if (mss) {
98f45da2 911 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
703da5a1
RV
912 dev->name, __func__, __LINE__, mss);
913 vxge_hw_fifo_txdl_mss_set(dtr, mss);
914 } else {
915 vxge_assert(skb->len <=
916 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
917 vxge_assert(0);
918 goto _exit1;
919 }
920 }
921
922 if (skb->ip_summed == CHECKSUM_PARTIAL)
923 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
924 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
925 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
926 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
927
928 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
703da5a1 929
703da5a1
RV
930 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
931 dev->name, __func__, __LINE__);
6ed10654 932 return NETDEV_TX_OK;
703da5a1 933
98f45da2 934_exit2:
703da5a1 935 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
703da5a1
RV
936_exit1:
937 j = 0;
938 frag = &skb_shinfo(skb)->frags[0];
939
940 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
941 skb_headlen(skb), PCI_DMA_TODEVICE);
942
943 for (; j < i; j++) {
944 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
945 frag->size, PCI_DMA_TODEVICE);
946 frag += 1;
947 }
948
949 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
98f45da2
JM
950_exit0:
951 netif_tx_stop_queue(fifo->txq);
703da5a1 952 dev_kfree_skb(skb);
703da5a1 953
6ed10654 954 return NETDEV_TX_OK;
703da5a1
RV
955}
956
957/*
958 * vxge_rx_term
959 *
960 * Function will be called by hw function to abort all outstanding receive
961 * descriptors.
962 */
963static void
964vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
965{
966 struct vxge_ring *ring = (struct vxge_ring *)userdata;
967 struct vxge_rx_priv *rx_priv =
968 vxge_hw_ring_rxd_private_get(dtrh);
969
970 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
971 ring->ndev->name, __func__, __LINE__);
972 if (state != VXGE_HW_RXD_STATE_POSTED)
973 return;
974
975 pci_unmap_single(ring->pdev, rx_priv->data_dma,
976 rx_priv->data_size, PCI_DMA_FROMDEVICE);
977
978 dev_kfree_skb(rx_priv->skb);
ea11bbe0 979 rx_priv->skb_data = NULL;
703da5a1
RV
980
981 vxge_debug_entryexit(VXGE_TRACE,
982 "%s: %s:%d Exiting...",
983 ring->ndev->name, __func__, __LINE__);
984}
985
986/*
987 * vxge_tx_term
988 *
989 * Function will be called to abort all outstanding tx descriptors
990 */
991static void
992vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
993{
994 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
995 skb_frag_t *frag;
996 int i = 0, j, frg_cnt;
997 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
998 struct sk_buff *skb = txd_priv->skb;
999
1000 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1001
1002 if (state != VXGE_HW_TXDL_STATE_POSTED)
1003 return;
1004
1005 /* check skb validity */
1006 vxge_assert(skb);
1007 frg_cnt = skb_shinfo(skb)->nr_frags;
1008 frag = &skb_shinfo(skb)->frags[0];
1009
1010 /* for unfragmented skb */
1011 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1012 skb_headlen(skb), PCI_DMA_TODEVICE);
1013
1014 for (j = 0; j < frg_cnt; j++) {
1015 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
1016 frag->size, PCI_DMA_TODEVICE);
1017 frag += 1;
1018 }
1019
1020 dev_kfree_skb(skb);
1021
1022 vxge_debug_entryexit(VXGE_TRACE,
1023 "%s:%d Exiting...", __func__, __LINE__);
1024}
1025
1026/**
1027 * vxge_set_multicast
1028 * @dev: pointer to the device structure
1029 *
1030 * Entry point for multicast address enable/disable
1031 * This function is a driver entry point which gets called by the kernel
1032 * whenever multicast addresses must be enabled/disabled. This also gets
1033 * called to set/reset promiscuous mode. Depending on the deivce flag, we
1034 * determine, if multicast address must be enabled or if promiscuous mode
1035 * is to be disabled etc.
1036 */
1037static void vxge_set_multicast(struct net_device *dev)
1038{
22bedad3 1039 struct netdev_hw_addr *ha;
703da5a1
RV
1040 struct vxgedev *vdev;
1041 int i, mcast_cnt = 0;
7adf7d1b
JM
1042 struct __vxge_hw_device *hldev;
1043 struct vxge_vpath *vpath;
703da5a1
RV
1044 enum vxge_hw_status status = VXGE_HW_OK;
1045 struct macInfo mac_info;
1046 int vpath_idx = 0;
1047 struct vxge_mac_addrs *mac_entry;
1048 struct list_head *list_head;
1049 struct list_head *entry, *next;
1050 u8 *mac_address = NULL;
1051
1052 vxge_debug_entryexit(VXGE_TRACE,
1053 "%s:%d", __func__, __LINE__);
1054
5f54cebb 1055 vdev = netdev_priv(dev);
703da5a1
RV
1056 hldev = (struct __vxge_hw_device *)vdev->devh;
1057
1058 if (unlikely(!is_vxge_card_up(vdev)))
1059 return;
1060
1061 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1062 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
1063 vpath = &vdev->vpaths[i];
1064 vxge_assert(vpath->is_open);
1065 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1066 if (status != VXGE_HW_OK)
1067 vxge_debug_init(VXGE_ERR, "failed to enable "
1068 "multicast, status %d", status);
703da5a1
RV
1069 vdev->all_multi_flg = 1;
1070 }
7adf7d1b 1071 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
703da5a1 1072 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
1073 vpath = &vdev->vpaths[i];
1074 vxge_assert(vpath->is_open);
1075 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1076 if (status != VXGE_HW_OK)
1077 vxge_debug_init(VXGE_ERR, "failed to disable "
1078 "multicast, status %d", status);
1079 vdev->all_multi_flg = 0;
703da5a1
RV
1080 }
1081 }
1082
703da5a1
RV
1083
1084 if (!vdev->config.addr_learn_en) {
7adf7d1b
JM
1085 for (i = 0; i < vdev->no_of_vpath; i++) {
1086 vpath = &vdev->vpaths[i];
1087 vxge_assert(vpath->is_open);
1088
1089 if (dev->flags & IFF_PROMISC)
703da5a1 1090 status = vxge_hw_vpath_promisc_enable(
7adf7d1b
JM
1091 vpath->handle);
1092 else
703da5a1 1093 status = vxge_hw_vpath_promisc_disable(
7adf7d1b
JM
1094 vpath->handle);
1095 if (status != VXGE_HW_OK)
1096 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1097 ", status %d", dev->flags&IFF_PROMISC ?
1098 "enable" : "disable", status);
703da5a1
RV
1099 }
1100 }
1101
1102 memset(&mac_info, 0, sizeof(struct macInfo));
1103 /* Update individual M_CAST address list */
4cd24eaf 1104 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
703da5a1
RV
1105 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1106 list_head = &vdev->vpaths[0].mac_addr_list;
4cd24eaf 1107 if ((netdev_mc_count(dev) +
703da5a1
RV
1108 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1109 vdev->vpaths[0].max_mac_addr_cnt)
1110 goto _set_all_mcast;
1111
1112 /* Delete previous MC's */
1113 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1114 list_for_each_safe(entry, next, list_head) {
2c91308f 1115 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV
1116 /* Copy the mac address to delete */
1117 mac_address = (u8 *)&mac_entry->macaddr;
1118 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1119
1120 /* Is this a multicast address */
1121 if (0x01 & mac_info.macaddr[0]) {
1122 for (vpath_idx = 0; vpath_idx <
1123 vdev->no_of_vpath;
1124 vpath_idx++) {
1125 mac_info.vpath_no = vpath_idx;
1126 status = vxge_del_mac_addr(
1127 vdev,
1128 &mac_info);
1129 }
1130 }
1131 }
1132 }
1133
1134 /* Add new ones */
22bedad3
JP
1135 netdev_for_each_mc_addr(ha, dev) {
1136 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
703da5a1
RV
1137 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1138 vpath_idx++) {
1139 mac_info.vpath_no = vpath_idx;
1140 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1141 status = vxge_add_mac_addr(vdev, &mac_info);
1142 if (status != VXGE_HW_OK) {
1143 vxge_debug_init(VXGE_ERR,
1144 "%s:%d Setting individual"
1145 "multicast address failed",
1146 __func__, __LINE__);
1147 goto _set_all_mcast;
1148 }
1149 }
1150 }
1151
1152 return;
1153_set_all_mcast:
1154 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1155 /* Delete previous MC's */
1156 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1157 list_for_each_safe(entry, next, list_head) {
2c91308f 1158 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV
1159 /* Copy the mac address to delete */
1160 mac_address = (u8 *)&mac_entry->macaddr;
1161 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1162
1163 /* Is this a multicast address */
1164 if (0x01 & mac_info.macaddr[0])
1165 break;
1166 }
1167
1168 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1169 vpath_idx++) {
1170 mac_info.vpath_no = vpath_idx;
1171 status = vxge_del_mac_addr(vdev, &mac_info);
1172 }
1173 }
1174
1175 /* Enable all multicast */
1176 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
1177 vpath = &vdev->vpaths[i];
1178 vxge_assert(vpath->is_open);
1179
1180 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV
1181 if (status != VXGE_HW_OK) {
1182 vxge_debug_init(VXGE_ERR,
1183 "%s:%d Enabling all multicasts failed",
1184 __func__, __LINE__);
1185 }
1186 vdev->all_multi_flg = 1;
1187 }
1188 dev->flags |= IFF_ALLMULTI;
1189 }
1190
1191 vxge_debug_entryexit(VXGE_TRACE,
1192 "%s:%d Exiting...", __func__, __LINE__);
1193}
1194
1195/**
1196 * vxge_set_mac_addr
1197 * @dev: pointer to the device structure
1198 *
1199 * Update entry "0" (default MAC addr)
1200 */
1201static int vxge_set_mac_addr(struct net_device *dev, void *p)
1202{
1203 struct sockaddr *addr = p;
1204 struct vxgedev *vdev;
2c91308f 1205 struct __vxge_hw_device *hldev;
703da5a1
RV
1206 enum vxge_hw_status status = VXGE_HW_OK;
1207 struct macInfo mac_info_new, mac_info_old;
1208 int vpath_idx = 0;
1209
1210 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1211
5f54cebb 1212 vdev = netdev_priv(dev);
703da5a1
RV
1213 hldev = vdev->devh;
1214
1215 if (!is_valid_ether_addr(addr->sa_data))
1216 return -EINVAL;
1217
1218 memset(&mac_info_new, 0, sizeof(struct macInfo));
1219 memset(&mac_info_old, 0, sizeof(struct macInfo));
1220
1221 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1222 __func__, __LINE__);
1223
1224 /* Get the old address */
1225 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1226
1227 /* Copy the new address */
1228 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1229
1230 /* First delete the old mac address from all the vpaths
1231 as we can't specify the index while adding new mac address */
1232 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1233 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1234 if (!vpath->is_open) {
1235 /* This can happen when this interface is added/removed
1236 to the bonding interface. Delete this station address
1237 from the linked list */
1238 vxge_mac_list_del(vpath, &mac_info_old);
1239
1240 /* Add this new address to the linked list
1241 for later restoring */
1242 vxge_mac_list_add(vpath, &mac_info_new);
1243
1244 continue;
1245 }
1246 /* Delete the station address */
1247 mac_info_old.vpath_no = vpath_idx;
1248 status = vxge_del_mac_addr(vdev, &mac_info_old);
1249 }
1250
1251 if (unlikely(!is_vxge_card_up(vdev))) {
1252 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1253 return VXGE_HW_OK;
1254 }
1255
1256 /* Set this mac address to all the vpaths */
1257 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1258 mac_info_new.vpath_no = vpath_idx;
1259 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1260 status = vxge_add_mac_addr(vdev, &mac_info_new);
1261 if (status != VXGE_HW_OK)
1262 return -EINVAL;
1263 }
1264
1265 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1266
1267 return status;
1268}
1269
1270/*
1271 * vxge_vpath_intr_enable
1272 * @vdev: pointer to vdev
1273 * @vp_id: vpath for which to enable the interrupts
1274 *
1275 * Enables the interrupts for the vpath
1276*/
42821a5b 1277static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
703da5a1
RV
1278{
1279 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
b59c9457
SH
1280 int msix_id = 0;
1281 int tim_msix_id[4] = {0, 1, 0, 0};
1282 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
703da5a1
RV
1283
1284 vxge_hw_vpath_intr_enable(vpath->handle);
1285
1286 if (vdev->config.intr_type == INTA)
1287 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1288 else {
703da5a1
RV
1289 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1290 alarm_msix_id);
1291
b59c9457 1292 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV
1293 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1294 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1295
1296 /* enable the alarm vector */
b59c9457
SH
1297 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1298 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1299 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
703da5a1
RV
1300 }
1301}
1302
1303/*
1304 * vxge_vpath_intr_disable
1305 * @vdev: pointer to vdev
1306 * @vp_id: vpath for which to disable the interrupts
1307 *
1308 * Disables the interrupts for the vpath
1309*/
42821a5b 1310static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
703da5a1
RV
1311{
1312 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
4d2a5b40 1313 struct __vxge_hw_device *hldev;
703da5a1
RV
1314 int msix_id;
1315
4d2a5b40
JM
1316 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
1317
1318 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1319
703da5a1
RV
1320 vxge_hw_vpath_intr_disable(vpath->handle);
1321
1322 if (vdev->config.intr_type == INTA)
1323 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1324 else {
b59c9457 1325 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV
1326 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1327 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1328
1329 /* disable the alarm vector */
b59c9457
SH
1330 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1331 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV
1332 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1333 }
1334}
1335
1336/*
1337 * vxge_reset_vpath
1338 * @vdev: pointer to vdev
1339 * @vp_id: vpath to reset
1340 *
1341 * Resets the vpath
1342*/
1343static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1344{
1345 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b 1346 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
703da5a1
RV
1347 int ret = 0;
1348
1349 /* check if device is down already */
1350 if (unlikely(!is_vxge_card_up(vdev)))
1351 return 0;
1352
1353 /* is device reset already scheduled */
1354 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1355 return 0;
1356
7adf7d1b
JM
1357 if (vpath->handle) {
1358 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1 1359 if (is_vxge_card_up(vdev) &&
7adf7d1b 1360 vxge_hw_vpath_recover_from_reset(vpath->handle)
703da5a1
RV
1361 != VXGE_HW_OK) {
1362 vxge_debug_init(VXGE_ERR,
1363 "vxge_hw_vpath_recover_from_reset"
1364 "failed for vpath:%d", vp_id);
1365 return status;
1366 }
1367 } else {
1368 vxge_debug_init(VXGE_ERR,
1369 "vxge_hw_vpath_reset failed for"
1370 "vpath:%d", vp_id);
1371 return status;
1372 }
1373 } else
1374 return VXGE_HW_FAIL;
1375
7adf7d1b
JM
1376 vxge_restore_vpath_mac_addr(vpath);
1377 vxge_restore_vpath_vid_table(vpath);
703da5a1
RV
1378
1379 /* Enable all broadcast */
7adf7d1b
JM
1380 vxge_hw_vpath_bcast_enable(vpath->handle);
1381
1382 /* Enable all multicast */
1383 if (vdev->all_multi_flg) {
1384 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1385 if (status != VXGE_HW_OK)
1386 vxge_debug_init(VXGE_ERR,
1387 "%s:%d Enabling multicast failed",
1388 __func__, __LINE__);
1389 }
703da5a1
RV
1390
1391 /* Enable the interrupts */
1392 vxge_vpath_intr_enable(vdev, vp_id);
1393
1394 smp_wmb();
1395
1396 /* Enable the flow of traffic through the vpath */
7adf7d1b 1397 vxge_hw_vpath_enable(vpath->handle);
703da5a1
RV
1398
1399 smp_wmb();
7adf7d1b
JM
1400 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1401 vpath->ring.last_status = VXGE_HW_OK;
703da5a1
RV
1402
1403 /* Vpath reset done */
1404 clear_bit(vp_id, &vdev->vp_reset);
1405
1406 /* Start the vpath queue */
98f45da2
JM
1407 if (netif_tx_queue_stopped(vpath->fifo.txq))
1408 netif_tx_wake_queue(vpath->fifo.txq);
703da5a1
RV
1409
1410 return ret;
1411}
1412
1413static int do_vxge_reset(struct vxgedev *vdev, int event)
1414{
1415 enum vxge_hw_status status;
1416 int ret = 0, vp_id, i;
1417
1418 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1419
1420 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1421 /* check if device is down already */
1422 if (unlikely(!is_vxge_card_up(vdev)))
1423 return 0;
1424
1425 /* is reset already scheduled */
1426 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1427 return 0;
1428 }
1429
1430 if (event == VXGE_LL_FULL_RESET) {
1431 /* wait for all the vpath reset to complete */
1432 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1433 while (test_bit(vp_id, &vdev->vp_reset))
1434 msleep(50);
1435 }
1436
1437 /* if execution mode is set to debug, don't reset the adapter */
1438 if (unlikely(vdev->exec_mode)) {
1439 vxge_debug_init(VXGE_ERR,
1440 "%s: execution mode is debug, returning..",
1441 vdev->ndev->name);
7adf7d1b
JM
1442 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1443 netif_tx_stop_all_queues(vdev->ndev);
1444 return 0;
703da5a1
RV
1445 }
1446 }
1447
1448 if (event == VXGE_LL_FULL_RESET) {
4d2a5b40 1449 vxge_hw_device_wait_receive_idle(vdev->devh);
703da5a1
RV
1450 vxge_hw_device_intr_disable(vdev->devh);
1451
1452 switch (vdev->cric_err_event) {
1453 case VXGE_HW_EVENT_UNKNOWN:
d03848e0 1454 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
1455 vxge_debug_init(VXGE_ERR,
1456 "fatal: %s: Disabling device due to"
1457 "unknown error",
1458 vdev->ndev->name);
1459 ret = -EPERM;
1460 goto out;
1461 case VXGE_HW_EVENT_RESET_START:
1462 break;
1463 case VXGE_HW_EVENT_RESET_COMPLETE:
1464 case VXGE_HW_EVENT_LINK_DOWN:
1465 case VXGE_HW_EVENT_LINK_UP:
1466 case VXGE_HW_EVENT_ALARM_CLEARED:
1467 case VXGE_HW_EVENT_ECCERR:
1468 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1469 ret = -EPERM;
1470 goto out;
1471 case VXGE_HW_EVENT_FIFO_ERR:
1472 case VXGE_HW_EVENT_VPATH_ERR:
1473 break;
1474 case VXGE_HW_EVENT_CRITICAL_ERR:
d03848e0 1475 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
1476 vxge_debug_init(VXGE_ERR,
1477 "fatal: %s: Disabling device due to"
1478 "serious error",
1479 vdev->ndev->name);
1480 /* SOP or device reset required */
1481 /* This event is not currently used */
1482 ret = -EPERM;
1483 goto out;
1484 case VXGE_HW_EVENT_SERR:
d03848e0 1485 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
1486 vxge_debug_init(VXGE_ERR,
1487 "fatal: %s: Disabling device due to"
1488 "serious error",
1489 vdev->ndev->name);
1490 ret = -EPERM;
1491 goto out;
1492 case VXGE_HW_EVENT_SRPCIM_SERR:
1493 case VXGE_HW_EVENT_MRPCIM_SERR:
1494 ret = -EPERM;
1495 goto out;
1496 case VXGE_HW_EVENT_SLOT_FREEZE:
d03848e0 1497 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
1498 vxge_debug_init(VXGE_ERR,
1499 "fatal: %s: Disabling device due to"
1500 "slot freeze",
1501 vdev->ndev->name);
1502 ret = -EPERM;
1503 goto out;
1504 default:
1505 break;
1506
1507 }
1508 }
1509
1510 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
d03848e0 1511 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
1512
1513 if (event == VXGE_LL_FULL_RESET) {
1514 status = vxge_reset_all_vpaths(vdev);
1515 if (status != VXGE_HW_OK) {
1516 vxge_debug_init(VXGE_ERR,
1517 "fatal: %s: can not reset vpaths",
1518 vdev->ndev->name);
1519 ret = -EPERM;
1520 goto out;
1521 }
1522 }
1523
1524 if (event == VXGE_LL_COMPL_RESET) {
1525 for (i = 0; i < vdev->no_of_vpath; i++)
1526 if (vdev->vpaths[i].handle) {
1527 if (vxge_hw_vpath_recover_from_reset(
1528 vdev->vpaths[i].handle)
1529 != VXGE_HW_OK) {
1530 vxge_debug_init(VXGE_ERR,
1531 "vxge_hw_vpath_recover_"
1532 "from_reset failed for vpath: "
1533 "%d", i);
1534 ret = -EPERM;
1535 goto out;
1536 }
1537 } else {
1538 vxge_debug_init(VXGE_ERR,
1539 "vxge_hw_vpath_reset failed for "
1540 "vpath:%d", i);
1541 ret = -EPERM;
1542 goto out;
1543 }
1544 }
1545
1546 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1547 /* Reprogram the DA table with populated mac addresses */
1548 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1549 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1550 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1551 }
1552
1553 /* enable vpath interrupts */
1554 for (i = 0; i < vdev->no_of_vpath; i++)
1555 vxge_vpath_intr_enable(vdev, i);
1556
1557 vxge_hw_device_intr_enable(vdev->devh);
1558
1559 smp_wmb();
1560
1561 /* Indicate card up */
1562 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1563
1564 /* Get the traffic to flow through the vpaths */
1565 for (i = 0; i < vdev->no_of_vpath; i++) {
1566 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1567 smp_wmb();
1568 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1569 }
1570
d03848e0 1571 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV
1572 }
1573
1574out:
1575 vxge_debug_entryexit(VXGE_TRACE,
1576 "%s:%d Exiting...", __func__, __LINE__);
1577
1578 /* Indicate reset done */
1579 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1580 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1581 return ret;
1582}
1583
1584/*
1585 * vxge_reset
1586 * @vdev: pointer to ll device
1587 *
1588 * driver may reset the chip on events of serr, eccerr, etc
1589 */
42821a5b 1590static int vxge_reset(struct vxgedev *vdev)
703da5a1 1591{
7adf7d1b 1592 return do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV
1593}
1594
1595/**
1596 * vxge_poll - Receive handler when Receive Polling is used.
1597 * @dev: pointer to the device structure.
1598 * @budget: Number of packets budgeted to be processed in this iteration.
1599 *
1600 * This function comes into picture only if Receive side is being handled
1601 * through polling (called NAPI in linux). It mostly does what the normal
1602 * Rx interrupt handler does in terms of descriptor and packet processing
1603 * but not in an interrupt context. Also it will process a specified number
1604 * of packets at most in one iteration. This value is passed down by the
1605 * kernel as the function argument 'budget'.
1606 */
1607static int vxge_poll_msix(struct napi_struct *napi, int budget)
1608{
1609 struct vxge_ring *ring =
1610 container_of(napi, struct vxge_ring, napi);
1611 int budget_org = budget;
1612 ring->budget = budget;
1613
1614 vxge_hw_vpath_poll_rx(ring->handle);
1615
1616 if (ring->pkts_processed < budget_org) {
1617 napi_complete(napi);
1618 /* Re enable the Rx interrupts for the vpath */
1619 vxge_hw_channel_msix_unmask(
1620 (struct __vxge_hw_channel *)ring->handle,
1621 ring->rx_vector_no);
1622 }
1623
1624 return ring->pkts_processed;
1625}
1626
1627static int vxge_poll_inta(struct napi_struct *napi, int budget)
1628{
1629 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1630 int pkts_processed = 0;
1631 int i;
1632 int budget_org = budget;
1633 struct vxge_ring *ring;
1634
2c91308f 1635 struct __vxge_hw_device *hldev = (struct __vxge_hw_device *)
703da5a1
RV
1636 pci_get_drvdata(vdev->pdev);
1637
1638 for (i = 0; i < vdev->no_of_vpath; i++) {
1639 ring = &vdev->vpaths[i].ring;
1640 ring->budget = budget;
1641 vxge_hw_vpath_poll_rx(ring->handle);
1642 pkts_processed += ring->pkts_processed;
1643 budget -= ring->pkts_processed;
1644 if (budget <= 0)
1645 break;
1646 }
1647
1648 VXGE_COMPLETE_ALL_TX(vdev);
1649
1650 if (pkts_processed < budget_org) {
1651 napi_complete(napi);
1652 /* Re enable the Rx interrupts for the ring */
1653 vxge_hw_device_unmask_all(hldev);
1654 vxge_hw_device_flush_io(hldev);
1655 }
1656
1657 return pkts_processed;
1658}
1659
1660#ifdef CONFIG_NET_POLL_CONTROLLER
1661/**
1662 * vxge_netpoll - netpoll event handler entry point
1663 * @dev : pointer to the device structure.
1664 * Description:
1665 * This function will be called by upper layer to check for events on the
1666 * interface in situations where interrupts are disabled. It is used for
1667 * specific in-kernel networking tasks, such as remote consoles and kernel
1668 * debugging over the network (example netdump in RedHat).
1669 */
1670static void vxge_netpoll(struct net_device *dev)
1671{
2c91308f 1672 struct __vxge_hw_device *hldev;
703da5a1
RV
1673 struct vxgedev *vdev;
1674
5f54cebb 1675 vdev = netdev_priv(dev);
703da5a1
RV
1676 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
1677
1678 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1679
1680 if (pci_channel_offline(vdev->pdev))
1681 return;
1682
1683 disable_irq(dev->irq);
1684 vxge_hw_device_clear_tx_rx(hldev);
1685
1686 vxge_hw_device_clear_tx_rx(hldev);
1687 VXGE_COMPLETE_ALL_RX(vdev);
1688 VXGE_COMPLETE_ALL_TX(vdev);
1689
1690 enable_irq(dev->irq);
1691
1692 vxge_debug_entryexit(VXGE_TRACE,
1693 "%s:%d Exiting...", __func__, __LINE__);
703da5a1
RV
1694}
1695#endif
1696
1697/* RTH configuration */
1698static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1699{
1700 enum vxge_hw_status status = VXGE_HW_OK;
1701 struct vxge_hw_rth_hash_types hash_types;
1702 u8 itable[256] = {0}; /* indirection table */
1703 u8 mtable[256] = {0}; /* CPU to vpath mapping */
1704 int index;
1705
1706 /*
1707 * Filling
1708 * - itable with bucket numbers
1709 * - mtable with bucket-to-vpath mapping
1710 */
1711 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1712 itable[index] = index;
1713 mtable[index] = index % vdev->no_of_vpath;
1714 }
1715
703da5a1
RV
1716 /* set indirection table, bucket-to-vpath mapping */
1717 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1718 vdev->no_of_vpath,
1719 mtable, itable,
1720 vdev->config.rth_bkt_sz);
1721 if (status != VXGE_HW_OK) {
1722 vxge_debug_init(VXGE_ERR,
1723 "RTH indirection table configuration failed "
1724 "for vpath:%d", vdev->vpaths[0].device_id);
1725 return status;
1726 }
1727
47f01db4
JM
1728 /* Fill RTH hash types */
1729 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1730 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1731 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1732 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1733 hash_types.hash_type_tcpipv6ex_en =
1734 vdev->config.rth_hash_type_tcpipv6ex;
1735 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1736
703da5a1 1737 /*
47f01db4
JM
1738 * Because the itable_set() method uses the active_table field
1739 * for the target virtual path the RTH config should be updated
1740 * for all VPATHs. The h/w only uses the lowest numbered VPATH
1741 * when steering frames.
1742 */
703da5a1
RV
1743 for (index = 0; index < vdev->no_of_vpath; index++) {
1744 status = vxge_hw_vpath_rts_rth_set(
1745 vdev->vpaths[index].handle,
1746 vdev->config.rth_algorithm,
1747 &hash_types,
1748 vdev->config.rth_bkt_sz);
1749
1750 if (status != VXGE_HW_OK) {
1751 vxge_debug_init(VXGE_ERR,
1752 "RTH configuration failed for vpath:%d",
1753 vdev->vpaths[index].device_id);
1754 return status;
1755 }
1756 }
1757
1758 return status;
1759}
1760
42821a5b 1761static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
703da5a1
RV
1762{
1763 struct vxge_mac_addrs *new_mac_entry;
1764 u8 *mac_address = NULL;
1765
1766 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
1767 return TRUE;
1768
1769 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
1770 if (!new_mac_entry) {
1771 vxge_debug_mem(VXGE_ERR,
1772 "%s: memory allocation failed",
1773 VXGE_DRIVER_NAME);
1774 return FALSE;
1775 }
1776
1777 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
1778
1779 /* Copy the new mac address to the list */
1780 mac_address = (u8 *)&new_mac_entry->macaddr;
1781 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1782
1783 new_mac_entry->state = mac->state;
1784 vpath->mac_addr_cnt++;
1785
1786 /* Is this a multicast address */
1787 if (0x01 & mac->macaddr[0])
1788 vpath->mcast_addr_cnt++;
1789
1790 return TRUE;
1791}
1792
1793/* Add a mac address to DA table */
42821a5b 1794static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
1795 struct macInfo *mac)
703da5a1
RV
1796{
1797 enum vxge_hw_status status = VXGE_HW_OK;
1798 struct vxge_vpath *vpath;
1799 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
1800
1801 if (0x01 & mac->macaddr[0]) /* multicast address */
1802 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
1803 else
1804 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
1805
1806 vpath = &vdev->vpaths[mac->vpath_no];
1807 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
1808 mac->macmask, duplicate_mode);
1809 if (status != VXGE_HW_OK) {
1810 vxge_debug_init(VXGE_ERR,
1811 "DA config add entry failed for vpath:%d",
1812 vpath->device_id);
1813 } else
1814 if (FALSE == vxge_mac_list_add(vpath, mac))
1815 status = -EPERM;
1816
1817 return status;
1818}
1819
42821a5b 1820static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
703da5a1
RV
1821{
1822 struct list_head *entry, *next;
1823 u64 del_mac = 0;
2c91308f 1824 u8 *mac_address = (u8 *)(&del_mac);
703da5a1
RV
1825
1826 /* Copy the mac address to delete from the list */
1827 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1828
1829 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1830 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1831 list_del(entry);
1832 kfree((struct vxge_mac_addrs *)entry);
1833 vpath->mac_addr_cnt--;
1834
1835 /* Is this a multicast address */
1836 if (0x01 & mac->macaddr[0])
1837 vpath->mcast_addr_cnt--;
1838 return TRUE;
1839 }
1840 }
1841
1842 return FALSE;
1843}
1844/* delete a mac address from DA table */
42821a5b 1845static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
1846 struct macInfo *mac)
703da5a1
RV
1847{
1848 enum vxge_hw_status status = VXGE_HW_OK;
1849 struct vxge_vpath *vpath;
1850
1851 vpath = &vdev->vpaths[mac->vpath_no];
1852 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1853 mac->macmask);
1854 if (status != VXGE_HW_OK) {
1855 vxge_debug_init(VXGE_ERR,
1856 "DA config delete entry failed for vpath:%d",
1857 vpath->device_id);
1858 } else
1859 vxge_mac_list_del(vpath, mac);
1860 return status;
1861}
1862
1863/* list all mac addresses from DA table */
1864enum vxge_hw_status
1865static vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath,
1866 struct macInfo *mac)
1867{
1868 enum vxge_hw_status status = VXGE_HW_OK;
1869 unsigned char macmask[ETH_ALEN];
1870 unsigned char macaddr[ETH_ALEN];
1871
1872 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1873 macaddr, macmask);
1874 if (status != VXGE_HW_OK) {
1875 vxge_debug_init(VXGE_ERR,
1876 "DA config list entry failed for vpath:%d",
1877 vpath->device_id);
1878 return status;
1879 }
1880
1881 while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
1882
1883 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1884 macaddr, macmask);
1885 if (status != VXGE_HW_OK)
1886 break;
1887 }
1888
1889 return status;
1890}
1891
1892/* Store all vlan ids from the list to the vid table */
42821a5b 1893static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
703da5a1
RV
1894{
1895 enum vxge_hw_status status = VXGE_HW_OK;
1896 struct vxgedev *vdev = vpath->vdev;
1897 u16 vid;
1898
1899 if (vdev->vlgrp && vpath->is_open) {
1900
b738127d 1901 for (vid = 0; vid < VLAN_N_VID; vid++) {
703da5a1
RV
1902 if (!vlan_group_get_device(vdev->vlgrp, vid))
1903 continue;
1904 /* Add these vlan to the vid table */
1905 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
1906 }
1907 }
1908
1909 return status;
1910}
1911
1912/* Store all mac addresses from the list to the DA table */
42821a5b 1913static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
703da5a1
RV
1914{
1915 enum vxge_hw_status status = VXGE_HW_OK;
1916 struct macInfo mac_info;
1917 u8 *mac_address = NULL;
1918 struct list_head *entry, *next;
1919
1920 memset(&mac_info, 0, sizeof(struct macInfo));
1921
1922 if (vpath->is_open) {
1923
1924 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1925 mac_address =
1926 (u8 *)&
1927 ((struct vxge_mac_addrs *)entry)->macaddr;
1928 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1929 ((struct vxge_mac_addrs *)entry)->state =
1930 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1931 /* does this mac address already exist in da table? */
1932 status = vxge_search_mac_addr_in_da_table(vpath,
1933 &mac_info);
1934 if (status != VXGE_HW_OK) {
1935 /* Add this mac address to the DA table */
1936 status = vxge_hw_vpath_mac_addr_add(
1937 vpath->handle, mac_info.macaddr,
1938 mac_info.macmask,
1939 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1940 if (status != VXGE_HW_OK) {
1941 vxge_debug_init(VXGE_ERR,
1942 "DA add entry failed for vpath:%d",
1943 vpath->device_id);
1944 ((struct vxge_mac_addrs *)entry)->state
1945 = VXGE_LL_MAC_ADDR_IN_LIST;
1946 }
1947 }
1948 }
1949 }
1950
1951 return status;
1952}
1953
1954/* reset vpaths */
4d2a5b40 1955enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
703da5a1 1956{
703da5a1 1957 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM
1958 struct vxge_vpath *vpath;
1959 int i;
703da5a1 1960
7adf7d1b
JM
1961 for (i = 0; i < vdev->no_of_vpath; i++) {
1962 vpath = &vdev->vpaths[i];
1963 if (vpath->handle) {
1964 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1
RV
1965 if (is_vxge_card_up(vdev) &&
1966 vxge_hw_vpath_recover_from_reset(
7adf7d1b 1967 vpath->handle) != VXGE_HW_OK) {
703da5a1
RV
1968 vxge_debug_init(VXGE_ERR,
1969 "vxge_hw_vpath_recover_"
1970 "from_reset failed for vpath: "
1971 "%d", i);
1972 return status;
1973 }
1974 } else {
1975 vxge_debug_init(VXGE_ERR,
1976 "vxge_hw_vpath_reset failed for "
1977 "vpath:%d", i);
1978 return status;
1979 }
1980 }
7adf7d1b
JM
1981 }
1982
703da5a1
RV
1983 return status;
1984}
1985
1986/* close vpaths */
42821a5b 1987static void vxge_close_vpaths(struct vxgedev *vdev, int index)
703da5a1 1988{
7adf7d1b 1989 struct vxge_vpath *vpath;
703da5a1 1990 int i;
7adf7d1b 1991
703da5a1 1992 for (i = index; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
1993 vpath = &vdev->vpaths[i];
1994
1995 if (vpath->handle && vpath->is_open) {
1996 vxge_hw_vpath_close(vpath->handle);
703da5a1
RV
1997 vdev->stats.vpaths_open--;
1998 }
7adf7d1b
JM
1999 vpath->is_open = 0;
2000 vpath->handle = NULL;
703da5a1
RV
2001 }
2002}
2003
2004/* open vpaths */
42821a5b 2005static int vxge_open_vpaths(struct vxgedev *vdev)
703da5a1 2006{
7adf7d1b 2007 struct vxge_hw_vpath_attr attr;
703da5a1 2008 enum vxge_hw_status status;
7adf7d1b 2009 struct vxge_vpath *vpath;
703da5a1 2010 u32 vp_id = 0;
7adf7d1b 2011 int i;
703da5a1
RV
2012
2013 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2014 vpath = &vdev->vpaths[i];
7adf7d1b 2015 vxge_assert(vpath->is_configured);
e7935c96
JM
2016
2017 if (!vdev->titan1) {
2018 struct vxge_hw_vp_config *vcfg;
2019 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2020
2021 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2022 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2023 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2024 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2025 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2026 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2027 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2028 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2029 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2030 }
2031
7adf7d1b 2032 attr.vp_id = vpath->device_id;
703da5a1
RV
2033 attr.fifo_attr.callback = vxge_xmit_compl;
2034 attr.fifo_attr.txdl_term = vxge_tx_term;
2035 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
7adf7d1b 2036 attr.fifo_attr.userdata = &vpath->fifo;
703da5a1
RV
2037
2038 attr.ring_attr.callback = vxge_rx_1b_compl;
2039 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2040 attr.ring_attr.rxd_term = vxge_rx_term;
2041 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
7adf7d1b 2042 attr.ring_attr.userdata = &vpath->ring;
703da5a1 2043
7adf7d1b
JM
2044 vpath->ring.ndev = vdev->ndev;
2045 vpath->ring.pdev = vdev->pdev;
2046 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
703da5a1 2047 if (status == VXGE_HW_OK) {
7adf7d1b 2048 vpath->fifo.handle =
703da5a1 2049 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
7adf7d1b 2050 vpath->ring.handle =
703da5a1 2051 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
7adf7d1b 2052 vpath->fifo.tx_steering_type =
703da5a1 2053 vdev->config.tx_steering_type;
7adf7d1b
JM
2054 vpath->fifo.ndev = vdev->ndev;
2055 vpath->fifo.pdev = vdev->pdev;
98f45da2
JM
2056 if (vdev->config.tx_steering_type)
2057 vpath->fifo.txq =
2058 netdev_get_tx_queue(vdev->ndev, i);
2059 else
2060 vpath->fifo.txq =
2061 netdev_get_tx_queue(vdev->ndev, 0);
7adf7d1b 2062 vpath->fifo.indicate_max_pkts =
703da5a1 2063 vdev->config.fifo_indicate_max_pkts;
7adf7d1b
JM
2064 vpath->ring.rx_vector_no = 0;
2065 vpath->ring.rx_csum = vdev->rx_csum;
b81b3733 2066 vpath->ring.rx_hwts = vdev->rx_hwts;
7adf7d1b
JM
2067 vpath->is_open = 1;
2068 vdev->vp_handles[i] = vpath->handle;
2069 vpath->ring.gro_enable = vdev->config.gro_enable;
2070 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
703da5a1
RV
2071 vdev->stats.vpaths_open++;
2072 } else {
2073 vdev->stats.vpath_open_fail++;
2074 vxge_debug_init(VXGE_ERR,
2075 "%s: vpath: %d failed to open "
2076 "with status: %d",
7adf7d1b 2077 vdev->ndev->name, vpath->device_id,
703da5a1
RV
2078 status);
2079 vxge_close_vpaths(vdev, 0);
2080 return -EPERM;
2081 }
2082
7adf7d1b 2083 vp_id = vpath->handle->vpath->vp_id;
703da5a1
RV
2084 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2085 }
2086 return VXGE_HW_OK;
2087}
2088
2089/*
2090 * vxge_isr_napi
2091 * @irq: the irq of the device.
2092 * @dev_id: a void pointer to the hldev structure of the Titan device
2093 * @ptregs: pointer to the registers pushed on the stack.
2094 *
2095 * This function is the ISR handler of the device when napi is enabled. It
2096 * identifies the reason for the interrupt and calls the relevant service
2097 * routines.
2098 */
2099static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2100{
703da5a1 2101 struct net_device *dev;
a5d165b5 2102 struct __vxge_hw_device *hldev;
703da5a1
RV
2103 u64 reason;
2104 enum vxge_hw_status status;
2c91308f 2105 struct vxgedev *vdev = (struct vxgedev *)dev_id;
703da5a1
RV
2106
2107 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2108
a5d165b5
SH
2109 dev = vdev->ndev;
2110 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
703da5a1
RV
2111
2112 if (pci_channel_offline(vdev->pdev))
2113 return IRQ_NONE;
2114
2115 if (unlikely(!is_vxge_card_up(vdev)))
4d2a5b40 2116 return IRQ_HANDLED;
703da5a1
RV
2117
2118 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode,
2119 &reason);
2120 if (status == VXGE_HW_OK) {
2121 vxge_hw_device_mask_all(hldev);
2122
2123 if (reason &
2124 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2125 vdev->vpaths_deployed >>
2126 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2127
2128 vxge_hw_device_clear_tx_rx(hldev);
2129 napi_schedule(&vdev->napi);
2130 vxge_debug_intr(VXGE_TRACE,
2131 "%s:%d Exiting...", __func__, __LINE__);
2132 return IRQ_HANDLED;
2133 } else
2134 vxge_hw_device_unmask_all(hldev);
2135 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2136 (status == VXGE_HW_ERR_CRITICAL) ||
2137 (status == VXGE_HW_ERR_FIFO))) {
2138 vxge_hw_device_mask_all(hldev);
2139 vxge_hw_device_flush_io(hldev);
2140 return IRQ_HANDLED;
2141 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2142 return IRQ_HANDLED;
2143
2144 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2145 return IRQ_NONE;
2146}
2147
2148#ifdef CONFIG_PCI_MSI
2149
2150static irqreturn_t
2151vxge_tx_msix_handle(int irq, void *dev_id)
2152{
2153 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2154
2155 VXGE_COMPLETE_VPATH_TX(fifo);
2156
2157 return IRQ_HANDLED;
2158}
2159
2160static irqreturn_t
2161vxge_rx_msix_napi_handle(int irq, void *dev_id)
2162{
2163 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2164
2165 /* MSIX_IDX for Rx is 1 */
2166 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
2167 ring->rx_vector_no);
2168
2169 napi_schedule(&ring->napi);
2170 return IRQ_HANDLED;
2171}
2172
2173static irqreturn_t
2174vxge_alarm_msix_handle(int irq, void *dev_id)
2175{
2176 int i;
2177 enum vxge_hw_status status;
2178 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2179 struct vxgedev *vdev = vpath->vdev;
b59c9457
SH
2180 int msix_id = (vpath->handle->vpath->vp_id *
2181 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV
2182
2183 for (i = 0; i < vdev->no_of_vpath; i++) {
b59c9457 2184 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
703da5a1
RV
2185
2186 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2187 vdev->exec_mode);
2188 if (status == VXGE_HW_OK) {
2189
2190 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
b59c9457 2191 msix_id);
703da5a1
RV
2192 continue;
2193 }
2194 vxge_debug_intr(VXGE_ERR,
2195 "%s: vxge_hw_vpath_alarm_process failed %x ",
2196 VXGE_DRIVER_NAME, status);
2197 }
2198 return IRQ_HANDLED;
2199}
2200
2201static int vxge_alloc_msix(struct vxgedev *vdev)
2202{
2203 int j, i, ret = 0;
b59c9457 2204 int msix_intr_vect = 0, temp;
703da5a1
RV
2205 vdev->intr_cnt = 0;
2206
b59c9457 2207start:
703da5a1
RV
2208 /* Tx/Rx MSIX Vectors count */
2209 vdev->intr_cnt = vdev->no_of_vpath * 2;
2210
2211 /* Alarm MSIX Vectors count */
2212 vdev->intr_cnt++;
2213
baeb2ffa
JP
2214 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2215 GFP_KERNEL);
703da5a1
RV
2216 if (!vdev->entries) {
2217 vxge_debug_init(VXGE_ERR,
2218 "%s: memory allocation failed",
2219 VXGE_DRIVER_NAME);
cc413d90
MS
2220 ret = -ENOMEM;
2221 goto alloc_entries_failed;
703da5a1
RV
2222 }
2223
baeb2ffa
JP
2224 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2225 sizeof(struct vxge_msix_entry),
2226 GFP_KERNEL);
703da5a1
RV
2227 if (!vdev->vxge_entries) {
2228 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2229 VXGE_DRIVER_NAME);
cc413d90
MS
2230 ret = -ENOMEM;
2231 goto alloc_vxge_entries_failed;
703da5a1
RV
2232 }
2233
b59c9457 2234 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
703da5a1
RV
2235
2236 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2237
2238 /* Initialize the fifo vector */
2239 vdev->entries[j].entry = msix_intr_vect;
2240 vdev->vxge_entries[j].entry = msix_intr_vect;
2241 vdev->vxge_entries[j].in_use = 0;
2242 j++;
2243
2244 /* Initialize the ring vector */
2245 vdev->entries[j].entry = msix_intr_vect + 1;
2246 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2247 vdev->vxge_entries[j].in_use = 0;
2248 j++;
2249 }
2250
2251 /* Initialize the alarm vector */
b59c9457
SH
2252 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2253 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
703da5a1
RV
2254 vdev->vxge_entries[j].in_use = 0;
2255
b59c9457 2256 ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
b59c9457 2257 if (ret > 0) {
703da5a1
RV
2258 vxge_debug_init(VXGE_ERR,
2259 "%s: MSI-X enable failed for %d vectors, ret: %d",
b59c9457 2260 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
cc413d90
MS
2261 if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
2262 ret = -ENODEV;
2263 goto enable_msix_failed;
2264 }
2265
703da5a1
RV
2266 kfree(vdev->entries);
2267 kfree(vdev->vxge_entries);
2268 vdev->entries = NULL;
2269 vdev->vxge_entries = NULL;
b59c9457
SH
2270 /* Try with less no of vector by reducing no of vpaths count */
2271 temp = (ret - 1)/2;
2272 vxge_close_vpaths(vdev, temp);
2273 vdev->no_of_vpath = temp;
2274 goto start;
cc413d90
MS
2275 } else if (ret < 0) {
2276 ret = -ENODEV;
2277 goto enable_msix_failed;
2278 }
703da5a1 2279 return 0;
cc413d90
MS
2280
2281enable_msix_failed:
2282 kfree(vdev->vxge_entries);
2283alloc_vxge_entries_failed:
2284 kfree(vdev->entries);
2285alloc_entries_failed:
2286 return ret;
703da5a1
RV
2287}
2288
2289static int vxge_enable_msix(struct vxgedev *vdev)
2290{
2291
2292 int i, ret = 0;
703da5a1 2293 /* 0 - Tx, 1 - Rx */
b59c9457
SH
2294 int tim_msix_id[4] = {0, 1, 0, 0};
2295
703da5a1
RV
2296 vdev->intr_cnt = 0;
2297
2298 /* allocate msix vectors */
2299 ret = vxge_alloc_msix(vdev);
2300 if (!ret) {
703da5a1 2301 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2302 struct vxge_vpath *vpath = &vdev->vpaths[i];
703da5a1 2303
7adf7d1b
JM
2304 /* If fifo or ring are not enabled, the MSIX vector for
2305 * it should be set to 0.
2306 */
2307 vpath->ring.rx_vector_no = (vpath->device_id *
2308 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
703da5a1 2309
7adf7d1b
JM
2310 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2311 VXGE_ALARM_MSIX_ID);
703da5a1
RV
2312 }
2313 }
2314
2315 return ret;
2316}
2317
2318static void vxge_rem_msix_isr(struct vxgedev *vdev)
2319{
2320 int intr_cnt;
2321
b59c9457 2322 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
703da5a1
RV
2323 intr_cnt++) {
2324 if (vdev->vxge_entries[intr_cnt].in_use) {
2325 synchronize_irq(vdev->entries[intr_cnt].vector);
2326 free_irq(vdev->entries[intr_cnt].vector,
2327 vdev->vxge_entries[intr_cnt].arg);
2328 vdev->vxge_entries[intr_cnt].in_use = 0;
2329 }
2330 }
2331
2332 kfree(vdev->entries);
2333 kfree(vdev->vxge_entries);
2334 vdev->entries = NULL;
2335 vdev->vxge_entries = NULL;
2336
2337 if (vdev->config.intr_type == MSI_X)
2338 pci_disable_msix(vdev->pdev);
2339}
2340#endif
2341
2342static void vxge_rem_isr(struct vxgedev *vdev)
2343{
2c91308f
JM
2344 struct __vxge_hw_device *hldev;
2345 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
703da5a1
RV
2346
2347#ifdef CONFIG_PCI_MSI
2348 if (vdev->config.intr_type == MSI_X) {
2349 vxge_rem_msix_isr(vdev);
2350 } else
2351#endif
2352 if (vdev->config.intr_type == INTA) {
2353 synchronize_irq(vdev->pdev->irq);
a5d165b5 2354 free_irq(vdev->pdev->irq, vdev);
703da5a1
RV
2355 }
2356}
2357
2358static int vxge_add_isr(struct vxgedev *vdev)
2359{
2360 int ret = 0;
703da5a1
RV
2361#ifdef CONFIG_PCI_MSI
2362 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
703da5a1
RV
2363 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2364
2365 if (vdev->config.intr_type == MSI_X)
2366 ret = vxge_enable_msix(vdev);
2367
2368 if (ret) {
2369 vxge_debug_init(VXGE_ERR,
2370 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
eb5f10c2
SH
2371 vxge_debug_init(VXGE_ERR,
2372 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2373 vdev->config.intr_type = INTA;
703da5a1
RV
2374 }
2375
2376 if (vdev->config.intr_type == MSI_X) {
2377 for (intr_idx = 0;
2378 intr_idx < (vdev->no_of_vpath *
2379 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2380
2381 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2382 irq_req = 0;
2383
2384 switch (msix_idx) {
2385 case 0:
2386 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH
2387 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2388 vdev->ndev->name,
2389 vdev->entries[intr_cnt].entry,
2390 pci_fun, vp_idx);
703da5a1
RV
2391 ret = request_irq(
2392 vdev->entries[intr_cnt].vector,
2393 vxge_tx_msix_handle, 0,
2394 vdev->desc[intr_cnt],
2395 &vdev->vpaths[vp_idx].fifo);
2396 vdev->vxge_entries[intr_cnt].arg =
2397 &vdev->vpaths[vp_idx].fifo;
2398 irq_req = 1;
2399 break;
2400 case 1:
2401 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH
2402 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2403 vdev->ndev->name,
2404 vdev->entries[intr_cnt].entry,
2405 pci_fun, vp_idx);
703da5a1
RV
2406 ret = request_irq(
2407 vdev->entries[intr_cnt].vector,
2408 vxge_rx_msix_napi_handle,
2409 0,
2410 vdev->desc[intr_cnt],
2411 &vdev->vpaths[vp_idx].ring);
2412 vdev->vxge_entries[intr_cnt].arg =
2413 &vdev->vpaths[vp_idx].ring;
2414 irq_req = 1;
2415 break;
2416 }
2417
2418 if (ret) {
2419 vxge_debug_init(VXGE_ERR,
2420 "%s: MSIX - %d Registration failed",
2421 vdev->ndev->name, intr_cnt);
2422 vxge_rem_msix_isr(vdev);
eb5f10c2
SH
2423 vdev->config.intr_type = INTA;
2424 vxge_debug_init(VXGE_ERR,
2425 "%s: Defaulting to INTA"
2426 , vdev->ndev->name);
703da5a1 2427 goto INTA_MODE;
703da5a1
RV
2428 }
2429
2430 if (irq_req) {
2431 /* We requested for this msix interrupt */
2432 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457
SH
2433 msix_idx += vdev->vpaths[vp_idx].device_id *
2434 VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV
2435 vxge_hw_vpath_msix_unmask(
2436 vdev->vpaths[vp_idx].handle,
b59c9457 2437 msix_idx);
703da5a1
RV
2438 intr_cnt++;
2439 }
2440
2441 /* Point to next vpath handler */
8e95a202
JP
2442 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2443 (vp_idx < (vdev->no_of_vpath - 1)))
2444 vp_idx++;
703da5a1
RV
2445 }
2446
b59c9457 2447 intr_cnt = vdev->no_of_vpath * 2;
703da5a1 2448 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH
2449 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2450 vdev->ndev->name,
2451 vdev->entries[intr_cnt].entry,
2452 pci_fun);
703da5a1
RV
2453 /* For Alarm interrupts */
2454 ret = request_irq(vdev->entries[intr_cnt].vector,
2455 vxge_alarm_msix_handle, 0,
2456 vdev->desc[intr_cnt],
b59c9457 2457 &vdev->vpaths[0]);
703da5a1
RV
2458 if (ret) {
2459 vxge_debug_init(VXGE_ERR,
2460 "%s: MSIX - %d Registration failed",
2461 vdev->ndev->name, intr_cnt);
2462 vxge_rem_msix_isr(vdev);
eb5f10c2
SH
2463 vdev->config.intr_type = INTA;
2464 vxge_debug_init(VXGE_ERR,
2465 "%s: Defaulting to INTA",
2466 vdev->ndev->name);
703da5a1 2467 goto INTA_MODE;
703da5a1
RV
2468 }
2469
b59c9457
SH
2470 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2471 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1 2472 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
b59c9457 2473 msix_idx);
703da5a1 2474 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457 2475 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
703da5a1
RV
2476 }
2477INTA_MODE:
2478#endif
703da5a1
RV
2479
2480 if (vdev->config.intr_type == INTA) {
b59c9457
SH
2481 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2482 "%s:vxge:INTA", vdev->ndev->name);
eb5f10c2
SH
2483 vxge_hw_device_set_intr_type(vdev->devh,
2484 VXGE_HW_INTR_MODE_IRQLINE);
2485 vxge_hw_vpath_tti_ci_set(vdev->devh,
2486 vdev->vpaths[0].device_id);
703da5a1
RV
2487 ret = request_irq((int) vdev->pdev->irq,
2488 vxge_isr_napi,
a5d165b5 2489 IRQF_SHARED, vdev->desc[0], vdev);
703da5a1
RV
2490 if (ret) {
2491 vxge_debug_init(VXGE_ERR,
2492 "%s %s-%d: ISR registration failed",
2493 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2494 return -ENODEV;
2495 }
2496 vxge_debug_init(VXGE_TRACE,
2497 "new %s-%d line allocated",
2498 "IRQ", vdev->pdev->irq);
2499 }
2500
2501 return VXGE_HW_OK;
2502}
2503
2504static void vxge_poll_vp_reset(unsigned long data)
2505{
2506 struct vxgedev *vdev = (struct vxgedev *)data;
2507 int i, j = 0;
2508
2509 for (i = 0; i < vdev->no_of_vpath; i++) {
2510 if (test_bit(i, &vdev->vp_reset)) {
2511 vxge_reset_vpath(vdev, i);
2512 j++;
2513 }
2514 }
2515 if (j && (vdev->config.intr_type != MSI_X)) {
2516 vxge_hw_device_unmask_all(vdev->devh);
2517 vxge_hw_device_flush_io(vdev->devh);
2518 }
2519
2520 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2521}
2522
2523static void vxge_poll_vp_lockup(unsigned long data)
2524{
2525 struct vxgedev *vdev = (struct vxgedev *)data;
703da5a1 2526 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM
2527 struct vxge_vpath *vpath;
2528 struct vxge_ring *ring;
2529 int i;
703da5a1
RV
2530
2531 for (i = 0; i < vdev->no_of_vpath; i++) {
2532 ring = &vdev->vpaths[i].ring;
2533 /* Did this vpath received any packets */
2534 if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
2535 status = vxge_hw_vpath_check_leak(ring->handle);
2536
2537 /* Did it received any packets last time */
2538 if ((VXGE_HW_FAIL == status) &&
2539 (VXGE_HW_FAIL == ring->last_status)) {
2540
2541 /* schedule vpath reset */
2542 if (!test_and_set_bit(i, &vdev->vp_reset)) {
7adf7d1b 2543 vpath = &vdev->vpaths[i];
703da5a1
RV
2544
2545 /* disable interrupts for this vpath */
2546 vxge_vpath_intr_disable(vdev, i);
2547
2548 /* stop the queue for this vpath */
98f45da2 2549 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV
2550 continue;
2551 }
2552 }
2553 }
2554 ring->stats.prev_rx_frms = ring->stats.rx_frms;
2555 ring->last_status = status;
2556 }
2557
2558 /* Check every 1 milli second */
2559 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2560}
2561
2562/**
2563 * vxge_open
2564 * @dev: pointer to the device structure.
2565 *
2566 * This function is the open entry point of the driver. It mainly calls a
2567 * function to allocate Rx buffers and inserts them into the buffer
2568 * descriptors and then enables the Rx part of the NIC.
2569 * Return value: '0' on success and an appropriate (-)ve integer as
2570 * defined in errno.h file on failure.
2571 */
42821a5b 2572static int
703da5a1
RV
2573vxge_open(struct net_device *dev)
2574{
2575 enum vxge_hw_status status;
2576 struct vxgedev *vdev;
2577 struct __vxge_hw_device *hldev;
7adf7d1b 2578 struct vxge_vpath *vpath;
703da5a1
RV
2579 int ret = 0;
2580 int i;
2581 u64 val64, function_mode;
2582 vxge_debug_entryexit(VXGE_TRACE,
2583 "%s: %s:%d", dev->name, __func__, __LINE__);
2584
5f54cebb 2585 vdev = netdev_priv(dev);
2c91308f 2586 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
703da5a1
RV
2587 function_mode = vdev->config.device_hw_info.function_mode;
2588
2589 /* make sure you have link off by default every time Nic is
2590 * initialized */
2591 netif_carrier_off(dev);
2592
703da5a1
RV
2593 /* Open VPATHs */
2594 status = vxge_open_vpaths(vdev);
2595 if (status != VXGE_HW_OK) {
2596 vxge_debug_init(VXGE_ERR,
2597 "%s: fatal: Vpath open failed", vdev->ndev->name);
2598 ret = -EPERM;
2599 goto out0;
2600 }
2601
2602 vdev->mtu = dev->mtu;
2603
2604 status = vxge_add_isr(vdev);
2605 if (status != VXGE_HW_OK) {
2606 vxge_debug_init(VXGE_ERR,
2607 "%s: fatal: ISR add failed", dev->name);
2608 ret = -EPERM;
2609 goto out1;
2610 }
2611
703da5a1
RV
2612 if (vdev->config.intr_type != MSI_X) {
2613 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2614 vdev->config.napi_weight);
2615 napi_enable(&vdev->napi);
7adf7d1b
JM
2616 for (i = 0; i < vdev->no_of_vpath; i++) {
2617 vpath = &vdev->vpaths[i];
2618 vpath->ring.napi_p = &vdev->napi;
2619 }
703da5a1
RV
2620 } else {
2621 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
2622 vpath = &vdev->vpaths[i];
2623 netif_napi_add(dev, &vpath->ring.napi,
703da5a1 2624 vxge_poll_msix, vdev->config.napi_weight);
7adf7d1b
JM
2625 napi_enable(&vpath->ring.napi);
2626 vpath->ring.napi_p = &vpath->ring.napi;
703da5a1
RV
2627 }
2628 }
2629
2630 /* configure RTH */
2631 if (vdev->config.rth_steering) {
2632 status = vxge_rth_configure(vdev);
2633 if (status != VXGE_HW_OK) {
2634 vxge_debug_init(VXGE_ERR,
2635 "%s: fatal: RTH configuration failed",
2636 dev->name);
2637 ret = -EPERM;
2638 goto out2;
2639 }
2640 }
47f01db4
JM
2641 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2642 hldev->config.rth_en ? "enabled" : "disabled");
703da5a1
RV
2643
2644 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
2645 vpath = &vdev->vpaths[i];
2646
703da5a1 2647 /* set initial mtu before enabling the device */
7adf7d1b 2648 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
703da5a1
RV
2649 if (status != VXGE_HW_OK) {
2650 vxge_debug_init(VXGE_ERR,
2651 "%s: fatal: can not set new MTU", dev->name);
2652 ret = -EPERM;
2653 goto out2;
2654 }
2655 }
2656
2657 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2658 vxge_debug_init(vdev->level_trace,
2659 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2660 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2661
7adf7d1b
JM
2662 /* Restore the DA, VID table and also multicast and promiscuous mode
2663 * states
2664 */
2665 if (vdev->all_multi_flg) {
2666 for (i = 0; i < vdev->no_of_vpath; i++) {
2667 vpath = &vdev->vpaths[i];
2668 vxge_restore_vpath_mac_addr(vpath);
2669 vxge_restore_vpath_vid_table(vpath);
2670
2671 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2672 if (status != VXGE_HW_OK)
2673 vxge_debug_init(VXGE_ERR,
2674 "%s:%d Enabling multicast failed",
2675 __func__, __LINE__);
2676 }
703da5a1
RV
2677 }
2678
2679 /* Enable vpath to sniff all unicast/multicast traffic that not
2680 * addressed to them. We allow promiscous mode for PF only
2681 */
2682
2683 val64 = 0;
2684 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2685 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2686
2687 vxge_hw_mgmt_reg_write(vdev->devh,
2688 vxge_hw_mgmt_reg_type_mrpcim,
2689 0,
2690 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2691 rxmac_authorize_all_addr),
2692 val64);
2693
2694 vxge_hw_mgmt_reg_write(vdev->devh,
2695 vxge_hw_mgmt_reg_type_mrpcim,
2696 0,
2697 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2698 rxmac_authorize_all_vid),
2699 val64);
2700
2701 vxge_set_multicast(dev);
2702
2703 /* Enabling Bcast and mcast for all vpath */
2704 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
2705 vpath = &vdev->vpaths[i];
2706 status = vxge_hw_vpath_bcast_enable(vpath->handle);
703da5a1
RV
2707 if (status != VXGE_HW_OK)
2708 vxge_debug_init(VXGE_ERR,
2709 "%s : Can not enable bcast for vpath "
2710 "id %d", dev->name, i);
2711 if (vdev->config.addr_learn_en) {
7adf7d1b 2712 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV
2713 if (status != VXGE_HW_OK)
2714 vxge_debug_init(VXGE_ERR,
2715 "%s : Can not enable mcast for vpath "
2716 "id %d", dev->name, i);
2717 }
2718 }
2719
2720 vxge_hw_device_setpause_data(vdev->devh, 0,
2721 vdev->config.tx_pause_enable,
2722 vdev->config.rx_pause_enable);
2723
2724 if (vdev->vp_reset_timer.function == NULL)
2725 vxge_os_timer(vdev->vp_reset_timer,
2726 vxge_poll_vp_reset, vdev, (HZ/2));
2727
e7935c96
JM
2728 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2729 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2730 vxge_os_timer(vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
2731 HZ / 2);
703da5a1
RV
2732
2733 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2734
2735 smp_wmb();
2736
2737 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2738 netif_carrier_on(vdev->ndev);
75f5e1c6 2739 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV
2740 vdev->stats.link_up++;
2741 }
2742
2743 vxge_hw_device_intr_enable(vdev->devh);
2744
2745 smp_wmb();
2746
2747 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM
2748 vpath = &vdev->vpaths[i];
2749
2750 vxge_hw_vpath_enable(vpath->handle);
703da5a1 2751 smp_wmb();
7adf7d1b 2752 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
703da5a1
RV
2753 }
2754
d03848e0 2755 netif_tx_start_all_queues(vdev->ndev);
703da5a1
RV
2756 goto out0;
2757
2758out2:
2759 vxge_rem_isr(vdev);
2760
2761 /* Disable napi */
2762 if (vdev->config.intr_type != MSI_X)
2763 napi_disable(&vdev->napi);
2764 else {
2765 for (i = 0; i < vdev->no_of_vpath; i++)
2766 napi_disable(&vdev->vpaths[i].ring.napi);
2767 }
2768
2769out1:
2770 vxge_close_vpaths(vdev, 0);
2771out0:
2772 vxge_debug_entryexit(VXGE_TRACE,
2773 "%s: %s:%d Exiting...",
2774 dev->name, __func__, __LINE__);
2775 return ret;
2776}
2777
2778/* Loop throught the mac address list and delete all the entries */
42821a5b 2779static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
703da5a1
RV
2780{
2781
2782 struct list_head *entry, *next;
2783 if (list_empty(&vpath->mac_addr_list))
2784 return;
2785
2786 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2787 list_del(entry);
2788 kfree((struct vxge_mac_addrs *)entry);
2789 }
2790}
2791
2792static void vxge_napi_del_all(struct vxgedev *vdev)
2793{
2794 int i;
2795 if (vdev->config.intr_type != MSI_X)
2796 netif_napi_del(&vdev->napi);
2797 else {
2798 for (i = 0; i < vdev->no_of_vpath; i++)
2799 netif_napi_del(&vdev->vpaths[i].ring.napi);
2800 }
703da5a1
RV
2801}
2802
42821a5b 2803static int do_vxge_close(struct net_device *dev, int do_io)
703da5a1
RV
2804{
2805 enum vxge_hw_status status;
2806 struct vxgedev *vdev;
2807 struct __vxge_hw_device *hldev;
2808 int i;
2809 u64 val64, vpath_vector;
2810 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2811 dev->name, __func__, __LINE__);
2812
5f54cebb 2813 vdev = netdev_priv(dev);
2c91308f 2814 hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
703da5a1 2815
bd9ee680
SH
2816 if (unlikely(!is_vxge_card_up(vdev)))
2817 return 0;
2818
703da5a1
RV
2819 /* If vxge_handle_crit_err task is executing,
2820 * wait till it completes. */
2821 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2822 msleep(50);
2823
703da5a1
RV
2824 if (do_io) {
2825 /* Put the vpath back in normal mode */
2826 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2827 status = vxge_hw_mgmt_reg_read(vdev->devh,
2828 vxge_hw_mgmt_reg_type_mrpcim,
2829 0,
2830 (ulong)offsetof(
2831 struct vxge_hw_mrpcim_reg,
2832 rts_mgr_cbasin_cfg),
2833 &val64);
2834
2835 if (status == VXGE_HW_OK) {
2836 val64 &= ~vpath_vector;
2837 status = vxge_hw_mgmt_reg_write(vdev->devh,
2838 vxge_hw_mgmt_reg_type_mrpcim,
2839 0,
2840 (ulong)offsetof(
2841 struct vxge_hw_mrpcim_reg,
2842 rts_mgr_cbasin_cfg),
2843 val64);
2844 }
2845
2846 /* Remove the function 0 from promiscous mode */
2847 vxge_hw_mgmt_reg_write(vdev->devh,
2848 vxge_hw_mgmt_reg_type_mrpcim,
2849 0,
2850 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2851 rxmac_authorize_all_addr),
2852 0);
2853
2854 vxge_hw_mgmt_reg_write(vdev->devh,
2855 vxge_hw_mgmt_reg_type_mrpcim,
2856 0,
2857 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2858 rxmac_authorize_all_vid),
2859 0);
2860
2861 smp_wmb();
2862 }
e7935c96
JM
2863
2864 if (vdev->titan1)
2865 del_timer_sync(&vdev->vp_lockup_timer);
703da5a1
RV
2866
2867 del_timer_sync(&vdev->vp_reset_timer);
2868
4d2a5b40
JM
2869 if (do_io)
2870 vxge_hw_device_wait_receive_idle(hldev);
2871
2872 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2873
703da5a1
RV
2874 /* Disable napi */
2875 if (vdev->config.intr_type != MSI_X)
2876 napi_disable(&vdev->napi);
2877 else {
2878 for (i = 0; i < vdev->no_of_vpath; i++)
2879 napi_disable(&vdev->vpaths[i].ring.napi);
2880 }
2881
2882 netif_carrier_off(vdev->ndev);
75f5e1c6 2883 netdev_notice(vdev->ndev, "Link Down\n");
d03848e0 2884 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV
2885
2886 /* Note that at this point xmit() is stopped by upper layer */
2887 if (do_io)
2888 vxge_hw_device_intr_disable(vdev->devh);
2889
703da5a1
RV
2890 vxge_rem_isr(vdev);
2891
2892 vxge_napi_del_all(vdev);
2893
2894 if (do_io)
2895 vxge_reset_all_vpaths(vdev);
2896
2897 vxge_close_vpaths(vdev, 0);
2898
2899 vxge_debug_entryexit(VXGE_TRACE,
2900 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
2901
703da5a1
RV
2902 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
2903
2904 return 0;
2905}
2906
2907/**
2908 * vxge_close
2909 * @dev: device pointer.
2910 *
2911 * This is the stop entry point of the driver. It needs to undo exactly
2912 * whatever was done by the open entry point, thus it's usually referred to
2913 * as the close function.Among other things this function mainly stops the
2914 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
2915 * Return value: '0' on success and an appropriate (-)ve integer as
2916 * defined in errno.h file on failure.
2917 */
42821a5b 2918static int
703da5a1
RV
2919vxge_close(struct net_device *dev)
2920{
2921 do_vxge_close(dev, 1);
2922 return 0;
2923}
2924
2925/**
2926 * vxge_change_mtu
2927 * @dev: net device pointer.
2928 * @new_mtu :the new MTU size for the device.
2929 *
2930 * A driver entry point to change MTU size for the device. Before changing
2931 * the MTU the device must be stopped.
2932 */
2933static int vxge_change_mtu(struct net_device *dev, int new_mtu)
2934{
2935 struct vxgedev *vdev = netdev_priv(dev);
2936
2937 vxge_debug_entryexit(vdev->level_trace,
2938 "%s:%d", __func__, __LINE__);
2939 if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
2940 vxge_debug_init(vdev->level_err,
2941 "%s: mtu size is invalid", dev->name);
2942 return -EPERM;
2943 }
2944
2945 /* check if device is down already */
2946 if (unlikely(!is_vxge_card_up(vdev))) {
2947 /* just store new value, will use later on open() */
2948 dev->mtu = new_mtu;
2949 vxge_debug_init(vdev->level_err,
2950 "%s", "device is down on MTU change");
2951 return 0;
2952 }
2953
2954 vxge_debug_init(vdev->level_trace,
2955 "trying to apply new MTU %d", new_mtu);
2956
2957 if (vxge_close(dev))
2958 return -EIO;
2959
2960 dev->mtu = new_mtu;
2961 vdev->mtu = new_mtu;
2962
2963 if (vxge_open(dev))
2964 return -EIO;
2965
2966 vxge_debug_init(vdev->level_trace,
2967 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
2968
2969 vxge_debug_entryexit(vdev->level_trace,
2970 "%s:%d Exiting...", __func__, __LINE__);
2971
2972 return 0;
2973}
2974
2975/**
dd57f970 2976 * vxge_get_stats64
703da5a1 2977 * @dev: pointer to the device structure
dd57f970 2978 * @stats: pointer to struct rtnl_link_stats64
703da5a1 2979 *
703da5a1 2980 */
dd57f970
ED
2981static struct rtnl_link_stats64 *
2982vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
703da5a1 2983{
dd57f970 2984 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV
2985 int k;
2986
dd57f970 2987 /* net_stats already zeroed by caller */
703da5a1
RV
2988 for (k = 0; k < vdev->no_of_vpath; k++) {
2989 net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
2990 net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
2991 net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
2992 net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
2993 net_stats->rx_dropped +=
2994 vdev->vpaths[k].ring.stats.rx_dropped;
2995
2996 net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
2997 net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
2998 net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
2999 }
3000
3001 return net_stats;
3002}
3003
b81b3733
JM
3004static enum vxge_hw_status vxge_timestamp_config(struct vxgedev *vdev,
3005 int enable)
3006{
3007 enum vxge_hw_status status;
3008 u64 val64;
3009
3010 /* Timestamp is passed to the driver via the FCS, therefore we
3011 * must disable the FCS stripping by the adapter. Since this is
3012 * required for the driver to load (due to a hardware bug),
3013 * there is no need to do anything special here.
3014 */
3015 if (enable)
3016 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3017 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3018 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
3019 else
3020 val64 = 0;
3021
3022 status = vxge_hw_mgmt_reg_write(vdev->devh,
3023 vxge_hw_mgmt_reg_type_mrpcim,
3024 0,
3025 offsetof(struct vxge_hw_mrpcim_reg,
3026 xmac_timestamp),
3027 val64);
3028 vxge_hw_device_flush_io(vdev->devh);
3029 return status;
3030}
3031
3032static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
3033{
3034 struct hwtstamp_config config;
3035 enum vxge_hw_status status;
3036 int i;
3037
3038 if (copy_from_user(&config, data, sizeof(config)))
3039 return -EFAULT;
3040
3041 /* reserved for future extensions */
3042 if (config.flags)
3043 return -EINVAL;
3044
3045 /* Transmit HW Timestamp not supported */
3046 switch (config.tx_type) {
3047 case HWTSTAMP_TX_OFF:
3048 break;
3049 case HWTSTAMP_TX_ON:
3050 default:
3051 return -ERANGE;
3052 }
3053
3054 switch (config.rx_filter) {
3055 case HWTSTAMP_FILTER_NONE:
3056 status = vxge_timestamp_config(vdev, 0);
3057 if (status != VXGE_HW_OK)
3058 return -EFAULT;
3059
3060 vdev->rx_hwts = 0;
3061 config.rx_filter = HWTSTAMP_FILTER_NONE;
3062 break;
3063
3064 case HWTSTAMP_FILTER_ALL:
3065 case HWTSTAMP_FILTER_SOME:
3066 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3067 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3068 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3069 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3070 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3071 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3072 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3073 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3074 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3075 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3076 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3077 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3078 status = vxge_timestamp_config(vdev, 1);
3079 if (status != VXGE_HW_OK)
3080 return -EFAULT;
3081
3082 vdev->rx_hwts = 1;
3083 config.rx_filter = HWTSTAMP_FILTER_ALL;
3084 break;
3085
3086 default:
3087 return -ERANGE;
3088 }
3089
3090 for (i = 0; i < vdev->no_of_vpath; i++)
3091 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3092
3093 if (copy_to_user(data, &config, sizeof(config)))
3094 return -EFAULT;
3095
3096 return 0;
3097}
3098
703da5a1
RV
3099/**
3100 * vxge_ioctl
3101 * @dev: Device pointer.
3102 * @ifr: An IOCTL specific structure, that can contain a pointer to
3103 * a proprietary structure used to pass information to the driver.
3104 * @cmd: This is used to distinguish between the different commands that
3105 * can be passed to the IOCTL functions.
3106 *
3107 * Entry point for the Ioctl.
3108 */
3109static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3110{
b81b3733
JM
3111 struct vxgedev *vdev = netdev_priv(dev);
3112 int ret;
3113
3114 switch (cmd) {
3115 case SIOCSHWTSTAMP:
3116 ret = vxge_hwtstamp_ioctl(vdev, rq->ifr_data);
3117 if (ret)
3118 return ret;
3119 break;
3120 default:
3121 return -EOPNOTSUPP;
3122 }
3123
3124 return 0;
703da5a1
RV
3125}
3126
3127/**
3128 * vxge_tx_watchdog
3129 * @dev: pointer to net device structure
3130 *
3131 * Watchdog for transmit side.
3132 * This function is triggered if the Tx Queue is stopped
3133 * for a pre-defined amount of time when the Interface is still up.
3134 */
3135static void
3136vxge_tx_watchdog(struct net_device *dev)
3137{
3138 struct vxgedev *vdev;
3139
3140 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3141
5f54cebb 3142 vdev = netdev_priv(dev);
703da5a1
RV
3143
3144 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3145
3146 vxge_reset(vdev);
3147 vxge_debug_entryexit(VXGE_TRACE,
3148 "%s:%d Exiting...", __func__, __LINE__);
3149}
3150
3151/**
3152 * vxge_vlan_rx_register
3153 * @dev: net device pointer.
3154 * @grp: vlan group
3155 *
3156 * Vlan group registration
3157 */
3158static void
3159vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
3160{
3161 struct vxgedev *vdev;
3162 struct vxge_vpath *vpath;
3163 int vp;
3164 u64 vid;
3165 enum vxge_hw_status status;
3166 int i;
3167
3168 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3169
5f54cebb 3170 vdev = netdev_priv(dev);
703da5a1
RV
3171
3172 vpath = &vdev->vpaths[0];
3173 if ((NULL == grp) && (vpath->is_open)) {
3174 /* Get the first vlan */
3175 status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
3176
3177 while (status == VXGE_HW_OK) {
3178
3179 /* Delete this vlan from the vid table */
3180 for (vp = 0; vp < vdev->no_of_vpath; vp++) {
3181 vpath = &vdev->vpaths[vp];
3182 if (!vpath->is_open)
3183 continue;
3184
3185 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3186 }
3187
3188 /* Get the next vlan to be deleted */
3189 vpath = &vdev->vpaths[0];
3190 status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
3191 }
3192 }
3193
3194 vdev->vlgrp = grp;
3195
3196 for (i = 0; i < vdev->no_of_vpath; i++) {
3197 if (vdev->vpaths[i].is_configured)
3198 vdev->vpaths[i].ring.vlgrp = grp;
3199 }
3200
3201 vxge_debug_entryexit(VXGE_TRACE,
3202 "%s:%d Exiting...", __func__, __LINE__);
3203}
3204
3205/**
3206 * vxge_vlan_rx_add_vid
3207 * @dev: net device pointer.
3208 * @vid: vid
3209 *
3210 * Add the vlan id to the devices vlan id table
3211 */
3212static void
3213vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
3214{
3215 struct vxgedev *vdev;
3216 struct vxge_vpath *vpath;
3217 int vp_id;
3218
5f54cebb 3219 vdev = netdev_priv(dev);
703da5a1
RV
3220
3221 /* Add these vlan to the vid table */
3222 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3223 vpath = &vdev->vpaths[vp_id];
3224 if (!vpath->is_open)
3225 continue;
3226 vxge_hw_vpath_vid_add(vpath->handle, vid);
3227 }
3228}
3229
3230/**
3231 * vxge_vlan_rx_add_vid
3232 * @dev: net device pointer.
3233 * @vid: vid
3234 *
3235 * Remove the vlan id from the device's vlan id table
3236 */
3237static void
3238vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
3239{
3240 struct vxgedev *vdev;
3241 struct vxge_vpath *vpath;
3242 int vp_id;
3243
3244 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3245
5f54cebb 3246 vdev = netdev_priv(dev);
703da5a1
RV
3247
3248 vlan_group_set_device(vdev->vlgrp, vid, NULL);
3249
3250 /* Delete this vlan from the vid table */
3251 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3252 vpath = &vdev->vpaths[vp_id];
3253 if (!vpath->is_open)
3254 continue;
3255 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3256 }
3257 vxge_debug_entryexit(VXGE_TRACE,
3258 "%s:%d Exiting...", __func__, __LINE__);
3259}
3260
3261static const struct net_device_ops vxge_netdev_ops = {
3262 .ndo_open = vxge_open,
3263 .ndo_stop = vxge_close,
dd57f970 3264 .ndo_get_stats64 = vxge_get_stats64,
703da5a1
RV
3265 .ndo_start_xmit = vxge_xmit,
3266 .ndo_validate_addr = eth_validate_addr,
3267 .ndo_set_multicast_list = vxge_set_multicast,
3268
3269 .ndo_do_ioctl = vxge_ioctl,
3270
3271 .ndo_set_mac_address = vxge_set_mac_addr,
3272 .ndo_change_mtu = vxge_change_mtu,
3273 .ndo_vlan_rx_register = vxge_vlan_rx_register,
3274 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3275 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
3276
3277 .ndo_tx_timeout = vxge_tx_watchdog,
3278#ifdef CONFIG_NET_POLL_CONTROLLER
3279 .ndo_poll_controller = vxge_netpoll,
3280#endif
3281};
3282
e7935c96
JM
3283static int __devinit vxge_device_revision(struct vxgedev *vdev)
3284{
3285 int ret;
3286 u8 revision;
3287
3288 ret = pci_read_config_byte(vdev->pdev, PCI_REVISION_ID, &revision);
3289 if (ret)
3290 return -EIO;
3291
3292 vdev->titan1 = (revision == VXGE_HW_TITAN1_PCI_REVISION);
3293 return 0;
3294}
3295
42821a5b 3296static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3297 struct vxge_config *config,
3298 int high_dma, int no_of_vpath,
3299 struct vxgedev **vdev_out)
703da5a1
RV
3300{
3301 struct net_device *ndev;
3302 enum vxge_hw_status status = VXGE_HW_OK;
3303 struct vxgedev *vdev;
98f45da2 3304 int ret = 0, no_of_queue = 1;
703da5a1
RV
3305 u64 stat;
3306
3307 *vdev_out = NULL;
d03848e0 3308 if (config->tx_steering_type)
703da5a1
RV
3309 no_of_queue = no_of_vpath;
3310
3311 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3312 no_of_queue);
3313 if (ndev == NULL) {
3314 vxge_debug_init(
3315 vxge_hw_device_trace_level_get(hldev),
3316 "%s : device allocation failed", __func__);
3317 ret = -ENODEV;
3318 goto _out0;
3319 }
3320
3321 vxge_debug_entryexit(
3322 vxge_hw_device_trace_level_get(hldev),
3323 "%s: %s:%d Entering...",
3324 ndev->name, __func__, __LINE__);
3325
3326 vdev = netdev_priv(ndev);
3327 memset(vdev, 0, sizeof(struct vxgedev));
3328
3329 vdev->ndev = ndev;
3330 vdev->devh = hldev;
3331 vdev->pdev = hldev->pdev;
3332 memcpy(&vdev->config, config, sizeof(struct vxge_config));
3333 vdev->rx_csum = 1; /* Enable Rx CSUM by default. */
b81b3733 3334 vdev->rx_hwts = 0;
703da5a1 3335
e7935c96
JM
3336 ret = vxge_device_revision(vdev);
3337 if (ret < 0)
3338 goto _out1;
3339
703da5a1
RV
3340 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3341
3342 ndev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
3343 NETIF_F_HW_VLAN_FILTER;
3344 /* Driver entry points */
3345 ndev->irq = vdev->pdev->irq;
3346 ndev->base_addr = (unsigned long) hldev->bar0;
3347
3348 ndev->netdev_ops = &vxge_netdev_ops;
3349
3350 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
3351
42821a5b 3352 vxge_initialize_ethtool_ops(ndev);
703da5a1 3353
47f01db4
JM
3354 if (vdev->config.rth_steering != NO_STEERING) {
3355 ndev->features |= NETIF_F_RXHASH;
3356 hldev->config.rth_en = VXGE_HW_RTH_ENABLE;
3357 }
3358
703da5a1
RV
3359 /* Allocate memory for vpath */
3360 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3361 no_of_vpath, GFP_KERNEL);
3362 if (!vdev->vpaths) {
3363 vxge_debug_init(VXGE_ERR,
3364 "%s: vpath memory allocation failed",
3365 vdev->ndev->name);
3366 ret = -ENODEV;
3367 goto _out1;
3368 }
3369
3370 ndev->features |= NETIF_F_SG;
3371
3372 ndev->features |= NETIF_F_HW_CSUM;
3373 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3374 "%s : checksuming enabled", __func__);
3375
3376 if (high_dma) {
3377 ndev->features |= NETIF_F_HIGHDMA;
3378 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3379 "%s : using High DMA", __func__);
3380 }
3381
3382 ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
3383
3384 if (vdev->config.gro_enable)
3385 ndev->features |= NETIF_F_GRO;
3386
703da5a1
RV
3387 if (register_netdev(ndev)) {
3388 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3389 "%s: %s : device registration failed!",
3390 ndev->name, __func__);
3391 ret = -ENODEV;
3392 goto _out2;
3393 }
3394
3395 /* Set the factory defined MAC address initially */
3396 ndev->addr_len = ETH_ALEN;
3397
3398 /* Make Link state as off at this point, when the Link change
3399 * interrupt comes the state will be automatically changed to
3400 * the right state.
3401 */
3402 netif_carrier_off(ndev);
3403
3404 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3405 "%s: Ethernet device registered",
3406 ndev->name);
3407
e8ac1756 3408 hldev->ndev = ndev;
703da5a1
RV
3409 *vdev_out = vdev;
3410
3411 /* Resetting the Device stats */
3412 status = vxge_hw_mrpcim_stats_access(
3413 hldev,
3414 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3415 0,
3416 0,
3417 &stat);
3418
3419 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3420 vxge_debug_init(
3421 vxge_hw_device_trace_level_get(hldev),
3422 "%s: device stats clear returns"
3423 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3424
3425 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3426 "%s: %s:%d Exiting...",
3427 ndev->name, __func__, __LINE__);
3428
3429 return ret;
3430_out2:
3431 kfree(vdev->vpaths);
3432_out1:
3433 free_netdev(ndev);
3434_out0:
3435 return ret;
3436}
3437
3438/*
3439 * vxge_device_unregister
3440 *
3441 * This function will unregister and free network device
3442 */
2c91308f 3443static void vxge_device_unregister(struct __vxge_hw_device *hldev)
703da5a1
RV
3444{
3445 struct vxgedev *vdev;
3446 struct net_device *dev;
3447 char buf[IFNAMSIZ];
703da5a1
RV
3448
3449 dev = hldev->ndev;
3450 vdev = netdev_priv(dev);
703da5a1 3451
2c91308f
JM
3452 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3453 __func__, __LINE__);
3454
3455 memcpy(buf, dev->name, IFNAMSIZ);
703da5a1
RV
3456
3457 /* in 2.6 will call stop() if device is up */
3458 unregister_netdev(dev);
3459
3460 flush_scheduled_work();
3461
2c91308f
JM
3462 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3463 buf);
3464 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3465 __func__, __LINE__);
703da5a1
RV
3466}
3467
3468/*
3469 * vxge_callback_crit_err
3470 *
3471 * This function is called by the alarm handler in interrupt context.
3472 * Driver must analyze it based on the event type.
3473 */
3474static void
3475vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3476 enum vxge_hw_event type, u64 vp_id)
3477{
3478 struct net_device *dev = hldev->ndev;
5f54cebb 3479 struct vxgedev *vdev = netdev_priv(dev);
98f45da2 3480 struct vxge_vpath *vpath = NULL;
703da5a1
RV
3481 int vpath_idx;
3482
3483 vxge_debug_entryexit(vdev->level_trace,
3484 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3485
3486 /* Note: This event type should be used for device wide
3487 * indications only - Serious errors, Slot freeze and critical errors
3488 */
3489 vdev->cric_err_event = type;
3490
98f45da2
JM
3491 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3492 vpath = &vdev->vpaths[vpath_idx];
3493 if (vpath->device_id == vp_id)
703da5a1 3494 break;
98f45da2 3495 }
703da5a1
RV
3496
3497 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3498 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3499 vxge_debug_init(VXGE_ERR,
3500 "%s: Slot is frozen", vdev->ndev->name);
3501 } else if (type == VXGE_HW_EVENT_SERR) {
3502 vxge_debug_init(VXGE_ERR,
3503 "%s: Encountered Serious Error",
3504 vdev->ndev->name);
3505 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3506 vxge_debug_init(VXGE_ERR,
3507 "%s: Encountered Critical Error",
3508 vdev->ndev->name);
3509 }
3510
3511 if ((type == VXGE_HW_EVENT_SERR) ||
3512 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3513 if (unlikely(vdev->exec_mode))
3514 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3515 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3516 vxge_hw_device_mask_all(hldev);
3517 if (unlikely(vdev->exec_mode))
3518 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3519 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3520 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3521
3522 if (unlikely(vdev->exec_mode))
3523 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3524 else {
3525 /* check if this vpath is already set for reset */
3526 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3527
3528 /* disable interrupts for this vpath */
3529 vxge_vpath_intr_disable(vdev, vpath_idx);
3530
3531 /* stop the queue for this vpath */
98f45da2 3532 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV
3533 }
3534 }
3535 }
3536
3537 vxge_debug_entryexit(vdev->level_trace,
3538 "%s: %s:%d Exiting...",
3539 vdev->ndev->name, __func__, __LINE__);
3540}
3541
3542static void verify_bandwidth(void)
3543{
3544 int i, band_width, total = 0, equal_priority = 0;
3545
3546 /* 1. If user enters 0 for some fifo, give equal priority to all */
3547 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3548 if (bw_percentage[i] == 0) {
3549 equal_priority = 1;
3550 break;
3551 }
3552 }
3553
3554 if (!equal_priority) {
3555 /* 2. If sum exceeds 100, give equal priority to all */
3556 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3557 if (bw_percentage[i] == 0xFF)
3558 break;
3559
3560 total += bw_percentage[i];
3561 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3562 equal_priority = 1;
3563 break;
3564 }
3565 }
3566 }
3567
3568 if (!equal_priority) {
3569 /* Is all the bandwidth consumed? */
3570 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3571 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3572 /* Split rest of bw equally among next VPs*/
3573 band_width =
3574 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3575 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3576 if (band_width < 2) /* min of 2% */
3577 equal_priority = 1;
3578 else {
3579 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3580 i++)
3581 bw_percentage[i] =
3582 band_width;
3583 }
3584 }
3585 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3586 equal_priority = 1;
3587 }
3588
3589 if (equal_priority) {
3590 vxge_debug_init(VXGE_ERR,
3591 "%s: Assigning equal bandwidth to all the vpaths",
3592 VXGE_DRIVER_NAME);
3593 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3594 VXGE_HW_MAX_VIRTUAL_PATHS;
3595 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3596 bw_percentage[i] = bw_percentage[0];
3597 }
703da5a1
RV
3598}
3599
3600/*
3601 * Vpath configuration
3602 */
3603static int __devinit vxge_config_vpaths(
3604 struct vxge_hw_device_config *device_config,
3605 u64 vpath_mask, struct vxge_config *config_param)
3606{
3607 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3608 u32 txdl_size, txdl_per_memblock;
3609
3610 temp = driver_config->vpath_per_dev;
3611 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3612 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3613 /* No more CPU. Return vpath number as zero.*/
3614 if (driver_config->g_no_cpus == -1)
3615 return 0;
3616
3617 if (!driver_config->g_no_cpus)
3618 driver_config->g_no_cpus = num_online_cpus();
3619
3620 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3621 if (!driver_config->vpath_per_dev)
3622 driver_config->vpath_per_dev = 1;
3623
3624 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3625 if (!vxge_bVALn(vpath_mask, i, 1))
3626 continue;
3627 else
3628 default_no_vpath++;
3629 if (default_no_vpath < driver_config->vpath_per_dev)
3630 driver_config->vpath_per_dev = default_no_vpath;
3631
3632 driver_config->g_no_cpus = driver_config->g_no_cpus -
3633 (driver_config->vpath_per_dev * 2);
3634 if (driver_config->g_no_cpus <= 0)
3635 driver_config->g_no_cpus = -1;
3636 }
3637
3638 if (driver_config->vpath_per_dev == 1) {
3639 vxge_debug_ll_config(VXGE_TRACE,
3640 "%s: Disable tx and rx steering, "
3641 "as single vpath is configured", VXGE_DRIVER_NAME);
3642 config_param->rth_steering = NO_STEERING;
3643 config_param->tx_steering_type = NO_STEERING;
3644 device_config->rth_en = 0;
3645 }
3646
3647 /* configure bandwidth */
3648 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3649 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3650
3651 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3652 device_config->vp_config[i].vp_id = i;
3653 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3654 if (no_of_vpaths < driver_config->vpath_per_dev) {
3655 if (!vxge_bVALn(vpath_mask, i, 1)) {
3656 vxge_debug_ll_config(VXGE_TRACE,
3657 "%s: vpath: %d is not available",
3658 VXGE_DRIVER_NAME, i);
3659 continue;
3660 } else {
3661 vxge_debug_ll_config(VXGE_TRACE,
3662 "%s: vpath: %d available",
3663 VXGE_DRIVER_NAME, i);
3664 no_of_vpaths++;
3665 }
3666 } else {
3667 vxge_debug_ll_config(VXGE_TRACE,
3668 "%s: vpath: %d is not configured, "
3669 "max_config_vpath exceeded",
3670 VXGE_DRIVER_NAME, i);
3671 break;
3672 }
3673
3674 /* Configure Tx fifo's */
3675 device_config->vp_config[i].fifo.enable =
3676 VXGE_HW_FIFO_ENABLE;
3677 device_config->vp_config[i].fifo.max_frags =
5beefb4f 3678 MAX_SKB_FRAGS + 1;
703da5a1
RV
3679 device_config->vp_config[i].fifo.memblock_size =
3680 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3681
5beefb4f
SH
3682 txdl_size = device_config->vp_config[i].fifo.max_frags *
3683 sizeof(struct vxge_hw_fifo_txd);
703da5a1
RV
3684 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3685
3686 device_config->vp_config[i].fifo.fifo_blocks =
3687 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3688
3689 device_config->vp_config[i].fifo.intr =
3690 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3691
3692 /* Configure tti properties */
3693 device_config->vp_config[i].tti.intr_enable =
3694 VXGE_HW_TIM_INTR_ENABLE;
3695
3696 device_config->vp_config[i].tti.btimer_val =
3697 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3698
3699 device_config->vp_config[i].tti.timer_ac_en =
3700 VXGE_HW_TIM_TIMER_AC_ENABLE;
3701
3702 /* For msi-x with napi (each vector
3703 has a handler of its own) -
3704 Set CI to OFF for all vpaths */
3705 device_config->vp_config[i].tti.timer_ci_en =
3706 VXGE_HW_TIM_TIMER_CI_DISABLE;
3707
3708 device_config->vp_config[i].tti.timer_ri_en =
3709 VXGE_HW_TIM_TIMER_RI_DISABLE;
3710
3711 device_config->vp_config[i].tti.util_sel =
3712 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3713
3714 device_config->vp_config[i].tti.ltimer_val =
3715 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3716
3717 device_config->vp_config[i].tti.rtimer_val =
3718 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3719
3720 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3721 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3722 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3723 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3724 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3725 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3726 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3727
3728 /* Configure Rx rings */
3729 device_config->vp_config[i].ring.enable =
3730 VXGE_HW_RING_ENABLE;
3731
3732 device_config->vp_config[i].ring.ring_blocks =
3733 VXGE_HW_DEF_RING_BLOCKS;
3734 device_config->vp_config[i].ring.buffer_mode =
3735 VXGE_HW_RING_RXD_BUFFER_MODE_1;
3736 device_config->vp_config[i].ring.rxds_limit =
3737 VXGE_HW_DEF_RING_RXDS_LIMIT;
3738 device_config->vp_config[i].ring.scatter_mode =
3739 VXGE_HW_RING_SCATTER_MODE_A;
3740
3741 /* Configure rti properties */
3742 device_config->vp_config[i].rti.intr_enable =
3743 VXGE_HW_TIM_INTR_ENABLE;
3744
3745 device_config->vp_config[i].rti.btimer_val =
3746 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3747
3748 device_config->vp_config[i].rti.timer_ac_en =
3749 VXGE_HW_TIM_TIMER_AC_ENABLE;
3750
3751 device_config->vp_config[i].rti.timer_ci_en =
3752 VXGE_HW_TIM_TIMER_CI_DISABLE;
3753
3754 device_config->vp_config[i].rti.timer_ri_en =
3755 VXGE_HW_TIM_TIMER_RI_DISABLE;
3756
3757 device_config->vp_config[i].rti.util_sel =
3758 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3759
3760 device_config->vp_config[i].rti.urange_a =
3761 RTI_RX_URANGE_A;
3762 device_config->vp_config[i].rti.urange_b =
3763 RTI_RX_URANGE_B;
3764 device_config->vp_config[i].rti.urange_c =
3765 RTI_RX_URANGE_C;
3766 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3767 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3768 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3769 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3770
3771 device_config->vp_config[i].rti.rtimer_val =
3772 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3773
3774 device_config->vp_config[i].rti.ltimer_val =
3775 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3776
3777 device_config->vp_config[i].rpa_strip_vlan_tag =
3778 vlan_tag_strip;
3779 }
3780
3781 driver_config->vpath_per_dev = temp;
3782 return no_of_vpaths;
3783}
3784
3785/* initialize device configuratrions */
3786static void __devinit vxge_device_config_init(
3787 struct vxge_hw_device_config *device_config,
3788 int *intr_type)
3789{
3790 /* Used for CQRQ/SRQ. */
3791 device_config->dma_blockpool_initial =
3792 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3793
3794 device_config->dma_blockpool_max =
3795 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3796
3797 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3798 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3799
3800#ifndef CONFIG_PCI_MSI
3801 vxge_debug_init(VXGE_ERR,
3802 "%s: This Kernel does not support "
3803 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3804 *intr_type = INTA;
3805#endif
3806
3807 /* Configure whether MSI-X or IRQL. */
3808 switch (*intr_type) {
3809 case INTA:
3810 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3811 break;
3812
3813 case MSI_X:
3814 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX;
3815 break;
3816 }
3817 /* Timer period between device poll */
3818 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3819
3820 /* Configure mac based steering. */
3821 device_config->rts_mac_en = addr_learn_en;
3822
3823 /* Configure Vpaths */
3824 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3825
3826 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3827 __func__);
3828 vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_initial : %d",
3829 device_config->dma_blockpool_initial);
3830 vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_max : %d",
3831 device_config->dma_blockpool_max);
3832 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3833 device_config->intr_mode);
3834 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3835 device_config->device_poll_millis);
3836 vxge_debug_ll_config(VXGE_TRACE, "rts_mac_en : %d",
3837 device_config->rts_mac_en);
3838 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3839 device_config->rth_en);
3840 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3841 device_config->rth_it_type);
3842}
3843
3844static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3845{
3846 int i;
3847
3848 vxge_debug_init(VXGE_TRACE,
3849 "%s: %d Vpath(s) opened",
3850 vdev->ndev->name, vdev->no_of_vpath);
3851
3852 switch (vdev->config.intr_type) {
3853 case INTA:
3854 vxge_debug_init(VXGE_TRACE,
3855 "%s: Interrupt type INTA", vdev->ndev->name);
3856 break;
3857
3858 case MSI_X:
3859 vxge_debug_init(VXGE_TRACE,
3860 "%s: Interrupt type MSI-X", vdev->ndev->name);
3861 break;
3862 }
3863
3864 if (vdev->config.rth_steering) {
3865 vxge_debug_init(VXGE_TRACE,
3866 "%s: RTH steering enabled for TCP_IPV4",
3867 vdev->ndev->name);
3868 } else {
3869 vxge_debug_init(VXGE_TRACE,
3870 "%s: RTH steering disabled", vdev->ndev->name);
3871 }
3872
3873 switch (vdev->config.tx_steering_type) {
3874 case NO_STEERING:
3875 vxge_debug_init(VXGE_TRACE,
3876 "%s: Tx steering disabled", vdev->ndev->name);
3877 break;
3878 case TX_PRIORITY_STEERING:
3879 vxge_debug_init(VXGE_TRACE,
3880 "%s: Unsupported tx steering option",
3881 vdev->ndev->name);
3882 vxge_debug_init(VXGE_TRACE,
3883 "%s: Tx steering disabled", vdev->ndev->name);
3884 vdev->config.tx_steering_type = 0;
3885 break;
3886 case TX_VLAN_STEERING:
3887 vxge_debug_init(VXGE_TRACE,
3888 "%s: Unsupported tx steering option",
3889 vdev->ndev->name);
3890 vxge_debug_init(VXGE_TRACE,
3891 "%s: Tx steering disabled", vdev->ndev->name);
3892 vdev->config.tx_steering_type = 0;
3893 break;
3894 case TX_MULTIQ_STEERING:
3895 vxge_debug_init(VXGE_TRACE,
3896 "%s: Tx multiqueue steering enabled",
3897 vdev->ndev->name);
3898 break;
3899 case TX_PORT_STEERING:
3900 vxge_debug_init(VXGE_TRACE,
3901 "%s: Tx port steering enabled",
3902 vdev->ndev->name);
3903 break;
3904 default:
3905 vxge_debug_init(VXGE_ERR,
3906 "%s: Unsupported tx steering type",
3907 vdev->ndev->name);
3908 vxge_debug_init(VXGE_TRACE,
3909 "%s: Tx steering disabled", vdev->ndev->name);
3910 vdev->config.tx_steering_type = 0;
3911 }
3912
3913 if (vdev->config.gro_enable) {
3914 vxge_debug_init(VXGE_ERR,
3915 "%s: Generic receive offload enabled",
3916 vdev->ndev->name);
3917 } else
3918 vxge_debug_init(VXGE_TRACE,
3919 "%s: Generic receive offload disabled",
3920 vdev->ndev->name);
3921
3922 if (vdev->config.addr_learn_en)
3923 vxge_debug_init(VXGE_TRACE,
3924 "%s: MAC Address learning enabled", vdev->ndev->name);
3925
3926 vxge_debug_init(VXGE_TRACE,
3927 "%s: Rx doorbell mode enabled", vdev->ndev->name);
3928
3929 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3930 if (!vxge_bVALn(vpath_mask, i, 1))
3931 continue;
3932 vxge_debug_ll_config(VXGE_TRACE,
3933 "%s: MTU size - %d", vdev->ndev->name,
3934 ((struct __vxge_hw_device *)(vdev->devh))->
3935 config.vp_config[i].mtu);
3936 vxge_debug_init(VXGE_TRACE,
3937 "%s: VLAN tag stripping %s", vdev->ndev->name,
3938 ((struct __vxge_hw_device *)(vdev->devh))->
3939 config.vp_config[i].rpa_strip_vlan_tag
3940 ? "Enabled" : "Disabled");
3941 vxge_debug_init(VXGE_TRACE,
3942 "%s: Ring blocks : %d", vdev->ndev->name,
3943 ((struct __vxge_hw_device *)(vdev->devh))->
3944 config.vp_config[i].ring.ring_blocks);
3945 vxge_debug_init(VXGE_TRACE,
3946 "%s: Fifo blocks : %d", vdev->ndev->name,
3947 ((struct __vxge_hw_device *)(vdev->devh))->
3948 config.vp_config[i].fifo.fifo_blocks);
3949 vxge_debug_ll_config(VXGE_TRACE,
3950 "%s: Max frags : %d", vdev->ndev->name,
3951 ((struct __vxge_hw_device *)(vdev->devh))->
3952 config.vp_config[i].fifo.max_frags);
3953 break;
3954 }
3955}
3956
3957#ifdef CONFIG_PM
3958/**
3959 * vxge_pm_suspend - vxge power management suspend entry point
3960 *
3961 */
3962static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
3963{
3964 return -ENOSYS;
3965}
3966/**
3967 * vxge_pm_resume - vxge power management resume entry point
3968 *
3969 */
3970static int vxge_pm_resume(struct pci_dev *pdev)
3971{
3972 return -ENOSYS;
3973}
3974
3975#endif
3976
3977/**
3978 * vxge_io_error_detected - called when PCI error is detected
3979 * @pdev: Pointer to PCI device
3980 * @state: The current pci connection state
3981 *
3982 * This function is called after a PCI bus error affecting
3983 * this device has been detected.
3984 */
3985static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
3986 pci_channel_state_t state)
3987{
2c91308f
JM
3988 struct __vxge_hw_device *hldev =
3989 (struct __vxge_hw_device *)pci_get_drvdata(pdev);
703da5a1
RV
3990 struct net_device *netdev = hldev->ndev;
3991
3992 netif_device_detach(netdev);
3993
e33b992d
DN
3994 if (state == pci_channel_io_perm_failure)
3995 return PCI_ERS_RESULT_DISCONNECT;
3996
703da5a1
RV
3997 if (netif_running(netdev)) {
3998 /* Bring down the card, while avoiding PCI I/O */
3999 do_vxge_close(netdev, 0);
4000 }
4001
4002 pci_disable_device(pdev);
4003
4004 return PCI_ERS_RESULT_NEED_RESET;
4005}
4006
4007/**
4008 * vxge_io_slot_reset - called after the pci bus has been reset.
4009 * @pdev: Pointer to PCI device
4010 *
4011 * Restart the card from scratch, as if from a cold-boot.
4012 * At this point, the card has exprienced a hard reset,
4013 * followed by fixups by BIOS, and has its config space
4014 * set up identically to what it was at cold boot.
4015 */
4016static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4017{
2c91308f
JM
4018 struct __vxge_hw_device *hldev =
4019 (struct __vxge_hw_device *)pci_get_drvdata(pdev);
703da5a1
RV
4020 struct net_device *netdev = hldev->ndev;
4021
4022 struct vxgedev *vdev = netdev_priv(netdev);
4023
4024 if (pci_enable_device(pdev)) {
75f5e1c6 4025 netdev_err(netdev, "Cannot re-enable device after reset\n");
703da5a1
RV
4026 return PCI_ERS_RESULT_DISCONNECT;
4027 }
4028
4029 pci_set_master(pdev);
4030 vxge_reset(vdev);
4031
4032 return PCI_ERS_RESULT_RECOVERED;
4033}
4034
4035/**
4036 * vxge_io_resume - called when traffic can start flowing again.
4037 * @pdev: Pointer to PCI device
4038 *
4039 * This callback is called when the error recovery driver tells
4040 * us that its OK to resume normal operation.
4041 */
4042static void vxge_io_resume(struct pci_dev *pdev)
4043{
2c91308f
JM
4044 struct __vxge_hw_device *hldev =
4045 (struct __vxge_hw_device *)pci_get_drvdata(pdev);
703da5a1
RV
4046 struct net_device *netdev = hldev->ndev;
4047
4048 if (netif_running(netdev)) {
4049 if (vxge_open(netdev)) {
75f5e1c6
JP
4050 netdev_err(netdev,
4051 "Can't bring device back up after reset\n");
703da5a1
RV
4052 return;
4053 }
4054 }
4055
4056 netif_device_attach(netdev);
4057}
4058
cb27ec60
SH
4059static inline u32 vxge_get_num_vfs(u64 function_mode)
4060{
4061 u32 num_functions = 0;
4062
4063 switch (function_mode) {
4064 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4065 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4066 num_functions = 8;
4067 break;
4068 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4069 num_functions = 1;
4070 break;
4071 case VXGE_HW_FUNCTION_MODE_SRIOV:
4072 case VXGE_HW_FUNCTION_MODE_MRIOV:
4073 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4074 num_functions = 17;
4075 break;
4076 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4077 num_functions = 4;
4078 break;
4079 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4080 num_functions = 2;
4081 break;
4082 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4083 num_functions = 8; /* TODO */
4084 break;
4085 }
4086 return num_functions;
4087}
4088
e8ac1756
JM
4089int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4090{
4091 struct __vxge_hw_device *hldev = vdev->devh;
4092 u32 maj, min, bld, cmaj, cmin, cbld;
4093 enum vxge_hw_status status;
4094 const struct firmware *fw;
4095 int ret;
4096
4097 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4098 if (ret) {
4099 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4100 VXGE_DRIVER_NAME, fw_name);
4101 goto out;
4102 }
4103
4104 /* Load the new firmware onto the adapter */
4105 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4106 if (status != VXGE_HW_OK) {
4107 vxge_debug_init(VXGE_ERR,
4108 "%s: FW image download to adapter failed '%s'.",
4109 VXGE_DRIVER_NAME, fw_name);
4110 ret = -EIO;
4111 goto out;
4112 }
4113
4114 /* Read the version of the new firmware */
4115 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4116 if (status != VXGE_HW_OK) {
4117 vxge_debug_init(VXGE_ERR,
4118 "%s: Upgrade read version failed '%s'.",
4119 VXGE_DRIVER_NAME, fw_name);
4120 ret = -EIO;
4121 goto out;
4122 }
4123
4124 cmaj = vdev->config.device_hw_info.fw_version.major;
4125 cmin = vdev->config.device_hw_info.fw_version.minor;
4126 cbld = vdev->config.device_hw_info.fw_version.build;
4127 /* It's possible the version in /lib/firmware is not the latest version.
4128 * If so, we could get into a loop of trying to upgrade to the latest
4129 * and flashing the older version.
4130 */
4131 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4132 !override) {
4133 ret = -EINVAL;
4134 goto out;
4135 }
4136
4137 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4138 maj, min, bld);
4139
4140 /* Flash the adapter with the new firmware */
4141 status = vxge_hw_flash_fw(hldev);
4142 if (status != VXGE_HW_OK) {
4143 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4144 VXGE_DRIVER_NAME, fw_name);
4145 ret = -EIO;
4146 goto out;
4147 }
4148
4149 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4150 "hard reset before using, thus requiring a system reboot or a "
4151 "hotplug event.\n");
4152
4153out:
4154 return ret;
4155}
4156
4157static int vxge_probe_fw_update(struct vxgedev *vdev)
4158{
4159 u32 maj, min, bld;
4160 int ret, gpxe = 0;
4161 char *fw_name;
4162
4163 maj = vdev->config.device_hw_info.fw_version.major;
4164 min = vdev->config.device_hw_info.fw_version.minor;
4165 bld = vdev->config.device_hw_info.fw_version.build;
4166
4167 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4168 return 0;
4169
4170 /* Ignore the build number when determining if the current firmware is
4171 * "too new" to load the driver
4172 */
4173 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4174 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4175 "version, unable to load driver\n",
4176 VXGE_DRIVER_NAME);
4177 return -EINVAL;
4178 }
4179
4180 /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4181 * work with this driver.
4182 */
4183 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4184 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4185 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4186 return -EINVAL;
4187 }
4188
4189 /* If file not specified, determine gPXE or not */
4190 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4191 int i;
4192 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4193 if (vdev->devh->eprom_versions[i]) {
4194 gpxe = 1;
4195 break;
4196 }
4197 }
4198 if (gpxe)
4199 fw_name = "vxge/X3fw-pxe.ncf";
4200 else
4201 fw_name = "vxge/X3fw.ncf";
4202
4203 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4204 /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4205 * probe, so ignore them
4206 */
4207 if (ret != -EINVAL && ret != -ENOENT)
4208 return -EIO;
4209 else
4210 ret = 0;
4211
4212 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4213 VXGE_FW_VER(maj, min, 0)) {
4214 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4215 " be used with this driver.\n"
4216 "Please get the latest version from "
4217 "ftp://ftp.s2io.com/pub/X3100-Drivers/FIRMWARE",
4218 VXGE_DRIVER_NAME, maj, min, bld);
4219 return -EINVAL;
4220 }
4221
4222 return ret;
4223}
4224
703da5a1
RV
4225/**
4226 * vxge_probe
4227 * @pdev : structure containing the PCI related information of the device.
4228 * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4229 * Description:
4230 * This function is called when a new PCI device gets detected and initializes
4231 * it.
4232 * Return value:
4233 * returns 0 on success and negative on failure.
4234 *
4235 */
4236static int __devinit
4237vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4238{
2c91308f 4239 struct __vxge_hw_device *hldev;
703da5a1
RV
4240 enum vxge_hw_status status;
4241 int ret;
4242 int high_dma = 0;
4243 u64 vpath_mask = 0;
4244 struct vxgedev *vdev;
7dad171c 4245 struct vxge_config *ll_config = NULL;
703da5a1
RV
4246 struct vxge_hw_device_config *device_config = NULL;
4247 struct vxge_hw_device_attr attr;
4248 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4249 u8 *macaddr;
4250 struct vxge_mac_addrs *entry;
4251 static int bus = -1, device = -1;
cb27ec60 4252 u32 host_type;
703da5a1 4253 u8 new_device = 0;
cb27ec60
SH
4254 enum vxge_hw_status is_privileged;
4255 u32 function_mode;
4256 u32 num_vfs = 0;
703da5a1
RV
4257
4258 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4259 attr.pdev = pdev;
4260
cb27ec60
SH
4261 /* In SRIOV-17 mode, functions of the same adapter
4262 * can be deployed on different buses */
4263 if ((!pdev->is_virtfn) && ((bus != pdev->bus->number) ||
4264 (device != PCI_SLOT(pdev->devfn))))
703da5a1
RV
4265 new_device = 1;
4266
4267 bus = pdev->bus->number;
4268 device = PCI_SLOT(pdev->devfn);
4269
4270 if (new_device) {
4271 if (driver_config->config_dev_cnt &&
4272 (driver_config->config_dev_cnt !=
4273 driver_config->total_dev_cnt))
4274 vxge_debug_init(VXGE_ERR,
4275 "%s: Configured %d of %d devices",
4276 VXGE_DRIVER_NAME,
4277 driver_config->config_dev_cnt,
4278 driver_config->total_dev_cnt);
4279 driver_config->config_dev_cnt = 0;
4280 driver_config->total_dev_cnt = 0;
703da5a1 4281 }
9002397e
SH
4282 /* Now making the CPU based no of vpath calculation
4283 * applicable for individual functions as well.
4284 */
4285 driver_config->g_no_cpus = 0;
657205bd
SH
4286 driver_config->vpath_per_dev = max_config_vpath;
4287
703da5a1
RV
4288 driver_config->total_dev_cnt++;
4289 if (++driver_config->config_dev_cnt > max_config_dev) {
4290 ret = 0;
4291 goto _exit0;
4292 }
4293
4294 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4295 GFP_KERNEL);
4296 if (!device_config) {
4297 ret = -ENOMEM;
4298 vxge_debug_init(VXGE_ERR,
4299 "device_config : malloc failed %s %d",
4300 __FILE__, __LINE__);
4301 goto _exit0;
4302 }
4303
7dad171c
PB
4304 ll_config = kzalloc(sizeof(*ll_config), GFP_KERNEL);
4305 if (!ll_config) {
4306 ret = -ENOMEM;
4307 vxge_debug_init(VXGE_ERR,
4308 "ll_config : malloc failed %s %d",
4309 __FILE__, __LINE__);
4310 goto _exit0;
4311 }
4312 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4313 ll_config->intr_type = MSI_X;
4314 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4315 ll_config->rth_steering = RTH_STEERING;
703da5a1
RV
4316
4317 /* get the default configuration parameters */
4318 vxge_hw_device_config_default_get(device_config);
4319
4320 /* initialize configuration parameters */
7dad171c 4321 vxge_device_config_init(device_config, &ll_config->intr_type);
703da5a1
RV
4322
4323 ret = pci_enable_device(pdev);
4324 if (ret) {
4325 vxge_debug_init(VXGE_ERR,
4326 "%s : can not enable PCI device", __func__);
4327 goto _exit0;
4328 }
4329
b3837cec 4330 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
703da5a1
RV
4331 vxge_debug_ll_config(VXGE_TRACE,
4332 "%s : using 64bit DMA", __func__);
4333
4334 high_dma = 1;
4335
4336 if (pci_set_consistent_dma_mask(pdev,
b3837cec 4337 DMA_BIT_MASK(64))) {
703da5a1
RV
4338 vxge_debug_init(VXGE_ERR,
4339 "%s : unable to obtain 64bit DMA for "
4340 "consistent allocations", __func__);
4341 ret = -ENOMEM;
4342 goto _exit1;
4343 }
b3837cec 4344 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
703da5a1
RV
4345 vxge_debug_ll_config(VXGE_TRACE,
4346 "%s : using 32bit DMA", __func__);
4347 } else {
4348 ret = -ENOMEM;
4349 goto _exit1;
4350 }
4351
4352 if (pci_request_regions(pdev, VXGE_DRIVER_NAME)) {
4353 vxge_debug_init(VXGE_ERR,
4354 "%s : request regions failed", __func__);
4355 ret = -ENODEV;
4356 goto _exit1;
4357 }
4358
4359 pci_set_master(pdev);
4360
4361 attr.bar0 = pci_ioremap_bar(pdev, 0);
4362 if (!attr.bar0) {
4363 vxge_debug_init(VXGE_ERR,
4364 "%s : cannot remap io memory bar0", __func__);
4365 ret = -ENODEV;
4366 goto _exit2;
4367 }
4368 vxge_debug_ll_config(VXGE_TRACE,
4369 "pci ioremap bar0: %p:0x%llx",
4370 attr.bar0,
4371 (unsigned long long)pci_resource_start(pdev, 0));
4372
703da5a1 4373 status = vxge_hw_device_hw_info_get(attr.bar0,
7dad171c 4374 &ll_config->device_hw_info);
703da5a1
RV
4375 if (status != VXGE_HW_OK) {
4376 vxge_debug_init(VXGE_ERR,
4377 "%s: Reading of hardware info failed."
4378 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4379 ret = -EINVAL;
7975d1ee 4380 goto _exit3;
703da5a1
RV
4381 }
4382
7dad171c 4383 vpath_mask = ll_config->device_hw_info.vpath_mask;
703da5a1
RV
4384 if (vpath_mask == 0) {
4385 vxge_debug_ll_config(VXGE_TRACE,
4386 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4387 ret = -EINVAL;
7975d1ee 4388 goto _exit3;
703da5a1
RV
4389 }
4390
4391 vxge_debug_ll_config(VXGE_TRACE,
4392 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4393 (unsigned long long)vpath_mask);
4394
7dad171c
PB
4395 function_mode = ll_config->device_hw_info.function_mode;
4396 host_type = ll_config->device_hw_info.host_type;
cb27ec60 4397 is_privileged = __vxge_hw_device_is_privilaged(host_type,
7dad171c 4398 ll_config->device_hw_info.func_id);
cb27ec60 4399
703da5a1
RV
4400 /* Check how many vpaths are available */
4401 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4402 if (!((vpath_mask) & vxge_mBIT(i)))
4403 continue;
4404 max_vpath_supported++;
4405 }
4406
cb27ec60
SH
4407 if (new_device)
4408 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4409
5dbc9011 4410 /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
cb27ec60 4411 if (is_sriov(function_mode) && (max_config_dev > 1) &&
7dad171c 4412 (ll_config->intr_type != INTA) &&
cb27ec60
SH
4413 (is_privileged == VXGE_HW_OK)) {
4414 ret = pci_enable_sriov(pdev, ((max_config_dev - 1) < num_vfs)
4415 ? (max_config_dev - 1) : num_vfs);
4416 if (ret)
4417 vxge_debug_ll_config(VXGE_ERR,
4418 "Failed in enabling SRIOV mode: %d\n", ret);
5dbc9011
SS
4419 }
4420
703da5a1
RV
4421 /*
4422 * Configure vpaths and get driver configured number of vpaths
4423 * which is less than or equal to the maximum vpaths per function.
4424 */
7dad171c 4425 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
703da5a1
RV
4426 if (!no_of_vpath) {
4427 vxge_debug_ll_config(VXGE_ERR,
4428 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4429 ret = 0;
7975d1ee 4430 goto _exit3;
703da5a1
RV
4431 }
4432
4433 /* Setting driver callbacks */
4434 attr.uld_callbacks.link_up = vxge_callback_link_up;
4435 attr.uld_callbacks.link_down = vxge_callback_link_down;
4436 attr.uld_callbacks.crit_err = vxge_callback_crit_err;
4437
4438 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4439 if (status != VXGE_HW_OK) {
4440 vxge_debug_init(VXGE_ERR,
4441 "Failed to initialize device (%d)", status);
4442 ret = -EINVAL;
7975d1ee 4443 goto _exit3;
703da5a1
RV
4444 }
4445
e8ac1756
JM
4446 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4447 ll_config->device_hw_info.fw_version.minor,
4448 ll_config->device_hw_info.fw_version.build) >=
4449 VXGE_EPROM_FW_VER) {
4450 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4451
4452 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4453 if (status != VXGE_HW_OK) {
4454 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4455 VXGE_DRIVER_NAME);
4456 /* This is a non-fatal error, continue */
4457 }
4458
4459 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4460 hldev->eprom_versions[i] = img[i].version;
4461 if (!img[i].is_valid)
4462 break;
4463 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
4464 "%d.%d.%d.%d\n", VXGE_DRIVER_NAME, i,
4465 VXGE_EPROM_IMG_MAJOR(img[i].version),
4466 VXGE_EPROM_IMG_MINOR(img[i].version),
4467 VXGE_EPROM_IMG_FIX(img[i].version),
4468 VXGE_EPROM_IMG_BUILD(img[i].version));
4469 }
4470 }
4471
fa41fd10 4472 /* if FCS stripping is not disabled in MAC fail driver load */
b81b3733
JM
4473 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4474 if (status != VXGE_HW_OK) {
4475 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4476 " failing driver load", VXGE_DRIVER_NAME);
fa41fd10
SH
4477 ret = -EINVAL;
4478 goto _exit4;
4479 }
4480
703da5a1
RV
4481 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4482
4483 /* set private device info */
4484 pci_set_drvdata(pdev, hldev);
4485
7dad171c
PB
4486 ll_config->gro_enable = VXGE_GRO_ALWAYS_AGGREGATE;
4487 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4488 ll_config->addr_learn_en = addr_learn_en;
4489 ll_config->rth_algorithm = RTH_ALG_JENKINS;
47f01db4
JM
4490 ll_config->rth_hash_type_tcpipv4 = 1;
4491 ll_config->rth_hash_type_ipv4 = 0;
4492 ll_config->rth_hash_type_tcpipv6 = 0;
4493 ll_config->rth_hash_type_ipv6 = 0;
4494 ll_config->rth_hash_type_tcpipv6ex = 0;
4495 ll_config->rth_hash_type_ipv6ex = 0;
7dad171c
PB
4496 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4497 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4498 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4499
e8ac1756
JM
4500 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4501 &vdev);
4502 if (ret) {
703da5a1 4503 ret = -EINVAL;
7975d1ee 4504 goto _exit4;
703da5a1
RV
4505 }
4506
e8ac1756
JM
4507 ret = vxge_probe_fw_update(vdev);
4508 if (ret)
4509 goto _exit5;
4510
703da5a1
RV
4511 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4512 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4513 vxge_hw_device_trace_level_get(hldev));
4514
4515 /* set private HW device info */
703da5a1
RV
4516 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4517 vdev->bar0 = attr.bar0;
703da5a1
RV
4518 vdev->max_vpath_supported = max_vpath_supported;
4519 vdev->no_of_vpath = no_of_vpath;
4520
4521 /* Virtual Path count */
4522 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4523 if (!vxge_bVALn(vpath_mask, i, 1))
4524 continue;
4525 if (j >= vdev->no_of_vpath)
4526 break;
4527
4528 vdev->vpaths[j].is_configured = 1;
4529 vdev->vpaths[j].device_id = i;
703da5a1
RV
4530 vdev->vpaths[j].ring.driver_id = j;
4531 vdev->vpaths[j].vdev = vdev;
4532 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4533 memcpy((u8 *)vdev->vpaths[j].macaddr,
7dad171c 4534 ll_config->device_hw_info.mac_addrs[i],
703da5a1
RV
4535 ETH_ALEN);
4536
4537 /* Initialize the mac address list header */
4538 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4539
4540 vdev->vpaths[j].mac_addr_cnt = 0;
4541 vdev->vpaths[j].mcast_addr_cnt = 0;
4542 j++;
4543 }
4544 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4545 vdev->max_config_port = max_config_port;
4546
4547 vdev->vlan_tag_strip = vlan_tag_strip;
4548
4549 /* map the hashing selector table to the configured vpaths */
4550 for (i = 0; i < vdev->no_of_vpath; i++)
4551 vdev->vpath_selector[i] = vpath_selector[i];
4552
4553 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4554
7dad171c
PB
4555 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4556 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4557 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
703da5a1
RV
4558
4559 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
7dad171c 4560 vdev->ndev->name, ll_config->device_hw_info.serial_number);
703da5a1
RV
4561
4562 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
7dad171c 4563 vdev->ndev->name, ll_config->device_hw_info.part_number);
703da5a1
RV
4564
4565 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
7dad171c 4566 vdev->ndev->name, ll_config->device_hw_info.product_desc);
703da5a1 4567
bf54e736 4568 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4569 vdev->ndev->name, macaddr);
703da5a1
RV
4570
4571 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4572 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4573
4574 vxge_debug_init(VXGE_TRACE,
4575 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
7dad171c
PB
4576 ll_config->device_hw_info.fw_version.version,
4577 ll_config->device_hw_info.fw_date.date);
703da5a1 4578
0a25bdc6 4579 if (new_device) {
7dad171c 4580 switch (ll_config->device_hw_info.function_mode) {
0a25bdc6
SH
4581 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4582 vxge_debug_init(VXGE_TRACE,
4583 "%s: Single Function Mode Enabled", vdev->ndev->name);
4584 break;
4585 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4586 vxge_debug_init(VXGE_TRACE,
4587 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4588 break;
4589 case VXGE_HW_FUNCTION_MODE_SRIOV:
4590 vxge_debug_init(VXGE_TRACE,
4591 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4592 break;
4593 case VXGE_HW_FUNCTION_MODE_MRIOV:
4594 vxge_debug_init(VXGE_TRACE,
4595 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4596 break;
4597 }
4598 }
4599
703da5a1
RV
4600 vxge_print_parm(vdev, vpath_mask);
4601
4602 /* Store the fw version for ethttool option */
7dad171c 4603 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
703da5a1
RV
4604 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4605 memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
4606
4607 /* Copy the station mac address to the list */
4608 for (i = 0; i < vdev->no_of_vpath; i++) {
4609 entry = (struct vxge_mac_addrs *)
4610 kzalloc(sizeof(struct vxge_mac_addrs),
4611 GFP_KERNEL);
4612 if (NULL == entry) {
4613 vxge_debug_init(VXGE_ERR,
4614 "%s: mac_addr_list : memory allocation failed",
4615 vdev->ndev->name);
4616 ret = -EPERM;
e8ac1756 4617 goto _exit6;
703da5a1
RV
4618 }
4619 macaddr = (u8 *)&entry->macaddr;
4620 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4621 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4622 vdev->vpaths[i].mac_addr_cnt = 1;
4623 }
4624
914d0d71 4625 kfree(device_config);
eb5f10c2
SH
4626
4627 /*
4628 * INTA is shared in multi-function mode. This is unlike the INTA
4629 * implementation in MR mode, where each VH has its own INTA message.
4630 * - INTA is masked (disabled) as long as at least one function sets
4631 * its TITAN_MASK_ALL_INT.ALARM bit.
4632 * - INTA is unmasked (enabled) when all enabled functions have cleared
4633 * their own TITAN_MASK_ALL_INT.ALARM bit.
4634 * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4635 * Though this driver leaves the top level interrupts unmasked while
4636 * leaving the required module interrupt bits masked on exit, there
4637 * could be a rougue driver around that does not follow this procedure
4638 * resulting in a failure to generate interrupts. The following code is
4639 * present to prevent such a failure.
4640 */
4641
7dad171c 4642 if (ll_config->device_hw_info.function_mode ==
eb5f10c2
SH
4643 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4644 if (vdev->config.intr_type == INTA)
4645 vxge_hw_device_unmask_all(hldev);
4646
703da5a1
RV
4647 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4648 vdev->ndev->name, __func__, __LINE__);
4649
4650 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4651 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4652 vxge_hw_device_trace_level_get(hldev));
4653
7dad171c 4654 kfree(ll_config);
703da5a1
RV
4655 return 0;
4656
e8ac1756 4657_exit6:
703da5a1
RV
4658 for (i = 0; i < vdev->no_of_vpath; i++)
4659 vxge_free_mac_add_list(&vdev->vpaths[i]);
e8ac1756 4660_exit5:
703da5a1 4661 vxge_device_unregister(hldev);
7975d1ee 4662_exit4:
5dbc9011 4663 pci_disable_sriov(pdev);
703da5a1 4664 vxge_hw_device_terminate(hldev);
703da5a1
RV
4665_exit3:
4666 iounmap(attr.bar0);
4667_exit2:
4668 pci_release_regions(pdev);
4669_exit1:
4670 pci_disable_device(pdev);
4671_exit0:
7dad171c 4672 kfree(ll_config);
703da5a1
RV
4673 kfree(device_config);
4674 driver_config->config_dev_cnt--;
4675 pci_set_drvdata(pdev, NULL);
4676 return ret;
4677}
4678
4679/**
4680 * vxge_rem_nic - Free the PCI device
4681 * @pdev: structure containing the PCI related information of the device.
4682 * Description: This function is called by the Pci subsystem to release a
4683 * PCI device and free up all resource held up by the device.
4684 */
2c91308f 4685static void __devexit vxge_remove(struct pci_dev *pdev)
703da5a1 4686{
2c91308f 4687 struct __vxge_hw_device *hldev;
703da5a1
RV
4688 struct vxgedev *vdev = NULL;
4689 struct net_device *dev;
4690 int i = 0;
703da5a1 4691
2c91308f 4692 hldev = (struct __vxge_hw_device *)pci_get_drvdata(pdev);
703da5a1
RV
4693
4694 if (hldev == NULL)
4695 return;
2c91308f 4696
703da5a1
RV
4697 dev = hldev->ndev;
4698 vdev = netdev_priv(dev);
4699
2c91308f 4700 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
703da5a1 4701
2c91308f
JM
4702 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4703 __func__);
703da5a1
RV
4704 vxge_device_unregister(hldev);
4705
4706 for (i = 0; i < vdev->no_of_vpath; i++) {
4707 vxge_free_mac_add_list(&vdev->vpaths[i]);
4708 vdev->vpaths[i].mcast_addr_cnt = 0;
4709 vdev->vpaths[i].mac_addr_cnt = 0;
4710 }
4711
4712 kfree(vdev->vpaths);
4713
4714 iounmap(vdev->bar0);
703da5a1 4715
5dbc9011
SS
4716 pci_disable_sriov(pdev);
4717
703da5a1
RV
4718 /* we are safe to free it now */
4719 free_netdev(dev);
4720
2c91308f
JM
4721 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4722 __func__, __LINE__);
703da5a1
RV
4723
4724 vxge_hw_device_terminate(hldev);
4725
4726 pci_disable_device(pdev);
4727 pci_release_regions(pdev);
4728 pci_set_drvdata(pdev, NULL);
2c91308f
JM
4729 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4730 __LINE__);
703da5a1
RV
4731}
4732
4733static struct pci_error_handlers vxge_err_handler = {
4734 .error_detected = vxge_io_error_detected,
4735 .slot_reset = vxge_io_slot_reset,
4736 .resume = vxge_io_resume,
4737};
4738
4739static struct pci_driver vxge_driver = {
4740 .name = VXGE_DRIVER_NAME,
4741 .id_table = vxge_id_table,
4742 .probe = vxge_probe,
4743 .remove = __devexit_p(vxge_remove),
4744#ifdef CONFIG_PM
4745 .suspend = vxge_pm_suspend,
4746 .resume = vxge_pm_resume,
4747#endif
4748 .err_handler = &vxge_err_handler,
4749};
4750
4751static int __init
4752vxge_starter(void)
4753{
4754 int ret = 0;
703da5a1 4755
75f5e1c6
JP
4756 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4757 pr_info("Driver version: %s\n", DRV_VERSION);
703da5a1
RV
4758
4759 verify_bandwidth();
4760
4761 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4762 if (!driver_config)
4763 return -ENOMEM;
4764
4765 ret = pci_register_driver(&vxge_driver);
4766
4767 if (driver_config->config_dev_cnt &&
4768 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4769 vxge_debug_init(VXGE_ERR,
4770 "%s: Configured %d of %d devices",
4771 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4772 driver_config->total_dev_cnt);
4773
4774 if (ret)
4775 kfree(driver_config);
4776
4777 return ret;
4778}
4779
4780static void __exit
4781vxge_closer(void)
4782{
4783 pci_unregister_driver(&vxge_driver);
4784 kfree(driver_config);
4785}
4786module_init(vxge_starter);
4787module_exit(vxge_closer);