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via-velocity: Turn scatter-gather support back off.
[net-next-2.6.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT
1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4 11 * rx_copybreak/alignment
1da177e4
LT
12 * More testing
13 *
113aa838 14 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT
15 * Additional fixes and clean up: Francois Romieu
16 *
17 * This source has not been verified for use in safety critical systems.
18 *
19 * Please direct queries about the revamped driver to the linux-kernel
20 * list not VIA.
21 *
22 * Original code:
23 *
24 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
25 * All rights reserved.
26 *
27 * This software may be redistributed and/or modified under
28 * the terms of the GNU General Public License as published by the Free
29 * Software Foundation; either version 2 of the License, or
30 * any later version.
31 *
32 * This program is distributed in the hope that it will be useful, but
33 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
34 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
35 * for more details.
36 *
37 * Author: Chuang Liang-Shing, AJ Jiang
38 *
39 * Date: Jan 24, 2003
40 *
41 * MODULE_LICENSE("GPL");
42 *
43 */
44
45
46#include <linux/module.h>
47#include <linux/types.h>
1da177e4
LT
48#include <linux/init.h>
49#include <linux/mm.h>
50#include <linux/errno.h>
51#include <linux/ioport.h>
52#include <linux/pci.h>
53#include <linux/kernel.h>
54#include <linux/netdevice.h>
55#include <linux/etherdevice.h>
56#include <linux/skbuff.h>
57#include <linux/delay.h>
58#include <linux/timer.h>
59#include <linux/slab.h>
60#include <linux/interrupt.h>
1da177e4
LT
61#include <linux/string.h>
62#include <linux/wait.h>
c4067400 63#include <linux/io.h>
1da177e4 64#include <linux/if.h>
c4067400 65#include <linux/uaccess.h>
1da177e4
LT
66#include <linux/proc_fs.h>
67#include <linux/inetdevice.h>
68#include <linux/reboot.h>
69#include <linux/ethtool.h>
70#include <linux/mii.h>
71#include <linux/in.h>
72#include <linux/if_arp.h>
501e4d24 73#include <linux/if_vlan.h>
1da177e4
LT
74#include <linux/ip.h>
75#include <linux/tcp.h>
76#include <linux/udp.h>
77#include <linux/crc-ccitt.h>
78#include <linux/crc32.h>
79
80#include "via-velocity.h"
81
82
c4067400 83static int velocity_nics;
1da177e4
LT
84static int msglevel = MSG_LEVEL_INFO;
85
01faccbf
SH
86/**
87 * mac_get_cam_mask - Read a CAM mask
88 * @regs: register block for this velocity
89 * @mask: buffer to store mask
90 *
91 * Fetch the mask bits of the selected CAM and store them into the
92 * provided mask buffer.
93 */
c4067400 94static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH
95{
96 int i;
97
98 /* Select CAM mask */
99 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
100
101 writeb(0, &regs->CAMADDR);
102
103 /* read mask */
104 for (i = 0; i < 8; i++)
105 *mask++ = readb(&(regs->MARCAM[i]));
106
107 /* disable CAMEN */
108 writeb(0, &regs->CAMADDR);
109
110 /* Select mar */
111 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
01faccbf
SH
112}
113
114
115/**
116 * mac_set_cam_mask - Set a CAM mask
117 * @regs: register block for this velocity
118 * @mask: CAM mask to load
119 *
120 * Store a new mask into a CAM
121 */
c4067400 122static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH
123{
124 int i;
125 /* Select CAM mask */
126 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
127
128 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
129
c4067400 130 for (i = 0; i < 8; i++)
01faccbf 131 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 132
01faccbf
SH
133 /* disable CAMEN */
134 writeb(0, &regs->CAMADDR);
135
136 /* Select mar */
137 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
138}
139
c4067400 140static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH
141{
142 int i;
143 /* Select CAM mask */
144 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
145
146 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
147
c4067400 148 for (i = 0; i < 8; i++)
01faccbf 149 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 150
01faccbf
SH
151 /* disable CAMEN */
152 writeb(0, &regs->CAMADDR);
153
154 /* Select mar */
155 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
156}
157
158/**
159 * mac_set_cam - set CAM data
160 * @regs: register block of this velocity
161 * @idx: Cam index
162 * @addr: 2 or 6 bytes of CAM data
163 *
164 * Load an address or vlan tag into a CAM
165 */
c4067400 166static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
01faccbf
SH
167{
168 int i;
169
170 /* Select CAM mask */
171 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
172
173 idx &= (64 - 1);
174
175 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
176
c4067400 177 for (i = 0; i < 6; i++)
01faccbf 178 writeb(*addr++, &(regs->MARCAM[i]));
c4067400 179
01faccbf
SH
180 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
181
182 udelay(10);
183
184 writeb(0, &regs->CAMADDR);
185
186 /* Select mar */
187 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
188}
189
c4067400 190static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
01faccbf
SH
191 const u8 *addr)
192{
193
194 /* Select CAM mask */
195 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
196
197 idx &= (64 - 1);
198
199 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
200 writew(*((u16 *) addr), &regs->MARCAM[0]);
201
202 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
203
204 udelay(10);
205
206 writeb(0, &regs->CAMADDR);
207
208 /* Select mar */
209 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
210}
211
212
213/**
214 * mac_wol_reset - reset WOL after exiting low power
215 * @regs: register block of this velocity
216 *
217 * Called after we drop out of wake on lan mode in order to
218 * reset the Wake on lan features. This function doesn't restore
219 * the rest of the logic from the result of sleep/wakeup
220 */
c4067400 221static void mac_wol_reset(struct mac_regs __iomem *regs)
01faccbf
SH
222{
223
224 /* Turn off SWPTAG right after leaving power mode */
225 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
226 /* clear sticky bits */
227 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
228
229 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
230 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
231 /* disable force PME-enable */
232 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
233 /* disable power-event config bit */
234 writew(0xFFFF, &regs->WOLCRClr);
235 /* clear power status */
236 writew(0xFFFF, &regs->WOLSRClr);
237}
1da177e4 238
7282d491 239static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT
240
241/*
242 Define module options
243*/
244
245MODULE_AUTHOR("VIA Networking Technologies, Inc.");
246MODULE_LICENSE("GPL");
247MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
248
c4067400
DJ
249#define VELOCITY_PARAM(N, D) \
250 static int N[MAX_UNITS] = OPTION_DEFAULT;\
1da177e4 251 module_param_array(N, int, NULL, 0); \
c4067400 252 MODULE_PARM_DESC(N, D);
1da177e4
LT
253
254#define RX_DESC_MIN 64
255#define RX_DESC_MAX 255
256#define RX_DESC_DEF 64
257VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
258
259#define TX_DESC_MIN 16
260#define TX_DESC_MAX 256
261#define TX_DESC_DEF 64
262VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
263
1da177e4
LT
264#define RX_THRESH_MIN 0
265#define RX_THRESH_MAX 3
266#define RX_THRESH_DEF 0
267/* rx_thresh[] is used for controlling the receive fifo threshold.
268 0: indicate the rxfifo threshold is 128 bytes.
269 1: indicate the rxfifo threshold is 512 bytes.
270 2: indicate the rxfifo threshold is 1024 bytes.
271 3: indicate the rxfifo threshold is store & forward.
272*/
273VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
274
275#define DMA_LENGTH_MIN 0
276#define DMA_LENGTH_MAX 7
2a5774f7 277#define DMA_LENGTH_DEF 6
1da177e4
LT
278
279/* DMA_length[] is used for controlling the DMA length
280 0: 8 DWORDs
281 1: 16 DWORDs
282 2: 32 DWORDs
283 3: 64 DWORDs
284 4: 128 DWORDs
285 5: 256 DWORDs
286 6: SF(flush till emply)
287 7: SF(flush till emply)
288*/
289VELOCITY_PARAM(DMA_length, "DMA length");
290
1da177e4
LT
291#define IP_ALIG_DEF 0
292/* IP_byte_align[] is used for IP header DWORD byte aligned
293 0: indicate the IP header won't be DWORD byte aligned.(Default) .
294 1: indicate the IP header will be DWORD byte aligned.
295 In some enviroment, the IP header should be DWORD byte aligned,
296 or the packet will be droped when we receive it. (eg: IPVS)
297*/
298VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
299
1da177e4
LT
300#define FLOW_CNTL_DEF 1
301#define FLOW_CNTL_MIN 1
302#define FLOW_CNTL_MAX 5
303
304/* flow_control[] is used for setting the flow control ability of NIC.
305 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
306 2: enable TX flow control.
307 3: enable RX flow control.
308 4: enable RX/TX flow control.
309 5: disable
310*/
311VELOCITY_PARAM(flow_control, "Enable flow control ability");
312
313#define MED_LNK_DEF 0
314#define MED_LNK_MIN 0
315#define MED_LNK_MAX 4
316/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
317 0: indicate autonegotiation for both speed and duplex mode
318 1: indicate 100Mbps half duplex mode
319 2: indicate 100Mbps full duplex mode
320 3: indicate 10Mbps half duplex mode
321 4: indicate 10Mbps full duplex mode
322
323 Note:
c4067400
DJ
324 if EEPROM have been set to the force mode, this option is ignored
325 by driver.
1da177e4
LT
326*/
327VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
328
329#define VAL_PKT_LEN_DEF 0
330/* ValPktLen[] is used for setting the checksum offload ability of NIC.
331 0: Receive frame with invalid layer 2 length (Default)
332 1: Drop frame with invalid layer 2 length
333*/
334VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
335
336#define WOL_OPT_DEF 0
337#define WOL_OPT_MIN 0
338#define WOL_OPT_MAX 7
339/* wol_opts[] is used for controlling wake on lan behavior.
340 0: Wake up if recevied a magic packet. (Default)
341 1: Wake up if link status is on/off.
342 2: Wake up if recevied an arp packet.
343 4: Wake up if recevied any unicast packet.
344 Those value can be sumed up to support more than one option.
345*/
346VELOCITY_PARAM(wol_opts, "Wake On Lan options");
347
1da177e4
LT
348static int rx_copybreak = 200;
349module_param(rx_copybreak, int, 0644);
350MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
351
1da177e4
LT
352/*
353 * Internal board variants. At the moment we have only one
354 */
4f14b92f 355static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG
356 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
357 { }
1da177e4
LT
358};
359
360/*
361 * Describe the PCI device identifiers that we support in this
362 * device driver. Used for hotplug autoloading.
363 */
a3aa1884 364static DEFINE_PCI_DEVICE_TABLE(velocity_id_table) = {
e54f4893
JG
365 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
366 { }
1da177e4
LT
367};
368
369MODULE_DEVICE_TABLE(pci, velocity_id_table);
370
371/**
372 * get_chip_name - identifier to name
373 * @id: chip identifier
374 *
375 * Given a chip identifier return a suitable description. Returns
376 * a pointer a static string valid while the driver is loaded.
377 */
01faccbf 378static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT
379{
380 int i;
381 for (i = 0; chip_info_table[i].name != NULL; i++)
382 if (chip_info_table[i].chip_id == chip_id)
383 break;
384 return chip_info_table[i].name;
385}
386
387/**
388 * velocity_remove1 - device unplug
389 * @pdev: PCI device being removed
390 *
391 * Device unload callback. Called on an unplug or on module
392 * unload for each active device that is present. Disconnects
393 * the device from the network layer and frees all the resources
394 */
1da177e4
LT
395static void __devexit velocity_remove1(struct pci_dev *pdev)
396{
397 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 398 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 399
1da177e4
LT
400 unregister_netdev(dev);
401 iounmap(vptr->mac_regs);
402 pci_release_regions(pdev);
403 pci_disable_device(pdev);
404 pci_set_drvdata(pdev, NULL);
405 free_netdev(dev);
406
407 velocity_nics--;
408}
409
410/**
411 * velocity_set_int_opt - parser for integer options
412 * @opt: pointer to option value
413 * @val: value the user requested (or -1 for default)
414 * @min: lowest value allowed
415 * @max: highest value allowed
416 * @def: default value
417 * @name: property name
418 * @dev: device name
419 *
420 * Set an integer property in the module options. This function does
421 * all the verification and checking as well as reporting so that
422 * we don't duplicate code for each option.
423 */
07b5f6a6 424static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
1da177e4
LT
425{
426 if (val == -1)
427 *opt = def;
428 else if (val < min || val > max) {
429 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
430 devname, name, min, max);
431 *opt = def;
432 } else {
433 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
434 devname, name, val);
435 *opt = val;
436 }
437}
438
439/**
440 * velocity_set_bool_opt - parser for boolean options
441 * @opt: pointer to option value
442 * @val: value the user requested (or -1 for default)
443 * @def: default value (yes/no)
444 * @flag: numeric value to set for true.
445 * @name: property name
446 * @dev: device name
447 *
448 * Set a boolean property in the module options. This function does
449 * all the verification and checking as well as reporting so that
450 * we don't duplicate code for each option.
451 */
c4067400 452static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname)
1da177e4
LT
453{
454 (*opt) &= (~flag);
455 if (val == -1)
456 *opt |= (def ? flag : 0);
457 else if (val < 0 || val > 1) {
6aa20a22 458 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT
459 devname, name);
460 *opt |= (def ? flag : 0);
461 } else {
6aa20a22 462 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT
463 devname, name, val ? "TRUE" : "FALSE");
464 *opt |= (val ? flag : 0);
465 }
466}
467
468/**
469 * velocity_get_options - set options on device
470 * @opts: option structure for the device
471 * @index: index of option to use in module options array
472 * @devname: device name
473 *
474 * Turn the module and command options into a single structure
475 * for the current device
476 */
07b5f6a6 477static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
1da177e4
LT
478{
479
480 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
481 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
482 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
483 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 484
1da177e4
LT
485 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
486 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
487 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
488 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
489 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
1da177e4
LT
490 opts->numrx = (opts->numrx & ~3);
491}
492
493/**
494 * velocity_init_cam_filter - initialise CAM
495 * @vptr: velocity to program
496 *
497 * Initialize the content addressable memory used for filters. Load
498 * appropriately according to the presence of VLAN
499 */
1da177e4
LT
500static void velocity_init_cam_filter(struct velocity_info *vptr)
501{
c4067400 502 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT
503
504 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
505 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
506 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
507
508 /* Disable all CAMs */
509 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
510 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH
511 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
512 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 513
d4f73c8e 514 /* Enable VCAMs */
501e4d24 515 if (vptr->vlgrp) {
d4f73c8e
FR
516 unsigned int vid, i = 0;
517
518 if (!vlan_group_get_device(vptr->vlgrp, 0))
519 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 520
d4f73c8e
FR
521 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
522 if (vlan_group_get_device(vptr->vlgrp, vid)) {
523 mac_set_vlan_cam(regs, i, (u8 *) &vid);
524 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
525 if (++i >= VCAM_SIZE)
526 break;
501e4d24
SH
527 }
528 }
01faccbf 529 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT
530 }
531}
532
d4f73c8e
FR
533static void velocity_vlan_rx_register(struct net_device *dev,
534 struct vlan_group *grp)
535{
536 struct velocity_info *vptr = netdev_priv(dev);
537
538 vptr->vlgrp = grp;
539}
540
501e4d24
SH
541static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
542{
543 struct velocity_info *vptr = netdev_priv(dev);
544
c4067400 545 spin_lock_irq(&vptr->lock);
501e4d24 546 velocity_init_cam_filter(vptr);
c4067400 547 spin_unlock_irq(&vptr->lock);
501e4d24
SH
548}
549
550static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
551{
552 struct velocity_info *vptr = netdev_priv(dev);
553
c4067400 554 spin_lock_irq(&vptr->lock);
501e4d24
SH
555 vlan_group_set_device(vptr->vlgrp, vid, NULL);
556 velocity_init_cam_filter(vptr);
c4067400 557 spin_unlock_irq(&vptr->lock);
501e4d24
SH
558}
559
3c4dc711
FR
560static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
561{
562 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
563}
501e4d24 564
1da177e4
LT
565/**
566 * velocity_rx_reset - handle a receive reset
567 * @vptr: velocity we are resetting
568 *
569 * Reset the ownership and status for the receive ring side.
570 * Hand all the receive queue to the NIC.
571 */
1da177e4
LT
572static void velocity_rx_reset(struct velocity_info *vptr)
573{
574
c4067400 575 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT
576 int i;
577
3c4dc711 578 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT
579
580 /*
581 * Init state, all RD entries belong to the NIC
582 */
583 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 584 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT
585
586 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 587 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT
588 writew(0, &regs->RDIdx);
589 writew(vptr->options.numrx - 1, &regs->RDCSize);
590}
591
592/**
2cf71d2e
DJ
593 * velocity_get_opt_media_mode - get media selection
594 * @vptr: velocity adapter
1da177e4 595 *
2cf71d2e
DJ
596 * Get the media mode stored in EEPROM or module options and load
597 * mii_status accordingly. The requested link state information
598 * is also returned.
1da177e4 599 */
2cf71d2e 600static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
1da177e4 601{
2cf71d2e 602 u32 status = 0;
1da177e4 603
2cf71d2e
DJ
604 switch (vptr->options.spd_dpx) {
605 case SPD_DPX_AUTO:
606 status = VELOCITY_AUTONEG_ENABLE;
1da177e4 607 break;
2cf71d2e
DJ
608 case SPD_DPX_100_FULL:
609 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
610 break;
611 case SPD_DPX_10_FULL:
612 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
613 break;
614 case SPD_DPX_100_HALF:
615 status = VELOCITY_SPEED_100;
616 break;
617 case SPD_DPX_10_HALF:
618 status = VELOCITY_SPEED_10;
619 break;
620 }
621 vptr->mii_status = status;
622 return status;
623}
1da177e4 624
2cf71d2e
DJ
625/**
626 * safe_disable_mii_autopoll - autopoll off
627 * @regs: velocity registers
628 *
629 * Turn off the autopoll and wait for it to disable on the chip
630 */
631static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
632{
633 u16 ww;
1da177e4 634
2cf71d2e
DJ
635 /* turn off MAUTO */
636 writeb(0, &regs->MIICR);
637 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
638 udelay(1);
639 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
640 break;
641 }
642}
1da177e4 643
2cf71d2e
DJ
644/**
645 * enable_mii_autopoll - turn on autopolling
646 * @regs: velocity registers
647 *
648 * Enable the MII link status autopoll feature on the Velocity
649 * hardware. Wait for it to enable.
650 */
651static void enable_mii_autopoll(struct mac_regs __iomem *regs)
652{
653 int ii;
1da177e4 654
2cf71d2e
DJ
655 writeb(0, &(regs->MIICR));
656 writeb(MIIADR_SWMPL, &regs->MIIADR);
1da177e4 657
2cf71d2e
DJ
658 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
659 udelay(1);
660 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
661 break;
662 }
1da177e4 663
2cf71d2e 664 writeb(MIICR_MAUTO, &regs->MIICR);
1da177e4 665
2cf71d2e
DJ
666 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
667 udelay(1);
668 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
669 break;
670 }
1da177e4 671
2cf71d2e 672}
1da177e4 673
2cf71d2e
DJ
674/**
675 * velocity_mii_read - read MII data
676 * @regs: velocity registers
677 * @index: MII register index
678 * @data: buffer for received data
679 *
680 * Perform a single read of an MII 16bit register. Returns zero
681 * on success or -ETIMEDOUT if the PHY did not respond.
682 */
683static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
684{
685 u16 ww;
1da177e4 686
2cf71d2e
DJ
687 /*
688 * Disable MIICR_MAUTO, so that mii addr can be set normally
689 */
690 safe_disable_mii_autopoll(regs);
1da177e4 691
2cf71d2e 692 writeb(index, &regs->MIIADR);
1da177e4 693
2cf71d2e 694 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
1da177e4 695
2cf71d2e
DJ
696 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
697 if (!(readb(&regs->MIICR) & MIICR_RCMD))
698 break;
699 }
1da177e4 700
2cf71d2e 701 *data = readw(&regs->MIIDATA);
1da177e4 702
2cf71d2e
DJ
703 enable_mii_autopoll(regs);
704 if (ww == W_MAX_TIMEOUT)
705 return -ETIMEDOUT;
706 return 0;
1da177e4
LT
707}
708
2cf71d2e 709
1da177e4 710/**
2cf71d2e
DJ
711 * mii_check_media_mode - check media state
712 * @regs: velocity registers
1da177e4 713 *
2cf71d2e
DJ
714 * Check the current MII status and determine the link status
715 * accordingly
1da177e4 716 */
2cf71d2e 717static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
1da177e4 718{
2cf71d2e
DJ
719 u32 status = 0;
720 u16 ANAR;
1da177e4 721
3a7f8681 722 if (!MII_REG_BITS_IS_ON(BMSR_LSTATUS, MII_BMSR, regs))
2cf71d2e 723 status |= VELOCITY_LINK_FAIL;
1da177e4 724
3a7f8681 725 if (MII_REG_BITS_IS_ON(ADVERTISE_1000FULL, MII_CTRL1000, regs))
2cf71d2e 726 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
3a7f8681 727 else if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF, MII_CTRL1000, regs))
2cf71d2e
DJ
728 status |= (VELOCITY_SPEED_1000);
729 else {
3a7f8681
FR
730 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
731 if (ANAR & ADVERTISE_100FULL)
2cf71d2e 732 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
3a7f8681 733 else if (ANAR & ADVERTISE_100HALF)
2cf71d2e 734 status |= VELOCITY_SPEED_100;
3a7f8681 735 else if (ANAR & ADVERTISE_10FULL)
2cf71d2e
DJ
736 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
737 else
738 status |= (VELOCITY_SPEED_10);
1da177e4
LT
739 }
740
3a7f8681
FR
741 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
742 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
743 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
744 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
745 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
2cf71d2e
DJ
746 status |= VELOCITY_AUTONEG_ENABLE;
747 }
1da177e4 748 }
1da177e4 749
2cf71d2e
DJ
750 return status;
751}
39a11bd9 752
1da177e4 753/**
2cf71d2e
DJ
754 * velocity_mii_write - write MII data
755 * @regs: velocity registers
756 * @index: MII register index
757 * @data: 16bit data for the MII register
1da177e4 758 *
2cf71d2e
DJ
759 * Perform a single write to an MII 16bit register. Returns zero
760 * on success or -ETIMEDOUT if the PHY did not respond.
1da177e4 761 */
2cf71d2e 762static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
1da177e4 763{
2cf71d2e 764 u16 ww;
1da177e4 765
2cf71d2e
DJ
766 /*
767 * Disable MIICR_MAUTO, so that mii addr can be set normally
e54f4893 768 */
2cf71d2e 769 safe_disable_mii_autopoll(regs);
1da177e4 770
2cf71d2e
DJ
771 /* MII reg offset */
772 writeb(mii_addr, &regs->MIIADR);
773 /* set MII data */
774 writew(data, &regs->MIIDATA);
775
776 /* turn on MIICR_WCMD */
777 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
778
779 /* W_MAX_TIMEOUT is the timeout period */
780 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
781 udelay(5);
782 if (!(readb(&regs->MIICR) & MIICR_WCMD))
783 break;
1da177e4 784 }
2cf71d2e 785 enable_mii_autopoll(regs);
6aa20a22 786
2cf71d2e
DJ
787 if (ww == W_MAX_TIMEOUT)
788 return -ETIMEDOUT;
789 return 0;
790}
6aa20a22 791
2cf71d2e
DJ
792/**
793 * set_mii_flow_control - flow control setup
794 * @vptr: velocity interface
795 *
796 * Set up the flow control on this interface according to
797 * the supplied user/eeprom options.
798 */
799static void set_mii_flow_control(struct velocity_info *vptr)
800{
801 /*Enable or Disable PAUSE in ANAR */
802 switch (vptr->options.flow_cntl) {
803 case FLOW_CNTL_TX:
3a7f8681
FR
804 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
805 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e 806 break;
1da177e4 807
2cf71d2e 808 case FLOW_CNTL_RX:
3a7f8681
FR
809 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
810 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e 811 break;
1da177e4 812
2cf71d2e 813 case FLOW_CNTL_TX_RX:
3a7f8681 814 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
4a35ecf8 815 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e 816 break;
1da177e4 817
2cf71d2e 818 case FLOW_CNTL_DISABLE:
3a7f8681
FR
819 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
820 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ
821 break;
822 default:
823 break;
824 }
825}
1da177e4 826
2cf71d2e
DJ
827/**
828 * mii_set_auto_on - autonegotiate on
829 * @vptr: velocity
830 *
831 * Enable autonegotation on this interface
832 */
833static void mii_set_auto_on(struct velocity_info *vptr)
834{
3a7f8681
FR
835 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
836 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
2cf71d2e 837 else
3a7f8681 838 MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
2cf71d2e 839}
1da177e4 840
2cf71d2e
DJ
841static u32 check_connection_type(struct mac_regs __iomem *regs)
842{
843 u32 status = 0;
844 u8 PHYSR0;
845 u16 ANAR;
846 PHYSR0 = readb(&regs->PHYSR0);
1da177e4 847
2cf71d2e
DJ
848 /*
849 if (!(PHYSR0 & PHYSR0_LINKGD))
850 status|=VELOCITY_LINK_FAIL;
851 */
1da177e4 852
2cf71d2e
DJ
853 if (PHYSR0 & PHYSR0_FDPX)
854 status |= VELOCITY_DUPLEX_FULL;
1da177e4 855
2cf71d2e
DJ
856 if (PHYSR0 & PHYSR0_SPDG)
857 status |= VELOCITY_SPEED_1000;
858 else if (PHYSR0 & PHYSR0_SPD10)
859 status |= VELOCITY_SPEED_10;
860 else
861 status |= VELOCITY_SPEED_100;
1da177e4 862
3a7f8681
FR
863 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
864 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
865 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
866 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
867 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
2cf71d2e
DJ
868 status |= VELOCITY_AUTONEG_ENABLE;
869 }
1da177e4
LT
870 }
871
2cf71d2e
DJ
872 return status;
873}
1da177e4 874
1da177e4 875
1da177e4 876
2cf71d2e
DJ
877/**
878 * velocity_set_media_mode - set media mode
879 * @mii_status: old MII link state
880 *
881 * Check the media link state and configure the flow control
882 * PHY and also velocity hardware setup accordingly. In particular
883 * we need to set up CD polling and frame bursting.
884 */
885static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
886{
887 u32 curr_status;
888 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 889
2cf71d2e
DJ
890 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
891 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
07b5f6a6 892
2cf71d2e
DJ
893 /* Set mii link status */
894 set_mii_flow_control(vptr);
1da177e4 895
6aa20a22 896 /*
2cf71d2e 897 Check if new status is consisent with current status
8e95a202
JP
898 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) ||
899 (mii_status==curr_status)) {
2cf71d2e
DJ
900 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
901 vptr->mii_status=check_connection_type(vptr->mac_regs);
902 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
903 return 0;
904 }
1da177e4 905 */
6aa20a22 906
2cf71d2e 907 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3a7f8681 908 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
1da177e4
LT
909
910 /*
2cf71d2e 911 * If connection type is AUTO
1da177e4 912 */
2cf71d2e
DJ
913 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
914 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
915 /* clear force MAC mode bit */
916 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
917 /* set duplex mode of MAC according to duplex mode of MII */
3a7f8681
FR
918 MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
919 MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
920 MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
6aa20a22 921
2cf71d2e
DJ
922 /* enable AUTO-NEGO mode */
923 mii_set_auto_on(vptr);
924 } else {
925 u16 ANAR;
926 u8 CHIPGCR;
1da177e4 927
2cf71d2e
DJ
928 /*
929 * 1. if it's 3119, disable frame bursting in halfduplex mode
930 * and enable it in fullduplex mode
931 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
932 * 3. only enable CD heart beat counter in 10HD mode
933 */
1da177e4 934
2cf71d2e
DJ
935 /* set force MAC mode bit */
936 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
1da177e4 937
2cf71d2e
DJ
938 CHIPGCR = readb(&regs->CHIPGCR);
939 CHIPGCR &= ~CHIPGCR_FCGMII;
501e4d24 940
2cf71d2e
DJ
941 if (mii_status & VELOCITY_DUPLEX_FULL) {
942 CHIPGCR |= CHIPGCR_FCFDX;
943 writeb(CHIPGCR, &regs->CHIPGCR);
944 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
945 if (vptr->rev_id < REV_ID_VT3216_A0)
946 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
947 } else {
948 CHIPGCR &= ~CHIPGCR_FCFDX;
949 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
950 writeb(CHIPGCR, &regs->CHIPGCR);
951 if (vptr->rev_id < REV_ID_VT3216_A0)
952 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
953 }
1da177e4 954
3a7f8681 955 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
1da177e4 956
2cf71d2e
DJ
957 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
958 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
959 else
960 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1da177e4 961
3a7f8681
FR
962 /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
963 velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
964 ANAR &= (~(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF));
2cf71d2e
DJ
965 if (mii_status & VELOCITY_SPEED_100) {
966 if (mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 967 ANAR |= ADVERTISE_100FULL;
2cf71d2e 968 else
3a7f8681 969 ANAR |= ADVERTISE_100HALF;
2cf71d2e
DJ
970 } else {
971 if (mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 972 ANAR |= ADVERTISE_10FULL;
2cf71d2e 973 else
3a7f8681 974 ANAR |= ADVERTISE_10HALF;
2cf71d2e 975 }
3a7f8681 976 velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
2cf71d2e
DJ
977 /* enable AUTO-NEGO mode */
978 mii_set_auto_on(vptr);
3a7f8681 979 /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
d3b238a0 980 }
2cf71d2e
DJ
981 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
982 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
983 return VELOCITY_LINK_CHANGE;
984}
8a22dddb 985
2cf71d2e
DJ
986/**
987 * velocity_print_link_status - link status reporting
988 * @vptr: velocity to report on
989 *
990 * Turn the link status of the velocity card into a kernel log
991 * description of the new link state, detailing speed and duplex
992 * status
993 */
994static void velocity_print_link_status(struct velocity_info *vptr)
995{
6aa20a22 996
2cf71d2e
DJ
997 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
998 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
999 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1000 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
6aa20a22 1001
2cf71d2e
DJ
1002 if (vptr->mii_status & VELOCITY_SPEED_1000)
1003 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1004 else if (vptr->mii_status & VELOCITY_SPEED_100)
1005 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1006 else
1007 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1da177e4 1008
2cf71d2e
DJ
1009 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1010 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1011 else
1012 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1013 } else {
1014 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1015 switch (vptr->options.spd_dpx) {
1016 case SPD_DPX_100_HALF:
1017 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1018 break;
1019 case SPD_DPX_100_FULL:
1020 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1021 break;
1022 case SPD_DPX_10_HALF:
1023 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1024 break;
1025 case SPD_DPX_10_FULL:
1026 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1027 break;
1028 default:
1029 break;
1030 }
1da177e4 1031 }
1da177e4
LT
1032}
1033
1034/**
2cf71d2e
DJ
1035 * enable_flow_control_ability - flow control
1036 * @vptr: veloity to configure
1da177e4 1037 *
2cf71d2e
DJ
1038 * Set up flow control according to the flow control options
1039 * determined by the eeprom/configuration.
1da177e4 1040 */
2cf71d2e 1041static void enable_flow_control_ability(struct velocity_info *vptr)
1da177e4 1042{
1da177e4 1043
2cf71d2e 1044 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1045
2cf71d2e 1046 switch (vptr->options.flow_cntl) {
1da177e4 1047
2cf71d2e
DJ
1048 case FLOW_CNTL_DEFAULT:
1049 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1050 writel(CR0_FDXRFCEN, &regs->CR0Set);
1051 else
1052 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1053
1054 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1055 writel(CR0_FDXTFCEN, &regs->CR0Set);
1056 else
1057 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1058 break;
1059
1060 case FLOW_CNTL_TX:
1061 writel(CR0_FDXTFCEN, &regs->CR0Set);
1062 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1063 break;
1064
1065 case FLOW_CNTL_RX:
1066 writel(CR0_FDXRFCEN, &regs->CR0Set);
1067 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1068 break;
1069
1070 case FLOW_CNTL_TX_RX:
1071 writel(CR0_FDXTFCEN, &regs->CR0Set);
1072 writel(CR0_FDXRFCEN, &regs->CR0Set);
1073 break;
1074
1075 case FLOW_CNTL_DISABLE:
1076 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1077 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1078 break;
1079
1080 default:
1081 break;
1082 }
1da177e4 1083
1da177e4
LT
1084}
1085
1086/**
2cf71d2e
DJ
1087 * velocity_soft_reset - soft reset
1088 * @vptr: velocity to reset
1da177e4 1089 *
2cf71d2e
DJ
1090 * Kick off a soft reset of the velocity adapter and then poll
1091 * until the reset sequence has completed before returning.
1da177e4 1092 */
2cf71d2e 1093static int velocity_soft_reset(struct velocity_info *vptr)
1da177e4 1094{
2cf71d2e
DJ
1095 struct mac_regs __iomem *regs = vptr->mac_regs;
1096 int i = 0;
6aa20a22 1097
2cf71d2e 1098 writel(CR0_SFRST, &regs->CR0Set);
1da177e4 1099
2cf71d2e
DJ
1100 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1101 udelay(5);
1102 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1103 break;
1da177e4
LT
1104 }
1105
2cf71d2e
DJ
1106 if (i == W_MAX_TIMEOUT) {
1107 writel(CR0_FORSRST, &regs->CR0Set);
1108 /* FIXME: PCI POSTING */
1109 /* delay 2ms */
1110 mdelay(2);
1da177e4 1111 }
1da177e4
LT
1112 return 0;
1113}
1114
1115/**
2cf71d2e
DJ
1116 * velocity_set_multi - filter list change callback
1117 * @dev: network device
1da177e4 1118 *
2cf71d2e
DJ
1119 * Called by the network layer when the filter lists need to change
1120 * for a velocity adapter. Reload the CAMs with the new address
1121 * filter ruleset.
1da177e4 1122 */
2cf71d2e 1123static void velocity_set_multi(struct net_device *dev)
1da177e4 1124{
2cf71d2e 1125 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 1126 struct mac_regs __iomem *regs = vptr->mac_regs;
2cf71d2e
DJ
1127 u8 rx_mode;
1128 int i;
22bedad3 1129 struct netdev_hw_addr *ha;
1da177e4 1130
2cf71d2e
DJ
1131 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1132 writel(0xffffffff, &regs->MARCAM[0]);
1133 writel(0xffffffff, &regs->MARCAM[4]);
1134 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
4cd24eaf 1135 } else if ((netdev_mc_count(dev) > vptr->multicast_limit) ||
8e95a202 1136 (dev->flags & IFF_ALLMULTI)) {
2cf71d2e
DJ
1137 writel(0xffffffff, &regs->MARCAM[0]);
1138 writel(0xffffffff, &regs->MARCAM[4]);
1139 rx_mode = (RCR_AM | RCR_AB);
1140 } else {
1141 int offset = MCAM_SIZE - vptr->multicast_limit;
1142 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4 1143
567ec874 1144 i = 0;
22bedad3
JP
1145 netdev_for_each_mc_addr(ha, dev) {
1146 mac_set_cam(regs, i + offset, ha->addr);
2cf71d2e 1147 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
567ec874 1148 i++;
1da177e4 1149 }
1da177e4 1150
2cf71d2e
DJ
1151 mac_set_cam_mask(regs, vptr->mCAMmask);
1152 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4 1153 }
2cf71d2e
DJ
1154 if (dev->mtu > 1500)
1155 rx_mode |= RCR_AL;
1da177e4 1156
2cf71d2e 1157 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1da177e4 1158
9088d9a4
FR
1159}
1160
2cf71d2e
DJ
1161/*
1162 * MII access , media link mode setting functions
1da177e4
LT
1163 */
1164
1da177e4 1165/**
2cf71d2e
DJ
1166 * mii_init - set up MII
1167 * @vptr: velocity adapter
1168 * @mii_status: links tatus
1da177e4 1169 *
2cf71d2e 1170 * Set up the PHY for the current link state.
1da177e4 1171 */
2cf71d2e 1172static void mii_init(struct velocity_info *vptr, u32 mii_status)
1da177e4 1173{
2cf71d2e 1174 u16 BMCR;
1da177e4 1175
2cf71d2e
DJ
1176 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
1177 case PHYID_CICADA_CS8201:
1178 /*
1179 * Reset to hardware default
1180 */
3a7f8681 1181 MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ
1182 /*
1183 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1184 * off it in NWay-forced half mode for NWay-forced v.s.
1185 * legacy-forced issue.
1186 */
1187 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 1188 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e 1189 else
3a7f8681 1190 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e
DJ
1191 /*
1192 * Turn on Link/Activity LED enable bit for CIS8201
1193 */
3a7f8681 1194 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
2cf71d2e
DJ
1195 break;
1196 case PHYID_VT3216_32BIT:
1197 case PHYID_VT3216_64BIT:
1198 /*
1199 * Reset to hardware default
1200 */
3a7f8681 1201 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ
1202 /*
1203 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1204 * off it in NWay-forced half mode for NWay-forced v.s.
1205 * legacy-forced issue
1206 */
1207 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 1208 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e 1209 else
3a7f8681 1210 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e 1211 break;
1da177e4 1212
2cf71d2e
DJ
1213 case PHYID_MARVELL_1000:
1214 case PHYID_MARVELL_1000S:
1215 /*
1216 * Assert CRS on Transmit
1217 */
1218 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1219 /*
1220 * Reset to hardware default
1221 */
3a7f8681 1222 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ
1223 break;
1224 default:
1225 ;
1226 }
3a7f8681
FR
1227 velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
1228 if (BMCR & BMCR_ISOLATE) {
1229 BMCR &= ~BMCR_ISOLATE;
1230 velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
1da177e4 1231 }
1da177e4
LT
1232}
1233
6dfc4b95
SK
1234/**
1235 * setup_queue_timers - Setup interrupt timers
1236 *
1237 * Setup interrupt frequency during suppression (timeout if the frame
1238 * count isn't filled).
1239 */
1240static void setup_queue_timers(struct velocity_info *vptr)
1241{
1242 /* Only for newer revisions */
1243 if (vptr->rev_id >= REV_ID_VT3216_A0) {
1244 u8 txqueue_timer = 0;
1245 u8 rxqueue_timer = 0;
1246
1247 if (vptr->mii_status & (VELOCITY_SPEED_1000 |
1248 VELOCITY_SPEED_100)) {
1249 txqueue_timer = vptr->options.txqueue_timer;
1250 rxqueue_timer = vptr->options.rxqueue_timer;
1251 }
1252
1253 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1254 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1255 }
1256}
1257/**
1258 * setup_adaptive_interrupts - Setup interrupt suppression
1259 *
1260 * @vptr velocity adapter
1261 *
1262 * The velocity is able to suppress interrupt during high interrupt load.
1263 * This function turns on that feature.
1264 */
1265static void setup_adaptive_interrupts(struct velocity_info *vptr)
1266{
1267 struct mac_regs __iomem *regs = vptr->mac_regs;
1268 u16 tx_intsup = vptr->options.tx_intsup;
1269 u16 rx_intsup = vptr->options.rx_intsup;
1270
1271 /* Setup default interrupt mask (will be changed below) */
1272 vptr->int_mask = INT_MASK_DEF;
1273
1274 /* Set Tx Interrupt Suppression Threshold */
1275 writeb(CAMCR_PS0, &regs->CAMCR);
1276 if (tx_intsup != 0) {
1277 vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
1278 ISR_PTX2I | ISR_PTX3I);
1279 writew(tx_intsup, &regs->ISRCTL);
1280 } else
1281 writew(ISRCTL_TSUPDIS, &regs->ISRCTL);
1282
1283 /* Set Rx Interrupt Suppression Threshold */
1284 writeb(CAMCR_PS1, &regs->CAMCR);
1285 if (rx_intsup != 0) {
1286 vptr->int_mask &= ~ISR_PRXI;
1287 writew(rx_intsup, &regs->ISRCTL);
1288 } else
1289 writew(ISRCTL_RSUPDIS, &regs->ISRCTL);
1290
1291 /* Select page to interrupt hold timer */
1292 writeb(0, &regs->CAMCR);
1293}
2cf71d2e 1294
1da177e4 1295/**
2cf71d2e
DJ
1296 * velocity_init_registers - initialise MAC registers
1297 * @vptr: velocity to init
1298 * @type: type of initialisation (hot or cold)
1da177e4 1299 *
2cf71d2e
DJ
1300 * Initialise the MAC on a reset or on first set up on the
1301 * hardware.
1da177e4 1302 */
2cf71d2e
DJ
1303static void velocity_init_registers(struct velocity_info *vptr,
1304 enum velocity_init_type type)
1da177e4 1305{
2cf71d2e
DJ
1306 struct mac_regs __iomem *regs = vptr->mac_regs;
1307 int i, mii_status;
1da177e4 1308
2cf71d2e 1309 mac_wol_reset(regs);
1da177e4 1310
2cf71d2e
DJ
1311 switch (type) {
1312 case VELOCITY_INIT_RESET:
1313 case VELOCITY_INIT_WOL:
1da177e4 1314
2cf71d2e 1315 netif_stop_queue(vptr->dev);
6aa20a22 1316
2cf71d2e
DJ
1317 /*
1318 * Reset RX to prevent RX pointer not on the 4X location
1319 */
1320 velocity_rx_reset(vptr);
1321 mac_rx_queue_run(regs);
1322 mac_rx_queue_wake(regs);
6aa20a22 1323
2cf71d2e
DJ
1324 mii_status = velocity_get_opt_media_mode(vptr);
1325 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1326 velocity_print_link_status(vptr);
1327 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1328 netif_wake_queue(vptr->dev);
1da177e4 1329 }
1da177e4 1330
2cf71d2e 1331 enable_flow_control_ability(vptr);
1da177e4 1332
2cf71d2e
DJ
1333 mac_clear_isr(regs);
1334 writel(CR0_STOP, &regs->CR0Clr);
1335 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1336 &regs->CR0Set);
6aa20a22 1337
2cf71d2e 1338 break;
1da177e4 1339
2cf71d2e
DJ
1340 case VELOCITY_INIT_COLD:
1341 default:
1342 /*
1343 * Do reset
1344 */
1345 velocity_soft_reset(vptr);
1346 mdelay(5);
1da177e4 1347
2cf71d2e
DJ
1348 mac_eeprom_reload(regs);
1349 for (i = 0; i < 6; i++)
1350 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
1da177e4 1351
2cf71d2e
DJ
1352 /*
1353 * clear Pre_ACPI bit.
1354 */
1355 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1356 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1357 mac_set_dma_length(regs, vptr->options.DMA_length);
1da177e4 1358
2cf71d2e
DJ
1359 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1360 /*
1361 * Back off algorithm use original IEEE standard
1362 */
1363 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1da177e4
LT
1364
1365 /*
2cf71d2e 1366 * Init CAM filter
1da177e4 1367 */
2cf71d2e 1368 velocity_init_cam_filter(vptr);
1da177e4 1369
2cf71d2e
DJ
1370 /*
1371 * Set packet filter: Receive directed and broadcast address
1372 */
1373 velocity_set_multi(vptr->dev);
1da177e4 1374
2cf71d2e
DJ
1375 /*
1376 * Enable MII auto-polling
1377 */
1378 enable_mii_autopoll(regs);
1da177e4 1379
6dfc4b95 1380 setup_adaptive_interrupts(vptr);
1da177e4 1381
2cf71d2e
DJ
1382 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1383 writew(vptr->options.numrx - 1, &regs->RDCSize);
1384 mac_rx_queue_run(regs);
1385 mac_rx_queue_wake(regs);
1da177e4 1386
2cf71d2e 1387 writew(vptr->options.numtx - 1, &regs->TDCSize);
1da177e4 1388
2cf71d2e
DJ
1389 for (i = 0; i < vptr->tx.numq; i++) {
1390 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1391 mac_tx_queue_run(regs, i);
1392 }
1da177e4 1393
2cf71d2e 1394 init_flow_control_register(vptr);
6aa20a22 1395
2cf71d2e
DJ
1396 writel(CR0_STOP, &regs->CR0Clr);
1397 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1da177e4 1398
2cf71d2e
DJ
1399 mii_status = velocity_get_opt_media_mode(vptr);
1400 netif_stop_queue(vptr->dev);
1da177e4 1401
2cf71d2e 1402 mii_init(vptr, mii_status);
1da177e4 1403
2cf71d2e
DJ
1404 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1405 velocity_print_link_status(vptr);
1406 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1407 netif_wake_queue(vptr->dev);
1da177e4 1408 }
6aa20a22 1409
2cf71d2e
DJ
1410 enable_flow_control_ability(vptr);
1411 mac_hw_mibs_init(regs);
1412 mac_write_int_mask(vptr->int_mask, regs);
1413 mac_clear_isr(regs);
1414
1da177e4 1415 }
1da177e4
LT
1416}
1417
2cf71d2e 1418static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4 1419{
2cf71d2e
DJ
1420 struct mac_regs __iomem *regs = vptr->mac_regs;
1421 int avail, dirty, unusable;
1422
1423 /*
1424 * RD number must be equal to 4X per hardware spec
1425 * (programming guide rev 1.20, p.13)
1426 */
1427 if (vptr->rx.filled < 4)
1428 return;
1429
1430 wmb();
1431
1432 unusable = vptr->rx.filled & 0x0003;
1433 dirty = vptr->rx.dirty - unusable;
1434 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1435 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1436 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4 1437 }
2cf71d2e
DJ
1438
1439 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1440 vptr->rx.filled = unusable;
1da177e4
LT
1441}
1442
1443/**
2cf71d2e
DJ
1444 * velocity_init_dma_rings - set up DMA rings
1445 * @vptr: Velocity to set up
6aa20a22 1446 *
2cf71d2e
DJ
1447 * Allocate PCI mapped DMA rings for the receive and transmit layer
1448 * to use.
1da177e4 1449 */
2cf71d2e 1450static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1451{
2cf71d2e
DJ
1452 struct velocity_opt *opt = &vptr->options;
1453 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1454 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1455 struct pci_dev *pdev = vptr->pdev;
1456 dma_addr_t pool_dma;
1457 void *pool;
1458 unsigned int i;
1da177e4
LT
1459
1460 /*
2cf71d2e
DJ
1461 * Allocate all RD/TD rings a single pool.
1462 *
1463 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1464 * alignment
1da177e4 1465 */
2cf71d2e
DJ
1466 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
1467 rx_ring_size, &pool_dma);
1468 if (!pool) {
1469 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1470 vptr->dev->name);
1471 return -ENOMEM;
1da177e4
LT
1472 }
1473
2cf71d2e
DJ
1474 vptr->rx.ring = pool;
1475 vptr->rx.pool_dma = pool_dma;
1da177e4 1476
2cf71d2e
DJ
1477 pool += rx_ring_size;
1478 pool_dma += rx_ring_size;
d4f73c8e 1479
2cf71d2e
DJ
1480 for (i = 0; i < vptr->tx.numq; i++) {
1481 vptr->tx.rings[i] = pool;
1482 vptr->tx.pool_dma[i] = pool_dma;
1483 pool += tx_ring_size;
1484 pool_dma += tx_ring_size;
1485 }
1da177e4
LT
1486
1487 return 0;
1488}
1489
2cf71d2e
DJ
1490static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1491{
1492 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1493}
1494
1da177e4
LT
1495/**
1496 * velocity_alloc_rx_buf - allocate aligned receive buffer
1497 * @vptr: velocity
1498 * @idx: ring index
1499 *
1500 * Allocate a new full sized buffer for the reception of a frame and
1501 * map it into PCI space for the hardware to use. The hardware
1502 * requires *64* byte alignment of the buffer which makes life
1503 * less fun than would be ideal.
1504 */
1da177e4
LT
1505static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1506{
0fe9f15e
FR
1507 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1508 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1509
0fe9f15e 1510 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1da177e4
LT
1511 if (rd_info->skb == NULL)
1512 return -ENOMEM;
1513
1514 /*
1515 * Do the gymnastics to get the buffer head for data at
1516 * 64byte alignment.
1517 */
da95b2d4
SK
1518 skb_reserve(rd_info->skb,
1519 64 - ((unsigned long) rd_info->skb->data & 63));
0fe9f15e
FR
1520 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1521 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1522
1da177e4
LT
1523 /*
1524 * Fill in the descriptor to match
0fe9f15e 1525 */
6aa20a22 1526
1da177e4 1527 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1528 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT
1529 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1530 rd->pa_high = 0;
1531 return 0;
1532}
1533
6aa20a22 1534
2cf71d2e 1535static int velocity_rx_refill(struct velocity_info *vptr)
1da177e4 1536{
2cf71d2e 1537 int dirty = vptr->rx.dirty, done = 0;
1da177e4 1538
2cf71d2e
DJ
1539 do {
1540 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4 1541
2cf71d2e
DJ
1542 /* Fine for an all zero Rx desc at init time as well */
1543 if (rd->rdesc0.len & OWNED_BY_NIC)
1544 break;
1da177e4 1545
2cf71d2e
DJ
1546 if (!vptr->rx.info[dirty].skb) {
1547 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4 1548 break;
1da177e4 1549 }
2cf71d2e
DJ
1550 done++;
1551 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1552 } while (dirty != vptr->rx.curr);
1da177e4 1553
2cf71d2e
DJ
1554 if (done) {
1555 vptr->rx.dirty = dirty;
1556 vptr->rx.filled += done;
1da177e4 1557 }
2cf71d2e
DJ
1558
1559 return done;
1da177e4
LT
1560}
1561
1562/**
2cf71d2e
DJ
1563 * velocity_free_rd_ring - free receive ring
1564 * @vptr: velocity to clean up
1da177e4 1565 *
2cf71d2e
DJ
1566 * Free the receive buffers for each ring slot and any
1567 * attached socket buffers that need to go away.
1da177e4 1568 */
2cf71d2e 1569static void velocity_free_rd_ring(struct velocity_info *vptr)
1da177e4 1570{
2cf71d2e 1571 int i;
1da177e4 1572
2cf71d2e
DJ
1573 if (vptr->rx.info == NULL)
1574 return;
6aa20a22 1575
2cf71d2e
DJ
1576 for (i = 0; i < vptr->options.numrx; i++) {
1577 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1578 struct rx_desc *rd = vptr->rx.ring + i;
1da177e4 1579
2cf71d2e 1580 memset(rd, 0, sizeof(*rd));
1da177e4 1581
2cf71d2e
DJ
1582 if (!rd_info->skb)
1583 continue;
1584 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1585 PCI_DMA_FROMDEVICE);
1586 rd_info->skb_dma = 0;
6aa20a22 1587
2cf71d2e
DJ
1588 dev_kfree_skb(rd_info->skb);
1589 rd_info->skb = NULL;
1da177e4
LT
1590 }
1591
2cf71d2e
DJ
1592 kfree(vptr->rx.info);
1593 vptr->rx.info = NULL;
1594}
1da177e4 1595
1da177e4 1596
1da177e4 1597
2cf71d2e
DJ
1598/**
1599 * velocity_init_rd_ring - set up receive ring
1600 * @vptr: velocity to configure
1601 *
1602 * Allocate and set up the receive buffers for each ring slot and
1603 * assign them to the network adapter.
1604 */
1605static int velocity_init_rd_ring(struct velocity_info *vptr)
1606{
1607 int ret = -ENOMEM;
1da177e4 1608
2cf71d2e
DJ
1609 vptr->rx.info = kcalloc(vptr->options.numrx,
1610 sizeof(struct velocity_rd_info), GFP_KERNEL);
1611 if (!vptr->rx.info)
1612 goto out;
6aa20a22 1613
2cf71d2e 1614 velocity_init_rx_ring_indexes(vptr);
1da177e4 1615
2cf71d2e
DJ
1616 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1617 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1618 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1619 velocity_free_rd_ring(vptr);
1620 goto out;
1621 }
1da177e4 1622
2cf71d2e
DJ
1623 ret = 0;
1624out:
1625 return ret;
1da177e4
LT
1626}
1627
1628/**
2cf71d2e
DJ
1629 * velocity_init_td_ring - set up transmit ring
1630 * @vptr: velocity
1da177e4 1631 *
2cf71d2e
DJ
1632 * Set up the transmit ring and chain the ring pointers together.
1633 * Returns zero on success or a negative posix errno code for
1634 * failure.
1da177e4 1635 */
2cf71d2e 1636static int velocity_init_td_ring(struct velocity_info *vptr)
1da177e4 1637{
2cf71d2e 1638 int j;
1da177e4 1639
2cf71d2e
DJ
1640 /* Init the TD ring entries */
1641 for (j = 0; j < vptr->tx.numq; j++) {
1da177e4 1642
2cf71d2e
DJ
1643 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1644 sizeof(struct velocity_td_info),
1645 GFP_KERNEL);
1646 if (!vptr->tx.infos[j]) {
1647 while (--j >= 0)
1648 kfree(vptr->tx.infos[j]);
1649 return -ENOMEM;
1da177e4 1650 }
2cf71d2e
DJ
1651
1652 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4 1653 }
2cf71d2e
DJ
1654 return 0;
1655}
1656
1657/**
1658 * velocity_free_dma_rings - free PCI ring pointers
1659 * @vptr: Velocity to free from
1660 *
1661 * Clean up the PCI ring buffers allocated to this velocity.
1662 */
1663static void velocity_free_dma_rings(struct velocity_info *vptr)
1664{
1665 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1666 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1667
1668 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT
1669}
1670
2cf71d2e 1671
3c4dc711
FR
1672static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1673{
1674 int ret;
1675
1676 velocity_set_rxbufsize(vptr, mtu);
1677
1678 ret = velocity_init_dma_rings(vptr);
1679 if (ret < 0)
1680 goto out;
1681
1682 ret = velocity_init_rd_ring(vptr);
1683 if (ret < 0)
1684 goto err_free_dma_rings_0;
1685
1686 ret = velocity_init_td_ring(vptr);
1687 if (ret < 0)
1688 goto err_free_rd_ring_1;
1689out:
1690 return ret;
1691
1692err_free_rd_ring_1:
1693 velocity_free_rd_ring(vptr);
1694err_free_dma_rings_0:
1695 velocity_free_dma_rings(vptr);
1696 goto out;
1697}
1698
1da177e4 1699/**
2cf71d2e
DJ
1700 * velocity_free_tx_buf - free transmit buffer
1701 * @vptr: velocity
1702 * @tdinfo: buffer
1da177e4 1703 *
2cf71d2e
DJ
1704 * Release an transmit buffer. If the buffer was preallocated then
1705 * recycle it, if not then unmap the buffer.
1da177e4 1706 */
c79992fd
SK
1707static void velocity_free_tx_buf(struct velocity_info *vptr,
1708 struct velocity_td_info *tdinfo, struct tx_desc *td)
1da177e4 1709{
2cf71d2e 1710 struct sk_buff *skb = tdinfo->skb;
28133176 1711
2cf71d2e
DJ
1712 /*
1713 * Don't unmap the pre-allocated tx_bufs
1714 */
1715 if (tdinfo->skb_dma) {
c79992fd 1716 int i;
1da177e4 1717
2cf71d2e 1718 for (i = 0; i < tdinfo->nskb_dma; i++) {
c79992fd
SK
1719 size_t pktlen = max_t(size_t, skb->len, ETH_ZLEN);
1720
1721 /* For scatter-gather */
1722 if (skb_shinfo(skb)->nr_frags > 0)
1723 pktlen = max_t(size_t, pktlen,
1724 td->td_buf[i].size & ~TD_QUEUE);
1725
1726 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i],
1727 le16_to_cpu(pktlen), PCI_DMA_TODEVICE);
2cf71d2e 1728 }
1da177e4 1729 }
2cf71d2e
DJ
1730 dev_kfree_skb_irq(skb);
1731 tdinfo->skb = NULL;
1da177e4
LT
1732}
1733
6aa20a22 1734
2cf71d2e
DJ
1735/*
1736 * FIXME: could we merge this with velocity_free_tx_buf ?
1737 */
1738static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1739 int q, int n)
1da177e4 1740{
2cf71d2e
DJ
1741 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1742 int i;
bd7b3f34 1743
2cf71d2e
DJ
1744 if (td_info == NULL)
1745 return;
3c4dc711 1746
2cf71d2e
DJ
1747 if (td_info->skb) {
1748 for (i = 0; i < td_info->nskb_dma; i++) {
1749 if (td_info->skb_dma[i]) {
1750 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1751 td_info->skb->len, PCI_DMA_TODEVICE);
1752 td_info->skb_dma[i] = 0;
1753 }
3c4dc711 1754 }
2cf71d2e
DJ
1755 dev_kfree_skb(td_info->skb);
1756 td_info->skb = NULL;
3c4dc711 1757 }
1da177e4
LT
1758}
1759
1760/**
2cf71d2e
DJ
1761 * velocity_free_td_ring - free td ring
1762 * @vptr: velocity
1da177e4 1763 *
2cf71d2e
DJ
1764 * Free up the transmit ring for this particular velocity adapter.
1765 * We free the ring contents but not the ring itself.
1766 */
1767static void velocity_free_td_ring(struct velocity_info *vptr)
1768{
1769 int i, j;
1da177e4 1770
2cf71d2e
DJ
1771 for (j = 0; j < vptr->tx.numq; j++) {
1772 if (vptr->tx.infos[j] == NULL)
1773 continue;
1774 for (i = 0; i < vptr->options.numtx; i++)
1775 velocity_free_td_ring_entry(vptr, j, i);
6aa20a22 1776
2cf71d2e
DJ
1777 kfree(vptr->tx.infos[j]);
1778 vptr->tx.infos[j] = NULL;
1779 }
1780}
6aa20a22 1781
1da177e4 1782
2cf71d2e
DJ
1783static void velocity_free_rings(struct velocity_info *vptr)
1784{
1785 velocity_free_td_ring(vptr);
1786 velocity_free_rd_ring(vptr);
1787 velocity_free_dma_rings(vptr);
1da177e4
LT
1788}
1789
1790/**
2cf71d2e
DJ
1791 * velocity_error - handle error from controller
1792 * @vptr: velocity
1793 * @status: card status
1794 *
1795 * Process an error report from the hardware and attempt to recover
1796 * the card itself. At the moment we cannot recover from some
1797 * theoretically impossible errors but this could be fixed using
1798 * the pci_device_failed logic to bounce the hardware
1da177e4 1799 *
1da177e4 1800 */
2cf71d2e 1801static void velocity_error(struct velocity_info *vptr, int status)
1da177e4 1802{
580a6902 1803
2cf71d2e
DJ
1804 if (status & ISR_TXSTLI) {
1805 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1806
2cf71d2e
DJ
1807 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1808 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1809 writew(TRDCSR_RUN, &regs->TDCSRClr);
1810 netif_stop_queue(vptr->dev);
1da177e4 1811
2cf71d2e
DJ
1812 /* FIXME: port over the pci_device_failed code and use it
1813 here */
1814 }
1da177e4 1815
2cf71d2e
DJ
1816 if (status & ISR_SRCI) {
1817 struct mac_regs __iomem *regs = vptr->mac_regs;
1818 int linked;
1da177e4 1819
2cf71d2e
DJ
1820 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1821 vptr->mii_status = check_connection_type(regs);
1da177e4 1822
2cf71d2e
DJ
1823 /*
1824 * If it is a 3119, disable frame bursting in
1825 * halfduplex mode and enable it in fullduplex
1826 * mode
1827 */
1828 if (vptr->rev_id < REV_ID_VT3216_A0) {
0527a1a8 1829 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2cf71d2e
DJ
1830 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1831 else
1832 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1833 }
1834 /*
1835 * Only enable CD heart beat counter in 10HD mode
1836 */
1837 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1838 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1839 else
1840 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
6dfc4b95
SK
1841
1842 setup_queue_timers(vptr);
2cf71d2e
DJ
1843 }
1844 /*
1845 * Get link status from PHYSR0
1846 */
1847 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1da177e4 1848
2cf71d2e
DJ
1849 if (linked) {
1850 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
1851 netif_carrier_on(vptr->dev);
1852 } else {
1853 vptr->mii_status |= VELOCITY_LINK_FAIL;
1854 netif_carrier_off(vptr->dev);
1855 }
1da177e4 1856
2cf71d2e
DJ
1857 velocity_print_link_status(vptr);
1858 enable_flow_control_ability(vptr);
1da177e4 1859
2cf71d2e
DJ
1860 /*
1861 * Re-enable auto-polling because SRCI will disable
1862 * auto-polling
1863 */
1da177e4 1864
2cf71d2e 1865 enable_mii_autopoll(regs);
1da177e4 1866
2cf71d2e
DJ
1867 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1868 netif_stop_queue(vptr->dev);
1869 else
1870 netif_wake_queue(vptr->dev);
1da177e4 1871
2cf71d2e
DJ
1872 };
1873 if (status & ISR_MIBFI)
1874 velocity_update_hw_mibs(vptr);
1875 if (status & ISR_LSTEI)
1876 mac_rx_queue_wake(vptr->mac_regs);
1da177e4
LT
1877}
1878
1879/**
2cf71d2e
DJ
1880 * tx_srv - transmit interrupt service
1881 * @vptr; Velocity
1da177e4 1882 *
2cf71d2e
DJ
1883 * Scan the queues looking for transmitted packets that
1884 * we can complete and clean up. Update any statistics as
1885 * necessary/
1da177e4 1886 */
d6cade0f 1887static int velocity_tx_srv(struct velocity_info *vptr)
1da177e4 1888{
2cf71d2e
DJ
1889 struct tx_desc *td;
1890 int qnum;
1891 int full = 0;
1892 int idx;
1893 int works = 0;
1894 struct velocity_td_info *tdinfo;
1895 struct net_device_stats *stats = &vptr->dev->stats;
1da177e4 1896
2cf71d2e
DJ
1897 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1898 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1899 idx = (idx + 1) % vptr->options.numtx) {
1da177e4 1900
2cf71d2e
DJ
1901 /*
1902 * Get Tx Descriptor
1903 */
1904 td = &(vptr->tx.rings[qnum][idx]);
1905 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1906
2cf71d2e
DJ
1907 if (td->tdesc0.len & OWNED_BY_NIC)
1908 break;
1da177e4 1909
2cf71d2e
DJ
1910 if ((works++ > 15))
1911 break;
1912
1913 if (td->tdesc0.TSR & TSR0_TERR) {
1914 stats->tx_errors++;
1915 stats->tx_dropped++;
1916 if (td->tdesc0.TSR & TSR0_CDH)
1917 stats->tx_heartbeat_errors++;
1918 if (td->tdesc0.TSR & TSR0_CRS)
1919 stats->tx_carrier_errors++;
1920 if (td->tdesc0.TSR & TSR0_ABT)
1921 stats->tx_aborted_errors++;
1922 if (td->tdesc0.TSR & TSR0_OWC)
1923 stats->tx_window_errors++;
1924 } else {
1925 stats->tx_packets++;
1926 stats->tx_bytes += tdinfo->skb->len;
1927 }
c79992fd 1928 velocity_free_tx_buf(vptr, tdinfo, td);
2cf71d2e
DJ
1929 vptr->tx.used[qnum]--;
1930 }
1931 vptr->tx.tail[qnum] = idx;
1da177e4 1932
2cf71d2e
DJ
1933 if (AVAIL_TD(vptr, qnum) < 1)
1934 full = 1;
1935 }
1da177e4 1936 /*
2cf71d2e
DJ
1937 * Look to see if we should kick the transmit network
1938 * layer for more work.
1da177e4 1939 */
8e95a202
JP
1940 if (netif_queue_stopped(vptr->dev) && (full == 0) &&
1941 (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
2cf71d2e
DJ
1942 netif_wake_queue(vptr->dev);
1943 }
1944 return works;
1945}
1946
1947/**
1948 * velocity_rx_csum - checksum process
1949 * @rd: receive packet descriptor
1950 * @skb: network layer packet buffer
1951 *
1952 * Process the status bits for the received packet and determine
1953 * if the checksum was computed and verified by the hardware
1954 */
1955static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1956{
1957 skb->ip_summed = CHECKSUM_NONE;
6aa20a22 1958
2cf71d2e
DJ
1959 if (rd->rdesc1.CSM & CSM_IPKT) {
1960 if (rd->rdesc1.CSM & CSM_IPOK) {
1961 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1962 (rd->rdesc1.CSM & CSM_UDPKT)) {
1963 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1964 return;
1965 }
1966 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4
LT
1967 }
1968 }
1da177e4
LT
1969}
1970
1da177e4 1971/**
2cf71d2e
DJ
1972 * velocity_rx_copy - in place Rx copy for small packets
1973 * @rx_skb: network layer packet buffer candidate
1974 * @pkt_size: received data size
1975 * @rd: receive packet descriptor
1da177e4
LT
1976 * @dev: network device
1977 *
2cf71d2e
DJ
1978 * Replace the current skb that is scheduled for Rx processing by a
1979 * shorter, immediatly allocated skb, if the received packet is small
1980 * enough. This function returns a negative value if the received
1981 * packet is too big or if memory is exhausted.
1da177e4 1982 */
2cf71d2e
DJ
1983static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1984 struct velocity_info *vptr)
1da177e4 1985{
2cf71d2e
DJ
1986 int ret = -1;
1987 if (pkt_size < rx_copybreak) {
1988 struct sk_buff *new_skb;
1da177e4 1989
89d71a66 1990 new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
2cf71d2e
DJ
1991 if (new_skb) {
1992 new_skb->ip_summed = rx_skb[0]->ip_summed;
2cf71d2e
DJ
1993 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1994 *rx_skb = new_skb;
1995 ret = 0;
1da177e4
LT
1996 }
1997
1da177e4 1998 }
2cf71d2e 1999 return ret;
1da177e4
LT
2000}
2001
2002/**
2cf71d2e
DJ
2003 * velocity_iph_realign - IP header alignment
2004 * @vptr: velocity we are handling
2005 * @skb: network layer packet buffer
2006 * @pkt_size: received data size
1da177e4 2007 *
2cf71d2e
DJ
2008 * Align IP header on a 2 bytes boundary. This behavior can be
2009 * configured by the user.
1da177e4 2010 */
2cf71d2e
DJ
2011static inline void velocity_iph_realign(struct velocity_info *vptr,
2012 struct sk_buff *skb, int pkt_size)
1da177e4 2013{
2cf71d2e
DJ
2014 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
2015 memmove(skb->data + 2, skb->data, pkt_size);
2016 skb_reserve(skb, 2);
2017 }
2018}
6aa20a22 2019
1da177e4 2020
2cf71d2e
DJ
2021/**
2022 * velocity_receive_frame - received packet processor
2023 * @vptr: velocity we are handling
2024 * @idx: ring index
2025 *
2026 * A packet has arrived. We process the packet and if appropriate
2027 * pass the frame up the network stack
2028 */
2029static int velocity_receive_frame(struct velocity_info *vptr, int idx)
2030{
2031 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
2032 struct net_device_stats *stats = &vptr->dev->stats;
2033 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
2034 struct rx_desc *rd = &(vptr->rx.ring[idx]);
2035 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
2036 struct sk_buff *skb;
1da177e4 2037
2cf71d2e
DJ
2038 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
2039 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
2040 stats->rx_length_errors++;
2041 return -EINVAL;
2042 }
1da177e4 2043
2cf71d2e
DJ
2044 if (rd->rdesc0.RSR & RSR_MAR)
2045 stats->multicast++;
1da177e4 2046
2cf71d2e 2047 skb = rd_info->skb;
1da177e4 2048
2cf71d2e
DJ
2049 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
2050 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1da177e4 2051
2cf71d2e
DJ
2052 /*
2053 * Drop frame not meeting IEEE 802.3
2054 */
1da177e4 2055
2cf71d2e
DJ
2056 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
2057 if (rd->rdesc0.RSR & RSR_RL) {
2058 stats->rx_length_errors++;
2059 return -EINVAL;
2060 }
2061 }
6aa20a22 2062
2cf71d2e 2063 pci_action = pci_dma_sync_single_for_device;
1da177e4 2064
2cf71d2e 2065 velocity_rx_csum(rd, skb);
6aa20a22 2066
2cf71d2e
DJ
2067 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2068 velocity_iph_realign(vptr, skb, pkt_len);
2069 pci_action = pci_unmap_single;
2070 rd_info->skb = NULL;
2071 }
6aa20a22 2072
2cf71d2e
DJ
2073 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
2074 PCI_DMA_FROMDEVICE);
1da177e4 2075
2cf71d2e
DJ
2076 skb_put(skb, pkt_len - 4);
2077 skb->protocol = eth_type_trans(skb, vptr->dev);
2078
2079 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
2080 vlan_hwaccel_rx(skb, vptr->vlgrp,
2081 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
2082 } else
2083 netif_rx(skb);
6aa20a22 2084
2cf71d2e 2085 stats->rx_bytes += pkt_len;
6aa20a22 2086
2cf71d2e 2087 return 0;
1da177e4
LT
2088}
2089
1da177e4
LT
2090
2091/**
2cf71d2e
DJ
2092 * velocity_rx_srv - service RX interrupt
2093 * @vptr: velocity
1da177e4 2094 *
2cf71d2e
DJ
2095 * Walk the receive ring of the velocity adapter and remove
2096 * any received packets from the receive queue. Hand the ring
2097 * slots back to the adapter for reuse.
1da177e4 2098 */
d6cade0f 2099static int velocity_rx_srv(struct velocity_info *vptr, int budget_left)
1da177e4 2100{
2cf71d2e
DJ
2101 struct net_device_stats *stats = &vptr->dev->stats;
2102 int rd_curr = vptr->rx.curr;
2103 int works = 0;
2104
dfff7144 2105 while (works < budget_left) {
2cf71d2e
DJ
2106 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2107
2108 if (!vptr->rx.info[rd_curr].skb)
2109 break;
2110
2111 if (rd->rdesc0.len & OWNED_BY_NIC)
2112 break;
2113
2114 rmb();
1da177e4 2115
2cf71d2e
DJ
2116 /*
2117 * Don't drop CE or RL error frame although RXOK is off
2118 */
2119 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2120 if (velocity_receive_frame(vptr, rd_curr) < 0)
2121 stats->rx_dropped++;
2122 } else {
2123 if (rd->rdesc0.RSR & RSR_CRC)
2124 stats->rx_crc_errors++;
2125 if (rd->rdesc0.RSR & RSR_FAE)
2126 stats->rx_frame_errors++;
1da177e4 2127
2cf71d2e
DJ
2128 stats->rx_dropped++;
2129 }
6aa20a22 2130
2cf71d2e 2131 rd->size |= RX_INTEN;
1da177e4 2132
2cf71d2e
DJ
2133 rd_curr++;
2134 if (rd_curr >= vptr->options.numrx)
2135 rd_curr = 0;
dfff7144
SK
2136 works++;
2137 }
1da177e4 2138
2cf71d2e 2139 vptr->rx.curr = rd_curr;
1da177e4 2140
2cf71d2e
DJ
2141 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2142 velocity_give_many_rx_descs(vptr);
2143
2144 VAR_USED(stats);
2145 return works;
2146}
6aa20a22 2147
dfff7144
SK
2148static int velocity_poll(struct napi_struct *napi, int budget)
2149{
2150 struct velocity_info *vptr = container_of(napi,
2151 struct velocity_info, napi);
2152 unsigned int rx_done;
3f2e8d9f 2153 unsigned long flags;
dfff7144 2154
3f2e8d9f 2155 spin_lock_irqsave(&vptr->lock, flags);
dfff7144
SK
2156 /*
2157 * Do rx and tx twice for performance (taken from the VIA
2158 * out-of-tree driver).
2159 */
d6cade0f
SK
2160 rx_done = velocity_rx_srv(vptr, budget / 2);
2161 velocity_tx_srv(vptr);
2162 rx_done += velocity_rx_srv(vptr, budget - rx_done);
2163 velocity_tx_srv(vptr);
dfff7144
SK
2164
2165 /* If budget not fully consumed, exit the polling mode */
2166 if (rx_done < budget) {
2167 napi_complete(napi);
2168 mac_enable_int(vptr->mac_regs);
2169 }
3f2e8d9f 2170 spin_unlock_irqrestore(&vptr->lock, flags);
dfff7144
SK
2171
2172 return rx_done;
2173}
6aa20a22 2174
1da177e4 2175/**
2cf71d2e
DJ
2176 * velocity_intr - interrupt callback
2177 * @irq: interrupt number
2178 * @dev_instance: interrupting device
1da177e4 2179 *
2cf71d2e
DJ
2180 * Called whenever an interrupt is generated by the velocity
2181 * adapter IRQ line. We may not be the source of the interrupt
2182 * and need to identify initially if we are, and if not exit as
2183 * efficiently as possible.
1da177e4 2184 */
2cf71d2e 2185static irqreturn_t velocity_intr(int irq, void *dev_instance)
1da177e4 2186{
2cf71d2e
DJ
2187 struct net_device *dev = dev_instance;
2188 struct velocity_info *vptr = netdev_priv(dev);
2189 u32 isr_status;
1da177e4 2190
2cf71d2e
DJ
2191 spin_lock(&vptr->lock);
2192 isr_status = mac_read_isr(vptr->mac_regs);
2193
2194 /* Not us ? */
2195 if (isr_status == 0) {
2196 spin_unlock(&vptr->lock);
2197 return IRQ_NONE;
1da177e4 2198 }
1da177e4 2199
3f2e8d9f
SK
2200 /* Ack the interrupt */
2201 mac_write_isr(vptr->mac_regs, isr_status);
2202
dfff7144
SK
2203 if (likely(napi_schedule_prep(&vptr->napi))) {
2204 mac_disable_int(vptr->mac_regs);
2205 __napi_schedule(&vptr->napi);
1da177e4 2206 }
3f2e8d9f
SK
2207
2208 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2209 velocity_error(vptr, isr_status);
2210
2cf71d2e 2211 spin_unlock(&vptr->lock);
2cf71d2e 2212
dfff7144 2213 return IRQ_HANDLED;
1da177e4
LT
2214}
2215
2216/**
2cf71d2e
DJ
2217 * velocity_open - interface activation callback
2218 * @dev: network layer device to open
1da177e4 2219 *
2cf71d2e
DJ
2220 * Called when the network layer brings the interface up. Returns
2221 * a negative posix error code on failure, or zero on success.
2222 *
2223 * All the ring allocation and set up is done on open for this
2224 * adapter to minimise memory usage when inactive
1da177e4 2225 */
2cf71d2e 2226static int velocity_open(struct net_device *dev)
1da177e4 2227{
2cf71d2e
DJ
2228 struct velocity_info *vptr = netdev_priv(dev);
2229 int ret;
1da177e4 2230
2cf71d2e
DJ
2231 ret = velocity_init_rings(vptr, dev->mtu);
2232 if (ret < 0)
2233 goto out;
1da177e4 2234
2cf71d2e
DJ
2235 /* Ensure chip is running */
2236 pci_set_power_state(vptr->pdev, PCI_D0);
1da177e4 2237
2cf71d2e
DJ
2238 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2239
1ede9b52 2240 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
2cf71d2e
DJ
2241 dev->name, dev);
2242 if (ret < 0) {
2243 /* Power down the chip */
2244 pci_set_power_state(vptr->pdev, PCI_D3hot);
2245 velocity_free_rings(vptr);
2246 goto out;
1da177e4
LT
2247 }
2248
35bb5cad
BH
2249 velocity_give_many_rx_descs(vptr);
2250
2cf71d2e
DJ
2251 mac_enable_int(vptr->mac_regs);
2252 netif_start_queue(dev);
dfff7144 2253 napi_enable(&vptr->napi);
2cf71d2e
DJ
2254 vptr->flags |= VELOCITY_FLAGS_OPENED;
2255out:
2256 return ret;
1da177e4
LT
2257}
2258
2259/**
2cf71d2e
DJ
2260 * velocity_shutdown - shut down the chip
2261 * @vptr: velocity to deactivate
1da177e4 2262 *
2cf71d2e
DJ
2263 * Shuts down the internal operations of the velocity and
2264 * disables interrupts, autopolling, transmit and receive
1da177e4 2265 */
2cf71d2e 2266static void velocity_shutdown(struct velocity_info *vptr)
1da177e4 2267{
2cf71d2e
DJ
2268 struct mac_regs __iomem *regs = vptr->mac_regs;
2269 mac_disable_int(regs);
2270 writel(CR0_STOP, &regs->CR0Set);
2271 writew(0xFFFF, &regs->TDCSRClr);
2272 writeb(0xFF, &regs->RDCSRClr);
1da177e4 2273 safe_disable_mii_autopoll(regs);
2cf71d2e
DJ
2274 mac_clear_isr(regs);
2275}
1da177e4 2276
2cf71d2e
DJ
2277/**
2278 * velocity_change_mtu - MTU change callback
2279 * @dev: network device
2280 * @new_mtu: desired MTU
2281 *
2282 * Handle requests from the networking layer for MTU change on
2283 * this interface. It gets called on a change by the network layer.
2284 * Return zero for success or negative posix error code.
2285 */
2286static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2287{
2288 struct velocity_info *vptr = netdev_priv(dev);
2289 int ret = 0;
1da177e4 2290
2cf71d2e
DJ
2291 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2292 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
2293 vptr->dev->name);
2294 ret = -EINVAL;
2295 goto out_0;
2296 }
1da177e4 2297
2cf71d2e
DJ
2298 if (!netif_running(dev)) {
2299 dev->mtu = new_mtu;
2300 goto out_0;
1da177e4
LT
2301 }
2302
2cf71d2e
DJ
2303 if (dev->mtu != new_mtu) {
2304 struct velocity_info *tmp_vptr;
2305 unsigned long flags;
2306 struct rx_info rx;
2307 struct tx_info tx;
1da177e4 2308
2cf71d2e
DJ
2309 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2310 if (!tmp_vptr) {
2311 ret = -ENOMEM;
2312 goto out_0;
2313 }
1da177e4 2314
2cf71d2e
DJ
2315 tmp_vptr->dev = dev;
2316 tmp_vptr->pdev = vptr->pdev;
2317 tmp_vptr->options = vptr->options;
2318 tmp_vptr->tx.numq = vptr->tx.numq;
6aa20a22 2319
2cf71d2e
DJ
2320 ret = velocity_init_rings(tmp_vptr, new_mtu);
2321 if (ret < 0)
2322 goto out_free_tmp_vptr_1;
1da177e4 2323
2cf71d2e 2324 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2325
2cf71d2e
DJ
2326 netif_stop_queue(dev);
2327 velocity_shutdown(vptr);
1da177e4 2328
2cf71d2e
DJ
2329 rx = vptr->rx;
2330 tx = vptr->tx;
1da177e4 2331
2cf71d2e
DJ
2332 vptr->rx = tmp_vptr->rx;
2333 vptr->tx = tmp_vptr->tx;
1da177e4 2334
2cf71d2e
DJ
2335 tmp_vptr->rx = rx;
2336 tmp_vptr->tx = tx;
1da177e4 2337
2cf71d2e 2338 dev->mtu = new_mtu;
6aa20a22 2339
2cf71d2e 2340 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1da177e4 2341
35bb5cad
BH
2342 velocity_give_many_rx_descs(vptr);
2343
2cf71d2e
DJ
2344 mac_enable_int(vptr->mac_regs);
2345 netif_start_queue(dev);
6aa20a22 2346
2cf71d2e 2347 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2348
2cf71d2e 2349 velocity_free_rings(tmp_vptr);
1da177e4 2350
2cf71d2e
DJ
2351out_free_tmp_vptr_1:
2352 kfree(tmp_vptr);
2353 }
2354out_0:
2355 return ret;
1da177e4 2356}
1da177e4
LT
2357
2358/**
2cf71d2e
DJ
2359 * velocity_mii_ioctl - MII ioctl handler
2360 * @dev: network device
2361 * @ifr: the ifreq block for the ioctl
2362 * @cmd: the command
1da177e4 2363 *
2cf71d2e
DJ
2364 * Process MII requests made via ioctl from the network layer. These
2365 * are used by tools like kudzu to interrogate the link state of the
2366 * hardware
1da177e4 2367 */
2cf71d2e 2368static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1da177e4 2369{
2cf71d2e
DJ
2370 struct velocity_info *vptr = netdev_priv(dev);
2371 struct mac_regs __iomem *regs = vptr->mac_regs;
2372 unsigned long flags;
2373 struct mii_ioctl_data *miidata = if_mii(ifr);
2374 int err;
1da177e4 2375
2cf71d2e
DJ
2376 switch (cmd) {
2377 case SIOCGMIIPHY:
2378 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
1da177e4 2379 break;
2cf71d2e 2380 case SIOCGMIIREG:
2cf71d2e
DJ
2381 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2382 return -ETIMEDOUT;
1da177e4 2383 break;
2cf71d2e 2384 case SIOCSMIIREG:
2cf71d2e
DJ
2385 spin_lock_irqsave(&vptr->lock, flags);
2386 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2387 spin_unlock_irqrestore(&vptr->lock, flags);
2388 check_connection_type(vptr->mac_regs);
2389 if (err)
2390 return err;
1da177e4
LT
2391 break;
2392 default:
2cf71d2e 2393 return -EOPNOTSUPP;
1da177e4 2394 }
2cf71d2e 2395 return 0;
1da177e4
LT
2396}
2397
2cf71d2e 2398
1da177e4 2399/**
2cf71d2e
DJ
2400 * velocity_ioctl - ioctl entry point
2401 * @dev: network device
2402 * @rq: interface request ioctl
2403 * @cmd: command code
1da177e4 2404 *
2cf71d2e
DJ
2405 * Called when the user issues an ioctl request to the network
2406 * device in question. The velocity interface supports MII.
1da177e4 2407 */
2cf71d2e
DJ
2408static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2409{
2410 struct velocity_info *vptr = netdev_priv(dev);
2411 int ret;
6aa20a22 2412
2cf71d2e
DJ
2413 /* If we are asked for information and the device is power
2414 saving then we need to bring the device back up to talk to it */
1da177e4 2415
2cf71d2e
DJ
2416 if (!netif_running(dev))
2417 pci_set_power_state(vptr->pdev, PCI_D0);
1da177e4 2418
2cf71d2e
DJ
2419 switch (cmd) {
2420 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2421 case SIOCGMIIREG: /* Read MII PHY register. */
2422 case SIOCSMIIREG: /* Write to MII PHY register. */
2423 ret = velocity_mii_ioctl(dev, rq, cmd);
2424 break;
1da177e4 2425
2cf71d2e
DJ
2426 default:
2427 ret = -EOPNOTSUPP;
2428 }
2429 if (!netif_running(dev))
2430 pci_set_power_state(vptr->pdev, PCI_D3hot);
1da177e4 2431
c4067400 2432
2cf71d2e 2433 return ret;
1da177e4
LT
2434}
2435
2436/**
2cf71d2e
DJ
2437 * velocity_get_status - statistics callback
2438 * @dev: network device
1da177e4 2439 *
2cf71d2e
DJ
2440 * Callback from the network layer to allow driver statistics
2441 * to be resynchronized with hardware collected state. In the
2442 * case of the velocity we need to pull the MIB counters from
2443 * the hardware into the counters before letting the network
2444 * layer display them.
1da177e4 2445 */
2cf71d2e 2446static struct net_device_stats *velocity_get_stats(struct net_device *dev)
1da177e4 2447{
2cf71d2e 2448 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2449
2cf71d2e
DJ
2450 /* If the hardware is down, don't touch MII */
2451 if (!netif_running(dev))
2452 return &dev->stats;
1da177e4 2453
2cf71d2e
DJ
2454 spin_lock_irq(&vptr->lock);
2455 velocity_update_hw_mibs(vptr);
2456 spin_unlock_irq(&vptr->lock);
1da177e4 2457
2cf71d2e
DJ
2458 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2459 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2460 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
1da177e4 2461
2cf71d2e
DJ
2462// unsigned long rx_dropped; /* no space in linux buffers */
2463 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2464 /* detailed rx_errors: */
2465// unsigned long rx_length_errors;
2466// unsigned long rx_over_errors; /* receiver ring buff overflow */
2467 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2468// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2469// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2470// unsigned long rx_missed_errors; /* receiver missed packet */
2471
2472 /* detailed tx_errors */
2473// unsigned long tx_fifo_errors;
2474
2475 return &dev->stats;
1da177e4
LT
2476}
2477
2cf71d2e
DJ
2478/**
2479 * velocity_close - close adapter callback
2480 * @dev: network device
2481 *
2482 * Callback from the network layer when the velocity is being
2483 * deactivated by the network layer
2484 */
2485static int velocity_close(struct net_device *dev)
1da177e4 2486{
2cf71d2e 2487 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2488
dfff7144 2489 napi_disable(&vptr->napi);
2cf71d2e
DJ
2490 netif_stop_queue(dev);
2491 velocity_shutdown(vptr);
1da177e4 2492
2cf71d2e
DJ
2493 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2494 velocity_get_ip(vptr);
2495 if (dev->irq != 0)
2496 free_irq(dev->irq, dev);
1da177e4 2497
2cf71d2e
DJ
2498 /* Power down the chip */
2499 pci_set_power_state(vptr->pdev, PCI_D3hot);
1da177e4 2500
2cf71d2e 2501 velocity_free_rings(vptr);
1da177e4 2502
2cf71d2e
DJ
2503 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2504 return 0;
1da177e4
LT
2505}
2506
2507/**
2cf71d2e
DJ
2508 * velocity_xmit - transmit packet callback
2509 * @skb: buffer to transmit
2510 * @dev: network device
1da177e4 2511 *
2cf71d2e
DJ
2512 * Called by the networ layer to request a packet is queued to
2513 * the velocity. Returns zero on success.
1da177e4 2514 */
61357325
SH
2515static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2516 struct net_device *dev)
1da177e4 2517{
2cf71d2e
DJ
2518 struct velocity_info *vptr = netdev_priv(dev);
2519 int qnum = 0;
2520 struct tx_desc *td_ptr;
2521 struct velocity_td_info *tdinfo;
2522 unsigned long flags;
2523 int pktlen;
c79992fd
SK
2524 int index, prev;
2525 int i = 0;
1da177e4 2526
2cf71d2e
DJ
2527 if (skb_padto(skb, ETH_ZLEN))
2528 goto out;
1da177e4 2529
c79992fd
SK
2530 /* The hardware can handle at most 7 memory segments, so merge
2531 * the skb if there are more */
2532 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2533 kfree_skb(skb);
2534 return NETDEV_TX_OK;
2535 }
2536
2537 pktlen = skb_shinfo(skb)->nr_frags == 0 ?
2538 max_t(unsigned int, skb->len, ETH_ZLEN) :
2539 skb_headlen(skb);
1da177e4 2540
2cf71d2e 2541 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2542
2cf71d2e
DJ
2543 index = vptr->tx.curr[qnum];
2544 td_ptr = &(vptr->tx.rings[qnum][index]);
2545 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2546
2cf71d2e
DJ
2547 td_ptr->tdesc1.TCR = TCR0_TIC;
2548 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2549
2cf71d2e
DJ
2550 /*
2551 * Map the linear network buffer into PCI space and
2552 * add it to the transmit ring.
2553 */
2554 tdinfo->skb = skb;
2555 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
c79992fd 2556 td_ptr->tdesc0.len = cpu_to_le16(pktlen);
2cf71d2e
DJ
2557 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2558 td_ptr->td_buf[0].pa_high = 0;
c79992fd
SK
2559 td_ptr->td_buf[0].size = cpu_to_le16(pktlen);
2560
2561 /* Handle fragments */
2562 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2563 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2564
2565 tdinfo->skb_dma[i + 1] = pci_map_page(vptr->pdev, frag->page,
2566 frag->page_offset, frag->size,
2567 PCI_DMA_TODEVICE);
2568
2569 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2570 td_ptr->td_buf[i + 1].pa_high = 0;
2571 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
2572 }
2573 tdinfo->nskb_dma = i + 1;
2cf71d2e
DJ
2574
2575 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2576
2577 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
2578 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2579 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2580 }
2581
2582 /*
2583 * Handle hardware checksum
2584 */
8e95a202
JP
2585 if ((dev->features & NETIF_F_IP_CSUM) &&
2586 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2cf71d2e
DJ
2587 const struct iphdr *ip = ip_hdr(skb);
2588 if (ip->protocol == IPPROTO_TCP)
2589 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2590 else if (ip->protocol == IPPROTO_UDP)
2591 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2592 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2593 }
1da177e4 2594
c79992fd
SK
2595 prev = index - 1;
2596 if (prev < 0)
2597 prev = vptr->options.numtx - 1;
2598 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2599 vptr->tx.used[qnum]++;
2600 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4 2601
c79992fd
SK
2602 if (AVAIL_TD(vptr, qnum) < 1)
2603 netif_stop_queue(dev);
1da177e4 2604
c79992fd
SK
2605 td_ptr = &(vptr->tx.rings[qnum][prev]);
2606 td_ptr->td_buf[0].size |= TD_QUEUE;
2607 mac_tx_queue_wake(vptr->mac_regs, qnum);
1da177e4 2608
2cf71d2e
DJ
2609 spin_unlock_irqrestore(&vptr->lock, flags);
2610out:
2611 return NETDEV_TX_OK;
1da177e4
LT
2612}
2613
2614
2cf71d2e
DJ
2615static const struct net_device_ops velocity_netdev_ops = {
2616 .ndo_open = velocity_open,
2617 .ndo_stop = velocity_close,
2618 .ndo_start_xmit = velocity_xmit,
2619 .ndo_get_stats = velocity_get_stats,
2620 .ndo_validate_addr = eth_validate_addr,
2621 .ndo_set_mac_address = eth_mac_addr,
2622 .ndo_set_multicast_list = velocity_set_multi,
2623 .ndo_change_mtu = velocity_change_mtu,
2624 .ndo_do_ioctl = velocity_ioctl,
2625 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2626 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
2627 .ndo_vlan_rx_register = velocity_vlan_rx_register,
2628};
2629
1da177e4 2630/**
2cf71d2e
DJ
2631 * velocity_init_info - init private data
2632 * @pdev: PCI device
2633 * @vptr: Velocity info
2634 * @info: Board type
1da177e4 2635 *
2cf71d2e
DJ
2636 * Set up the initial velocity_info struct for the device that has been
2637 * discovered.
1da177e4 2638 */
2cf71d2e
DJ
2639static void __devinit velocity_init_info(struct pci_dev *pdev,
2640 struct velocity_info *vptr,
2641 const struct velocity_info_tbl *info)
1da177e4 2642{
2cf71d2e
DJ
2643 memset(vptr, 0, sizeof(struct velocity_info));
2644
2645 vptr->pdev = pdev;
2646 vptr->chip_id = info->chip_id;
2647 vptr->tx.numq = info->txqueue;
2648 vptr->multicast_limit = MCAM_SIZE;
2649 spin_lock_init(&vptr->lock);
6aa20a22 2650}
1da177e4
LT
2651
2652/**
2cf71d2e
DJ
2653 * velocity_get_pci_info - retrieve PCI info for device
2654 * @vptr: velocity device
2655 * @pdev: PCI device it matches
1da177e4 2656 *
2cf71d2e
DJ
2657 * Retrieve the PCI configuration space data that interests us from
2658 * the kernel PCI layer
1da177e4 2659 */
2cf71d2e 2660static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1da177e4 2661{
2cf71d2e 2662 vptr->rev_id = pdev->revision;
1da177e4 2663
2cf71d2e 2664 pci_set_master(pdev);
1da177e4 2665
2cf71d2e
DJ
2666 vptr->ioaddr = pci_resource_start(pdev, 0);
2667 vptr->memaddr = pci_resource_start(pdev, 1);
1da177e4 2668
2cf71d2e
DJ
2669 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2670 dev_err(&pdev->dev,
2671 "region #0 is not an I/O resource, aborting.\n");
2672 return -EINVAL;
2673 }
2674
2675 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2676 dev_err(&pdev->dev,
2677 "region #1 is an I/O resource, aborting.\n");
2678 return -EINVAL;
2679 }
2680
2681 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2682 dev_err(&pdev->dev, "region #1 is too small.\n");
2683 return -EINVAL;
2684 }
2685 vptr->pdev = pdev;
6aa20a22 2686
1da177e4
LT
2687 return 0;
2688}
2689
2cf71d2e
DJ
2690/**
2691 * velocity_print_info - per driver data
2692 * @vptr: velocity
2693 *
2694 * Print per driver data as the kernel driver finds Velocity
2695 * hardware
2696 */
2697static void __devinit velocity_print_info(struct velocity_info *vptr)
1da177e4 2698{
2cf71d2e 2699 struct net_device *dev = vptr->dev;
1da177e4 2700
2cf71d2e 2701 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
aa7c68a5
HS
2702 printk(KERN_INFO "%s: Ethernet Address: %pM\n",
2703 dev->name, dev->dev_addr);
1da177e4
LT
2704}
2705
2706static u32 velocity_get_link(struct net_device *dev)
2707{
8ab6f3f7 2708 struct velocity_info *vptr = netdev_priv(dev);
c4067400 2709 struct mac_regs __iomem *regs = vptr->mac_regs;
59b693fb 2710 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT
2711}
2712
1da177e4 2713
2cf71d2e
DJ
2714/**
2715 * velocity_found1 - set up discovered velocity card
2716 * @pdev: PCI device
2717 * @ent: PCI device table entry that matched
2718 *
2719 * Configure a discovered adapter from scratch. Return a negative
2720 * errno error code on failure paths.
2721 */
2722static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 2723{
2cf71d2e
DJ
2724 static int first = 1;
2725 struct net_device *dev;
2726 int i;
2727 const char *drv_string;
2728 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
2729 struct velocity_info *vptr;
2730 struct mac_regs __iomem *regs;
2731 int ret = -ENOMEM;
1da177e4 2732
2cf71d2e
DJ
2733 /* FIXME: this driver, like almost all other ethernet drivers,
2734 * can support more than MAX_UNITS.
2735 */
2736 if (velocity_nics >= MAX_UNITS) {
2737 dev_notice(&pdev->dev, "already found %d NICs.\n",
2738 velocity_nics);
2739 return -ENODEV;
2740 }
1da177e4 2741
2cf71d2e
DJ
2742 dev = alloc_etherdev(sizeof(struct velocity_info));
2743 if (!dev) {
2744 dev_err(&pdev->dev, "allocate net device failed.\n");
2745 goto out;
2746 }
1da177e4 2747
2cf71d2e 2748 /* Chain it all together */
1da177e4 2749
2cf71d2e
DJ
2750 SET_NETDEV_DEV(dev, &pdev->dev);
2751 vptr = netdev_priv(dev);
2752
2753
2754 if (first) {
2755 printk(KERN_INFO "%s Ver. %s\n",
2756 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2757 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2758 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2759 first = 0;
2760 }
2761
2762 velocity_init_info(pdev, vptr, info);
2763
2764 vptr->dev = dev;
2765
2cf71d2e
DJ
2766 ret = pci_enable_device(pdev);
2767 if (ret < 0)
2768 goto err_free_dev;
2769
889635fd
KV
2770 dev->irq = pdev->irq;
2771
2cf71d2e
DJ
2772 ret = velocity_get_pci_info(vptr, pdev);
2773 if (ret < 0) {
2774 /* error message already printed */
2775 goto err_disable;
1da177e4 2776 }
2cf71d2e
DJ
2777
2778 ret = pci_request_regions(pdev, VELOCITY_NAME);
2779 if (ret < 0) {
2780 dev_err(&pdev->dev, "No PCI resources.\n");
2781 goto err_disable;
1da177e4 2782 }
2cf71d2e
DJ
2783
2784 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2785 if (regs == NULL) {
2786 ret = -EIO;
2787 goto err_release_res;
1da177e4 2788 }
1da177e4 2789
2cf71d2e 2790 vptr->mac_regs = regs;
1da177e4 2791
2cf71d2e 2792 mac_wol_reset(regs);
1da177e4 2793
2cf71d2e 2794 dev->base_addr = vptr->ioaddr;
1da177e4 2795
2cf71d2e
DJ
2796 for (i = 0; i < 6; i++)
2797 dev->dev_addr[i] = readb(&regs->PAR[i]);
6aa20a22 2798
6aa20a22 2799
2cf71d2e 2800 drv_string = dev_driver_string(&pdev->dev);
1da177e4 2801
2cf71d2e 2802 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 2803
2cf71d2e
DJ
2804 /*
2805 * Mask out the options cannot be set to the chip
2806 */
6aa20a22 2807
2cf71d2e 2808 vptr->options.flags &= info->flags;
1da177e4 2809
2cf71d2e
DJ
2810 /*
2811 * Enable the chip specified capbilities
2812 */
1da177e4 2813
2cf71d2e 2814 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
1da177e4 2815
2cf71d2e
DJ
2816 vptr->wol_opts = vptr->options.wol_opts;
2817 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
1da177e4 2818
2cf71d2e 2819 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
1da177e4 2820
2cf71d2e
DJ
2821 dev->irq = pdev->irq;
2822 dev->netdev_ops = &velocity_netdev_ops;
2823 dev->ethtool_ops = &velocity_ethtool_ops;
dfff7144 2824 netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT);
6aa20a22 2825
2cf71d2e 2826 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
de2b96f1 2827 NETIF_F_HW_VLAN_RX | NETIF_F_IP_CSUM;
1da177e4 2828
2cf71d2e
DJ
2829 ret = register_netdev(dev);
2830 if (ret < 0)
2831 goto err_iounmap;
2832
2833 if (!velocity_get_link(dev)) {
2834 netif_carrier_off(dev);
2835 vptr->mii_status |= VELOCITY_LINK_FAIL;
1da177e4
LT
2836 }
2837
2cf71d2e
DJ
2838 velocity_print_info(vptr);
2839 pci_set_drvdata(pdev, dev);
1da177e4 2840
2cf71d2e 2841 /* and leave the chip powered down */
1da177e4 2842
2cf71d2e 2843 pci_set_power_state(pdev, PCI_D3hot);
2cf71d2e
DJ
2844 velocity_nics++;
2845out:
2846 return ret;
2847
2848err_iounmap:
2849 iounmap(regs);
2850err_release_res:
2851 pci_release_regions(pdev);
2852err_disable:
2853 pci_disable_device(pdev);
2854err_free_dev:
2855 free_netdev(dev);
2856 goto out;
1da177e4
LT
2857}
2858
2cf71d2e
DJ
2859
2860#ifdef CONFIG_PM
1da177e4
LT
2861/**
2862 * wol_calc_crc - WOL CRC
2863 * @pattern: data pattern
2864 * @mask_pattern: mask
2865 *
2866 * Compute the wake on lan crc hashes for the packet header
2867 * we are interested in.
2868 */
c4067400 2869static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
1da177e4
LT
2870{
2871 u16 crc = 0xFFFF;
2872 u8 mask;
2873 int i, j;
2874
2875 for (i = 0; i < size; i++) {
2876 mask = mask_pattern[i];
2877
2878 /* Skip this loop if the mask equals to zero */
2879 if (mask == 0x00)
2880 continue;
2881
2882 for (j = 0; j < 8; j++) {
2883 if ((mask & 0x01) == 0) {
2884 mask >>= 1;
2885 continue;
2886 }
2887 mask >>= 1;
2888 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
2889 }
2890 }
2891 /* Finally, invert the result once to get the correct data */
2892 crc = ~crc;
906d66df 2893 return bitrev32(crc) >> 16;
1da177e4
LT
2894}
2895
2896/**
2897 * velocity_set_wol - set up for wake on lan
2898 * @vptr: velocity to set WOL status on
2899 *
2900 * Set a card up for wake on lan either by unicast or by
2901 * ARP packet.
2902 *
2903 * FIXME: check static buffer is safe here
2904 */
1da177e4
LT
2905static int velocity_set_wol(struct velocity_info *vptr)
2906{
c4067400 2907 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT
2908 static u8 buf[256];
2909 int i;
2910
2911 static u32 mask_pattern[2][4] = {
2912 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
2913 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
2914 };
2915
2916 writew(0xFFFF, &regs->WOLCRClr);
2917 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
2918 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
2919
2920 /*
2921 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2922 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
2923 */
2924
c4067400 2925 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
1da177e4 2926 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
1da177e4
LT
2927
2928 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
2929 struct arp_packet *arp = (struct arp_packet *) buf;
2930 u16 crc;
2931 memset(buf, 0, sizeof(struct arp_packet) + 7);
2932
2933 for (i = 0; i < 4; i++)
2934 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
2935
2936 arp->type = htons(ETH_P_ARP);
2937 arp->ar_op = htons(1);
2938
2939 memcpy(arp->ar_tip, vptr->ip_addr, 4);
2940
2941 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
2942 (u8 *) & mask_pattern[0][0]);
2943
2944 writew(crc, &regs->PatternCRC[0]);
2945 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
2946 }
2947
2948 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
2949 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
2950
2951 writew(0x0FFF, &regs->WOLSRClr);
2952
2953 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2954 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3a7f8681 2955 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
1da177e4 2956
3a7f8681 2957 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
1da177e4
LT
2958 }
2959
2960 if (vptr->mii_status & VELOCITY_SPEED_1000)
3a7f8681 2961 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
1da177e4
LT
2962
2963 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2964
2965 {
2966 u8 GCR;
2967 GCR = readb(&regs->CHIPGCR);
2968 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
2969 writeb(GCR, &regs->CHIPGCR);
2970 }
2971
2972 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2973 /* Turn on SWPTAG just before entering power mode */
2974 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
2975 /* Go to bed ..... */
2976 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
2977
2978 return 0;
2979}
2980
2cf71d2e
DJ
2981/**
2982 * velocity_save_context - save registers
2983 * @vptr: velocity
2984 * @context: buffer for stored context
2985 *
2986 * Retrieve the current configuration from the velocity hardware
2987 * and stash it in the context structure, for use by the context
2988 * restore functions. This allows us to save things we need across
2989 * power down states
2990 */
2991static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
2992{
2993 struct mac_regs __iomem *regs = vptr->mac_regs;
2994 u16 i;
2995 u8 __iomem *ptr = (u8 __iomem *)regs;
2996
2997 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
2998 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2999
3000 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3001 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3002
3003 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3004 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3005
3006}
3007
1da177e4
LT
3008static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3009{
3010 struct net_device *dev = pci_get_drvdata(pdev);
3011 struct velocity_info *vptr = netdev_priv(dev);
3012 unsigned long flags;
3013
c4067400 3014 if (!netif_running(vptr->dev))
1da177e4
LT
3015 return 0;
3016
3017 netif_device_detach(vptr->dev);
3018
3019 spin_lock_irqsave(&vptr->lock, flags);
3020 pci_save_state(pdev);
3021#ifdef ETHTOOL_GWOL
3022 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3023 velocity_get_ip(vptr);
3024 velocity_save_context(vptr, &vptr->context);
3025 velocity_shutdown(vptr);
3026 velocity_set_wol(vptr);
4a51c0d0 3027 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT
3028 pci_set_power_state(pdev, PCI_D3hot);
3029 } else {
3030 velocity_save_context(vptr, &vptr->context);
3031 velocity_shutdown(vptr);
3032 pci_disable_device(pdev);
3033 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3034 }
2cf71d2e
DJ
3035#else
3036 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3037#endif
3038 spin_unlock_irqrestore(&vptr->lock, flags);
3039 return 0;
3040}
3041
3042/**
3043 * velocity_restore_context - restore registers
3044 * @vptr: velocity
3045 * @context: buffer for stored context
3046 *
3047 * Reload the register configuration from the velocity context
3048 * created by velocity_save_context.
3049 */
3050static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3051{
3052 struct mac_regs __iomem *regs = vptr->mac_regs;
3053 int i;
3054 u8 __iomem *ptr = (u8 __iomem *)regs;
3055
3056 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
3057 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3058
3059 /* Just skip cr0 */
3060 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3061 /* Clear */
3062 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3063 /* Set */
3064 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3065 }
3066
3067 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
3068 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3069
3070 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3071 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3072
3073 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
3074 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
1da177e4
LT
3075}
3076
3077static int velocity_resume(struct pci_dev *pdev)
3078{
3079 struct net_device *dev = pci_get_drvdata(pdev);
3080 struct velocity_info *vptr = netdev_priv(dev);
3081 unsigned long flags;
3082 int i;
3083
c4067400 3084 if (!netif_running(vptr->dev))
1da177e4
LT
3085 return 0;
3086
3087 pci_set_power_state(pdev, PCI_D0);
3088 pci_enable_wake(pdev, 0, 0);
3089 pci_restore_state(pdev);
3090
3091 mac_wol_reset(vptr->mac_regs);
3092
3093 spin_lock_irqsave(&vptr->lock, flags);
3094 velocity_restore_context(vptr, &vptr->context);
3095 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3096 mac_disable_int(vptr->mac_regs);
3097
d6cade0f 3098 velocity_tx_srv(vptr);
1da177e4 3099
0fe9f15e 3100 for (i = 0; i < vptr->tx.numq; i++) {
c4067400 3101 if (vptr->tx.used[i])
1da177e4 3102 mac_tx_queue_wake(vptr->mac_regs, i);
1da177e4
LT
3103 }
3104
3105 mac_enable_int(vptr->mac_regs);
3106 spin_unlock_irqrestore(&vptr->lock, flags);
3107 netif_device_attach(vptr->dev);
3108
3109 return 0;
3110}
2cf71d2e 3111#endif
1da177e4 3112
2cf71d2e
DJ
3113/*
3114 * Definition for our device driver. The PCI layer interface
3115 * uses this to handle all our card discover and plugging
3116 */
3117static struct pci_driver velocity_driver = {
3118 .name = VELOCITY_NAME,
3119 .id_table = velocity_id_table,
3120 .probe = velocity_found1,
3121 .remove = __devexit_p(velocity_remove1),
3122#ifdef CONFIG_PM
3123 .suspend = velocity_suspend,
3124 .resume = velocity_resume,
3125#endif
3126};
3127
3128
3129/**
3130 * velocity_ethtool_up - pre hook for ethtool
3131 * @dev: network device
3132 *
3133 * Called before an ethtool operation. We need to make sure the
3134 * chip is out of D3 state before we poke at it.
3135 */
3136static int velocity_ethtool_up(struct net_device *dev)
3137{
3138 struct velocity_info *vptr = netdev_priv(dev);
3139 if (!netif_running(dev))
3140 pci_set_power_state(vptr->pdev, PCI_D0);
3141 return 0;
3142}
3143
3144/**
3145 * velocity_ethtool_down - post hook for ethtool
3146 * @dev: network device
3147 *
3148 * Called after an ethtool operation. Restore the chip back to D3
3149 * state if it isn't running.
3150 */
3151static void velocity_ethtool_down(struct net_device *dev)
3152{
3153 struct velocity_info *vptr = netdev_priv(dev);
3154 if (!netif_running(dev))
3155 pci_set_power_state(vptr->pdev, PCI_D3hot);
3156}
3157
3158static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3159{
3160 struct velocity_info *vptr = netdev_priv(dev);
3161 struct mac_regs __iomem *regs = vptr->mac_regs;
3162 u32 status;
3163 status = check_connection_type(vptr->mac_regs);
3164
3165 cmd->supported = SUPPORTED_TP |
3166 SUPPORTED_Autoneg |
3167 SUPPORTED_10baseT_Half |
3168 SUPPORTED_10baseT_Full |
3169 SUPPORTED_100baseT_Half |
3170 SUPPORTED_100baseT_Full |
3171 SUPPORTED_1000baseT_Half |
3172 SUPPORTED_1000baseT_Full;
3173 if (status & VELOCITY_SPEED_1000)
3174 cmd->speed = SPEED_1000;
3175 else if (status & VELOCITY_SPEED_100)
3176 cmd->speed = SPEED_100;
3177 else
3178 cmd->speed = SPEED_10;
3179 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3180 cmd->port = PORT_TP;
3181 cmd->transceiver = XCVR_INTERNAL;
3182 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3183
3184 if (status & VELOCITY_DUPLEX_FULL)
3185 cmd->duplex = DUPLEX_FULL;
3186 else
3187 cmd->duplex = DUPLEX_HALF;
3188
3189 return 0;
3190}
3191
3192static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3193{
3194 struct velocity_info *vptr = netdev_priv(dev);
3195 u32 curr_status;
3196 u32 new_status = 0;
3197 int ret = 0;
3198
3199 curr_status = check_connection_type(vptr->mac_regs);
3200 curr_status &= (~VELOCITY_LINK_FAIL);
3201
3202 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3203 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3204 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3205 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3206
3207 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3208 ret = -EINVAL;
3209 else
3210 velocity_set_media_mode(vptr, new_status);
3211
3212 return ret;
3213}
3214
3215static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3216{
3217 struct velocity_info *vptr = netdev_priv(dev);
3218 strcpy(info->driver, VELOCITY_NAME);
3219 strcpy(info->version, VELOCITY_VERSION);
3220 strcpy(info->bus_info, pci_name(vptr->pdev));
3221}
3222
3223static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3224{
3225 struct velocity_info *vptr = netdev_priv(dev);
3226 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3227 wol->wolopts |= WAKE_MAGIC;
3228 /*
3229 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3230 wol.wolopts|=WAKE_PHY;
3231 */
3232 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3233 wol->wolopts |= WAKE_UCAST;
3234 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3235 wol->wolopts |= WAKE_ARP;
3236 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3237}
3238
3239static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3240{
3241 struct velocity_info *vptr = netdev_priv(dev);
3242
3243 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3244 return -EFAULT;
3245 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3246
3247 /*
3248 if (wol.wolopts & WAKE_PHY) {
3249 vptr->wol_opts|=VELOCITY_WOL_PHY;
3250 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3251 }
3252 */
3253
3254 if (wol->wolopts & WAKE_MAGIC) {
3255 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3256 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3257 }
3258 if (wol->wolopts & WAKE_UCAST) {
3259 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3260 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3261 }
3262 if (wol->wolopts & WAKE_ARP) {
3263 vptr->wol_opts |= VELOCITY_WOL_ARP;
3264 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3265 }
3266 memcpy(vptr->wol_passwd, wol->sopass, 6);
3267 return 0;
3268}
3269
3270static u32 velocity_get_msglevel(struct net_device *dev)
3271{
3272 return msglevel;
3273}
3274
3275static void velocity_set_msglevel(struct net_device *dev, u32 value)
3276{
3277 msglevel = value;
3278}
3279
6dfc4b95
SK
3280static int get_pending_timer_val(int val)
3281{
3282 int mult_bits = val >> 6;
3283 int mult = 1;
3284
3285 switch (mult_bits)
3286 {
3287 case 1:
3288 mult = 4; break;
3289 case 2:
3290 mult = 16; break;
3291 case 3:
3292 mult = 64; break;
3293 case 0:
3294 default:
3295 break;
3296 }
3297
3298 return (val & 0x3f) * mult;
3299}
3300
3301static void set_pending_timer_val(int *val, u32 us)
3302{
3303 u8 mult = 0;
3304 u8 shift = 0;
3305
3306 if (us >= 0x3f) {
3307 mult = 1; /* mult with 4 */
3308 shift = 2;
3309 }
3310 if (us >= 0x3f * 4) {
3311 mult = 2; /* mult with 16 */
3312 shift = 4;
3313 }
3314 if (us >= 0x3f * 16) {
3315 mult = 3; /* mult with 64 */
3316 shift = 6;
3317 }
3318
3319 *val = (mult << 6) | ((us >> shift) & 0x3f);
3320}
3321
3322
3323static int velocity_get_coalesce(struct net_device *dev,
3324 struct ethtool_coalesce *ecmd)
3325{
3326 struct velocity_info *vptr = netdev_priv(dev);
3327
3328 ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
3329 ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
3330
3331 ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
3332 ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
3333
3334 return 0;
3335}
3336
3337static int velocity_set_coalesce(struct net_device *dev,
3338 struct ethtool_coalesce *ecmd)
3339{
3340 struct velocity_info *vptr = netdev_priv(dev);
3341 int max_us = 0x3f * 64;
39c2ff43 3342 unsigned long flags;
6dfc4b95
SK
3343
3344 /* 6 bits of */
3345 if (ecmd->tx_coalesce_usecs > max_us)
3346 return -EINVAL;
3347 if (ecmd->rx_coalesce_usecs > max_us)
3348 return -EINVAL;
3349
3350 if (ecmd->tx_max_coalesced_frames > 0xff)
3351 return -EINVAL;
3352 if (ecmd->rx_max_coalesced_frames > 0xff)
3353 return -EINVAL;
3354
3355 vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
3356 vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
3357
3358 set_pending_timer_val(&vptr->options.rxqueue_timer,
3359 ecmd->rx_coalesce_usecs);
3360 set_pending_timer_val(&vptr->options.txqueue_timer,
3361 ecmd->tx_coalesce_usecs);
3362
3363 /* Setup the interrupt suppression and queue timers */
39c2ff43 3364 spin_lock_irqsave(&vptr->lock, flags);
6dfc4b95
SK
3365 mac_disable_int(vptr->mac_regs);
3366 setup_adaptive_interrupts(vptr);
3367 setup_queue_timers(vptr);
3368
3369 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3370 mac_clear_isr(vptr->mac_regs);
3371 mac_enable_int(vptr->mac_regs);
39c2ff43 3372 spin_unlock_irqrestore(&vptr->lock, flags);
6dfc4b95
SK
3373
3374 return 0;
3375}
3376
2cf71d2e
DJ
3377static const struct ethtool_ops velocity_ethtool_ops = {
3378 .get_settings = velocity_get_settings,
3379 .set_settings = velocity_set_settings,
3380 .get_drvinfo = velocity_get_drvinfo,
b06f78f4
SK
3381 .set_tx_csum = ethtool_op_set_tx_csum,
3382 .get_tx_csum = ethtool_op_get_tx_csum,
2cf71d2e
DJ
3383 .get_wol = velocity_ethtool_get_wol,
3384 .set_wol = velocity_ethtool_set_wol,
3385 .get_msglevel = velocity_get_msglevel,
3386 .set_msglevel = velocity_set_msglevel,
c79992fd 3387 .set_sg = ethtool_op_set_sg,
2cf71d2e 3388 .get_link = velocity_get_link,
6dfc4b95
SK
3389 .get_coalesce = velocity_get_coalesce,
3390 .set_coalesce = velocity_set_coalesce,
2cf71d2e
DJ
3391 .begin = velocity_ethtool_up,
3392 .complete = velocity_ethtool_down
3393};
ce9f7fe3 3394
2cf71d2e
DJ
3395#ifdef CONFIG_PM
3396#ifdef CONFIG_INET
1da177e4
LT
3397static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3398{
3399 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f 3400 struct net_device *dev = ifa->ifa_dev->dev;
1da177e4 3401
516b4df1
BH
3402 if (dev_net(dev) == &init_net &&
3403 dev->netdev_ops == &velocity_netdev_ops)
3404 velocity_get_ip(netdev_priv(dev));
a337499f 3405
1da177e4
LT
3406 return NOTIFY_DONE;
3407}
2cf71d2e
DJ
3408#endif /* CONFIG_INET */
3409#endif /* CONFIG_PM */
ce9f7fe3 3410
2cf71d2e
DJ
3411#if defined(CONFIG_PM) && defined(CONFIG_INET)
3412static struct notifier_block velocity_inetaddr_notifier = {
3413 .notifier_call = velocity_netdev_event,
3414};
3415
3416static void velocity_register_notifier(void)
3417{
3418 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3419}
3420
3421static void velocity_unregister_notifier(void)
3422{
3423 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3424}
3425
3426#else
3427
3428#define velocity_register_notifier() do {} while (0)
3429#define velocity_unregister_notifier() do {} while (0)
3430
3431#endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3432
3433/**
3434 * velocity_init_module - load time function
3435 *
3436 * Called when the velocity module is loaded. The PCI driver
3437 * is registered with the PCI layer, and in turn will call
3438 * the probe functions for each velocity adapter installed
3439 * in the system.
3440 */
3441static int __init velocity_init_module(void)
3442{
3443 int ret;
3444
3445 velocity_register_notifier();
3446 ret = pci_register_driver(&velocity_driver);
3447 if (ret < 0)
3448 velocity_unregister_notifier();
3449 return ret;
3450}
3451
3452/**
3453 * velocity_cleanup - module unload
3454 *
3455 * When the velocity hardware is unloaded this function is called.
3456 * It will clean up the notifiers and the unregister the PCI
3457 * driver interface for this hardware. This in turn cleans up
3458 * all discovered interfaces before returning from the function
3459 */
3460static void __exit velocity_cleanup_module(void)
3461{
3462 velocity_unregister_notifier();
3463 pci_unregister_driver(&velocity_driver);
3464}
3465
3466module_init(velocity_init_module);
3467module_exit(velocity_cleanup_module);