]>
Commit | Line | Data |
---|---|---|
af19b491 AKS |
1 | /* |
2 | * Copyright (C) 2009 - QLogic Corporation. | |
3 | * All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution | |
21 | * in the file called "COPYING". | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/netdevice.h> | |
26 | #include <linux/delay.h> | |
5a0e3ad6 | 27 | #include <linux/slab.h> |
af19b491 AKS |
28 | #include "qlcnic.h" |
29 | ||
30 | struct crb_addr_pair { | |
31 | u32 addr; | |
32 | u32 data; | |
33 | }; | |
34 | ||
35 | #define QLCNIC_MAX_CRB_XFORM 60 | |
36 | static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM]; | |
37 | ||
38 | #define crb_addr_transform(name) \ | |
39 | (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \ | |
40 | QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20) | |
41 | ||
42 | #define QLCNIC_ADDR_ERROR (0xffffffff) | |
43 | ||
44 | static void | |
45 | qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter, | |
46 | struct qlcnic_host_rds_ring *rds_ring); | |
47 | ||
48 | static void crb_addr_transform_setup(void) | |
49 | { | |
50 | crb_addr_transform(XDMA); | |
51 | crb_addr_transform(TIMR); | |
52 | crb_addr_transform(SRE); | |
53 | crb_addr_transform(SQN3); | |
54 | crb_addr_transform(SQN2); | |
55 | crb_addr_transform(SQN1); | |
56 | crb_addr_transform(SQN0); | |
57 | crb_addr_transform(SQS3); | |
58 | crb_addr_transform(SQS2); | |
59 | crb_addr_transform(SQS1); | |
60 | crb_addr_transform(SQS0); | |
61 | crb_addr_transform(RPMX7); | |
62 | crb_addr_transform(RPMX6); | |
63 | crb_addr_transform(RPMX5); | |
64 | crb_addr_transform(RPMX4); | |
65 | crb_addr_transform(RPMX3); | |
66 | crb_addr_transform(RPMX2); | |
67 | crb_addr_transform(RPMX1); | |
68 | crb_addr_transform(RPMX0); | |
69 | crb_addr_transform(ROMUSB); | |
70 | crb_addr_transform(SN); | |
71 | crb_addr_transform(QMN); | |
72 | crb_addr_transform(QMS); | |
73 | crb_addr_transform(PGNI); | |
74 | crb_addr_transform(PGND); | |
75 | crb_addr_transform(PGN3); | |
76 | crb_addr_transform(PGN2); | |
77 | crb_addr_transform(PGN1); | |
78 | crb_addr_transform(PGN0); | |
79 | crb_addr_transform(PGSI); | |
80 | crb_addr_transform(PGSD); | |
81 | crb_addr_transform(PGS3); | |
82 | crb_addr_transform(PGS2); | |
83 | crb_addr_transform(PGS1); | |
84 | crb_addr_transform(PGS0); | |
85 | crb_addr_transform(PS); | |
86 | crb_addr_transform(PH); | |
87 | crb_addr_transform(NIU); | |
88 | crb_addr_transform(I2Q); | |
89 | crb_addr_transform(EG); | |
90 | crb_addr_transform(MN); | |
91 | crb_addr_transform(MS); | |
92 | crb_addr_transform(CAS2); | |
93 | crb_addr_transform(CAS1); | |
94 | crb_addr_transform(CAS0); | |
95 | crb_addr_transform(CAM); | |
96 | crb_addr_transform(C2C1); | |
97 | crb_addr_transform(C2C0); | |
98 | crb_addr_transform(SMB); | |
99 | crb_addr_transform(OCM0); | |
100 | crb_addr_transform(I2C0); | |
101 | } | |
102 | ||
103 | void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter) | |
104 | { | |
105 | struct qlcnic_recv_context *recv_ctx; | |
106 | struct qlcnic_host_rds_ring *rds_ring; | |
107 | struct qlcnic_rx_buffer *rx_buf; | |
108 | int i, ring; | |
109 | ||
110 | recv_ctx = &adapter->recv_ctx; | |
111 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
112 | rds_ring = &recv_ctx->rds_rings[ring]; | |
113 | for (i = 0; i < rds_ring->num_desc; ++i) { | |
114 | rx_buf = &(rds_ring->rx_buf_arr[i]); | |
96659828 | 115 | if (rx_buf->skb == NULL) |
af19b491 | 116 | continue; |
96659828 | 117 | |
af19b491 AKS |
118 | pci_unmap_single(adapter->pdev, |
119 | rx_buf->dma, | |
120 | rds_ring->dma_size, | |
121 | PCI_DMA_FROMDEVICE); | |
96659828 AKS |
122 | |
123 | dev_kfree_skb_any(rx_buf->skb); | |
af19b491 AKS |
124 | } |
125 | } | |
126 | } | |
127 | ||
8a15ad1f AKS |
128 | void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter) |
129 | { | |
130 | struct qlcnic_recv_context *recv_ctx; | |
131 | struct qlcnic_host_rds_ring *rds_ring; | |
132 | struct qlcnic_rx_buffer *rx_buf; | |
133 | int i, ring; | |
134 | ||
135 | recv_ctx = &adapter->recv_ctx; | |
136 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
137 | rds_ring = &recv_ctx->rds_rings[ring]; | |
138 | ||
139 | spin_lock(&rds_ring->lock); | |
140 | ||
141 | INIT_LIST_HEAD(&rds_ring->free_list); | |
142 | ||
143 | rx_buf = rds_ring->rx_buf_arr; | |
144 | for (i = 0; i < rds_ring->num_desc; i++) { | |
145 | list_add_tail(&rx_buf->list, | |
146 | &rds_ring->free_list); | |
147 | rx_buf++; | |
148 | } | |
149 | ||
150 | spin_unlock(&rds_ring->lock); | |
151 | } | |
152 | } | |
153 | ||
af19b491 AKS |
154 | void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter) |
155 | { | |
156 | struct qlcnic_cmd_buffer *cmd_buf; | |
157 | struct qlcnic_skb_frag *buffrag; | |
158 | int i, j; | |
159 | struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring; | |
160 | ||
161 | cmd_buf = tx_ring->cmd_buf_arr; | |
162 | for (i = 0; i < tx_ring->num_desc; i++) { | |
163 | buffrag = cmd_buf->frag_array; | |
164 | if (buffrag->dma) { | |
165 | pci_unmap_single(adapter->pdev, buffrag->dma, | |
166 | buffrag->length, PCI_DMA_TODEVICE); | |
167 | buffrag->dma = 0ULL; | |
168 | } | |
169 | for (j = 0; j < cmd_buf->frag_count; j++) { | |
170 | buffrag++; | |
171 | if (buffrag->dma) { | |
172 | pci_unmap_page(adapter->pdev, buffrag->dma, | |
173 | buffrag->length, | |
174 | PCI_DMA_TODEVICE); | |
175 | buffrag->dma = 0ULL; | |
176 | } | |
177 | } | |
178 | if (cmd_buf->skb) { | |
179 | dev_kfree_skb_any(cmd_buf->skb); | |
180 | cmd_buf->skb = NULL; | |
181 | } | |
182 | cmd_buf++; | |
183 | } | |
184 | } | |
185 | ||
186 | void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter) | |
187 | { | |
188 | struct qlcnic_recv_context *recv_ctx; | |
189 | struct qlcnic_host_rds_ring *rds_ring; | |
190 | struct qlcnic_host_tx_ring *tx_ring; | |
191 | int ring; | |
192 | ||
193 | recv_ctx = &adapter->recv_ctx; | |
194 | ||
195 | if (recv_ctx->rds_rings == NULL) | |
196 | goto skip_rds; | |
197 | ||
198 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
199 | rds_ring = &recv_ctx->rds_rings[ring]; | |
200 | vfree(rds_ring->rx_buf_arr); | |
201 | rds_ring->rx_buf_arr = NULL; | |
202 | } | |
203 | kfree(recv_ctx->rds_rings); | |
204 | ||
205 | skip_rds: | |
206 | if (adapter->tx_ring == NULL) | |
207 | return; | |
208 | ||
209 | tx_ring = adapter->tx_ring; | |
210 | vfree(tx_ring->cmd_buf_arr); | |
ef71ff83 | 211 | tx_ring->cmd_buf_arr = NULL; |
af19b491 | 212 | kfree(adapter->tx_ring); |
ef71ff83 | 213 | adapter->tx_ring = NULL; |
af19b491 AKS |
214 | } |
215 | ||
216 | int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter) | |
217 | { | |
218 | struct qlcnic_recv_context *recv_ctx; | |
219 | struct qlcnic_host_rds_ring *rds_ring; | |
220 | struct qlcnic_host_sds_ring *sds_ring; | |
221 | struct qlcnic_host_tx_ring *tx_ring; | |
222 | struct qlcnic_rx_buffer *rx_buf; | |
223 | int ring, i, size; | |
224 | ||
225 | struct qlcnic_cmd_buffer *cmd_buf_arr; | |
226 | struct net_device *netdev = adapter->netdev; | |
227 | ||
228 | size = sizeof(struct qlcnic_host_tx_ring); | |
229 | tx_ring = kzalloc(size, GFP_KERNEL); | |
230 | if (tx_ring == NULL) { | |
231 | dev_err(&netdev->dev, "failed to allocate tx ring struct\n"); | |
232 | return -ENOMEM; | |
233 | } | |
234 | adapter->tx_ring = tx_ring; | |
235 | ||
236 | tx_ring->num_desc = adapter->num_txd; | |
237 | tx_ring->txq = netdev_get_tx_queue(netdev, 0); | |
238 | ||
239 | cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring)); | |
240 | if (cmd_buf_arr == NULL) { | |
241 | dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n"); | |
aadd8184 | 242 | goto err_out; |
af19b491 AKS |
243 | } |
244 | memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring)); | |
245 | tx_ring->cmd_buf_arr = cmd_buf_arr; | |
246 | ||
247 | recv_ctx = &adapter->recv_ctx; | |
248 | ||
249 | size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring); | |
250 | rds_ring = kzalloc(size, GFP_KERNEL); | |
251 | if (rds_ring == NULL) { | |
252 | dev_err(&netdev->dev, "failed to allocate rds ring struct\n"); | |
aadd8184 | 253 | goto err_out; |
af19b491 AKS |
254 | } |
255 | recv_ctx->rds_rings = rds_ring; | |
256 | ||
257 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
258 | rds_ring = &recv_ctx->rds_rings[ring]; | |
259 | switch (ring) { | |
260 | case RCV_RING_NORMAL: | |
261 | rds_ring->num_desc = adapter->num_rxd; | |
251a84c9 AKS |
262 | rds_ring->dma_size = QLCNIC_P3_RX_BUF_MAX_LEN; |
263 | rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; | |
af19b491 AKS |
264 | break; |
265 | ||
266 | case RCV_RING_JUMBO: | |
267 | rds_ring->num_desc = adapter->num_jumbo_rxd; | |
268 | rds_ring->dma_size = | |
269 | QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN; | |
270 | ||
271 | if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO) | |
272 | rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA; | |
273 | ||
274 | rds_ring->skb_size = | |
275 | rds_ring->dma_size + NET_IP_ALIGN; | |
276 | break; | |
af19b491 AKS |
277 | } |
278 | rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *) | |
279 | vmalloc(RCV_BUFF_RINGSIZE(rds_ring)); | |
280 | if (rds_ring->rx_buf_arr == NULL) { | |
281 | dev_err(&netdev->dev, "Failed to allocate " | |
282 | "rx buffer ring %d\n", ring); | |
283 | goto err_out; | |
284 | } | |
285 | memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring)); | |
286 | INIT_LIST_HEAD(&rds_ring->free_list); | |
287 | /* | |
288 | * Now go through all of them, set reference handles | |
289 | * and put them in the queues. | |
290 | */ | |
291 | rx_buf = rds_ring->rx_buf_arr; | |
292 | for (i = 0; i < rds_ring->num_desc; i++) { | |
293 | list_add_tail(&rx_buf->list, | |
294 | &rds_ring->free_list); | |
295 | rx_buf->ref_handle = i; | |
af19b491 AKS |
296 | rx_buf++; |
297 | } | |
298 | spin_lock_init(&rds_ring->lock); | |
299 | } | |
300 | ||
301 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
302 | sds_ring = &recv_ctx->sds_rings[ring]; | |
303 | sds_ring->irq = adapter->msix_entries[ring].vector; | |
304 | sds_ring->adapter = adapter; | |
305 | sds_ring->num_desc = adapter->num_rxd; | |
306 | ||
307 | for (i = 0; i < NUM_RCV_DESC_RINGS; i++) | |
308 | INIT_LIST_HEAD(&sds_ring->free_list[i]); | |
309 | } | |
310 | ||
311 | return 0; | |
312 | ||
313 | err_out: | |
314 | qlcnic_free_sw_resources(adapter); | |
315 | return -ENOMEM; | |
316 | } | |
317 | ||
318 | /* | |
319 | * Utility to translate from internal Phantom CRB address | |
320 | * to external PCI CRB address. | |
321 | */ | |
322 | static u32 qlcnic_decode_crb_addr(u32 addr) | |
323 | { | |
324 | int i; | |
325 | u32 base_addr, offset, pci_base; | |
326 | ||
327 | crb_addr_transform_setup(); | |
328 | ||
329 | pci_base = QLCNIC_ADDR_ERROR; | |
330 | base_addr = addr & 0xfff00000; | |
331 | offset = addr & 0x000fffff; | |
332 | ||
333 | for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) { | |
334 | if (crb_addr_xform[i] == base_addr) { | |
335 | pci_base = i << 20; | |
336 | break; | |
337 | } | |
338 | } | |
339 | if (pci_base == QLCNIC_ADDR_ERROR) | |
340 | return pci_base; | |
341 | else | |
342 | return pci_base + offset; | |
343 | } | |
344 | ||
345 | #define QLCNIC_MAX_ROM_WAIT_USEC 100 | |
346 | ||
347 | static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter) | |
348 | { | |
349 | long timeout = 0; | |
350 | long done = 0; | |
351 | ||
352 | cond_resched(); | |
353 | ||
354 | while (done == 0) { | |
355 | done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS); | |
356 | done &= 2; | |
357 | if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) { | |
358 | dev_err(&adapter->pdev->dev, | |
359 | "Timeout reached waiting for rom done"); | |
360 | return -EIO; | |
361 | } | |
362 | udelay(1); | |
363 | } | |
364 | return 0; | |
365 | } | |
366 | ||
367 | static int do_rom_fast_read(struct qlcnic_adapter *adapter, | |
368 | int addr, int *valp) | |
369 | { | |
370 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr); | |
371 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | |
372 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3); | |
373 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb); | |
374 | if (qlcnic_wait_rom_done(adapter)) { | |
375 | dev_err(&adapter->pdev->dev, "Error waiting for rom done\n"); | |
376 | return -EIO; | |
377 | } | |
378 | /* reset abyte_cnt and dummy_byte_cnt */ | |
379 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0); | |
380 | udelay(10); | |
381 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | |
382 | ||
383 | *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA); | |
384 | return 0; | |
385 | } | |
386 | ||
387 | static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, | |
388 | u8 *bytes, size_t size) | |
389 | { | |
390 | int addridx; | |
391 | int ret = 0; | |
392 | ||
393 | for (addridx = addr; addridx < (addr + size); addridx += 4) { | |
394 | int v; | |
395 | ret = do_rom_fast_read(adapter, addridx, &v); | |
396 | if (ret != 0) | |
397 | break; | |
398 | *(__le32 *)bytes = cpu_to_le32(v); | |
399 | bytes += 4; | |
400 | } | |
401 | ||
402 | return ret; | |
403 | } | |
404 | ||
405 | int | |
406 | qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, | |
407 | u8 *bytes, size_t size) | |
408 | { | |
409 | int ret; | |
410 | ||
411 | ret = qlcnic_rom_lock(adapter); | |
412 | if (ret < 0) | |
413 | return ret; | |
414 | ||
415 | ret = do_rom_fast_read_words(adapter, addr, bytes, size); | |
416 | ||
417 | qlcnic_rom_unlock(adapter); | |
418 | return ret; | |
419 | } | |
420 | ||
421 | int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp) | |
422 | { | |
423 | int ret; | |
424 | ||
425 | if (qlcnic_rom_lock(adapter) != 0) | |
426 | return -EIO; | |
427 | ||
428 | ret = do_rom_fast_read(adapter, addr, valp); | |
429 | qlcnic_rom_unlock(adapter); | |
430 | return ret; | |
431 | } | |
432 | ||
433 | int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter) | |
434 | { | |
435 | int addr, val; | |
436 | int i, n, init_delay; | |
437 | struct crb_addr_pair *buf; | |
438 | unsigned offset; | |
439 | u32 off; | |
440 | struct pci_dev *pdev = adapter->pdev; | |
441 | ||
442 | /* resetall */ | |
443 | qlcnic_rom_lock(adapter); | |
469c221f | 444 | QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff); |
af19b491 AKS |
445 | qlcnic_rom_unlock(adapter); |
446 | ||
447 | if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) || | |
448 | qlcnic_rom_fast_read(adapter, 4, &n) != 0) { | |
449 | dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n); | |
450 | return -EIO; | |
451 | } | |
452 | offset = n & 0xffffU; | |
453 | n = (n >> 16) & 0xffffU; | |
454 | ||
455 | if (n >= 1024) { | |
456 | dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n"); | |
457 | return -EIO; | |
458 | } | |
459 | ||
460 | buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); | |
461 | if (buf == NULL) { | |
462 | dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n"); | |
463 | return -ENOMEM; | |
464 | } | |
465 | ||
466 | for (i = 0; i < n; i++) { | |
467 | if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || | |
468 | qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { | |
469 | kfree(buf); | |
470 | return -EIO; | |
471 | } | |
472 | ||
473 | buf[i].addr = addr; | |
474 | buf[i].data = val; | |
475 | } | |
476 | ||
477 | for (i = 0; i < n; i++) { | |
478 | ||
479 | off = qlcnic_decode_crb_addr(buf[i].addr); | |
480 | if (off == QLCNIC_ADDR_ERROR) { | |
481 | dev_err(&pdev->dev, "CRB init value out of range %x\n", | |
482 | buf[i].addr); | |
483 | continue; | |
484 | } | |
485 | off += QLCNIC_PCI_CRBSPACE; | |
486 | ||
487 | if (off & 1) | |
488 | continue; | |
489 | ||
490 | /* skipping cold reboot MAGIC */ | |
491 | if (off == QLCNIC_CAM_RAM(0x1fc)) | |
492 | continue; | |
493 | if (off == (QLCNIC_CRB_I2C0 + 0x1c)) | |
494 | continue; | |
495 | if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */ | |
496 | continue; | |
497 | if (off == (ROMUSB_GLB + 0xa8)) | |
498 | continue; | |
499 | if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ | |
500 | continue; | |
501 | if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ | |
502 | continue; | |
503 | if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ | |
504 | continue; | |
505 | if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET) | |
506 | continue; | |
507 | /* skip the function enable register */ | |
508 | if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION)) | |
509 | continue; | |
510 | if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2)) | |
511 | continue; | |
512 | if ((off & 0x0ff00000) == QLCNIC_CRB_SMB) | |
513 | continue; | |
514 | ||
515 | init_delay = 1; | |
516 | /* After writing this register, HW needs time for CRB */ | |
517 | /* to quiet down (else crb_window returns 0xffffffff) */ | |
518 | if (off == QLCNIC_ROMUSB_GLB_SW_RESET) | |
519 | init_delay = 1000; | |
520 | ||
521 | QLCWR32(adapter, off, buf[i].data); | |
522 | ||
523 | msleep(init_delay); | |
524 | } | |
525 | kfree(buf); | |
526 | ||
527 | /* p2dn replyCount */ | |
528 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e); | |
529 | /* disable_peg_cache 0 & 1*/ | |
530 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8); | |
531 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8); | |
532 | ||
533 | /* peg_clr_all */ | |
534 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0); | |
535 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0); | |
536 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0); | |
537 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0); | |
538 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0); | |
539 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0); | |
540 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0); | |
541 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0); | |
542 | return 0; | |
543 | } | |
544 | ||
b3a24649 | 545 | int |
aa5e18c0 SC |
546 | qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) { |
547 | ||
548 | int timeo; | |
b3a24649 SC |
549 | u32 val; |
550 | ||
45918e2f AC |
551 | val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO); |
552 | val = QLC_DEV_GET_DRV(val, adapter->portnum); | |
553 | if ((val & 0x3) != QLCNIC_TYPE_NIC) { | |
554 | dev_err(&adapter->pdev->dev, | |
555 | "Not an Ethernet NIC func=%u\n", val); | |
556 | return -EIO; | |
b3a24649 | 557 | } |
45918e2f | 558 | adapter->physical_port = (val >> 2); |
aa5e18c0 SC |
559 | if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo)) |
560 | timeo = 30; | |
561 | ||
562 | adapter->dev_init_timeo = timeo; | |
563 | ||
564 | if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo)) | |
565 | timeo = 10; | |
566 | ||
567 | adapter->reset_ack_timeo = timeo; | |
b3a24649 SC |
568 | |
569 | return 0; | |
aa5e18c0 SC |
570 | } |
571 | ||
8f891387 | 572 | int |
573 | qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter) | |
574 | { | |
575 | u32 ver = -1, min_ver; | |
576 | ||
577 | qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, (int *)&ver); | |
578 | ||
579 | ver = QLCNIC_DECODE_VERSION(ver); | |
580 | min_ver = QLCNIC_MIN_FW_VERSION; | |
581 | ||
582 | if (ver < min_ver) { | |
583 | dev_err(&adapter->pdev->dev, | |
584 | "firmware version %d.%d.%d unsupported." | |
585 | "Min supported version %d.%d.%d\n", | |
586 | _major(ver), _minor(ver), _build(ver), | |
587 | _major(min_ver), _minor(min_ver), _build(min_ver)); | |
588 | return -EINVAL; | |
589 | } | |
590 | ||
591 | return 0; | |
592 | } | |
593 | ||
af19b491 AKS |
594 | static int |
595 | qlcnic_has_mn(struct qlcnic_adapter *adapter) | |
596 | { | |
8f891387 | 597 | u32 capability; |
af19b491 AKS |
598 | capability = 0; |
599 | ||
251a84c9 AKS |
600 | capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY); |
601 | if (capability & QLCNIC_PEG_TUNE_MN_PRESENT) | |
602 | return 1; | |
af19b491 | 603 | |
af19b491 AKS |
604 | return 0; |
605 | } | |
606 | ||
607 | static | |
608 | struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section) | |
609 | { | |
610 | u32 i; | |
611 | struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; | |
612 | __le32 entries = cpu_to_le32(directory->num_entries); | |
613 | ||
614 | for (i = 0; i < entries; i++) { | |
615 | ||
616 | __le32 offs = cpu_to_le32(directory->findex) + | |
617 | (i * cpu_to_le32(directory->entry_size)); | |
618 | __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); | |
619 | ||
620 | if (tab_type == section) | |
621 | return (struct uni_table_desc *) &unirom[offs]; | |
622 | } | |
623 | ||
624 | return NULL; | |
625 | } | |
626 | ||
b7eff100 SC |
627 | #define FILEHEADER_SIZE (14 * 4) |
628 | ||
af19b491 | 629 | static int |
b7eff100 | 630 | qlcnic_validate_header(struct qlcnic_adapter *adapter) |
af19b491 | 631 | { |
af19b491 | 632 | const u8 *unirom = adapter->fw->data; |
b7eff100 SC |
633 | struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; |
634 | __le32 fw_file_size = adapter->fw->size; | |
af19b491 | 635 | __le32 entries; |
b7eff100 SC |
636 | __le32 entry_size; |
637 | __le32 tab_size; | |
638 | ||
639 | if (fw_file_size < FILEHEADER_SIZE) | |
640 | return -EINVAL; | |
641 | ||
642 | entries = cpu_to_le32(directory->num_entries); | |
643 | entry_size = cpu_to_le32(directory->entry_size); | |
644 | tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); | |
645 | ||
646 | if (fw_file_size < tab_size) | |
647 | return -EINVAL; | |
648 | ||
649 | return 0; | |
650 | } | |
651 | ||
652 | static int | |
653 | qlcnic_validate_bootld(struct qlcnic_adapter *adapter) | |
654 | { | |
655 | struct uni_table_desc *tab_desc; | |
656 | struct uni_data_desc *descr; | |
657 | const u8 *unirom = adapter->fw->data; | |
658 | int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + | |
659 | QLCNIC_UNI_BOOTLD_IDX_OFF)); | |
660 | __le32 offs; | |
661 | __le32 tab_size; | |
662 | __le32 data_size; | |
663 | ||
664 | tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD); | |
665 | ||
666 | if (!tab_desc) | |
667 | return -EINVAL; | |
668 | ||
669 | tab_size = cpu_to_le32(tab_desc->findex) + | |
22dfaa86 | 670 | (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); |
b7eff100 SC |
671 | |
672 | if (adapter->fw->size < tab_size) | |
673 | return -EINVAL; | |
674 | ||
675 | offs = cpu_to_le32(tab_desc->findex) + | |
676 | (cpu_to_le32(tab_desc->entry_size) * (idx)); | |
677 | descr = (struct uni_data_desc *)&unirom[offs]; | |
678 | ||
22dfaa86 | 679 | data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); |
b7eff100 SC |
680 | |
681 | if (adapter->fw->size < data_size) | |
682 | return -EINVAL; | |
683 | ||
684 | return 0; | |
685 | } | |
686 | ||
687 | static int | |
688 | qlcnic_validate_fw(struct qlcnic_adapter *adapter) | |
689 | { | |
690 | struct uni_table_desc *tab_desc; | |
691 | struct uni_data_desc *descr; | |
692 | const u8 *unirom = adapter->fw->data; | |
693 | int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + | |
694 | QLCNIC_UNI_FIRMWARE_IDX_OFF)); | |
695 | __le32 offs; | |
696 | __le32 tab_size; | |
697 | __le32 data_size; | |
698 | ||
699 | tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW); | |
700 | ||
701 | if (!tab_desc) | |
702 | return -EINVAL; | |
703 | ||
704 | tab_size = cpu_to_le32(tab_desc->findex) + | |
22dfaa86 | 705 | (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); |
b7eff100 SC |
706 | |
707 | if (adapter->fw->size < tab_size) | |
708 | return -EINVAL; | |
709 | ||
710 | offs = cpu_to_le32(tab_desc->findex) + | |
711 | (cpu_to_le32(tab_desc->entry_size) * (idx)); | |
712 | descr = (struct uni_data_desc *)&unirom[offs]; | |
22dfaa86 | 713 | data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); |
b7eff100 SC |
714 | |
715 | if (adapter->fw->size < data_size) | |
716 | return -EINVAL; | |
717 | ||
718 | return 0; | |
719 | } | |
720 | ||
721 | static int | |
722 | qlcnic_validate_product_offs(struct qlcnic_adapter *adapter) | |
723 | { | |
724 | struct uni_table_desc *ptab_descr; | |
725 | const u8 *unirom = adapter->fw->data; | |
af19b491 | 726 | int mn_present = qlcnic_has_mn(adapter); |
b7eff100 SC |
727 | __le32 entries; |
728 | __le32 entry_size; | |
729 | __le32 tab_size; | |
730 | u32 i; | |
af19b491 AKS |
731 | |
732 | ptab_descr = qlcnic_get_table_desc(unirom, | |
733 | QLCNIC_UNI_DIR_SECT_PRODUCT_TBL); | |
b7eff100 SC |
734 | if (!ptab_descr) |
735 | return -EINVAL; | |
af19b491 AKS |
736 | |
737 | entries = cpu_to_le32(ptab_descr->num_entries); | |
b7eff100 SC |
738 | entry_size = cpu_to_le32(ptab_descr->entry_size); |
739 | tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); | |
740 | ||
741 | if (adapter->fw->size < tab_size) | |
742 | return -EINVAL; | |
743 | ||
af19b491 AKS |
744 | nomn: |
745 | for (i = 0; i < entries; i++) { | |
746 | ||
747 | __le32 flags, file_chiprev, offs; | |
748 | u8 chiprev = adapter->ahw.revision_id; | |
749 | u32 flagbit; | |
750 | ||
751 | offs = cpu_to_le32(ptab_descr->findex) + | |
752 | (i * cpu_to_le32(ptab_descr->entry_size)); | |
753 | flags = cpu_to_le32(*((int *)&unirom[offs] + | |
754 | QLCNIC_UNI_FLAGS_OFF)); | |
755 | file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + | |
756 | QLCNIC_UNI_CHIP_REV_OFF)); | |
757 | ||
758 | flagbit = mn_present ? 1 : 2; | |
759 | ||
760 | if ((chiprev == file_chiprev) && | |
761 | ((1ULL << flagbit) & flags)) { | |
762 | adapter->file_prd_off = offs; | |
763 | return 0; | |
764 | } | |
765 | } | |
766 | if (mn_present) { | |
767 | mn_present = 0; | |
768 | goto nomn; | |
769 | } | |
b7eff100 SC |
770 | return -EINVAL; |
771 | } | |
772 | ||
773 | static int | |
774 | qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter) | |
775 | { | |
776 | if (qlcnic_validate_header(adapter)) { | |
777 | dev_err(&adapter->pdev->dev, | |
778 | "unified image: header validation failed\n"); | |
779 | return -EINVAL; | |
780 | } | |
781 | ||
782 | if (qlcnic_validate_product_offs(adapter)) { | |
783 | dev_err(&adapter->pdev->dev, | |
784 | "unified image: product validation failed\n"); | |
785 | return -EINVAL; | |
786 | } | |
787 | ||
788 | if (qlcnic_validate_bootld(adapter)) { | |
789 | dev_err(&adapter->pdev->dev, | |
790 | "unified image: bootld validation failed\n"); | |
791 | return -EINVAL; | |
792 | } | |
793 | ||
794 | if (qlcnic_validate_fw(adapter)) { | |
795 | dev_err(&adapter->pdev->dev, | |
796 | "unified image: firmware validation failed\n"); | |
797 | return -EINVAL; | |
798 | } | |
799 | ||
800 | return 0; | |
af19b491 AKS |
801 | } |
802 | ||
803 | static | |
804 | struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter, | |
805 | u32 section, u32 idx_offset) | |
806 | { | |
807 | const u8 *unirom = adapter->fw->data; | |
808 | int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + | |
809 | idx_offset)); | |
810 | struct uni_table_desc *tab_desc; | |
811 | __le32 offs; | |
812 | ||
813 | tab_desc = qlcnic_get_table_desc(unirom, section); | |
814 | ||
815 | if (tab_desc == NULL) | |
816 | return NULL; | |
817 | ||
818 | offs = cpu_to_le32(tab_desc->findex) + | |
819 | (cpu_to_le32(tab_desc->entry_size) * idx); | |
820 | ||
821 | return (struct uni_data_desc *)&unirom[offs]; | |
822 | } | |
823 | ||
824 | static u8 * | |
825 | qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter) | |
826 | { | |
827 | u32 offs = QLCNIC_BOOTLD_START; | |
828 | ||
829 | if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE) | |
830 | offs = cpu_to_le32((qlcnic_get_data_desc(adapter, | |
831 | QLCNIC_UNI_DIR_SECT_BOOTLD, | |
832 | QLCNIC_UNI_BOOTLD_IDX_OFF))->findex); | |
833 | ||
834 | return (u8 *)&adapter->fw->data[offs]; | |
835 | } | |
836 | ||
837 | static u8 * | |
838 | qlcnic_get_fw_offs(struct qlcnic_adapter *adapter) | |
839 | { | |
840 | u32 offs = QLCNIC_IMAGE_START; | |
841 | ||
842 | if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE) | |
843 | offs = cpu_to_le32((qlcnic_get_data_desc(adapter, | |
844 | QLCNIC_UNI_DIR_SECT_FW, | |
845 | QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex); | |
846 | ||
847 | return (u8 *)&adapter->fw->data[offs]; | |
848 | } | |
849 | ||
850 | static __le32 | |
851 | qlcnic_get_fw_size(struct qlcnic_adapter *adapter) | |
852 | { | |
853 | if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE) | |
854 | return cpu_to_le32((qlcnic_get_data_desc(adapter, | |
855 | QLCNIC_UNI_DIR_SECT_FW, | |
856 | QLCNIC_UNI_FIRMWARE_IDX_OFF))->size); | |
857 | else | |
858 | return cpu_to_le32( | |
859 | *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]); | |
860 | } | |
861 | ||
862 | static __le32 | |
863 | qlcnic_get_fw_version(struct qlcnic_adapter *adapter) | |
864 | { | |
865 | struct uni_data_desc *fw_data_desc; | |
866 | const struct firmware *fw = adapter->fw; | |
867 | __le32 major, minor, sub; | |
868 | const u8 *ver_str; | |
869 | int i, ret; | |
870 | ||
871 | if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE) | |
872 | return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]); | |
873 | ||
874 | fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, | |
875 | QLCNIC_UNI_FIRMWARE_IDX_OFF); | |
876 | ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + | |
877 | cpu_to_le32(fw_data_desc->size) - 17; | |
878 | ||
879 | for (i = 0; i < 12; i++) { | |
880 | if (!strncmp(&ver_str[i], "REV=", 4)) { | |
881 | ret = sscanf(&ver_str[i+4], "%u.%u.%u ", | |
882 | &major, &minor, &sub); | |
883 | if (ret != 3) | |
884 | return 0; | |
885 | else | |
886 | return major + (minor << 8) + (sub << 16); | |
887 | } | |
888 | } | |
889 | ||
890 | return 0; | |
891 | } | |
892 | ||
893 | static __le32 | |
894 | qlcnic_get_bios_version(struct qlcnic_adapter *adapter) | |
895 | { | |
896 | const struct firmware *fw = adapter->fw; | |
897 | __le32 bios_ver, prd_off = adapter->file_prd_off; | |
898 | ||
899 | if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE) | |
900 | return cpu_to_le32( | |
901 | *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]); | |
902 | ||
903 | bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) | |
904 | + QLCNIC_UNI_BIOS_VERSION_OFF)); | |
905 | ||
addd5abf | 906 | return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24); |
af19b491 AKS |
907 | } |
908 | ||
909 | int | |
910 | qlcnic_need_fw_reset(struct qlcnic_adapter *adapter) | |
911 | { | |
912 | u32 count, old_count; | |
913 | u32 val, version, major, minor, build; | |
914 | int i, timeout; | |
915 | ||
916 | if (adapter->need_fw_reset) | |
917 | return 1; | |
918 | ||
919 | /* last attempt had failed */ | |
920 | if (QLCRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) | |
921 | return 1; | |
922 | ||
923 | old_count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER); | |
924 | ||
925 | for (i = 0; i < 10; i++) { | |
926 | ||
927 | timeout = msleep_interruptible(200); | |
928 | if (timeout) { | |
929 | QLCWR32(adapter, CRB_CMDPEG_STATE, | |
930 | PHAN_INITIALIZE_FAILED); | |
931 | return -EINTR; | |
932 | } | |
933 | ||
934 | count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER); | |
935 | if (count != old_count) | |
936 | break; | |
937 | } | |
938 | ||
939 | /* firmware is dead */ | |
940 | if (count == old_count) | |
941 | return 1; | |
942 | ||
943 | /* check if we have got newer or different file firmware */ | |
944 | if (adapter->fw) { | |
945 | ||
946 | val = qlcnic_get_fw_version(adapter); | |
947 | ||
948 | version = QLCNIC_DECODE_VERSION(val); | |
949 | ||
950 | major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR); | |
951 | minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR); | |
952 | build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB); | |
953 | ||
954 | if (version > QLCNIC_VERSION_CODE(major, minor, build)) | |
955 | return 1; | |
956 | } | |
957 | ||
958 | return 0; | |
959 | } | |
960 | ||
961 | static const char *fw_name[] = { | |
962 | QLCNIC_UNIFIED_ROMIMAGE_NAME, | |
963 | QLCNIC_FLASH_ROMIMAGE_NAME, | |
964 | }; | |
965 | ||
966 | int | |
967 | qlcnic_load_firmware(struct qlcnic_adapter *adapter) | |
968 | { | |
969 | u64 *ptr64; | |
970 | u32 i, flashaddr, size; | |
971 | const struct firmware *fw = adapter->fw; | |
972 | struct pci_dev *pdev = adapter->pdev; | |
973 | ||
974 | dev_info(&pdev->dev, "loading firmware from %s\n", | |
975 | fw_name[adapter->fw_type]); | |
976 | ||
977 | if (fw) { | |
978 | __le64 data; | |
979 | ||
980 | size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; | |
981 | ||
982 | ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter); | |
983 | flashaddr = QLCNIC_BOOTLD_START; | |
984 | ||
985 | for (i = 0; i < size; i++) { | |
986 | data = cpu_to_le64(ptr64[i]); | |
987 | ||
988 | if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data)) | |
989 | return -EIO; | |
990 | ||
991 | flashaddr += 8; | |
992 | } | |
993 | ||
994 | size = (__force u32)qlcnic_get_fw_size(adapter) / 8; | |
995 | ||
996 | ptr64 = (u64 *)qlcnic_get_fw_offs(adapter); | |
997 | flashaddr = QLCNIC_IMAGE_START; | |
998 | ||
999 | for (i = 0; i < size; i++) { | |
1000 | data = cpu_to_le64(ptr64[i]); | |
1001 | ||
1002 | if (qlcnic_pci_mem_write_2M(adapter, | |
1003 | flashaddr, data)) | |
1004 | return -EIO; | |
1005 | ||
1006 | flashaddr += 8; | |
1007 | } | |
0bc92b5b AKS |
1008 | |
1009 | size = (__force u32)qlcnic_get_fw_size(adapter) % 8; | |
1010 | if (size) { | |
1011 | data = cpu_to_le64(ptr64[i]); | |
1012 | ||
1013 | if (qlcnic_pci_mem_write_2M(adapter, | |
1014 | flashaddr, data)) | |
1015 | return -EIO; | |
1016 | } | |
1017 | ||
af19b491 AKS |
1018 | } else { |
1019 | u64 data; | |
1020 | u32 hi, lo; | |
1021 | ||
1022 | size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; | |
1023 | flashaddr = QLCNIC_BOOTLD_START; | |
1024 | ||
1025 | for (i = 0; i < size; i++) { | |
1026 | if (qlcnic_rom_fast_read(adapter, | |
1027 | flashaddr, (int *)&lo) != 0) | |
1028 | return -EIO; | |
1029 | if (qlcnic_rom_fast_read(adapter, | |
1030 | flashaddr + 4, (int *)&hi) != 0) | |
1031 | return -EIO; | |
1032 | ||
1033 | data = (((u64)hi << 32) | lo); | |
1034 | ||
1035 | if (qlcnic_pci_mem_write_2M(adapter, | |
1036 | flashaddr, data)) | |
1037 | return -EIO; | |
1038 | ||
1039 | flashaddr += 8; | |
1040 | } | |
1041 | } | |
1042 | msleep(1); | |
1043 | ||
1044 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020); | |
1045 | QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e); | |
1046 | return 0; | |
1047 | } | |
1048 | ||
1049 | static int | |
1050 | qlcnic_validate_firmware(struct qlcnic_adapter *adapter) | |
1051 | { | |
1052 | __le32 val; | |
8f891387 | 1053 | u32 ver, bios, min_size; |
af19b491 AKS |
1054 | struct pci_dev *pdev = adapter->pdev; |
1055 | const struct firmware *fw = adapter->fw; | |
1056 | u8 fw_type = adapter->fw_type; | |
1057 | ||
1058 | if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) { | |
b7eff100 | 1059 | if (qlcnic_validate_unified_romimage(adapter)) |
af19b491 AKS |
1060 | return -EINVAL; |
1061 | ||
1062 | min_size = QLCNIC_UNI_FW_MIN_SIZE; | |
1063 | } else { | |
1064 | val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]); | |
1065 | if ((__force u32)val != QLCNIC_BDINFO_MAGIC) | |
1066 | return -EINVAL; | |
1067 | ||
1068 | min_size = QLCNIC_FW_MIN_SIZE; | |
1069 | } | |
1070 | ||
1071 | if (fw->size < min_size) | |
1072 | return -EINVAL; | |
1073 | ||
1074 | val = qlcnic_get_fw_version(adapter); | |
af19b491 AKS |
1075 | ver = QLCNIC_DECODE_VERSION(val); |
1076 | ||
8f891387 | 1077 | if (ver < QLCNIC_MIN_FW_VERSION) { |
af19b491 AKS |
1078 | dev_err(&pdev->dev, |
1079 | "%s: firmware version %d.%d.%d unsupported\n", | |
1080 | fw_name[fw_type], _major(ver), _minor(ver), _build(ver)); | |
1081 | return -EINVAL; | |
1082 | } | |
1083 | ||
1084 | val = qlcnic_get_bios_version(adapter); | |
1085 | qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios); | |
1086 | if ((__force u32)val != bios) { | |
1087 | dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", | |
1088 | fw_name[fw_type]); | |
1089 | return -EINVAL; | |
1090 | } | |
1091 | ||
1092 | /* check if flashed firmware is newer */ | |
1093 | if (qlcnic_rom_fast_read(adapter, | |
1094 | QLCNIC_FW_VERSION_OFFSET, (int *)&val)) | |
1095 | return -EIO; | |
1096 | ||
1097 | val = QLCNIC_DECODE_VERSION(val); | |
1098 | if (val > ver) { | |
1099 | dev_info(&pdev->dev, "%s: firmware is older than flash\n", | |
1100 | fw_name[fw_type]); | |
1101 | return -EINVAL; | |
1102 | } | |
1103 | ||
1104 | QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC); | |
1105 | return 0; | |
1106 | } | |
1107 | ||
1108 | static void | |
1109 | qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter) | |
1110 | { | |
1111 | u8 fw_type; | |
1112 | ||
1113 | switch (adapter->fw_type) { | |
1114 | case QLCNIC_UNKNOWN_ROMIMAGE: | |
1115 | fw_type = QLCNIC_UNIFIED_ROMIMAGE; | |
1116 | break; | |
1117 | ||
1118 | case QLCNIC_UNIFIED_ROMIMAGE: | |
1119 | default: | |
1120 | fw_type = QLCNIC_FLASH_ROMIMAGE; | |
1121 | break; | |
1122 | } | |
1123 | ||
1124 | adapter->fw_type = fw_type; | |
1125 | } | |
1126 | ||
1127 | ||
1128 | ||
1129 | void qlcnic_request_firmware(struct qlcnic_adapter *adapter) | |
1130 | { | |
1131 | struct pci_dev *pdev = adapter->pdev; | |
1132 | int rc; | |
1133 | ||
1134 | adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE; | |
1135 | ||
1136 | next: | |
1137 | qlcnic_get_next_fwtype(adapter); | |
1138 | ||
1139 | if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) { | |
1140 | adapter->fw = NULL; | |
1141 | } else { | |
1142 | rc = request_firmware(&adapter->fw, | |
1143 | fw_name[adapter->fw_type], &pdev->dev); | |
1144 | if (rc != 0) | |
1145 | goto next; | |
1146 | ||
1147 | rc = qlcnic_validate_firmware(adapter); | |
1148 | if (rc != 0) { | |
1149 | release_firmware(adapter->fw); | |
1150 | msleep(1); | |
1151 | goto next; | |
1152 | } | |
1153 | } | |
1154 | } | |
1155 | ||
1156 | ||
1157 | void | |
1158 | qlcnic_release_firmware(struct qlcnic_adapter *adapter) | |
1159 | { | |
1160 | if (adapter->fw) | |
1161 | release_firmware(adapter->fw); | |
1162 | adapter->fw = NULL; | |
1163 | } | |
1164 | ||
900c6cff | 1165 | static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter) |
af19b491 AKS |
1166 | { |
1167 | u32 val; | |
1168 | int retries = 60; | |
1169 | ||
1170 | do { | |
1171 | val = QLCRD32(adapter, CRB_CMDPEG_STATE); | |
1172 | ||
1173 | switch (val) { | |
1174 | case PHAN_INITIALIZE_COMPLETE: | |
1175 | case PHAN_INITIALIZE_ACK: | |
1176 | return 0; | |
1177 | case PHAN_INITIALIZE_FAILED: | |
1178 | goto out_err; | |
1179 | default: | |
1180 | break; | |
1181 | } | |
1182 | ||
1183 | msleep(500); | |
1184 | ||
1185 | } while (--retries); | |
1186 | ||
1187 | QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); | |
1188 | ||
1189 | out_err: | |
900c6cff AKS |
1190 | dev_err(&adapter->pdev->dev, "Command Peg initialization not " |
1191 | "complete, state: 0x%x.\n", val); | |
af19b491 AKS |
1192 | return -EIO; |
1193 | } | |
1194 | ||
1195 | static int | |
1196 | qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter) | |
1197 | { | |
1198 | u32 val; | |
1199 | int retries = 2000; | |
1200 | ||
1201 | do { | |
1202 | val = QLCRD32(adapter, CRB_RCVPEG_STATE); | |
1203 | ||
1204 | if (val == PHAN_PEG_RCV_INITIALIZED) | |
1205 | return 0; | |
1206 | ||
1207 | msleep(10); | |
1208 | ||
1209 | } while (--retries); | |
1210 | ||
1211 | if (!retries) { | |
1212 | dev_err(&adapter->pdev->dev, "Receive Peg initialization not " | |
1213 | "complete, state: 0x%x.\n", val); | |
1214 | return -EIO; | |
1215 | } | |
1216 | ||
1217 | return 0; | |
1218 | } | |
1219 | ||
1220 | int qlcnic_init_firmware(struct qlcnic_adapter *adapter) | |
1221 | { | |
1222 | int err; | |
1223 | ||
900c6cff AKS |
1224 | err = qlcnic_cmd_peg_ready(adapter); |
1225 | if (err) | |
1226 | return err; | |
1227 | ||
af19b491 AKS |
1228 | err = qlcnic_receive_peg_ready(adapter); |
1229 | if (err) | |
1230 | return err; | |
1231 | ||
af19b491 AKS |
1232 | QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); |
1233 | ||
1234 | return err; | |
1235 | } | |
1236 | ||
1237 | static void | |
1238 | qlcnic_handle_linkevent(struct qlcnic_adapter *adapter, | |
1239 | struct qlcnic_fw_msg *msg) | |
1240 | { | |
1241 | u32 cable_OUI; | |
1242 | u16 cable_len; | |
1243 | u16 link_speed; | |
1244 | u8 link_status, module, duplex, autoneg; | |
1245 | struct net_device *netdev = adapter->netdev; | |
1246 | ||
1247 | adapter->has_link_events = 1; | |
1248 | ||
1249 | cable_OUI = msg->body[1] & 0xffffffff; | |
1250 | cable_len = (msg->body[1] >> 32) & 0xffff; | |
1251 | link_speed = (msg->body[1] >> 48) & 0xffff; | |
1252 | ||
1253 | link_status = msg->body[2] & 0xff; | |
1254 | duplex = (msg->body[2] >> 16) & 0xff; | |
1255 | autoneg = (msg->body[2] >> 24) & 0xff; | |
1256 | ||
1257 | module = (msg->body[2] >> 8) & 0xff; | |
1258 | if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) | |
1259 | dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, " | |
1260 | "length %d\n", cable_OUI, cable_len); | |
1261 | else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) | |
1262 | dev_info(&netdev->dev, "unsupported cable length %d\n", | |
1263 | cable_len); | |
1264 | ||
1265 | qlcnic_advert_link_change(adapter, link_status); | |
1266 | ||
1267 | if (duplex == LINKEVENT_FULL_DUPLEX) | |
1268 | adapter->link_duplex = DUPLEX_FULL; | |
1269 | else | |
1270 | adapter->link_duplex = DUPLEX_HALF; | |
1271 | ||
1272 | adapter->module_type = module; | |
1273 | adapter->link_autoneg = autoneg; | |
1274 | adapter->link_speed = link_speed; | |
1275 | } | |
1276 | ||
1277 | static void | |
1278 | qlcnic_handle_fw_message(int desc_cnt, int index, | |
1279 | struct qlcnic_host_sds_ring *sds_ring) | |
1280 | { | |
1281 | struct qlcnic_fw_msg msg; | |
1282 | struct status_desc *desc; | |
1283 | int i = 0, opcode; | |
1284 | ||
1285 | while (desc_cnt > 0 && i < 8) { | |
1286 | desc = &sds_ring->desc_head[index]; | |
1287 | msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); | |
1288 | msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); | |
1289 | ||
1290 | index = get_next_index(index, sds_ring->num_desc); | |
1291 | desc_cnt--; | |
1292 | } | |
1293 | ||
1294 | opcode = qlcnic_get_nic_msg_opcode(msg.body[0]); | |
1295 | switch (opcode) { | |
1296 | case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: | |
1297 | qlcnic_handle_linkevent(sds_ring->adapter, &msg); | |
1298 | break; | |
1299 | default: | |
1300 | break; | |
1301 | } | |
1302 | } | |
1303 | ||
1304 | static int | |
1305 | qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter, | |
1306 | struct qlcnic_host_rds_ring *rds_ring, | |
1307 | struct qlcnic_rx_buffer *buffer) | |
1308 | { | |
1309 | struct sk_buff *skb; | |
1310 | dma_addr_t dma; | |
1311 | struct pci_dev *pdev = adapter->pdev; | |
1312 | ||
96659828 AKS |
1313 | skb = dev_alloc_skb(rds_ring->skb_size); |
1314 | if (!skb) { | |
8bfe8b91 | 1315 | adapter->stats.skb_alloc_failure++; |
af19b491 | 1316 | return -ENOMEM; |
8bfe8b91 | 1317 | } |
af19b491 | 1318 | |
251a84c9 | 1319 | skb_reserve(skb, 2); |
af19b491 AKS |
1320 | |
1321 | dma = pci_map_single(pdev, skb->data, | |
1322 | rds_ring->dma_size, PCI_DMA_FROMDEVICE); | |
1323 | ||
1324 | if (pci_dma_mapping_error(pdev, dma)) { | |
8ae6df97 | 1325 | adapter->stats.rx_dma_map_error++; |
af19b491 | 1326 | dev_kfree_skb_any(skb); |
af19b491 AKS |
1327 | return -ENOMEM; |
1328 | } | |
1329 | ||
1330 | buffer->skb = skb; | |
1331 | buffer->dma = dma; | |
af19b491 AKS |
1332 | |
1333 | return 0; | |
1334 | } | |
1335 | ||
1336 | static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter, | |
1337 | struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum) | |
1338 | { | |
1339 | struct qlcnic_rx_buffer *buffer; | |
1340 | struct sk_buff *skb; | |
1341 | ||
1342 | buffer = &rds_ring->rx_buf_arr[index]; | |
1343 | ||
96659828 AKS |
1344 | if (unlikely(buffer->skb == NULL)) { |
1345 | WARN_ON(1); | |
1346 | return NULL; | |
1347 | } | |
1348 | ||
af19b491 AKS |
1349 | pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, |
1350 | PCI_DMA_FROMDEVICE); | |
1351 | ||
1352 | skb = buffer->skb; | |
af19b491 AKS |
1353 | |
1354 | if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) { | |
1355 | adapter->stats.csummed++; | |
1356 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1357 | } else { | |
1358 | skb->ip_summed = CHECKSUM_NONE; | |
1359 | } | |
1360 | ||
1361 | skb->dev = adapter->netdev; | |
1362 | ||
1363 | buffer->skb = NULL; | |
96659828 | 1364 | |
af19b491 AKS |
1365 | return skb; |
1366 | } | |
1367 | ||
1368 | static struct qlcnic_rx_buffer * | |
1369 | qlcnic_process_rcv(struct qlcnic_adapter *adapter, | |
1370 | struct qlcnic_host_sds_ring *sds_ring, | |
1371 | int ring, u64 sts_data0) | |
1372 | { | |
1373 | struct net_device *netdev = adapter->netdev; | |
1374 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; | |
1375 | struct qlcnic_rx_buffer *buffer; | |
1376 | struct sk_buff *skb; | |
1377 | struct qlcnic_host_rds_ring *rds_ring; | |
1378 | int index, length, cksum, pkt_offset; | |
1379 | ||
1380 | if (unlikely(ring >= adapter->max_rds_rings)) | |
1381 | return NULL; | |
1382 | ||
1383 | rds_ring = &recv_ctx->rds_rings[ring]; | |
1384 | ||
1385 | index = qlcnic_get_sts_refhandle(sts_data0); | |
1386 | if (unlikely(index >= rds_ring->num_desc)) | |
1387 | return NULL; | |
1388 | ||
1389 | buffer = &rds_ring->rx_buf_arr[index]; | |
1390 | ||
1391 | length = qlcnic_get_sts_totallength(sts_data0); | |
1392 | cksum = qlcnic_get_sts_status(sts_data0); | |
1393 | pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0); | |
1394 | ||
1395 | skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum); | |
1396 | if (!skb) | |
1397 | return buffer; | |
1398 | ||
1399 | if (length > rds_ring->skb_size) | |
1400 | skb_put(skb, rds_ring->skb_size); | |
1401 | else | |
1402 | skb_put(skb, length); | |
1403 | ||
1404 | if (pkt_offset) | |
1405 | skb_pull(skb, pkt_offset); | |
1406 | ||
1407 | skb->truesize = skb->len + sizeof(struct sk_buff); | |
1408 | skb->protocol = eth_type_trans(skb, netdev); | |
1409 | ||
1410 | napi_gro_receive(&sds_ring->napi, skb); | |
1411 | ||
1412 | adapter->stats.rx_pkts++; | |
1413 | adapter->stats.rxbytes += length; | |
1414 | ||
1415 | return buffer; | |
1416 | } | |
1417 | ||
1418 | #define QLC_TCP_HDR_SIZE 20 | |
1419 | #define QLC_TCP_TS_OPTION_SIZE 12 | |
1420 | #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE) | |
1421 | ||
1422 | static struct qlcnic_rx_buffer * | |
1423 | qlcnic_process_lro(struct qlcnic_adapter *adapter, | |
1424 | struct qlcnic_host_sds_ring *sds_ring, | |
1425 | int ring, u64 sts_data0, u64 sts_data1) | |
1426 | { | |
1427 | struct net_device *netdev = adapter->netdev; | |
1428 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; | |
1429 | struct qlcnic_rx_buffer *buffer; | |
1430 | struct sk_buff *skb; | |
1431 | struct qlcnic_host_rds_ring *rds_ring; | |
1432 | struct iphdr *iph; | |
1433 | struct tcphdr *th; | |
1434 | bool push, timestamp; | |
1435 | int l2_hdr_offset, l4_hdr_offset; | |
1436 | int index; | |
1437 | u16 lro_length, length, data_offset; | |
1438 | u32 seq_number; | |
1439 | ||
1440 | if (unlikely(ring > adapter->max_rds_rings)) | |
1441 | return NULL; | |
1442 | ||
1443 | rds_ring = &recv_ctx->rds_rings[ring]; | |
1444 | ||
1445 | index = qlcnic_get_lro_sts_refhandle(sts_data0); | |
1446 | if (unlikely(index > rds_ring->num_desc)) | |
1447 | return NULL; | |
1448 | ||
1449 | buffer = &rds_ring->rx_buf_arr[index]; | |
1450 | ||
1451 | timestamp = qlcnic_get_lro_sts_timestamp(sts_data0); | |
1452 | lro_length = qlcnic_get_lro_sts_length(sts_data0); | |
1453 | l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0); | |
1454 | l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0); | |
1455 | push = qlcnic_get_lro_sts_push_flag(sts_data0); | |
1456 | seq_number = qlcnic_get_lro_sts_seq_number(sts_data1); | |
1457 | ||
1458 | skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); | |
1459 | if (!skb) | |
1460 | return buffer; | |
1461 | ||
1462 | if (timestamp) | |
1463 | data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE; | |
1464 | else | |
1465 | data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE; | |
1466 | ||
1467 | skb_put(skb, lro_length + data_offset); | |
1468 | ||
1469 | skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb); | |
1470 | ||
1471 | skb_pull(skb, l2_hdr_offset); | |
1472 | skb->protocol = eth_type_trans(skb, netdev); | |
1473 | ||
1474 | iph = (struct iphdr *)skb->data; | |
1475 | th = (struct tcphdr *)(skb->data + (iph->ihl << 2)); | |
1476 | ||
1477 | length = (iph->ihl << 2) + (th->doff << 2) + lro_length; | |
1478 | iph->tot_len = htons(length); | |
1479 | iph->check = 0; | |
1480 | iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); | |
1481 | th->psh = push; | |
1482 | th->seq = htonl(seq_number); | |
1483 | ||
1484 | length = skb->len; | |
1485 | ||
1486 | netif_receive_skb(skb); | |
1487 | ||
1488 | adapter->stats.lro_pkts++; | |
8bfe8b91 | 1489 | adapter->stats.lrobytes += length; |
af19b491 AKS |
1490 | |
1491 | return buffer; | |
1492 | } | |
1493 | ||
1494 | int | |
1495 | qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max) | |
1496 | { | |
1497 | struct qlcnic_adapter *adapter = sds_ring->adapter; | |
1498 | struct list_head *cur; | |
1499 | struct status_desc *desc; | |
1500 | struct qlcnic_rx_buffer *rxbuf; | |
1501 | u64 sts_data0, sts_data1; | |
1502 | ||
1503 | int count = 0; | |
1504 | int opcode, ring, desc_cnt; | |
1505 | u32 consumer = sds_ring->consumer; | |
1506 | ||
1507 | while (count < max) { | |
1508 | desc = &sds_ring->desc_head[consumer]; | |
1509 | sts_data0 = le64_to_cpu(desc->status_desc_data[0]); | |
1510 | ||
1511 | if (!(sts_data0 & STATUS_OWNER_HOST)) | |
1512 | break; | |
1513 | ||
1514 | desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0); | |
1515 | opcode = qlcnic_get_sts_opcode(sts_data0); | |
1516 | ||
1517 | switch (opcode) { | |
1518 | case QLCNIC_RXPKT_DESC: | |
1519 | case QLCNIC_OLD_RXPKT_DESC: | |
1520 | case QLCNIC_SYN_OFFLOAD: | |
1521 | ring = qlcnic_get_sts_type(sts_data0); | |
1522 | rxbuf = qlcnic_process_rcv(adapter, sds_ring, | |
1523 | ring, sts_data0); | |
1524 | break; | |
1525 | case QLCNIC_LRO_DESC: | |
1526 | ring = qlcnic_get_lro_sts_type(sts_data0); | |
1527 | sts_data1 = le64_to_cpu(desc->status_desc_data[1]); | |
1528 | rxbuf = qlcnic_process_lro(adapter, sds_ring, | |
1529 | ring, sts_data0, sts_data1); | |
1530 | break; | |
1531 | case QLCNIC_RESPONSE_DESC: | |
1532 | qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring); | |
1533 | default: | |
1534 | goto skip; | |
1535 | } | |
1536 | ||
1537 | WARN_ON(desc_cnt > 1); | |
1538 | ||
96659828 | 1539 | if (likely(rxbuf)) |
af19b491 | 1540 | list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); |
8ae6df97 AKS |
1541 | else |
1542 | adapter->stats.null_rxbuf++; | |
af19b491 AKS |
1543 | |
1544 | skip: | |
1545 | for (; desc_cnt > 0; desc_cnt--) { | |
1546 | desc = &sds_ring->desc_head[consumer]; | |
1547 | desc->status_desc_data[0] = | |
1548 | cpu_to_le64(STATUS_OWNER_PHANTOM); | |
1549 | consumer = get_next_index(consumer, sds_ring->num_desc); | |
1550 | } | |
1551 | count++; | |
1552 | } | |
1553 | ||
1554 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
1555 | struct qlcnic_host_rds_ring *rds_ring = | |
1556 | &adapter->recv_ctx.rds_rings[ring]; | |
1557 | ||
1558 | if (!list_empty(&sds_ring->free_list[ring])) { | |
1559 | list_for_each(cur, &sds_ring->free_list[ring]) { | |
1560 | rxbuf = list_entry(cur, | |
1561 | struct qlcnic_rx_buffer, list); | |
1562 | qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf); | |
1563 | } | |
1564 | spin_lock(&rds_ring->lock); | |
1565 | list_splice_tail_init(&sds_ring->free_list[ring], | |
1566 | &rds_ring->free_list); | |
1567 | spin_unlock(&rds_ring->lock); | |
1568 | } | |
1569 | ||
1570 | qlcnic_post_rx_buffers_nodb(adapter, rds_ring); | |
1571 | } | |
1572 | ||
1573 | if (count) { | |
1574 | sds_ring->consumer = consumer; | |
1575 | writel(consumer, sds_ring->crb_sts_consumer); | |
1576 | } | |
1577 | ||
1578 | return count; | |
1579 | } | |
1580 | ||
1581 | void | |
1582 | qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid, | |
1583 | struct qlcnic_host_rds_ring *rds_ring) | |
1584 | { | |
1585 | struct rcv_desc *pdesc; | |
1586 | struct qlcnic_rx_buffer *buffer; | |
1587 | int producer, count = 0; | |
1588 | struct list_head *head; | |
1589 | ||
ed6f1353 AKS |
1590 | spin_lock(&rds_ring->lock); |
1591 | ||
af19b491 AKS |
1592 | producer = rds_ring->producer; |
1593 | ||
af19b491 AKS |
1594 | head = &rds_ring->free_list; |
1595 | while (!list_empty(head)) { | |
1596 | ||
1597 | buffer = list_entry(head->next, struct qlcnic_rx_buffer, list); | |
1598 | ||
1599 | if (!buffer->skb) { | |
1600 | if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer)) | |
1601 | break; | |
1602 | } | |
1603 | ||
1604 | count++; | |
1605 | list_del(&buffer->list); | |
1606 | ||
1607 | /* make a rcv descriptor */ | |
1608 | pdesc = &rds_ring->desc_head[producer]; | |
1609 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); | |
1610 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); | |
1611 | pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); | |
1612 | ||
1613 | producer = get_next_index(producer, rds_ring->num_desc); | |
1614 | } | |
af19b491 AKS |
1615 | |
1616 | if (count) { | |
1617 | rds_ring->producer = producer; | |
1618 | writel((producer-1) & (rds_ring->num_desc-1), | |
1619 | rds_ring->crb_rcv_producer); | |
1620 | } | |
ed6f1353 | 1621 | spin_unlock(&rds_ring->lock); |
af19b491 AKS |
1622 | } |
1623 | ||
1624 | static void | |
1625 | qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter, | |
1626 | struct qlcnic_host_rds_ring *rds_ring) | |
1627 | { | |
1628 | struct rcv_desc *pdesc; | |
1629 | struct qlcnic_rx_buffer *buffer; | |
1630 | int producer, count = 0; | |
1631 | struct list_head *head; | |
1632 | ||
af19b491 AKS |
1633 | if (!spin_trylock(&rds_ring->lock)) |
1634 | return; | |
1635 | ||
ed6f1353 AKS |
1636 | producer = rds_ring->producer; |
1637 | ||
af19b491 AKS |
1638 | head = &rds_ring->free_list; |
1639 | while (!list_empty(head)) { | |
1640 | ||
1641 | buffer = list_entry(head->next, struct qlcnic_rx_buffer, list); | |
1642 | ||
1643 | if (!buffer->skb) { | |
1644 | if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer)) | |
1645 | break; | |
1646 | } | |
1647 | ||
1648 | count++; | |
1649 | list_del(&buffer->list); | |
1650 | ||
1651 | /* make a rcv descriptor */ | |
1652 | pdesc = &rds_ring->desc_head[producer]; | |
1653 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); | |
1654 | pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); | |
1655 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); | |
1656 | ||
1657 | producer = get_next_index(producer, rds_ring->num_desc); | |
1658 | } | |
1659 | ||
1660 | if (count) { | |
1661 | rds_ring->producer = producer; | |
1662 | writel((producer - 1) & (rds_ring->num_desc - 1), | |
1663 | rds_ring->crb_rcv_producer); | |
1664 | } | |
1665 | spin_unlock(&rds_ring->lock); | |
1666 | } | |
1667 | ||
cdaff185 AKS |
1668 | static struct qlcnic_rx_buffer * |
1669 | qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter, | |
1670 | struct qlcnic_host_sds_ring *sds_ring, | |
1671 | int ring, u64 sts_data0) | |
1672 | { | |
1673 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; | |
1674 | struct qlcnic_rx_buffer *buffer; | |
1675 | struct sk_buff *skb; | |
1676 | struct qlcnic_host_rds_ring *rds_ring; | |
1677 | int index, length, cksum, pkt_offset; | |
1678 | ||
1679 | if (unlikely(ring >= adapter->max_rds_rings)) | |
1680 | return NULL; | |
1681 | ||
1682 | rds_ring = &recv_ctx->rds_rings[ring]; | |
1683 | ||
1684 | index = qlcnic_get_sts_refhandle(sts_data0); | |
1685 | if (unlikely(index >= rds_ring->num_desc)) | |
1686 | return NULL; | |
1687 | ||
1688 | buffer = &rds_ring->rx_buf_arr[index]; | |
1689 | ||
1690 | length = qlcnic_get_sts_totallength(sts_data0); | |
1691 | cksum = qlcnic_get_sts_status(sts_data0); | |
1692 | pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0); | |
1693 | ||
1694 | skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum); | |
1695 | if (!skb) | |
1696 | return buffer; | |
1697 | ||
1698 | skb_put(skb, rds_ring->skb_size); | |
1699 | ||
1700 | if (pkt_offset) | |
1701 | skb_pull(skb, pkt_offset); | |
1702 | ||
1703 | skb->truesize = skb->len + sizeof(struct sk_buff); | |
1704 | ||
1705 | if (!qlcnic_check_loopback_buff(skb->data)) | |
1706 | adapter->diag_cnt++; | |
1707 | ||
1708 | dev_kfree_skb_any(skb); | |
8bfe8b91 SC |
1709 | adapter->stats.rx_pkts++; |
1710 | adapter->stats.rxbytes += length; | |
cdaff185 AKS |
1711 | |
1712 | return buffer; | |
1713 | } | |
1714 | ||
1715 | void | |
1716 | qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring) | |
1717 | { | |
1718 | struct qlcnic_adapter *adapter = sds_ring->adapter; | |
1719 | struct status_desc *desc; | |
1720 | struct qlcnic_rx_buffer *rxbuf; | |
1721 | u64 sts_data0; | |
1722 | ||
1723 | int opcode, ring, desc_cnt; | |
1724 | u32 consumer = sds_ring->consumer; | |
1725 | ||
1726 | desc = &sds_ring->desc_head[consumer]; | |
1727 | sts_data0 = le64_to_cpu(desc->status_desc_data[0]); | |
1728 | ||
1729 | if (!(sts_data0 & STATUS_OWNER_HOST)) | |
1730 | return; | |
1731 | ||
1732 | desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0); | |
1733 | opcode = qlcnic_get_sts_opcode(sts_data0); | |
1734 | ||
1735 | ring = qlcnic_get_sts_type(sts_data0); | |
1736 | rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring, | |
1737 | ring, sts_data0); | |
1738 | ||
1739 | desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM); | |
1740 | consumer = get_next_index(consumer, sds_ring->num_desc); | |
1741 | ||
1742 | sds_ring->consumer = consumer; | |
1743 | writel(consumer, sds_ring->crb_sts_consumer); | |
1744 | } | |
2e9d722d AC |
1745 | |
1746 | void | |
1747 | qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2, | |
1748 | u8 alt_mac, u8 *mac) | |
1749 | { | |
1750 | u32 mac_low, mac_high; | |
1751 | int i; | |
1752 | ||
1753 | mac_low = QLCRD32(adapter, off1); | |
1754 | mac_high = QLCRD32(adapter, off2); | |
1755 | ||
1756 | if (alt_mac) { | |
1757 | mac_low |= (mac_low >> 16) | (mac_high << 16); | |
1758 | mac_high >>= 16; | |
1759 | } | |
1760 | ||
1761 | for (i = 0; i < 2; i++) | |
1762 | mac[i] = (u8)(mac_high >> ((1 - i) * 8)); | |
1763 | for (i = 2; i < 6; i++) | |
1764 | mac[i] = (u8)(mac_low >> ((5 - i) * 8)); | |
1765 | } |