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qlcnic: NIC Partitioning - Add basic infrastructure support
[net-next-2.6.git] / drivers / net / qlcnic / qlcnic_init.c
CommitLineData
af19b491
AKS		 1/*
2 * Copyright (C) 2009 - QLogic Corporation.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called "COPYING".
22 *
23 */
24
25#include <linux/netdevice.h>
26#include <linux/delay.h>
5a0e3ad6 27#include <linux/slab.h>
af19b491
AKS		 28#include "qlcnic.h"
29
30struct crb_addr_pair {
31 u32 addr;
32 u32 data;
33};
34
35#define QLCNIC_MAX_CRB_XFORM 60
36static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
37
38#define crb_addr_transform(name) \
39 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
40 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
41
42#define QLCNIC_ADDR_ERROR (0xffffffff)
43
44static void
45qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
46 struct qlcnic_host_rds_ring *rds_ring);
47
48static void crb_addr_transform_setup(void)
49{
50 crb_addr_transform(XDMA);
51 crb_addr_transform(TIMR);
52 crb_addr_transform(SRE);
53 crb_addr_transform(SQN3);
54 crb_addr_transform(SQN2);
55 crb_addr_transform(SQN1);
56 crb_addr_transform(SQN0);
57 crb_addr_transform(SQS3);
58 crb_addr_transform(SQS2);
59 crb_addr_transform(SQS1);
60 crb_addr_transform(SQS0);
61 crb_addr_transform(RPMX7);
62 crb_addr_transform(RPMX6);
63 crb_addr_transform(RPMX5);
64 crb_addr_transform(RPMX4);
65 crb_addr_transform(RPMX3);
66 crb_addr_transform(RPMX2);
67 crb_addr_transform(RPMX1);
68 crb_addr_transform(RPMX0);
69 crb_addr_transform(ROMUSB);
70 crb_addr_transform(SN);
71 crb_addr_transform(QMN);
72 crb_addr_transform(QMS);
73 crb_addr_transform(PGNI);
74 crb_addr_transform(PGND);
75 crb_addr_transform(PGN3);
76 crb_addr_transform(PGN2);
77 crb_addr_transform(PGN1);
78 crb_addr_transform(PGN0);
79 crb_addr_transform(PGSI);
80 crb_addr_transform(PGSD);
81 crb_addr_transform(PGS3);
82 crb_addr_transform(PGS2);
83 crb_addr_transform(PGS1);
84 crb_addr_transform(PGS0);
85 crb_addr_transform(PS);
86 crb_addr_transform(PH);
87 crb_addr_transform(NIU);
88 crb_addr_transform(I2Q);
89 crb_addr_transform(EG);
90 crb_addr_transform(MN);
91 crb_addr_transform(MS);
92 crb_addr_transform(CAS2);
93 crb_addr_transform(CAS1);
94 crb_addr_transform(CAS0);
95 crb_addr_transform(CAM);
96 crb_addr_transform(C2C1);
97 crb_addr_transform(C2C0);
98 crb_addr_transform(SMB);
99 crb_addr_transform(OCM0);
100 crb_addr_transform(I2C0);
101}
102
103void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
104{
105 struct qlcnic_recv_context *recv_ctx;
106 struct qlcnic_host_rds_ring *rds_ring;
107 struct qlcnic_rx_buffer *rx_buf;
108 int i, ring;
109
110 recv_ctx = &adapter->recv_ctx;
111 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
112 rds_ring = &recv_ctx->rds_rings[ring];
113 for (i = 0; i < rds_ring->num_desc; ++i) {
114 rx_buf = &(rds_ring->rx_buf_arr[i]);
115 if (rx_buf->state == QLCNIC_BUFFER_FREE)
116 continue;
117 pci_unmap_single(adapter->pdev,
118 rx_buf->dma,
119 rds_ring->dma_size,
120 PCI_DMA_FROMDEVICE);
121 if (rx_buf->skb != NULL)
122 dev_kfree_skb_any(rx_buf->skb);
123 }
124 }
125}
126
127void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
128{
129 struct qlcnic_cmd_buffer *cmd_buf;
130 struct qlcnic_skb_frag *buffrag;
131 int i, j;
132 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
133
134 cmd_buf = tx_ring->cmd_buf_arr;
135 for (i = 0; i < tx_ring->num_desc; i++) {
136 buffrag = cmd_buf->frag_array;
137 if (buffrag->dma) {
138 pci_unmap_single(adapter->pdev, buffrag->dma,
139 buffrag->length, PCI_DMA_TODEVICE);
140 buffrag->dma = 0ULL;
141 }
142 for (j = 0; j < cmd_buf->frag_count; j++) {
143 buffrag++;
144 if (buffrag->dma) {
145 pci_unmap_page(adapter->pdev, buffrag->dma,
146 buffrag->length,
147 PCI_DMA_TODEVICE);
148 buffrag->dma = 0ULL;
149 }
150 }
151 if (cmd_buf->skb) {
152 dev_kfree_skb_any(cmd_buf->skb);
153 cmd_buf->skb = NULL;
154 }
155 cmd_buf++;
156 }
157}
158
159void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
160{
161 struct qlcnic_recv_context *recv_ctx;
162 struct qlcnic_host_rds_ring *rds_ring;
163 struct qlcnic_host_tx_ring *tx_ring;
164 int ring;
165
166 recv_ctx = &adapter->recv_ctx;
167
168 if (recv_ctx->rds_rings == NULL)
169 goto skip_rds;
170
171 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
172 rds_ring = &recv_ctx->rds_rings[ring];
173 vfree(rds_ring->rx_buf_arr);
174 rds_ring->rx_buf_arr = NULL;
175 }
176 kfree(recv_ctx->rds_rings);
177
178skip_rds:
179 if (adapter->tx_ring == NULL)
180 return;
181
182 tx_ring = adapter->tx_ring;
183 vfree(tx_ring->cmd_buf_arr);
184 kfree(adapter->tx_ring);
185}
186
187int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
188{
189 struct qlcnic_recv_context *recv_ctx;
190 struct qlcnic_host_rds_ring *rds_ring;
191 struct qlcnic_host_sds_ring *sds_ring;
192 struct qlcnic_host_tx_ring *tx_ring;
193 struct qlcnic_rx_buffer *rx_buf;
194 int ring, i, size;
195
196 struct qlcnic_cmd_buffer *cmd_buf_arr;
197 struct net_device *netdev = adapter->netdev;
198
199 size = sizeof(struct qlcnic_host_tx_ring);
200 tx_ring = kzalloc(size, GFP_KERNEL);
201 if (tx_ring == NULL) {
202 dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
203 return -ENOMEM;
204 }
205 adapter->tx_ring = tx_ring;
206
207 tx_ring->num_desc = adapter->num_txd;
208 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
209
210 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
211 if (cmd_buf_arr == NULL) {
212 dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
aadd8184 213 goto err_out;
af19b491
AKS		 214 }
215 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
216 tx_ring->cmd_buf_arr = cmd_buf_arr;
217
218 recv_ctx = &adapter->recv_ctx;
219
220 size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
221 rds_ring = kzalloc(size, GFP_KERNEL);
222 if (rds_ring == NULL) {
223 dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
aadd8184 224 goto err_out;
af19b491
AKS		 225 }
226 recv_ctx->rds_rings = rds_ring;
227
228 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
229 rds_ring = &recv_ctx->rds_rings[ring];
230 switch (ring) {
231 case RCV_RING_NORMAL:
232 rds_ring->num_desc = adapter->num_rxd;
251a84c9
AKS		 233 rds_ring->dma_size = QLCNIC_P3_RX_BUF_MAX_LEN;
234 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
af19b491
AKS		 235 break;
236
237 case RCV_RING_JUMBO:
238 rds_ring->num_desc = adapter->num_jumbo_rxd;
239 rds_ring->dma_size =
240 QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN;
241
242 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
243 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
244
245 rds_ring->skb_size =
246 rds_ring->dma_size + NET_IP_ALIGN;
247 break;
af19b491
AKS		 248 }
249 rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *)
250 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
251 if (rds_ring->rx_buf_arr == NULL) {
252 dev_err(&netdev->dev, "Failed to allocate "
253 "rx buffer ring %d\n", ring);
254 goto err_out;
255 }
256 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
257 INIT_LIST_HEAD(&rds_ring->free_list);
258 /*
259 * Now go through all of them, set reference handles
260 * and put them in the queues.
261 */
262 rx_buf = rds_ring->rx_buf_arr;
263 for (i = 0; i < rds_ring->num_desc; i++) {
264 list_add_tail(&rx_buf->list,
265 &rds_ring->free_list);
266 rx_buf->ref_handle = i;
267 rx_buf->state = QLCNIC_BUFFER_FREE;
268 rx_buf++;
269 }
270 spin_lock_init(&rds_ring->lock);
271 }
272
273 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
274 sds_ring = &recv_ctx->sds_rings[ring];
275 sds_ring->irq = adapter->msix_entries[ring].vector;
276 sds_ring->adapter = adapter;
277 sds_ring->num_desc = adapter->num_rxd;
278
279 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
280 INIT_LIST_HEAD(&sds_ring->free_list[i]);
281 }
282
283 return 0;
284
285err_out:
286 qlcnic_free_sw_resources(adapter);
287 return -ENOMEM;
288}
289
290/*
291 * Utility to translate from internal Phantom CRB address
292 * to external PCI CRB address.
293 */
294static u32 qlcnic_decode_crb_addr(u32 addr)
295{
296 int i;
297 u32 base_addr, offset, pci_base;
298
299 crb_addr_transform_setup();
300
301 pci_base = QLCNIC_ADDR_ERROR;
302 base_addr = addr & 0xfff00000;
303 offset = addr & 0x000fffff;
304
305 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
306 if (crb_addr_xform[i] == base_addr) {
307 pci_base = i << 20;
308 break;
309 }
310 }
311 if (pci_base == QLCNIC_ADDR_ERROR)
312 return pci_base;
313 else
314 return pci_base + offset;
315}
316
317#define QLCNIC_MAX_ROM_WAIT_USEC 100
318
319static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
320{
321 long timeout = 0;
322 long done = 0;
323
324 cond_resched();
325
326 while (done == 0) {
327 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
328 done &= 2;
329 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
330 dev_err(&adapter->pdev->dev,
331 "Timeout reached waiting for rom done");
332 return -EIO;
333 }
334 udelay(1);
335 }
336 return 0;
337}
338
339static int do_rom_fast_read(struct qlcnic_adapter *adapter,
340 int addr, int *valp)
341{
342 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
343 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
344 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
345 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
346 if (qlcnic_wait_rom_done(adapter)) {
347 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
348 return -EIO;
349 }
350 /* reset abyte_cnt and dummy_byte_cnt */
351 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
352 udelay(10);
353 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
354
355 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
356 return 0;
357}
358
359static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
360 u8 *bytes, size_t size)
361{
362 int addridx;
363 int ret = 0;
364
365 for (addridx = addr; addridx < (addr + size); addridx += 4) {
366 int v;
367 ret = do_rom_fast_read(adapter, addridx, &v);
368 if (ret != 0)
369 break;
370 *(__le32 *)bytes = cpu_to_le32(v);
371 bytes += 4;
372 }
373
374 return ret;
375}
376
377int
378qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
379 u8 *bytes, size_t size)
380{
381 int ret;
382
383 ret = qlcnic_rom_lock(adapter);
384 if (ret < 0)
385 return ret;
386
387 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
388
389 qlcnic_rom_unlock(adapter);
390 return ret;
391}
392
393int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
394{
395 int ret;
396
397 if (qlcnic_rom_lock(adapter) != 0)
398 return -EIO;
399
400 ret = do_rom_fast_read(adapter, addr, valp);
401 qlcnic_rom_unlock(adapter);
402 return ret;
403}
404
405int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
406{
407 int addr, val;
408 int i, n, init_delay;
409 struct crb_addr_pair *buf;
410 unsigned offset;
411 u32 off;
412 struct pci_dev *pdev = adapter->pdev;
413
414 /* resetall */
415 qlcnic_rom_lock(adapter);
416 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xffffffff);
417 qlcnic_rom_unlock(adapter);
418
419 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
420 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
421 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
422 return -EIO;
423 }
424 offset = n & 0xffffU;
425 n = (n >> 16) & 0xffffU;
426
427 if (n >= 1024) {
428 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
429 return -EIO;
430 }
431
432 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
433 if (buf == NULL) {
434 dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
435 return -ENOMEM;
436 }
437
438 for (i = 0; i < n; i++) {
439 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
440 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
441 kfree(buf);
442 return -EIO;
443 }
444
445 buf[i].addr = addr;
446 buf[i].data = val;
447 }
448
449 for (i = 0; i < n; i++) {
450
451 off = qlcnic_decode_crb_addr(buf[i].addr);
452 if (off == QLCNIC_ADDR_ERROR) {
453 dev_err(&pdev->dev, "CRB init value out of range %x\n",
454 buf[i].addr);
455 continue;
456 }
457 off += QLCNIC_PCI_CRBSPACE;
458
459 if (off & 1)
460 continue;
461
462 /* skipping cold reboot MAGIC */
463 if (off == QLCNIC_CAM_RAM(0x1fc))
464 continue;
465 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
466 continue;
467 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
468 continue;
469 if (off == (ROMUSB_GLB + 0xa8))
470 continue;
471 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
472 continue;
473 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
474 continue;
475 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
476 continue;
477 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
478 continue;
479 /* skip the function enable register */
480 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
481 continue;
482 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
483 continue;
484 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
485 continue;
486
487 init_delay = 1;
488 /* After writing this register, HW needs time for CRB */
489 /* to quiet down (else crb_window returns 0xffffffff) */
490 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
491 init_delay = 1000;
492
493 QLCWR32(adapter, off, buf[i].data);
494
495 msleep(init_delay);
496 }
497 kfree(buf);
498
499 /* p2dn replyCount */
500 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
501 /* disable_peg_cache 0 & 1*/
502 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
503 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
504
505 /* peg_clr_all */
506 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
507 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
508 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
509 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
510 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
511 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
512 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
513 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
514 return 0;
515}
516
b3a24649 517int
aa5e18c0
SC		 518qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
519
520 int timeo;
b3a24649
SC		 521 u32 val;
522
2e9d722d
AC		 523 if (adapter->fw_hal_version == QLCNIC_FW_BASE) {
524 val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
525 val = QLC_DEV_GET_DRV(val, adapter->portnum);
526 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
527 dev_err(&adapter->pdev->dev,
528 "Not an Ethernet NIC func=%u\n", val);
529 return -EIO;
530 }
531 adapter->physical_port = (val >> 2);
b3a24649 532 }
aa5e18c0
SC		 533 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
534 timeo = 30;
535
536 adapter->dev_init_timeo = timeo;
537
538 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
539 timeo = 10;
540
541 adapter->reset_ack_timeo = timeo;
b3a24649
SC		 542
543 return 0;
aa5e18c0
SC		 544}
545
af19b491
AKS		 546static int
547qlcnic_has_mn(struct qlcnic_adapter *adapter)
548{
549 u32 capability, flashed_ver;
550 capability = 0;
551
552 qlcnic_rom_fast_read(adapter,
553 QLCNIC_FW_VERSION_OFFSET, (int *)&flashed_ver);
554 flashed_ver = QLCNIC_DECODE_VERSION(flashed_ver);
555
251a84c9
AKS		 556 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
557 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
558 return 1;
af19b491 559
af19b491
AKS		 560 return 0;
561}
562
563static
564struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
565{
566 u32 i;
567 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
568 __le32 entries = cpu_to_le32(directory->num_entries);
569
570 for (i = 0; i < entries; i++) {
571
572 __le32 offs = cpu_to_le32(directory->findex) +
573 (i * cpu_to_le32(directory->entry_size));
574 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
575
576 if (tab_type == section)
577 return (struct uni_table_desc *) &unirom[offs];
578 }
579
580 return NULL;
581}
582
b7eff100
SC		 583#define FILEHEADER_SIZE (14 * 4)
584
af19b491 585static int
b7eff100 586qlcnic_validate_header(struct qlcnic_adapter *adapter)
af19b491 587{
af19b491 588 const u8 *unirom = adapter->fw->data;
b7eff100
SC		 589 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
590 __le32 fw_file_size = adapter->fw->size;
af19b491 591 __le32 entries;
b7eff100
SC		 592 __le32 entry_size;
593 __le32 tab_size;
594
595 if (fw_file_size < FILEHEADER_SIZE)
596 return -EINVAL;
597
598 entries = cpu_to_le32(directory->num_entries);
599 entry_size = cpu_to_le32(directory->entry_size);
600 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
601
602 if (fw_file_size < tab_size)
603 return -EINVAL;
604
605 return 0;
606}
607
608static int
609qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
610{
611 struct uni_table_desc *tab_desc;
612 struct uni_data_desc *descr;
613 const u8 *unirom = adapter->fw->data;
614 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
615 QLCNIC_UNI_BOOTLD_IDX_OFF));
616 __le32 offs;
617 __le32 tab_size;
618 __le32 data_size;
619
620 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
621
622 if (!tab_desc)
623 return -EINVAL;
624
625 tab_size = cpu_to_le32(tab_desc->findex) +
22dfaa86 626 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
b7eff100
SC		 627
628 if (adapter->fw->size < tab_size)
629 return -EINVAL;
630
631 offs = cpu_to_le32(tab_desc->findex) +
632 (cpu_to_le32(tab_desc->entry_size) * (idx));
633 descr = (struct uni_data_desc *)&unirom[offs];
634
22dfaa86 635 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
b7eff100
SC		 636
637 if (adapter->fw->size < data_size)
638 return -EINVAL;
639
640 return 0;
641}
642
643static int
644qlcnic_validate_fw(struct qlcnic_adapter *adapter)
645{
646 struct uni_table_desc *tab_desc;
647 struct uni_data_desc *descr;
648 const u8 *unirom = adapter->fw->data;
649 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
650 QLCNIC_UNI_FIRMWARE_IDX_OFF));
651 __le32 offs;
652 __le32 tab_size;
653 __le32 data_size;
654
655 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
656
657 if (!tab_desc)
658 return -EINVAL;
659
660 tab_size = cpu_to_le32(tab_desc->findex) +
22dfaa86 661 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
b7eff100
SC		 662
663 if (adapter->fw->size < tab_size)
664 return -EINVAL;
665
666 offs = cpu_to_le32(tab_desc->findex) +
667 (cpu_to_le32(tab_desc->entry_size) * (idx));
668 descr = (struct uni_data_desc *)&unirom[offs];
22dfaa86 669 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
b7eff100
SC		 670
671 if (adapter->fw->size < data_size)
672 return -EINVAL;
673
674 return 0;
675}
676
677static int
678qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
679{
680 struct uni_table_desc *ptab_descr;
681 const u8 *unirom = adapter->fw->data;
af19b491 682 int mn_present = qlcnic_has_mn(adapter);
b7eff100
SC		 683 __le32 entries;
684 __le32 entry_size;
685 __le32 tab_size;
686 u32 i;
af19b491
AKS		 687
688 ptab_descr = qlcnic_get_table_desc(unirom,
689 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
b7eff100
SC		 690 if (!ptab_descr)
691 return -EINVAL;
af19b491
AKS		 692
693 entries = cpu_to_le32(ptab_descr->num_entries);
b7eff100
SC		 694 entry_size = cpu_to_le32(ptab_descr->entry_size);
695 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
696
697 if (adapter->fw->size < tab_size)
698 return -EINVAL;
699
af19b491
AKS		 700nomn:
701 for (i = 0; i < entries; i++) {
702
703 __le32 flags, file_chiprev, offs;
704 u8 chiprev = adapter->ahw.revision_id;
705 u32 flagbit;
706
707 offs = cpu_to_le32(ptab_descr->findex) +
708 (i * cpu_to_le32(ptab_descr->entry_size));
709 flags = cpu_to_le32(*((int *)&unirom[offs] +
710 QLCNIC_UNI_FLAGS_OFF));
711 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
712 QLCNIC_UNI_CHIP_REV_OFF));
713
714 flagbit = mn_present ? 1 : 2;
715
716 if ((chiprev == file_chiprev) &&
717 ((1ULL << flagbit) & flags)) {
718 adapter->file_prd_off = offs;
719 return 0;
720 }
721 }
722 if (mn_present) {
723 mn_present = 0;
724 goto nomn;
725 }
b7eff100
SC		 726 return -EINVAL;
727}
728
729static int
730qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
731{
732 if (qlcnic_validate_header(adapter)) {
733 dev_err(&adapter->pdev->dev,
734 "unified image: header validation failed\n");
735 return -EINVAL;
736 }
737
738 if (qlcnic_validate_product_offs(adapter)) {
739 dev_err(&adapter->pdev->dev,
740 "unified image: product validation failed\n");
741 return -EINVAL;
742 }
743
744 if (qlcnic_validate_bootld(adapter)) {
745 dev_err(&adapter->pdev->dev,
746 "unified image: bootld validation failed\n");
747 return -EINVAL;
748 }
749
750 if (qlcnic_validate_fw(adapter)) {
751 dev_err(&adapter->pdev->dev,
752 "unified image: firmware validation failed\n");
753 return -EINVAL;
754 }
755
756 return 0;
af19b491
AKS		 757}
758
759static
760struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
761 u32 section, u32 idx_offset)
762{
763 const u8 *unirom = adapter->fw->data;
764 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
765 idx_offset));
766 struct uni_table_desc *tab_desc;
767 __le32 offs;
768
769 tab_desc = qlcnic_get_table_desc(unirom, section);
770
771 if (tab_desc == NULL)
772 return NULL;
773
774 offs = cpu_to_le32(tab_desc->findex) +
775 (cpu_to_le32(tab_desc->entry_size) * idx);
776
777 return (struct uni_data_desc *)&unirom[offs];
778}
779
780static u8 *
781qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
782{
783 u32 offs = QLCNIC_BOOTLD_START;
784
785 if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
786 offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
787 QLCNIC_UNI_DIR_SECT_BOOTLD,
788 QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
789
790 return (u8 *)&adapter->fw->data[offs];
791}
792
793static u8 *
794qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
795{
796 u32 offs = QLCNIC_IMAGE_START;
797
798 if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
799 offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
800 QLCNIC_UNI_DIR_SECT_FW,
801 QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
802
803 return (u8 *)&adapter->fw->data[offs];
804}
805
806static __le32
807qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
808{
809 if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
810 return cpu_to_le32((qlcnic_get_data_desc(adapter,
811 QLCNIC_UNI_DIR_SECT_FW,
812 QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
813 else
814 return cpu_to_le32(
815 *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
816}
817
818static __le32
819qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
820{
821 struct uni_data_desc *fw_data_desc;
822 const struct firmware *fw = adapter->fw;
823 __le32 major, minor, sub;
824 const u8 *ver_str;
825 int i, ret;
826
827 if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
828 return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
829
830 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
831 QLCNIC_UNI_FIRMWARE_IDX_OFF);
832 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
833 cpu_to_le32(fw_data_desc->size) - 17;
834
835 for (i = 0; i < 12; i++) {
836 if (!strncmp(&ver_str[i], "REV=", 4)) {
837 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
838 &major, &minor, &sub);
839 if (ret != 3)
840 return 0;
841 else
842 return major + (minor << 8) + (sub << 16);
843 }
844 }
845
846 return 0;
847}
848
849static __le32
850qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
851{
852 const struct firmware *fw = adapter->fw;
853 __le32 bios_ver, prd_off = adapter->file_prd_off;
854
855 if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
856 return cpu_to_le32(
857 *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
858
859 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
860 + QLCNIC_UNI_BIOS_VERSION_OFF));
861
addd5abf 862 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
af19b491
AKS		 863}
864
865int
866qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
867{
868 u32 count, old_count;
869 u32 val, version, major, minor, build;
870 int i, timeout;
871
872 if (adapter->need_fw_reset)
873 return 1;
874
875 /* last attempt had failed */
876 if (QLCRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
877 return 1;
878
879 old_count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
880
881 for (i = 0; i < 10; i++) {
882
883 timeout = msleep_interruptible(200);
884 if (timeout) {
885 QLCWR32(adapter, CRB_CMDPEG_STATE,
886 PHAN_INITIALIZE_FAILED);
887 return -EINTR;
888 }
889
890 count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
891 if (count != old_count)
892 break;
893 }
894
895 /* firmware is dead */
896 if (count == old_count)
897 return 1;
898
899 /* check if we have got newer or different file firmware */
900 if (adapter->fw) {
901
902 val = qlcnic_get_fw_version(adapter);
903
904 version = QLCNIC_DECODE_VERSION(val);
905
906 major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
907 minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
908 build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
909
910 if (version > QLCNIC_VERSION_CODE(major, minor, build))
911 return 1;
912 }
913
914 return 0;
915}
916
917static const char *fw_name[] = {
918 QLCNIC_UNIFIED_ROMIMAGE_NAME,
919 QLCNIC_FLASH_ROMIMAGE_NAME,
920};
921
922int
923qlcnic_load_firmware(struct qlcnic_adapter *adapter)
924{
925 u64 *ptr64;
926 u32 i, flashaddr, size;
927 const struct firmware *fw = adapter->fw;
928 struct pci_dev *pdev = adapter->pdev;
929
930 dev_info(&pdev->dev, "loading firmware from %s\n",
931 fw_name[adapter->fw_type]);
932
933 if (fw) {
934 __le64 data;
935
936 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
937
938 ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
939 flashaddr = QLCNIC_BOOTLD_START;
940
941 for (i = 0; i < size; i++) {
942 data = cpu_to_le64(ptr64[i]);
943
944 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
945 return -EIO;
946
947 flashaddr += 8;
948 }
949
950 size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
951
952 ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
953 flashaddr = QLCNIC_IMAGE_START;
954
955 for (i = 0; i < size; i++) {
956 data = cpu_to_le64(ptr64[i]);
957
958 if (qlcnic_pci_mem_write_2M(adapter,
959 flashaddr, data))
960 return -EIO;
961
962 flashaddr += 8;
963 }
0bc92b5b
AKS		 964
965 size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
966 if (size) {
967 data = cpu_to_le64(ptr64[i]);
968
969 if (qlcnic_pci_mem_write_2M(adapter,
970 flashaddr, data))
971 return -EIO;
972 }
973
af19b491
AKS		 974 } else {
975 u64 data;
976 u32 hi, lo;
977
978 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
979 flashaddr = QLCNIC_BOOTLD_START;
980
981 for (i = 0; i < size; i++) {
982 if (qlcnic_rom_fast_read(adapter,
983 flashaddr, (int *)&lo) != 0)
984 return -EIO;
985 if (qlcnic_rom_fast_read(adapter,
986 flashaddr + 4, (int *)&hi) != 0)
987 return -EIO;
988
989 data = (((u64)hi << 32) | lo);
990
991 if (qlcnic_pci_mem_write_2M(adapter,
992 flashaddr, data))
993 return -EIO;
994
995 flashaddr += 8;
996 }
997 }
998 msleep(1);
999
1000 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1001 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1002 return 0;
1003}
1004
1005static int
1006qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1007{
1008 __le32 val;
1009 u32 ver, min_ver, bios, min_size;
1010 struct pci_dev *pdev = adapter->pdev;
1011 const struct firmware *fw = adapter->fw;
1012 u8 fw_type = adapter->fw_type;
1013
1014 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
b7eff100 1015 if (qlcnic_validate_unified_romimage(adapter))
af19b491
AKS		 1016 return -EINVAL;
1017
1018 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1019 } else {
1020 val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1021 if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
1022 return -EINVAL;
1023
1024 min_size = QLCNIC_FW_MIN_SIZE;
1025 }
1026
1027 if (fw->size < min_size)
1028 return -EINVAL;
1029
1030 val = qlcnic_get_fw_version(adapter);
1031
1032 min_ver = QLCNIC_VERSION_CODE(4, 0, 216);
1033
1034 ver = QLCNIC_DECODE_VERSION(val);
1035
1036 if ((_major(ver) > _QLCNIC_LINUX_MAJOR) || (ver < min_ver)) {
1037 dev_err(&pdev->dev,
1038 "%s: firmware version %d.%d.%d unsupported\n",
1039 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1040 return -EINVAL;
1041 }
1042
1043 val = qlcnic_get_bios_version(adapter);
1044 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1045 if ((__force u32)val != bios) {
1046 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1047 fw_name[fw_type]);
1048 return -EINVAL;
1049 }
1050
1051 /* check if flashed firmware is newer */
1052 if (qlcnic_rom_fast_read(adapter,
1053 QLCNIC_FW_VERSION_OFFSET, (int *)&val))
1054 return -EIO;
1055
1056 val = QLCNIC_DECODE_VERSION(val);
1057 if (val > ver) {
1058 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
1059 fw_name[fw_type]);
1060 return -EINVAL;
1061 }
1062
1063 QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
1064 return 0;
1065}
1066
1067static void
1068qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1069{
1070 u8 fw_type;
1071
1072 switch (adapter->fw_type) {
1073 case QLCNIC_UNKNOWN_ROMIMAGE:
1074 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1075 break;
1076
1077 case QLCNIC_UNIFIED_ROMIMAGE:
1078 default:
1079 fw_type = QLCNIC_FLASH_ROMIMAGE;
1080 break;
1081 }
1082
1083 adapter->fw_type = fw_type;
1084}
1085
1086
1087
1088void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1089{
1090 struct pci_dev *pdev = adapter->pdev;
1091 int rc;
1092
1093 adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1094
1095next:
1096 qlcnic_get_next_fwtype(adapter);
1097
1098 if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1099 adapter->fw = NULL;
1100 } else {
1101 rc = request_firmware(&adapter->fw,
1102 fw_name[adapter->fw_type], &pdev->dev);
1103 if (rc != 0)
1104 goto next;
1105
1106 rc = qlcnic_validate_firmware(adapter);
1107 if (rc != 0) {
1108 release_firmware(adapter->fw);
1109 msleep(1);
1110 goto next;
1111 }
1112 }
1113}
1114
1115
1116void
1117qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1118{
1119 if (adapter->fw)
1120 release_firmware(adapter->fw);
1121 adapter->fw = NULL;
1122}
1123
1124int qlcnic_phantom_init(struct qlcnic_adapter *adapter)
1125{
1126 u32 val;
1127 int retries = 60;
1128
1129 do {
1130 val = QLCRD32(adapter, CRB_CMDPEG_STATE);
1131
1132 switch (val) {
1133 case PHAN_INITIALIZE_COMPLETE:
1134 case PHAN_INITIALIZE_ACK:
1135 return 0;
1136 case PHAN_INITIALIZE_FAILED:
1137 goto out_err;
1138 default:
1139 break;
1140 }
1141
1142 msleep(500);
1143
1144 } while (--retries);
1145
1146 QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
1147
1148out_err:
1149 dev_err(&adapter->pdev->dev, "firmware init failed\n");
1150 return -EIO;
1151}
1152
1153static int
1154qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
1155{
1156 u32 val;
1157 int retries = 2000;
1158
1159 do {
1160 val = QLCRD32(adapter, CRB_RCVPEG_STATE);
1161
1162 if (val == PHAN_PEG_RCV_INITIALIZED)
1163 return 0;
1164
1165 msleep(10);
1166
1167 } while (--retries);
1168
1169 if (!retries) {
1170 dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
1171 "complete, state: 0x%x.\n", val);
1172 return -EIO;
1173 }
1174
1175 return 0;
1176}
1177
1178int qlcnic_init_firmware(struct qlcnic_adapter *adapter)
1179{
1180 int err;
1181
1182 err = qlcnic_receive_peg_ready(adapter);
1183 if (err)
1184 return err;
1185
af19b491
AKS		 1186 QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1187
1188 return err;
1189}
1190
1191static void
1192qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
1193 struct qlcnic_fw_msg *msg)
1194{
1195 u32 cable_OUI;
1196 u16 cable_len;
1197 u16 link_speed;
1198 u8 link_status, module, duplex, autoneg;
1199 struct net_device *netdev = adapter->netdev;
1200
1201 adapter->has_link_events = 1;
1202
1203 cable_OUI = msg->body[1] & 0xffffffff;
1204 cable_len = (msg->body[1] >> 32) & 0xffff;
1205 link_speed = (msg->body[1] >> 48) & 0xffff;
1206
1207 link_status = msg->body[2] & 0xff;
1208 duplex = (msg->body[2] >> 16) & 0xff;
1209 autoneg = (msg->body[2] >> 24) & 0xff;
1210
1211 module = (msg->body[2] >> 8) & 0xff;
1212 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
1213 dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
1214 "length %d\n", cable_OUI, cable_len);
1215 else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
1216 dev_info(&netdev->dev, "unsupported cable length %d\n",
1217 cable_len);
1218
1219 qlcnic_advert_link_change(adapter, link_status);
1220
1221 if (duplex == LINKEVENT_FULL_DUPLEX)
1222 adapter->link_duplex = DUPLEX_FULL;
1223 else
1224 adapter->link_duplex = DUPLEX_HALF;
1225
1226 adapter->module_type = module;
1227 adapter->link_autoneg = autoneg;
1228 adapter->link_speed = link_speed;
1229}
1230
1231static void
1232qlcnic_handle_fw_message(int desc_cnt, int index,
1233 struct qlcnic_host_sds_ring *sds_ring)
1234{
1235 struct qlcnic_fw_msg msg;
1236 struct status_desc *desc;
1237 int i = 0, opcode;
1238
1239 while (desc_cnt > 0 && i < 8) {
1240 desc = &sds_ring->desc_head[index];
1241 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1242 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1243
1244 index = get_next_index(index, sds_ring->num_desc);
1245 desc_cnt--;
1246 }
1247
1248 opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
1249 switch (opcode) {
1250 case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1251 qlcnic_handle_linkevent(sds_ring->adapter, &msg);
1252 break;
1253 default:
1254 break;
1255 }
1256}
1257
1258static int
1259qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
1260 struct qlcnic_host_rds_ring *rds_ring,
1261 struct qlcnic_rx_buffer *buffer)
1262{
1263 struct sk_buff *skb;
1264 dma_addr_t dma;
1265 struct pci_dev *pdev = adapter->pdev;
1266
1267 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
8bfe8b91
SC		 1268 if (!buffer->skb) {
1269 adapter->stats.skb_alloc_failure++;
af19b491 1270 return -ENOMEM;
8bfe8b91 1271 }
af19b491
AKS		 1272
1273 skb = buffer->skb;
1274
251a84c9 1275 skb_reserve(skb, 2);
af19b491
AKS		 1276
1277 dma = pci_map_single(pdev, skb->data,
1278 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1279
1280 if (pci_dma_mapping_error(pdev, dma)) {
8ae6df97 1281 adapter->stats.rx_dma_map_error++;
af19b491
AKS		 1282 dev_kfree_skb_any(skb);
1283 buffer->skb = NULL;
1284 return -ENOMEM;
1285 }
1286
1287 buffer->skb = skb;
1288 buffer->dma = dma;
1289 buffer->state = QLCNIC_BUFFER_BUSY;
1290
1291 return 0;
1292}
1293
1294static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
1295 struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
1296{
1297 struct qlcnic_rx_buffer *buffer;
1298 struct sk_buff *skb;
1299
1300 buffer = &rds_ring->rx_buf_arr[index];
1301
1302 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1303 PCI_DMA_FROMDEVICE);
1304
1305 skb = buffer->skb;
8ae6df97
AKS		 1306 if (!skb) {
1307 adapter->stats.null_skb++;
af19b491 1308 goto no_skb;
8ae6df97 1309 }
af19b491
AKS		 1310
1311 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1312 adapter->stats.csummed++;
1313 skb->ip_summed = CHECKSUM_UNNECESSARY;
1314 } else {
1315 skb->ip_summed = CHECKSUM_NONE;
1316 }
1317
1318 skb->dev = adapter->netdev;
1319
1320 buffer->skb = NULL;
1321no_skb:
1322 buffer->state = QLCNIC_BUFFER_FREE;
1323 return skb;
1324}
1325
1326static struct qlcnic_rx_buffer *
1327qlcnic_process_rcv(struct qlcnic_adapter *adapter,
1328 struct qlcnic_host_sds_ring *sds_ring,
1329 int ring, u64 sts_data0)
1330{
1331 struct net_device *netdev = adapter->netdev;
1332 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
1333 struct qlcnic_rx_buffer *buffer;
1334 struct sk_buff *skb;
1335 struct qlcnic_host_rds_ring *rds_ring;
1336 int index, length, cksum, pkt_offset;
1337
1338 if (unlikely(ring >= adapter->max_rds_rings))
1339 return NULL;
1340
1341 rds_ring = &recv_ctx->rds_rings[ring];
1342
1343 index = qlcnic_get_sts_refhandle(sts_data0);
1344 if (unlikely(index >= rds_ring->num_desc))
1345 return NULL;
1346
1347 buffer = &rds_ring->rx_buf_arr[index];
1348
1349 length = qlcnic_get_sts_totallength(sts_data0);
1350 cksum = qlcnic_get_sts_status(sts_data0);
1351 pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
1352
1353 skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
1354 if (!skb)
1355 return buffer;
1356
1357 if (length > rds_ring->skb_size)
1358 skb_put(skb, rds_ring->skb_size);
1359 else
1360 skb_put(skb, length);
1361
1362 if (pkt_offset)
1363 skb_pull(skb, pkt_offset);
1364
1365 skb->truesize = skb->len + sizeof(struct sk_buff);
1366 skb->protocol = eth_type_trans(skb, netdev);
1367
1368 napi_gro_receive(&sds_ring->napi, skb);
1369
1370 adapter->stats.rx_pkts++;
1371 adapter->stats.rxbytes += length;
1372
1373 return buffer;
1374}
1375
1376#define QLC_TCP_HDR_SIZE 20
1377#define QLC_TCP_TS_OPTION_SIZE 12
1378#define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
1379
1380static struct qlcnic_rx_buffer *
1381qlcnic_process_lro(struct qlcnic_adapter *adapter,
1382 struct qlcnic_host_sds_ring *sds_ring,
1383 int ring, u64 sts_data0, u64 sts_data1)
1384{
1385 struct net_device *netdev = adapter->netdev;
1386 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
1387 struct qlcnic_rx_buffer *buffer;
1388 struct sk_buff *skb;
1389 struct qlcnic_host_rds_ring *rds_ring;
1390 struct iphdr *iph;
1391 struct tcphdr *th;
1392 bool push, timestamp;
1393 int l2_hdr_offset, l4_hdr_offset;
1394 int index;
1395 u16 lro_length, length, data_offset;
1396 u32 seq_number;
1397
1398 if (unlikely(ring > adapter->max_rds_rings))
1399 return NULL;
1400
1401 rds_ring = &recv_ctx->rds_rings[ring];
1402
1403 index = qlcnic_get_lro_sts_refhandle(sts_data0);
1404 if (unlikely(index > rds_ring->num_desc))
1405 return NULL;
1406
1407 buffer = &rds_ring->rx_buf_arr[index];
1408
1409 timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
1410 lro_length = qlcnic_get_lro_sts_length(sts_data0);
1411 l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
1412 l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
1413 push = qlcnic_get_lro_sts_push_flag(sts_data0);
1414 seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
1415
1416 skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1417 if (!skb)
1418 return buffer;
1419
1420 if (timestamp)
1421 data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
1422 else
1423 data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
1424
1425 skb_put(skb, lro_length + data_offset);
1426
1427 skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
1428
1429 skb_pull(skb, l2_hdr_offset);
1430 skb->protocol = eth_type_trans(skb, netdev);
1431
1432 iph = (struct iphdr *)skb->data;
1433 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1434
1435 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1436 iph->tot_len = htons(length);
1437 iph->check = 0;
1438 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1439 th->psh = push;
1440 th->seq = htonl(seq_number);
1441
1442 length = skb->len;
1443
1444 netif_receive_skb(skb);
1445
1446 adapter->stats.lro_pkts++;
8bfe8b91 1447 adapter->stats.lrobytes += length;
af19b491
AKS		 1448
1449 return buffer;
1450}
1451
1452int
1453qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
1454{
1455 struct qlcnic_adapter *adapter = sds_ring->adapter;
1456 struct list_head *cur;
1457 struct status_desc *desc;
1458 struct qlcnic_rx_buffer *rxbuf;
1459 u64 sts_data0, sts_data1;
1460
1461 int count = 0;
1462 int opcode, ring, desc_cnt;
1463 u32 consumer = sds_ring->consumer;
1464
1465 while (count < max) {
1466 desc = &sds_ring->desc_head[consumer];
1467 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1468
1469 if (!(sts_data0 & STATUS_OWNER_HOST))
1470 break;
1471
1472 desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
1473 opcode = qlcnic_get_sts_opcode(sts_data0);
1474
1475 switch (opcode) {
1476 case QLCNIC_RXPKT_DESC:
1477 case QLCNIC_OLD_RXPKT_DESC:
1478 case QLCNIC_SYN_OFFLOAD:
1479 ring = qlcnic_get_sts_type(sts_data0);
1480 rxbuf = qlcnic_process_rcv(adapter, sds_ring,
1481 ring, sts_data0);
1482 break;
1483 case QLCNIC_LRO_DESC:
1484 ring = qlcnic_get_lro_sts_type(sts_data0);
1485 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1486 rxbuf = qlcnic_process_lro(adapter, sds_ring,
1487 ring, sts_data0, sts_data1);
1488 break;
1489 case QLCNIC_RESPONSE_DESC:
1490 qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
1491 default:
1492 goto skip;
1493 }
1494
1495 WARN_ON(desc_cnt > 1);
1496
1497 if (rxbuf)
1498 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
8ae6df97
AKS		 1499 else
1500 adapter->stats.null_rxbuf++;
af19b491
AKS		 1501
1502skip:
1503 for (; desc_cnt > 0; desc_cnt--) {
1504 desc = &sds_ring->desc_head[consumer];
1505 desc->status_desc_data[0] =
1506 cpu_to_le64(STATUS_OWNER_PHANTOM);
1507 consumer = get_next_index(consumer, sds_ring->num_desc);
1508 }
1509 count++;
1510 }
1511
1512 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1513 struct qlcnic_host_rds_ring *rds_ring =
1514 &adapter->recv_ctx.rds_rings[ring];
1515
1516 if (!list_empty(&sds_ring->free_list[ring])) {
1517 list_for_each(cur, &sds_ring->free_list[ring]) {
1518 rxbuf = list_entry(cur,
1519 struct qlcnic_rx_buffer, list);
1520 qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
1521 }
1522 spin_lock(&rds_ring->lock);
1523 list_splice_tail_init(&sds_ring->free_list[ring],
1524 &rds_ring->free_list);
1525 spin_unlock(&rds_ring->lock);
1526 }
1527
1528 qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
1529 }
1530
1531 if (count) {
1532 sds_ring->consumer = consumer;
1533 writel(consumer, sds_ring->crb_sts_consumer);
1534 }
1535
1536 return count;
1537}
1538
1539void
1540qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
1541 struct qlcnic_host_rds_ring *rds_ring)
1542{
1543 struct rcv_desc *pdesc;
1544 struct qlcnic_rx_buffer *buffer;
1545 int producer, count = 0;
1546 struct list_head *head;
1547
ed6f1353
AKS		 1548 spin_lock(&rds_ring->lock);
1549
af19b491
AKS		 1550 producer = rds_ring->producer;
1551
af19b491
AKS		 1552 head = &rds_ring->free_list;
1553 while (!list_empty(head)) {
1554
1555 buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
1556
1557 if (!buffer->skb) {
1558 if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
1559 break;
1560 }
1561
1562 count++;
1563 list_del(&buffer->list);
1564
1565 /* make a rcv descriptor */
1566 pdesc = &rds_ring->desc_head[producer];
1567 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1568 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1569 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1570
1571 producer = get_next_index(producer, rds_ring->num_desc);
1572 }
af19b491
AKS		 1573
1574 if (count) {
1575 rds_ring->producer = producer;
1576 writel((producer-1) & (rds_ring->num_desc-1),
1577 rds_ring->crb_rcv_producer);
1578 }
ed6f1353 1579 spin_unlock(&rds_ring->lock);
af19b491
AKS		 1580}
1581
1582static void
1583qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
1584 struct qlcnic_host_rds_ring *rds_ring)
1585{
1586 struct rcv_desc *pdesc;
1587 struct qlcnic_rx_buffer *buffer;
1588 int producer, count = 0;
1589 struct list_head *head;
1590
af19b491
AKS		 1591 if (!spin_trylock(&rds_ring->lock))
1592 return;
1593
ed6f1353
AKS		 1594 producer = rds_ring->producer;
1595
af19b491
AKS		 1596 head = &rds_ring->free_list;
1597 while (!list_empty(head)) {
1598
1599 buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
1600
1601 if (!buffer->skb) {
1602 if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
1603 break;
1604 }
1605
1606 count++;
1607 list_del(&buffer->list);
1608
1609 /* make a rcv descriptor */
1610 pdesc = &rds_ring->desc_head[producer];
1611 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1612 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1613 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1614
1615 producer = get_next_index(producer, rds_ring->num_desc);
1616 }
1617
1618 if (count) {
1619 rds_ring->producer = producer;
1620 writel((producer - 1) & (rds_ring->num_desc - 1),
1621 rds_ring->crb_rcv_producer);
1622 }
1623 spin_unlock(&rds_ring->lock);
1624}
1625
cdaff185
AKS		 1626static struct qlcnic_rx_buffer *
1627qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
1628 struct qlcnic_host_sds_ring *sds_ring,
1629 int ring, u64 sts_data0)
1630{
1631 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
1632 struct qlcnic_rx_buffer *buffer;
1633 struct sk_buff *skb;
1634 struct qlcnic_host_rds_ring *rds_ring;
1635 int index, length, cksum, pkt_offset;
1636
1637 if (unlikely(ring >= adapter->max_rds_rings))
1638 return NULL;
1639
1640 rds_ring = &recv_ctx->rds_rings[ring];
1641
1642 index = qlcnic_get_sts_refhandle(sts_data0);
1643 if (unlikely(index >= rds_ring->num_desc))
1644 return NULL;
1645
1646 buffer = &rds_ring->rx_buf_arr[index];
1647
1648 length = qlcnic_get_sts_totallength(sts_data0);
1649 cksum = qlcnic_get_sts_status(sts_data0);
1650 pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
1651
1652 skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
1653 if (!skb)
1654 return buffer;
1655
1656 skb_put(skb, rds_ring->skb_size);
1657
1658 if (pkt_offset)
1659 skb_pull(skb, pkt_offset);
1660
1661 skb->truesize = skb->len + sizeof(struct sk_buff);
1662
1663 if (!qlcnic_check_loopback_buff(skb->data))
1664 adapter->diag_cnt++;
1665
1666 dev_kfree_skb_any(skb);
8bfe8b91
SC		 1667 adapter->stats.rx_pkts++;
1668 adapter->stats.rxbytes += length;
cdaff185
AKS		 1669
1670 return buffer;
1671}
1672
1673void
1674qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1675{
1676 struct qlcnic_adapter *adapter = sds_ring->adapter;
1677 struct status_desc *desc;
1678 struct qlcnic_rx_buffer *rxbuf;
1679 u64 sts_data0;
1680
1681 int opcode, ring, desc_cnt;
1682 u32 consumer = sds_ring->consumer;
1683
1684 desc = &sds_ring->desc_head[consumer];
1685 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1686
1687 if (!(sts_data0 & STATUS_OWNER_HOST))
1688 return;
1689
1690 desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
1691 opcode = qlcnic_get_sts_opcode(sts_data0);
1692
1693 ring = qlcnic_get_sts_type(sts_data0);
1694 rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
1695 ring, sts_data0);
1696
1697 desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
1698 consumer = get_next_index(consumer, sds_ring->num_desc);
1699
1700 sds_ring->consumer = consumer;
1701 writel(consumer, sds_ring->crb_sts_consumer);
1702}
2e9d722d
AC		 1703
1704void
1705qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
1706 u8 alt_mac, u8 *mac)
1707{
1708 u32 mac_low, mac_high;
1709 int i;
1710
1711 mac_low = QLCRD32(adapter, off1);
1712 mac_high = QLCRD32(adapter, off2);
1713
1714 if (alt_mac) {
1715 mac_low |= (mac_low >> 16) | (mac_high << 16);
1716 mac_high >>= 16;
1717 }
1718
1719 for (i = 0; i < 2; i++)
1720 mac[i] = (u8)(mac_high >> ((1 - i) * 8));
1721 for (i = 2; i < 6; i++)
1722 mac[i] = (u8)(mac_low >> ((5 - i) * 8));
1723}
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