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2f90b865 AD |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
8c47eaa7 | 4 | Copyright(c) 1999 - 2010 Intel Corporation. |
2f90b865 AD |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | Linux NICS <linux.nics@intel.com> | |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "ixgbe.h" | |
30 | #include <linux/dcbnl.h> | |
62551d3e PWJ |
31 | #include "ixgbe_dcb_82598.h" |
32 | #include "ixgbe_dcb_82599.h" | |
2f90b865 AD |
33 | |
34 | /* Callbacks for DCB netlink in the kernel */ | |
35 | #define BIT_DCB_MODE 0x01 | |
36 | #define BIT_PFC 0x02 | |
37 | #define BIT_PG_RX 0x04 | |
38 | #define BIT_PG_TX 0x08 | |
8de8b2e6 | 39 | #define BIT_APP_UPCHG 0x10 |
62551d3e | 40 | #define BIT_RESETLINK 0x40 |
235ea828 | 41 | #define BIT_LINKSPEED 0x80 |
2f90b865 | 42 | |
62551d3e PWJ |
43 | /* Responses for the DCB_C_SET_ALL command */ |
44 | #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */ | |
45 | #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */ | |
46 | #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */ | |
47 | ||
2f90b865 AD |
48 | int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg, |
49 | struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max) | |
50 | { | |
51 | struct tc_configuration *src_tc_cfg = NULL; | |
52 | struct tc_configuration *dst_tc_cfg = NULL; | |
53 | int i; | |
54 | ||
55 | if (!src_dcb_cfg || !dst_dcb_cfg) | |
56 | return -EINVAL; | |
57 | ||
58 | for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) { | |
59 | src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0]; | |
60 | dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0]; | |
61 | ||
62 | dst_tc_cfg->path[DCB_TX_CONFIG].prio_type = | |
63 | src_tc_cfg->path[DCB_TX_CONFIG].prio_type; | |
64 | ||
65 | dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id = | |
66 | src_tc_cfg->path[DCB_TX_CONFIG].bwg_id; | |
67 | ||
68 | dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent = | |
69 | src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent; | |
70 | ||
71 | dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap = | |
72 | src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap; | |
73 | ||
74 | dst_tc_cfg->path[DCB_RX_CONFIG].prio_type = | |
75 | src_tc_cfg->path[DCB_RX_CONFIG].prio_type; | |
76 | ||
77 | dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id = | |
78 | src_tc_cfg->path[DCB_RX_CONFIG].bwg_id; | |
79 | ||
80 | dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent = | |
81 | src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent; | |
82 | ||
83 | dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap = | |
84 | src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap; | |
85 | } | |
86 | ||
87 | for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) { | |
88 | dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG] | |
89 | [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage | |
90 | [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0]; | |
91 | dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG] | |
92 | [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage | |
93 | [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0]; | |
94 | } | |
95 | ||
96 | for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) { | |
97 | dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc = | |
98 | src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc; | |
99 | } | |
100 | ||
ea4af4f4 PW |
101 | dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable; |
102 | ||
2f90b865 AD |
103 | return 0; |
104 | } | |
105 | ||
106 | static u8 ixgbe_dcbnl_get_state(struct net_device *netdev) | |
107 | { | |
108 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
109 | ||
2f90b865 AD |
110 | return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); |
111 | } | |
112 | ||
1486a61e | 113 | static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) |
2f90b865 | 114 | { |
1486a61e | 115 | u8 err = 0; |
2f90b865 AD |
116 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
117 | ||
2f90b865 AD |
118 | if (state > 0) { |
119 | /* Turn on DCB */ | |
1486a61e DS |
120 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) |
121 | goto out; | |
2f90b865 | 122 | |
1486a61e | 123 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { |
396e799c | 124 | e_err(drv, "Enable failed, needs MSI-X\n"); |
1486a61e DS |
125 | err = 1; |
126 | goto out; | |
2f90b865 | 127 | } |
1486a61e DS |
128 | |
129 | if (netif_running(netdev)) | |
130 | netdev->netdev_ops->ndo_stop(netdev); | |
7a921c93 | 131 | ixgbe_clear_interrupt_scheme(adapter); |
1486a61e | 132 | |
b93a2226 DS |
133 | adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; |
134 | switch (adapter->hw.mac.type) { | |
135 | case ixgbe_mac_82598EB: | |
264857b8 PWJ |
136 | adapter->last_lfc_mode = adapter->hw.fc.current_mode; |
137 | adapter->hw.fc.requested_mode = ixgbe_fc_none; | |
b93a2226 DS |
138 | break; |
139 | case ixgbe_mac_82599EB: | |
140 | case ixgbe_mac_X540: | |
8faa2a78 YZ |
141 | adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; |
142 | adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; | |
b93a2226 DS |
143 | break; |
144 | default: | |
145 | break; | |
8faa2a78 | 146 | } |
b93a2226 | 147 | |
1486a61e DS |
148 | adapter->flags |= IXGBE_FLAG_DCB_ENABLED; |
149 | ixgbe_init_interrupt_scheme(adapter); | |
1486a61e DS |
150 | if (netif_running(netdev)) |
151 | netdev->netdev_ops->ndo_open(netdev); | |
2f90b865 AD |
152 | } else { |
153 | /* Turn off DCB */ | |
154 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
155 | if (netif_running(netdev)) | |
1486a61e | 156 | netdev->netdev_ops->ndo_stop(netdev); |
7a921c93 | 157 | ixgbe_clear_interrupt_scheme(adapter); |
2f90b865 | 158 | |
264857b8 PWJ |
159 | adapter->hw.fc.requested_mode = adapter->last_lfc_mode; |
160 | adapter->temp_dcb_cfg.pfc_mode_enable = false; | |
161 | adapter->dcb_cfg.pfc_mode_enable = false; | |
2f90b865 AD |
162 | adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; |
163 | adapter->flags |= IXGBE_FLAG_RSS_ENABLED; | |
b93a2226 DS |
164 | switch (adapter->hw.mac.type) { |
165 | case ixgbe_mac_82599EB: | |
166 | case ixgbe_mac_X540: | |
8faa2a78 | 167 | adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; |
b93a2226 DS |
168 | break; |
169 | default: | |
170 | break; | |
171 | } | |
0d551589 | 172 | |
2f90b865 | 173 | ixgbe_init_interrupt_scheme(adapter); |
2f90b865 | 174 | if (netif_running(netdev)) |
1486a61e | 175 | netdev->netdev_ops->ndo_open(netdev); |
2f90b865 AD |
176 | } |
177 | } | |
1486a61e DS |
178 | out: |
179 | return err; | |
2f90b865 AD |
180 | } |
181 | ||
182 | static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, | |
183 | u8 *perm_addr) | |
184 | { | |
185 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
aca6bee7 | 186 | int i, j; |
2f90b865 | 187 | |
86e713a0 LL |
188 | memset(perm_addr, 0xff, MAX_ADDR_LEN); |
189 | ||
2f90b865 AD |
190 | for (i = 0; i < netdev->addr_len; i++) |
191 | perm_addr[i] = adapter->hw.mac.perm_addr[i]; | |
aca6bee7 | 192 | |
b93a2226 DS |
193 | switch (adapter->hw.mac.type) { |
194 | case ixgbe_mac_82599EB: | |
195 | case ixgbe_mac_X540: | |
aca6bee7 WJP |
196 | for (j = 0; j < netdev->addr_len; j++, i++) |
197 | perm_addr[i] = adapter->hw.mac.san_addr[j]; | |
b93a2226 DS |
198 | break; |
199 | default: | |
200 | break; | |
aca6bee7 | 201 | } |
2f90b865 AD |
202 | } |
203 | ||
204 | static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
205 | u8 prio, u8 bwg_id, u8 bw_pct, | |
206 | u8 up_map) | |
207 | { | |
208 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
209 | ||
210 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
211 | adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio; | |
212 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
213 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id; | |
214 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
215 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent = | |
216 | bw_pct; | |
217 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
218 | adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap = | |
219 | up_map; | |
220 | ||
221 | if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type != | |
222 | adapter->dcb_cfg.tc_config[tc].path[0].prio_type) || | |
223 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id != | |
224 | adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) || | |
225 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent != | |
226 | adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) || | |
227 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap != | |
62551d3e | 228 | adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) { |
2f90b865 | 229 | adapter->dcb_set_bitmap |= BIT_PG_TX; |
62551d3e PWJ |
230 | adapter->dcb_set_bitmap |= BIT_RESETLINK; |
231 | } | |
2f90b865 AD |
232 | } |
233 | ||
234 | static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
235 | u8 bw_pct) | |
236 | { | |
237 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
238 | ||
239 | adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct; | |
240 | ||
241 | if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] != | |
62551d3e | 242 | adapter->dcb_cfg.bw_percentage[0][bwg_id]) { |
ebe1b30c | 243 | adapter->dcb_set_bitmap |= BIT_PG_TX; |
62551d3e PWJ |
244 | adapter->dcb_set_bitmap |= BIT_RESETLINK; |
245 | } | |
2f90b865 AD |
246 | } |
247 | ||
248 | static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
249 | u8 prio, u8 bwg_id, u8 bw_pct, | |
250 | u8 up_map) | |
251 | { | |
252 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
253 | ||
254 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
255 | adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio; | |
256 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
257 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id; | |
258 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
259 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent = | |
260 | bw_pct; | |
261 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
262 | adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap = | |
263 | up_map; | |
264 | ||
265 | if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type != | |
266 | adapter->dcb_cfg.tc_config[tc].path[1].prio_type) || | |
267 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id != | |
268 | adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) || | |
269 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent != | |
270 | adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) || | |
271 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap != | |
62551d3e | 272 | adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) { |
2f90b865 | 273 | adapter->dcb_set_bitmap |= BIT_PG_RX; |
62551d3e PWJ |
274 | adapter->dcb_set_bitmap |= BIT_RESETLINK; |
275 | } | |
2f90b865 AD |
276 | } |
277 | ||
278 | static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
279 | u8 bw_pct) | |
280 | { | |
281 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
282 | ||
283 | adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct; | |
284 | ||
285 | if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] != | |
62551d3e | 286 | adapter->dcb_cfg.bw_percentage[1][bwg_id]) { |
2f90b865 | 287 | adapter->dcb_set_bitmap |= BIT_PG_RX; |
62551d3e PWJ |
288 | adapter->dcb_set_bitmap |= BIT_RESETLINK; |
289 | } | |
2f90b865 AD |
290 | } |
291 | ||
292 | static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
293 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
294 | u8 *up_map) | |
295 | { | |
296 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
297 | ||
298 | *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type; | |
299 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id; | |
300 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent; | |
301 | *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap; | |
302 | } | |
303 | ||
304 | static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
305 | u8 *bw_pct) | |
306 | { | |
307 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
308 | ||
309 | *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id]; | |
310 | } | |
311 | ||
312 | static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
313 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
314 | u8 *up_map) | |
315 | { | |
316 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
317 | ||
318 | *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type; | |
319 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id; | |
320 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent; | |
321 | *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap; | |
322 | } | |
323 | ||
324 | static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
325 | u8 *bw_pct) | |
326 | { | |
327 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
328 | ||
329 | *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id]; | |
330 | } | |
331 | ||
332 | static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority, | |
333 | u8 setting) | |
334 | { | |
335 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
336 | ||
337 | adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting; | |
338 | if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc != | |
ea4af4f4 | 339 | adapter->dcb_cfg.tc_config[priority].dcb_pfc) { |
2f90b865 | 340 | adapter->dcb_set_bitmap |= BIT_PFC; |
ea4af4f4 PW |
341 | adapter->temp_dcb_cfg.pfc_mode_enable = true; |
342 | } | |
2f90b865 AD |
343 | } |
344 | ||
345 | static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority, | |
346 | u8 *setting) | |
347 | { | |
348 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
349 | ||
350 | *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc; | |
351 | } | |
352 | ||
353 | static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) | |
354 | { | |
355 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
356 | int ret; | |
357 | ||
358 | if (!adapter->dcb_set_bitmap) | |
62551d3e | 359 | return DCB_NO_HW_CHG; |
2f90b865 | 360 | |
3ce1cc52 JF |
361 | ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, |
362 | adapter->ring_feature[RING_F_DCB].indices); | |
363 | ||
364 | if (ret) | |
365 | return DCB_NO_HW_CHG; | |
366 | ||
62551d3e PWJ |
367 | /* |
368 | * Only take down the adapter if the configuration change | |
369 | * requires a reset. | |
370 | */ | |
371 | if (adapter->dcb_set_bitmap & BIT_RESETLINK) { | |
372 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | |
373 | msleep(1); | |
2f90b865 | 374 | |
8de8b2e6 YZ |
375 | if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) { |
376 | if (netif_running(netdev)) | |
377 | netdev->netdev_ops->ndo_stop(netdev); | |
378 | ixgbe_clear_interrupt_scheme(adapter); | |
379 | } else { | |
380 | if (netif_running(netdev)) | |
381 | ixgbe_down(adapter); | |
382 | } | |
62551d3e | 383 | } |
2f90b865 | 384 | |
264857b8 | 385 | if (adapter->dcb_cfg.pfc_mode_enable) { |
b93a2226 DS |
386 | switch (adapter->hw.mac.type) { |
387 | case ixgbe_mac_82599EB: | |
388 | case ixgbe_mac_X540: | |
389 | if (adapter->hw.fc.current_mode != ixgbe_fc_pfc) | |
390 | adapter->last_lfc_mode = | |
391 | adapter->hw.fc.current_mode; | |
392 | break; | |
393 | default: | |
394 | break; | |
395 | } | |
264857b8 PWJ |
396 | adapter->hw.fc.requested_mode = ixgbe_fc_pfc; |
397 | } else { | |
b93a2226 DS |
398 | switch (adapter->hw.mac.type) { |
399 | case ixgbe_mac_82598EB: | |
264857b8 | 400 | adapter->hw.fc.requested_mode = ixgbe_fc_none; |
b93a2226 DS |
401 | break; |
402 | case ixgbe_mac_82599EB: | |
403 | case ixgbe_mac_X540: | |
404 | adapter->hw.fc.requested_mode = adapter->last_lfc_mode; | |
405 | break; | |
406 | default: | |
407 | break; | |
408 | } | |
264857b8 PWJ |
409 | } |
410 | ||
62551d3e | 411 | if (adapter->dcb_set_bitmap & BIT_RESETLINK) { |
8de8b2e6 YZ |
412 | if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) { |
413 | ixgbe_init_interrupt_scheme(adapter); | |
414 | if (netif_running(netdev)) | |
415 | netdev->netdev_ops->ndo_open(netdev); | |
416 | } else { | |
417 | if (netif_running(netdev)) | |
418 | ixgbe_up(adapter); | |
419 | } | |
62551d3e PWJ |
420 | ret = DCB_HW_CHG_RST; |
421 | } else if (adapter->dcb_set_bitmap & BIT_PFC) { | |
422 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) | |
423 | ixgbe_dcb_config_pfc_82598(&adapter->hw, | |
424 | &adapter->dcb_cfg); | |
425 | else if (adapter->hw.mac.type == ixgbe_mac_82599EB) | |
426 | ixgbe_dcb_config_pfc_82599(&adapter->hw, | |
427 | &adapter->dcb_cfg); | |
428 | ret = DCB_HW_CHG; | |
429 | } | |
264857b8 PWJ |
430 | if (adapter->dcb_cfg.pfc_mode_enable) |
431 | adapter->hw.fc.current_mode = ixgbe_fc_pfc; | |
432 | ||
62551d3e PWJ |
433 | if (adapter->dcb_set_bitmap & BIT_RESETLINK) |
434 | clear_bit(__IXGBE_RESETTING, &adapter->state); | |
2f90b865 | 435 | adapter->dcb_set_bitmap = 0x00; |
2f90b865 AD |
436 | return ret; |
437 | } | |
438 | ||
46132188 AD |
439 | static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap) |
440 | { | |
441 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
442 | u8 rval = 0; | |
443 | ||
444 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
445 | switch (capid) { | |
446 | case DCB_CAP_ATTR_PG: | |
447 | *cap = true; | |
448 | break; | |
449 | case DCB_CAP_ATTR_PFC: | |
450 | *cap = true; | |
451 | break; | |
452 | case DCB_CAP_ATTR_UP2TC: | |
453 | *cap = false; | |
454 | break; | |
455 | case DCB_CAP_ATTR_PG_TCS: | |
456 | *cap = 0x80; | |
457 | break; | |
458 | case DCB_CAP_ATTR_PFC_TCS: | |
459 | *cap = 0x80; | |
460 | break; | |
461 | case DCB_CAP_ATTR_GSP: | |
462 | *cap = true; | |
463 | break; | |
464 | case DCB_CAP_ATTR_BCN: | |
465 | *cap = false; | |
466 | break; | |
467 | default: | |
468 | rval = -EINVAL; | |
469 | break; | |
470 | } | |
471 | } else { | |
472 | rval = -EINVAL; | |
473 | } | |
474 | ||
475 | return rval; | |
476 | } | |
477 | ||
33dbabc4 AD |
478 | static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) |
479 | { | |
480 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
481 | u8 rval = 0; | |
482 | ||
483 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
484 | switch (tcid) { | |
485 | case DCB_NUMTCS_ATTR_PG: | |
486 | *num = MAX_TRAFFIC_CLASS; | |
487 | break; | |
488 | case DCB_NUMTCS_ATTR_PFC: | |
489 | *num = MAX_TRAFFIC_CLASS; | |
490 | break; | |
491 | default: | |
492 | rval = -EINVAL; | |
493 | break; | |
494 | } | |
495 | } else { | |
496 | rval = -EINVAL; | |
497 | } | |
498 | ||
499 | return rval; | |
500 | } | |
501 | ||
502 | static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num) | |
503 | { | |
504 | return -EINVAL; | |
505 | } | |
506 | ||
0eb3aa9b AD |
507 | static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev) |
508 | { | |
509 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
510 | ||
264857b8 | 511 | return adapter->dcb_cfg.pfc_mode_enable; |
0eb3aa9b AD |
512 | } |
513 | ||
514 | static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state) | |
515 | { | |
264857b8 PWJ |
516 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
517 | ||
518 | adapter->temp_dcb_cfg.pfc_mode_enable = state; | |
519 | if (adapter->temp_dcb_cfg.pfc_mode_enable != | |
520 | adapter->dcb_cfg.pfc_mode_enable) | |
521 | adapter->dcb_set_bitmap |= BIT_PFC; | |
0eb3aa9b AD |
522 | } |
523 | ||
6ee16520 YZ |
524 | /** |
525 | * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority | |
526 | * @netdev : the corresponding netdev | |
527 | * @idtype : identifies the id as ether type or TCP/UDP port number | |
528 | * @id: id is either ether type or TCP/UDP port number | |
529 | * | |
530 | * Returns : on success, returns a non-zero 802.1p user priority bitmap | |
531 | * otherwise returns 0 as the invalid user priority bitmap to indicate an | |
532 | * error. | |
533 | */ | |
534 | static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id) | |
535 | { | |
536 | u8 rval = 0; | |
537 | ||
538 | switch (idtype) { | |
539 | case DCB_APP_IDTYPE_ETHTYPE: | |
540 | #ifdef IXGBE_FCOE | |
541 | if (id == ETH_P_FCOE) | |
542 | rval = ixgbe_fcoe_getapp(netdev_priv(netdev)); | |
543 | #endif | |
544 | break; | |
545 | case DCB_APP_IDTYPE_PORTNUM: | |
546 | break; | |
547 | default: | |
548 | break; | |
549 | } | |
550 | return rval; | |
551 | } | |
552 | ||
553 | /** | |
554 | * ixgbe_dcbnl_setapp - set the DCBX application user priority | |
555 | * @netdev : the corresponding netdev | |
556 | * @idtype : identifies the id as ether type or TCP/UDP port number | |
557 | * @id: id is either ether type or TCP/UDP port number | |
558 | * @up: the 802.1p user priority bitmap | |
559 | * | |
560 | * Returns : 0 on success or 1 on error | |
561 | */ | |
562 | static u8 ixgbe_dcbnl_setapp(struct net_device *netdev, | |
563 | u8 idtype, u16 id, u8 up) | |
564 | { | |
565 | u8 rval = 1; | |
566 | ||
567 | switch (idtype) { | |
568 | case DCB_APP_IDTYPE_ETHTYPE: | |
569 | #ifdef IXGBE_FCOE | |
8de8b2e6 YZ |
570 | if (id == ETH_P_FCOE) { |
571 | u8 tc; | |
572 | struct ixgbe_adapter *adapter; | |
573 | ||
574 | adapter = netdev_priv(netdev); | |
575 | tc = adapter->fcoe.tc; | |
576 | rval = ixgbe_fcoe_setapp(adapter, up); | |
577 | if ((!rval) && (tc != adapter->fcoe.tc) && | |
578 | (adapter->flags & IXGBE_FLAG_DCB_ENABLED) && | |
579 | (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) { | |
580 | adapter->dcb_set_bitmap |= BIT_APP_UPCHG; | |
581 | adapter->dcb_set_bitmap |= BIT_RESETLINK; | |
582 | } | |
583 | } | |
6ee16520 YZ |
584 | #endif |
585 | break; | |
586 | case DCB_APP_IDTYPE_PORTNUM: | |
587 | break; | |
588 | default: | |
589 | break; | |
590 | } | |
591 | return rval; | |
592 | } | |
593 | ||
32953543 | 594 | const struct dcbnl_rtnl_ops dcbnl_ops = { |
2f90b865 AD |
595 | .getstate = ixgbe_dcbnl_get_state, |
596 | .setstate = ixgbe_dcbnl_set_state, | |
597 | .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr, | |
598 | .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx, | |
599 | .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx, | |
600 | .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx, | |
601 | .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx, | |
602 | .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx, | |
603 | .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx, | |
604 | .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx, | |
605 | .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx, | |
606 | .setpfccfg = ixgbe_dcbnl_set_pfc_cfg, | |
607 | .getpfccfg = ixgbe_dcbnl_get_pfc_cfg, | |
46132188 | 608 | .setall = ixgbe_dcbnl_set_all, |
33dbabc4 AD |
609 | .getcap = ixgbe_dcbnl_getcap, |
610 | .getnumtcs = ixgbe_dcbnl_getnumtcs, | |
0eb3aa9b AD |
611 | .setnumtcs = ixgbe_dcbnl_setnumtcs, |
612 | .getpfcstate = ixgbe_dcbnl_getpfcstate, | |
859ee3c4 | 613 | .setpfcstate = ixgbe_dcbnl_setpfcstate, |
6ee16520 YZ |
614 | .getapp = ixgbe_dcbnl_getapp, |
615 | .setapp = ixgbe_dcbnl_setapp, | |
2f90b865 AD |
616 | }; |
617 |