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enic: Fix build warnings
[net-next-2.6.git] / drivers / net / enic / enic_main.c
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01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
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3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
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39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
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45#include "enic_res.h"
46#include "enic.h"
47
48#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
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49#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
50#define MAX_TSO (1 << 16)
51#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
52
53#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 54#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
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55
56/* Supported devices */
a3aa1884 57static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 58 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 59 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
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60 { 0, } /* end of table */
61};
62
63MODULE_DESCRIPTION(DRV_DESCRIPTION);
64MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
65MODULE_LICENSE("GPL");
66MODULE_VERSION(DRV_VERSION);
67MODULE_DEVICE_TABLE(pci, enic_id_table);
68
69struct enic_stat {
70 char name[ETH_GSTRING_LEN];
71 unsigned int offset;
72};
73
74#define ENIC_TX_STAT(stat) \
75 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
76#define ENIC_RX_STAT(stat) \
77 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
78
79static const struct enic_stat enic_tx_stats[] = {
80 ENIC_TX_STAT(tx_frames_ok),
81 ENIC_TX_STAT(tx_unicast_frames_ok),
82 ENIC_TX_STAT(tx_multicast_frames_ok),
83 ENIC_TX_STAT(tx_broadcast_frames_ok),
84 ENIC_TX_STAT(tx_bytes_ok),
85 ENIC_TX_STAT(tx_unicast_bytes_ok),
86 ENIC_TX_STAT(tx_multicast_bytes_ok),
87 ENIC_TX_STAT(tx_broadcast_bytes_ok),
88 ENIC_TX_STAT(tx_drops),
89 ENIC_TX_STAT(tx_errors),
90 ENIC_TX_STAT(tx_tso),
91};
92
93static const struct enic_stat enic_rx_stats[] = {
94 ENIC_RX_STAT(rx_frames_ok),
95 ENIC_RX_STAT(rx_frames_total),
96 ENIC_RX_STAT(rx_unicast_frames_ok),
97 ENIC_RX_STAT(rx_multicast_frames_ok),
98 ENIC_RX_STAT(rx_broadcast_frames_ok),
99 ENIC_RX_STAT(rx_bytes_ok),
100 ENIC_RX_STAT(rx_unicast_bytes_ok),
101 ENIC_RX_STAT(rx_multicast_bytes_ok),
102 ENIC_RX_STAT(rx_broadcast_bytes_ok),
103 ENIC_RX_STAT(rx_drop),
104 ENIC_RX_STAT(rx_no_bufs),
105 ENIC_RX_STAT(rx_errors),
106 ENIC_RX_STAT(rx_rss),
107 ENIC_RX_STAT(rx_crc_errors),
108 ENIC_RX_STAT(rx_frames_64),
109 ENIC_RX_STAT(rx_frames_127),
110 ENIC_RX_STAT(rx_frames_255),
111 ENIC_RX_STAT(rx_frames_511),
112 ENIC_RX_STAT(rx_frames_1023),
113 ENIC_RX_STAT(rx_frames_1518),
114 ENIC_RX_STAT(rx_frames_to_max),
115};
116
117static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
118static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
119
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120static int enic_is_dynamic(struct enic *enic)
121{
122 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
123}
124
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125static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
126{
127 return rq;
128}
129
130static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
131{
132 return enic->rq_count + wq;
133}
134
135static inline unsigned int enic_legacy_io_intr(void)
136{
137 return 0;
138}
139
140static inline unsigned int enic_legacy_err_intr(void)
141{
142 return 1;
143}
144
145static inline unsigned int enic_legacy_notify_intr(void)
146{
147 return 2;
148}
149
150static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
151{
152 return rq;
153}
154
155static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
156{
157 return enic->rq_count + wq;
158}
159
160static inline unsigned int enic_msix_err_intr(struct enic *enic)
161{
162 return enic->rq_count + enic->wq_count;
163}
164
165static inline unsigned int enic_msix_notify_intr(struct enic *enic)
166{
167 return enic->rq_count + enic->wq_count + 1;
168}
169
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170static int enic_get_settings(struct net_device *netdev,
171 struct ethtool_cmd *ecmd)
172{
173 struct enic *enic = netdev_priv(netdev);
174
175 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
176 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
177 ecmd->port = PORT_FIBRE;
178 ecmd->transceiver = XCVR_EXTERNAL;
179
180 if (netif_carrier_ok(netdev)) {
181 ecmd->speed = vnic_dev_port_speed(enic->vdev);
182 ecmd->duplex = DUPLEX_FULL;
183 } else {
184 ecmd->speed = -1;
185 ecmd->duplex = -1;
186 }
187
188 ecmd->autoneg = AUTONEG_DISABLE;
189
190 return 0;
191}
192
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193static int enic_dev_fw_info(struct enic *enic,
194 struct vnic_devcmd_fw_info **fw_info)
195{
196 int err;
197
198 spin_lock(&enic->devcmd_lock);
199 err = vnic_dev_fw_info(enic->vdev, fw_info);
200 spin_unlock(&enic->devcmd_lock);
201
202 return err;
203}
204
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205static void enic_get_drvinfo(struct net_device *netdev,
206 struct ethtool_drvinfo *drvinfo)
207{
208 struct enic *enic = netdev_priv(netdev);
209 struct vnic_devcmd_fw_info *fw_info;
210
383ab92f 211 enic_dev_fw_info(enic, &fw_info);
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212
213 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
214 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
215 strncpy(drvinfo->fw_version, fw_info->fw_version,
216 sizeof(drvinfo->fw_version));
217 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
218 sizeof(drvinfo->bus_info));
219}
220
221static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
222{
223 unsigned int i;
224
225 switch (stringset) {
226 case ETH_SS_STATS:
227 for (i = 0; i < enic_n_tx_stats; i++) {
228 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
229 data += ETH_GSTRING_LEN;
230 }
231 for (i = 0; i < enic_n_rx_stats; i++) {
232 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
233 data += ETH_GSTRING_LEN;
234 }
235 break;
236 }
237}
238
25f0a061 239static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 240{
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241 switch (sset) {
242 case ETH_SS_STATS:
243 return enic_n_tx_stats + enic_n_rx_stats;
244 default:
245 return -EOPNOTSUPP;
246 }
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247}
248
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249static int enic_dev_stats_dump(struct enic *enic, struct vnic_stats **vstats)
250{
251 int err;
252
253 spin_lock(&enic->devcmd_lock);
254 err = vnic_dev_stats_dump(enic->vdev, vstats);
255 spin_unlock(&enic->devcmd_lock);
256
257 return err;
258}
259
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260static void enic_get_ethtool_stats(struct net_device *netdev,
261 struct ethtool_stats *stats, u64 *data)
262{
263 struct enic *enic = netdev_priv(netdev);
264 struct vnic_stats *vstats;
265 unsigned int i;
266
383ab92f 267 enic_dev_stats_dump(enic, &vstats);
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268
269 for (i = 0; i < enic_n_tx_stats; i++)
270 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
271 for (i = 0; i < enic_n_rx_stats; i++)
272 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
273}
274
275static u32 enic_get_rx_csum(struct net_device *netdev)
276{
277 struct enic *enic = netdev_priv(netdev);
278 return enic->csum_rx_enabled;
279}
280
281static int enic_set_rx_csum(struct net_device *netdev, u32 data)
282{
283 struct enic *enic = netdev_priv(netdev);
284
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285 if (data && !ENIC_SETTING(enic, RXCSUM))
286 return -EINVAL;
287
288 enic->csum_rx_enabled = !!data;
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289
290 return 0;
291}
292
293static int enic_set_tx_csum(struct net_device *netdev, u32 data)
294{
295 struct enic *enic = netdev_priv(netdev);
296
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297 if (data && !ENIC_SETTING(enic, TXCSUM))
298 return -EINVAL;
299
300 if (data)
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301 netdev->features |= NETIF_F_HW_CSUM;
302 else
303 netdev->features &= ~NETIF_F_HW_CSUM;
304
305 return 0;
306}
307
308static int enic_set_tso(struct net_device *netdev, u32 data)
309{
310 struct enic *enic = netdev_priv(netdev);
311
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312 if (data && !ENIC_SETTING(enic, TSO))
313 return -EINVAL;
314
315 if (data)
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316 netdev->features |=
317 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
318 else
319 netdev->features &=
320 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
321
322 return 0;
323}
324
325static u32 enic_get_msglevel(struct net_device *netdev)
326{
327 struct enic *enic = netdev_priv(netdev);
328 return enic->msg_enable;
329}
330
331static void enic_set_msglevel(struct net_device *netdev, u32 value)
332{
333 struct enic *enic = netdev_priv(netdev);
334 enic->msg_enable = value;
335}
336
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337static int enic_get_coalesce(struct net_device *netdev,
338 struct ethtool_coalesce *ecmd)
339{
340 struct enic *enic = netdev_priv(netdev);
341
342 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
343 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
344
345 return 0;
346}
347
348static int enic_set_coalesce(struct net_device *netdev,
349 struct ethtool_coalesce *ecmd)
350{
351 struct enic *enic = netdev_priv(netdev);
352 u32 tx_coalesce_usecs;
353 u32 rx_coalesce_usecs;
717258ba 354 unsigned int i, intr;
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355
356 tx_coalesce_usecs = min_t(u32,
357 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
358 ecmd->tx_coalesce_usecs);
359 rx_coalesce_usecs = min_t(u32,
360 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
361 ecmd->rx_coalesce_usecs);
362
363 switch (vnic_dev_get_intr_mode(enic->vdev)) {
364 case VNIC_DEV_INTR_MODE_INTX:
365 if (tx_coalesce_usecs != rx_coalesce_usecs)
366 return -EINVAL;
367
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368 intr = enic_legacy_io_intr();
369 vnic_intr_coalescing_timer_set(&enic->intr[intr],
7c844599
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370 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
371 break;
372 case VNIC_DEV_INTR_MODE_MSI:
373 if (tx_coalesce_usecs != rx_coalesce_usecs)
374 return -EINVAL;
375
376 vnic_intr_coalescing_timer_set(&enic->intr[0],
377 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
378 break;
379 case VNIC_DEV_INTR_MODE_MSIX:
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380 for (i = 0; i < enic->wq_count; i++) {
381 intr = enic_msix_wq_intr(enic, i);
382 vnic_intr_coalescing_timer_set(&enic->intr[intr],
383 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
384 }
385
386 for (i = 0; i < enic->rq_count; i++) {
387 intr = enic_msix_rq_intr(enic, i);
388 vnic_intr_coalescing_timer_set(&enic->intr[intr],
389 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
390 }
391
7c844599
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392 break;
393 default:
394 break;
395 }
396
397 enic->tx_coalesce_usecs = tx_coalesce_usecs;
398 enic->rx_coalesce_usecs = rx_coalesce_usecs;
399
400 return 0;
401}
402
0fc0b732 403static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
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404 .get_settings = enic_get_settings,
405 .get_drvinfo = enic_get_drvinfo,
406 .get_msglevel = enic_get_msglevel,
407 .set_msglevel = enic_set_msglevel,
408 .get_link = ethtool_op_get_link,
409 .get_strings = enic_get_strings,
25f0a061 410 .get_sset_count = enic_get_sset_count,
01f2e4ea
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411 .get_ethtool_stats = enic_get_ethtool_stats,
412 .get_rx_csum = enic_get_rx_csum,
413 .set_rx_csum = enic_set_rx_csum,
414 .get_tx_csum = ethtool_op_get_tx_csum,
415 .set_tx_csum = enic_set_tx_csum,
416 .get_sg = ethtool_op_get_sg,
417 .set_sg = ethtool_op_set_sg,
418 .get_tso = ethtool_op_get_tso,
419 .set_tso = enic_set_tso,
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420 .get_coalesce = enic_get_coalesce,
421 .set_coalesce = enic_set_coalesce,
86ca9db7 422 .get_flags = ethtool_op_get_flags,
01f2e4ea
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423};
424
425static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
426{
427 struct enic *enic = vnic_dev_priv(wq->vdev);
428
429 if (buf->sop)
430 pci_unmap_single(enic->pdev, buf->dma_addr,
431 buf->len, PCI_DMA_TODEVICE);
432 else
433 pci_unmap_page(enic->pdev, buf->dma_addr,
434 buf->len, PCI_DMA_TODEVICE);
435
436 if (buf->os_buf)
437 dev_kfree_skb_any(buf->os_buf);
438}
439
440static void enic_wq_free_buf(struct vnic_wq *wq,
441 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
442{
443 enic_free_wq_buf(wq, buf);
444}
445
446static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
447 u8 type, u16 q_number, u16 completed_index, void *opaque)
448{
449 struct enic *enic = vnic_dev_priv(vdev);
450
451 spin_lock(&enic->wq_lock[q_number]);
452
453 vnic_wq_service(&enic->wq[q_number], cq_desc,
454 completed_index, enic_wq_free_buf,
455 opaque);
456
457 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF
458 vnic_wq_desc_avail(&enic->wq[q_number]) >=
459 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
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460 netif_wake_queue(enic->netdev);
461
462 spin_unlock(&enic->wq_lock[q_number]);
463
464 return 0;
465}
466
467static void enic_log_q_error(struct enic *enic)
468{
469 unsigned int i;
470 u32 error_status;
471
472 for (i = 0; i < enic->wq_count; i++) {
473 error_status = vnic_wq_error_status(&enic->wq[i]);
474 if (error_status)
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475 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
476 i, error_status);
01f2e4ea
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477 }
478
479 for (i = 0; i < enic->rq_count; i++) {
480 error_status = vnic_rq_error_status(&enic->rq[i]);
481 if (error_status)
a7a79deb
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482 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
483 i, error_status);
01f2e4ea
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484 }
485}
486
383ab92f 487static void enic_msglvl_check(struct enic *enic)
01f2e4ea 488{
383ab92f 489 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 490
383ab92f 491 if (msg_enable != enic->msg_enable) {
a7a79deb
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492 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
493 enic->msg_enable, msg_enable);
383ab92f 494 enic->msg_enable = msg_enable;
01f2e4ea
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495 }
496}
497
498static void enic_mtu_check(struct enic *enic)
499{
500 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 501 struct net_device *netdev = enic->netdev;
01f2e4ea 502
491598a4 503 if (mtu && mtu != enic->port_mtu) {
7c844599 504 enic->port_mtu = mtu;
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VK
505 if (mtu < netdev->mtu)
506 netdev_warn(netdev,
507 "interface MTU (%d) set higher "
01f2e4ea 508 "than switch port MTU (%d)\n",
a7a79deb 509 netdev->mtu, mtu);
01f2e4ea
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510 }
511}
512
383ab92f 513static void enic_link_check(struct enic *enic)
01f2e4ea 514{
383ab92f
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515 int link_status = vnic_dev_link_status(enic->vdev);
516 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 517
383ab92f 518 if (link_status && !carrier_ok) {
a7a79deb 519 netdev_info(enic->netdev, "Link UP\n");
383ab92f
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520 netif_carrier_on(enic->netdev);
521 } else if (!link_status && carrier_ok) {
a7a79deb 522 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 523 netif_carrier_off(enic->netdev);
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524 }
525}
526
527static void enic_notify_check(struct enic *enic)
528{
529 enic_msglvl_check(enic);
530 enic_mtu_check(enic);
531 enic_link_check(enic);
532}
533
534#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
535
536static irqreturn_t enic_isr_legacy(int irq, void *data)
537{
538 struct net_device *netdev = data;
539 struct enic *enic = netdev_priv(netdev);
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540 unsigned int io_intr = enic_legacy_io_intr();
541 unsigned int err_intr = enic_legacy_err_intr();
542 unsigned int notify_intr = enic_legacy_notify_intr();
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543 u32 pba;
544
717258ba 545 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
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546
547 pba = vnic_intr_legacy_pba(enic->legacy_pba);
548 if (!pba) {
717258ba 549 vnic_intr_unmask(&enic->intr[io_intr]);
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550 return IRQ_NONE; /* not our interrupt */
551 }
552
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VK
553 if (ENIC_TEST_INTR(pba, notify_intr)) {
554 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 555 enic_notify_check(enic);
ed8af6b2 556 }
01f2e4ea 557
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558 if (ENIC_TEST_INTR(pba, err_intr)) {
559 vnic_intr_return_all_credits(&enic->intr[err_intr]);
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560 enic_log_q_error(enic);
561 /* schedule recovery from WQ/RQ error */
562 schedule_work(&enic->reset);
563 return IRQ_HANDLED;
564 }
565
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566 if (ENIC_TEST_INTR(pba, io_intr)) {
567 if (napi_schedule_prep(&enic->napi[0]))
568 __napi_schedule(&enic->napi[0]);
01f2e4ea 569 } else {
717258ba 570 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF
571 }
572
573 return IRQ_HANDLED;
574}
575
576static irqreturn_t enic_isr_msi(int irq, void *data)
577{
578 struct enic *enic = data;
579
580 /* With MSI, there is no sharing of interrupts, so this is
581 * our interrupt and there is no need to ack it. The device
582 * is not providing per-vector masking, so the OS will not
583 * write to PCI config space to mask/unmask the interrupt.
584 * We're using mask_on_assertion for MSI, so the device
585 * automatically masks the interrupt when the interrupt is
586 * generated. Later, when exiting polling, the interrupt
587 * will be unmasked (see enic_poll).
588 *
589 * Also, the device uses the same PCIe Traffic Class (TC)
590 * for Memory Write data and MSI, so there are no ordering
591 * issues; the MSI will always arrive at the Root Complex
592 * _after_ corresponding Memory Writes (i.e. descriptor
593 * writes).
594 */
595
717258ba 596 napi_schedule(&enic->napi[0]);
01f2e4ea
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597
598 return IRQ_HANDLED;
599}
600
601static irqreturn_t enic_isr_msix_rq(int irq, void *data)
602{
717258ba 603 struct napi_struct *napi = data;
01f2e4ea
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604
605 /* schedule NAPI polling for RQ cleanup */
717258ba 606 napi_schedule(napi);
01f2e4ea
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607
608 return IRQ_HANDLED;
609}
610
611static irqreturn_t enic_isr_msix_wq(int irq, void *data)
612{
613 struct enic *enic = data;
717258ba
VK
614 unsigned int cq = enic_cq_wq(enic, 0);
615 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
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616 unsigned int wq_work_to_do = -1; /* no limit */
617 unsigned int wq_work_done;
618
717258ba 619 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF
620 wq_work_to_do, enic_wq_service, NULL);
621
717258ba 622 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF
623 wq_work_done,
624 1 /* unmask intr */,
625 1 /* reset intr timer */);
626
627 return IRQ_HANDLED;
628}
629
630static irqreturn_t enic_isr_msix_err(int irq, void *data)
631{
632 struct enic *enic = data;
717258ba 633 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 634
717258ba 635 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 636
01f2e4ea
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637 enic_log_q_error(enic);
638
639 /* schedule recovery from WQ/RQ error */
640 schedule_work(&enic->reset);
641
642 return IRQ_HANDLED;
643}
644
645static irqreturn_t enic_isr_msix_notify(int irq, void *data)
646{
647 struct enic *enic = data;
717258ba 648 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 649
717258ba 650 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 651 enic_notify_check(enic);
01f2e4ea
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652
653 return IRQ_HANDLED;
654}
655
656static inline void enic_queue_wq_skb_cont(struct enic *enic,
657 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 658 unsigned int len_left, int loopback)
01f2e4ea
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659{
660 skb_frag_t *frag;
661
662 /* Queue additional data fragments */
663 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
664 len_left -= frag->size;
665 enic_queue_wq_desc_cont(wq, skb,
666 pci_map_page(enic->pdev, frag->page,
667 frag->page_offset, frag->size,
668 PCI_DMA_TODEVICE),
669 frag->size,
1825aca6
VK
670 (len_left == 0), /* EOP? */
671 loopback);
01f2e4ea
SF
672 }
673}
674
675static inline void enic_queue_wq_skb_vlan(struct enic *enic,
676 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 677 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF
678{
679 unsigned int head_len = skb_headlen(skb);
680 unsigned int len_left = skb->len - head_len;
681 int eop = (len_left == 0);
682
ea0d7d91
SF
683 /* Queue the main skb fragment. The fragments are no larger
684 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
685 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
686 * per fragment is queued.
687 */
01f2e4ea
SF
688 enic_queue_wq_desc(wq, skb,
689 pci_map_single(enic->pdev, skb->data,
690 head_len, PCI_DMA_TODEVICE),
691 head_len,
692 vlan_tag_insert, vlan_tag,
1825aca6 693 eop, loopback);
01f2e4ea
SF
694
695 if (!eop)
1825aca6 696 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF
697}
698
699static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
700 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 701 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF
702{
703 unsigned int head_len = skb_headlen(skb);
704 unsigned int len_left = skb->len - head_len;
705 unsigned int hdr_len = skb_transport_offset(skb);
706 unsigned int csum_offset = hdr_len + skb->csum_offset;
707 int eop = (len_left == 0);
708
ea0d7d91
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709 /* Queue the main skb fragment. The fragments are no larger
710 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
711 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
712 * per fragment is queued.
713 */
01f2e4ea
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714 enic_queue_wq_desc_csum_l4(wq, skb,
715 pci_map_single(enic->pdev, skb->data,
716 head_len, PCI_DMA_TODEVICE),
717 head_len,
718 csum_offset,
719 hdr_len,
720 vlan_tag_insert, vlan_tag,
1825aca6 721 eop, loopback);
01f2e4ea
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722
723 if (!eop)
1825aca6 724 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF
725}
726
727static inline void enic_queue_wq_skb_tso(struct enic *enic,
728 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 729 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 730{
ea0d7d91
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731 unsigned int frag_len_left = skb_headlen(skb);
732 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF
733 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
734 int eop = (len_left == 0);
ea0d7d91
SF
735 unsigned int len;
736 dma_addr_t dma_addr;
737 unsigned int offset = 0;
738 skb_frag_t *frag;
01f2e4ea
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739
740 /* Preload TCP csum field with IP pseudo hdr calculated
741 * with IP length set to zero. HW will later add in length
742 * to each TCP segment resulting from the TSO.
743 */
744
09640e63 745 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF
746 ip_hdr(skb)->check = 0;
747 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
748 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 749 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
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750 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
751 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
752 }
753
ea0d7d91
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754 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
755 * for the main skb fragment
756 */
757 while (frag_len_left) {
758 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
759 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
760 len, PCI_DMA_TODEVICE);
761 enic_queue_wq_desc_tso(wq, skb,
762 dma_addr,
763 len,
764 mss, hdr_len,
765 vlan_tag_insert, vlan_tag,
1825aca6 766 eop && (len == frag_len_left), loopback);
ea0d7d91
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767 frag_len_left -= len;
768 offset += len;
769 }
01f2e4ea 770
ea0d7d91
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771 if (eop)
772 return;
773
774 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
775 * for additional data fragments
776 */
777 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
778 len_left -= frag->size;
779 frag_len_left = frag->size;
780 offset = frag->page_offset;
781
782 while (frag_len_left) {
783 len = min(frag_len_left,
784 (unsigned int)WQ_ENET_MAX_DESC_LEN);
785 dma_addr = pci_map_page(enic->pdev, frag->page,
786 offset, len,
787 PCI_DMA_TODEVICE);
788 enic_queue_wq_desc_cont(wq, skb,
789 dma_addr,
790 len,
791 (len_left == 0) &&
1825aca6
VK
792 (len == frag_len_left), /* EOP? */
793 loopback);
ea0d7d91
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794 frag_len_left -= len;
795 offset += len;
796 }
797 }
01f2e4ea
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798}
799
800static inline void enic_queue_wq_skb(struct enic *enic,
801 struct vnic_wq *wq, struct sk_buff *skb)
802{
803 unsigned int mss = skb_shinfo(skb)->gso_size;
804 unsigned int vlan_tag = 0;
805 int vlan_tag_insert = 0;
1825aca6 806 int loopback = 0;
01f2e4ea 807
eab6d18d 808 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF
809 /* VLAN tag from trunking driver */
810 vlan_tag_insert = 1;
811 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK
812 } else if (enic->loop_enable) {
813 vlan_tag = enic->loop_tag;
814 loopback = 1;
01f2e4ea
SF
815 }
816
817 if (mss)
818 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 819 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
820 else if (skb->ip_summed == CHECKSUM_PARTIAL)
821 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 822 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
823 else
824 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 825 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
826}
827
ed8af6b2 828/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 829static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 830 struct net_device *netdev)
01f2e4ea
SF
831{
832 struct enic *enic = netdev_priv(netdev);
833 struct vnic_wq *wq = &enic->wq[0];
834 unsigned long flags;
835
836 if (skb->len <= 0) {
837 dev_kfree_skb(skb);
838 return NETDEV_TX_OK;
839 }
840
841 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
842 * which is very likely. In the off chance it's going to take
843 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
844 */
845
846 if (skb_shinfo(skb)->gso_size == 0 &&
847 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
848 skb_linearize(skb)) {
849 dev_kfree_skb(skb);
850 return NETDEV_TX_OK;
851 }
852
853 spin_lock_irqsave(&enic->wq_lock[0], flags);
854
ea0d7d91
SF
855 if (vnic_wq_desc_avail(wq) <
856 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
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857 netif_stop_queue(netdev);
858 /* This is a hard error, log it */
a7a79deb 859 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF
860 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
861 return NETDEV_TX_BUSY;
862 }
863
864 enic_queue_wq_skb(enic, wq, skb);
865
ea0d7d91 866 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF
867 netif_stop_queue(netdev);
868
01f2e4ea
SF
869 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
870
871 return NETDEV_TX_OK;
872}
873
874/* dev_base_lock rwlock held, nominally process context */
875static struct net_device_stats *enic_get_stats(struct net_device *netdev)
876{
877 struct enic *enic = netdev_priv(netdev);
25f0a061 878 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
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879 struct vnic_stats *stats;
880
383ab92f 881 enic_dev_stats_dump(enic, &stats);
01f2e4ea 882
25f0a061
SF
883 net_stats->tx_packets = stats->tx.tx_frames_ok;
884 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
885 net_stats->tx_errors = stats->tx.tx_errors;
886 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 887
25f0a061
SF
888 net_stats->rx_packets = stats->rx.rx_frames_ok;
889 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
890 net_stats->rx_errors = stats->rx.rx_errors;
891 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 892 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 893 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 894 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 895
25f0a061 896 return net_stats;
01f2e4ea
SF
897}
898
99ef5639 899static void enic_reset_multicast_list(struct enic *enic)
01f2e4ea
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900{
901 enic->mc_count = 0;
99ef5639 902 enic->flags = 0;
01f2e4ea
SF
903}
904
905static int enic_set_mac_addr(struct net_device *netdev, char *addr)
906{
f8bd9091
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907 struct enic *enic = netdev_priv(netdev);
908
909 if (enic_is_dynamic(enic)) {
910 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
911 return -EADDRNOTAVAIL;
912 } else {
913 if (!is_valid_ether_addr(addr))
914 return -EADDRNOTAVAIL;
915 }
01f2e4ea
SF
916
917 memcpy(netdev->dev_addr, addr, netdev->addr_len);
918
919 return 0;
920}
921
f8bd9091
SF
922static int enic_dev_add_station_addr(struct enic *enic)
923{
924 int err = 0;
925
926 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
927 spin_lock(&enic->devcmd_lock);
928 err = vnic_dev_add_addr(enic->vdev, enic->netdev->dev_addr);
929 spin_unlock(&enic->devcmd_lock);
930 }
931
932 return err;
933}
934
935static int enic_dev_del_station_addr(struct enic *enic)
936{
937 int err = 0;
938
939 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
940 spin_lock(&enic->devcmd_lock);
941 err = vnic_dev_del_addr(enic->vdev, enic->netdev->dev_addr);
942 spin_unlock(&enic->devcmd_lock);
943 }
944
945 return err;
946}
947
948static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
949{
950 struct enic *enic = netdev_priv(netdev);
951 struct sockaddr *saddr = p;
952 char *addr = saddr->sa_data;
953 int err;
954
955 if (netif_running(enic->netdev)) {
956 err = enic_dev_del_station_addr(enic);
957 if (err)
958 return err;
959 }
960
961 err = enic_set_mac_addr(netdev, addr);
962 if (err)
963 return err;
964
965 if (netif_running(enic->netdev)) {
966 err = enic_dev_add_station_addr(enic);
967 if (err)
968 return err;
969 }
970
971 return err;
972}
973
974static int enic_set_mac_address(struct net_device *netdev, void *p)
975{
294dab25 976 struct sockaddr *saddr = p;
c76fd32d
VK
977 char *addr = saddr->sa_data;
978 struct enic *enic = netdev_priv(netdev);
979 int err;
980
981 err = enic_dev_del_station_addr(enic);
982 if (err)
983 return err;
984
985 err = enic_set_mac_addr(netdev, addr);
986 if (err)
987 return err;
294dab25 988
c76fd32d 989 return enic_dev_add_station_addr(enic);
f8bd9091
SF
990}
991
383ab92f
VK
992static int enic_dev_packet_filter(struct enic *enic, int directed,
993 int multicast, int broadcast, int promisc, int allmulti)
994{
995 int err;
996
997 spin_lock(&enic->devcmd_lock);
998 err = vnic_dev_packet_filter(enic->vdev, directed,
999 multicast, broadcast, promisc, allmulti);
1000 spin_unlock(&enic->devcmd_lock);
1001
1002 return err;
1003}
1004
1005static int enic_dev_add_multicast_addr(struct enic *enic, u8 *addr)
1006{
1007 int err;
1008
1009 spin_lock(&enic->devcmd_lock);
1010 err = vnic_dev_add_addr(enic->vdev, addr);
1011 spin_unlock(&enic->devcmd_lock);
1012
1013 return err;
1014}
1015
1016static int enic_dev_del_multicast_addr(struct enic *enic, u8 *addr)
1017{
1018 int err;
1019
1020 spin_lock(&enic->devcmd_lock);
1021 err = vnic_dev_del_addr(enic->vdev, addr);
1022 spin_unlock(&enic->devcmd_lock);
1023
1024 return err;
1025}
1026
01f2e4ea
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1027/* netif_tx_lock held, BHs disabled */
1028static void enic_set_multicast_list(struct net_device *netdev)
1029{
1030 struct enic *enic = netdev_priv(netdev);
22bedad3 1031 struct netdev_hw_addr *ha;
01f2e4ea
SF
1032 int directed = 1;
1033 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1034 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1035 int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
4cd24eaf 1036 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 1037 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
641cb85e 1038 mc_count > ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 1039 unsigned int flags = netdev->flags | (allmulti ? IFF_ALLMULTI : 0);
01f2e4ea 1040 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF
1041 unsigned int i, j;
1042
1043 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
1044 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
1045
9959a185
SF
1046 if (enic->flags != flags) {
1047 enic->flags = flags;
383ab92f 1048 enic_dev_packet_filter(enic, directed,
9959a185
SF
1049 multicast, broadcast, promisc, allmulti);
1050 }
01f2e4ea
SF
1051
1052 /* Is there an easier way? Trying to minimize to
1053 * calls to add/del multicast addrs. We keep the
1054 * addrs from the last call in enic->mc_addr and
1055 * look for changes to add/del.
1056 */
1057
48e2f183 1058 i = 0;
22bedad3 1059 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP
1060 if (i == mc_count)
1061 break;
22bedad3 1062 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF
1063 }
1064
1065 for (i = 0; i < enic->mc_count; i++) {
1066 for (j = 0; j < mc_count; j++)
1067 if (compare_ether_addr(enic->mc_addr[i],
1068 mc_addr[j]) == 0)
1069 break;
1070 if (j == mc_count)
383ab92f 1071 enic_dev_del_multicast_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF
1072 }
1073
1074 for (i = 0; i < mc_count; i++) {
1075 for (j = 0; j < enic->mc_count; j++)
1076 if (compare_ether_addr(mc_addr[i],
1077 enic->mc_addr[j]) == 0)
1078 break;
1079 if (j == enic->mc_count)
383ab92f 1080 enic_dev_add_multicast_addr(enic, mc_addr[i]);
01f2e4ea
SF
1081 }
1082
1083 /* Save the list to compare against next time
1084 */
1085
1086 for (i = 0; i < mc_count; i++)
1087 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
1088
1089 enic->mc_count = mc_count;
01f2e4ea
SF
1090}
1091
1092/* rtnl lock is held */
1093static void enic_vlan_rx_register(struct net_device *netdev,
1094 struct vlan_group *vlan_group)
1095{
1096 struct enic *enic = netdev_priv(netdev);
1097 enic->vlan_group = vlan_group;
1098}
1099
1100/* rtnl lock is held */
1101static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1102{
1103 struct enic *enic = netdev_priv(netdev);
1104
1105 spin_lock(&enic->devcmd_lock);
1106 enic_add_vlan(enic, vid);
1107 spin_unlock(&enic->devcmd_lock);
1108}
1109
1110/* rtnl lock is held */
1111static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1112{
1113 struct enic *enic = netdev_priv(netdev);
1114
1115 spin_lock(&enic->devcmd_lock);
1116 enic_del_vlan(enic, vid);
1117 spin_unlock(&enic->devcmd_lock);
1118}
1119
1120/* netif_tx_lock held, BHs disabled */
1121static void enic_tx_timeout(struct net_device *netdev)
1122{
1123 struct enic *enic = netdev_priv(netdev);
1124 schedule_work(&enic->reset);
1125}
1126
f8bd9091
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1127static int enic_vnic_dev_deinit(struct enic *enic)
1128{
1129 int err;
1130
1131 spin_lock(&enic->devcmd_lock);
1132 err = vnic_dev_deinit(enic->vdev);
1133 spin_unlock(&enic->devcmd_lock);
1134
1135 return err;
1136}
1137
1138static int enic_dev_init_prov(struct enic *enic, struct vic_provinfo *vp)
1139{
1140 int err;
1141
1142 spin_lock(&enic->devcmd_lock);
1143 err = vnic_dev_init_prov(enic->vdev,
1144 (u8 *)vp, vic_provinfo_size(vp));
1145 spin_unlock(&enic->devcmd_lock);
1146
1147 return err;
1148}
1149
1150static int enic_dev_init_done(struct enic *enic, int *done, int *error)
1151{
1152 int err;
1153
1154 spin_lock(&enic->devcmd_lock);
1155 err = vnic_dev_init_done(enic->vdev, done, error);
1156 spin_unlock(&enic->devcmd_lock);
1157
1158 return err;
1159}
1160
08f382eb 1161static int enic_set_port_profile(struct enic *enic, u8 *mac)
f8bd9091
SF
1162{
1163 struct vic_provinfo *vp;
1164 u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
f8bd9091 1165 char uuid_str[38];
f8bd9091
SF
1166 int err;
1167
08f382eb
SF
1168 err = enic_vnic_dev_deinit(enic);
1169 if (err)
1170 return err;
f8bd9091 1171
08f382eb 1172 switch (enic->pp.request) {
f8bd9091 1173
08f382eb 1174 case PORT_REQUEST_ASSOCIATE:
f8bd9091 1175
08f382eb
SF
1176 if (!(enic->pp.set & ENIC_SET_NAME) || !strlen(enic->pp.name))
1177 return -EINVAL;
f8bd9091 1178
08f382eb
SF
1179 if (!is_valid_ether_addr(mac))
1180 return -EADDRNOTAVAIL;
f8bd9091 1181
08f382eb
SF
1182 vp = vic_provinfo_alloc(GFP_KERNEL, oui,
1183 VIC_PROVINFO_LINUX_TYPE);
1184 if (!vp)
1185 return -ENOMEM;
f8bd9091 1186
f8bd9091 1187 vic_provinfo_add_tlv(vp,
08f382eb
SF
1188 VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR,
1189 strlen(enic->pp.name) + 1, enic->pp.name);
f8bd9091 1190
08f382eb
SF
1191 vic_provinfo_add_tlv(vp,
1192 VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR,
1193 ETH_ALEN, mac);
1194
1195 if (enic->pp.set & ENIC_SET_INSTANCE) {
c33788b4 1196 sprintf(uuid_str, "%pUB", enic->pp.instance_uuid);
08f382eb
SF
1197 vic_provinfo_add_tlv(vp,
1198 VIC_LINUX_PROV_TLV_CLIENT_UUID_STR,
1199 sizeof(uuid_str), uuid_str);
1200 }
f8bd9091 1201
08f382eb 1202 if (enic->pp.set & ENIC_SET_HOST) {
c33788b4 1203 sprintf(uuid_str, "%pUB", enic->pp.host_uuid);
08f382eb
SF
1204 vic_provinfo_add_tlv(vp,
1205 VIC_LINUX_PROV_TLV_HOST_UUID_STR,
1206 sizeof(uuid_str), uuid_str);
1207 }
f8bd9091 1208
08f382eb
SF
1209 err = enic_dev_init_prov(enic, vp);
1210 vic_provinfo_free(vp);
1211 if (err)
1212 return err;
1213 break;
f8bd9091 1214
08f382eb
SF
1215 case PORT_REQUEST_DISASSOCIATE:
1216 break;
f8bd9091 1217
08f382eb
SF
1218 default:
1219 return -EINVAL;
1220 }
f8bd9091 1221
08f382eb
SF
1222 enic->pp.set |= ENIC_SET_APPLIED;
1223 return 0;
f8bd9091
SF
1224}
1225
1226static int enic_set_vf_port(struct net_device *netdev, int vf,
1227 struct nlattr *port[])
1228{
1229 struct enic *enic = netdev_priv(netdev);
08f382eb
SF
1230
1231 memset(&enic->pp, 0, sizeof(enic->pp));
1232
1233 if (port[IFLA_PORT_REQUEST]) {
1234 enic->pp.set |= ENIC_SET_REQUEST;
1235 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1236 }
1237
1238 if (port[IFLA_PORT_PROFILE]) {
1239 enic->pp.set |= ENIC_SET_NAME;
1240 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
1241 PORT_PROFILE_MAX);
1242 }
1243
1244 if (port[IFLA_PORT_INSTANCE_UUID]) {
1245 enic->pp.set |= ENIC_SET_INSTANCE;
1246 memcpy(enic->pp.instance_uuid,
1247 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1248 }
1249
1250 if (port[IFLA_PORT_HOST_UUID]) {
1251 enic->pp.set |= ENIC_SET_HOST;
1252 memcpy(enic->pp.host_uuid,
1253 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1254 }
f8bd9091
SF
1255
1256 /* don't support VFs, yet */
1257 if (vf != PORT_SELF_VF)
1258 return -EOPNOTSUPP;
1259
08f382eb
SF
1260 if (!(enic->pp.set & ENIC_SET_REQUEST))
1261 return -EOPNOTSUPP;
f8bd9091 1262
08f382eb 1263 if (enic->pp.request == PORT_REQUEST_ASSOCIATE) {
f8bd9091 1264
418c437d
SF
1265 /* If the interface mac addr hasn't been assigned,
1266 * assign a random mac addr before setting port-
1267 * profile.
1268 */
1269
1270 if (is_zero_ether_addr(netdev->dev_addr))
1271 random_ether_addr(netdev->dev_addr);
f8bd9091
SF
1272 }
1273
08f382eb 1274 return enic_set_port_profile(enic, netdev->dev_addr);
f8bd9091
SF
1275}
1276
1277static int enic_get_vf_port(struct net_device *netdev, int vf,
1278 struct sk_buff *skb)
1279{
1280 struct enic *enic = netdev_priv(netdev);
1281 int err, error, done;
1282 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1283
08f382eb
SF
1284 if (!(enic->pp.set & ENIC_SET_APPLIED))
1285 return -ENODATA;
f8bd9091
SF
1286
1287 err = enic_dev_init_done(enic, &done, &error);
f8bd9091 1288 if (err)
08f382eb 1289 error = err;
f8bd9091
SF
1290
1291 switch (error) {
1292 case ERR_SUCCESS:
1293 if (!done)
1294 response = PORT_PROFILE_RESPONSE_INPROGRESS;
1295 break;
1296 case ERR_EINVAL:
1297 response = PORT_PROFILE_RESPONSE_INVALID;
1298 break;
1299 case ERR_EBADSTATE:
1300 response = PORT_PROFILE_RESPONSE_BADSTATE;
1301 break;
1302 case ERR_ENOMEM:
1303 response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
1304 break;
1305 default:
1306 response = PORT_PROFILE_RESPONSE_ERROR;
1307 break;
1308 }
1309
1310 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1311 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF
1312 if (enic->pp.set & ENIC_SET_NAME)
1313 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1314 enic->pp.name);
1315 if (enic->pp.set & ENIC_SET_INSTANCE)
1316 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1317 enic->pp.instance_uuid);
1318 if (enic->pp.set & ENIC_SET_HOST)
1319 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1320 enic->pp.host_uuid);
f8bd9091
SF
1321
1322 return 0;
1323
1324nla_put_failure:
1325 return -EMSGSIZE;
1326}
1327
01f2e4ea
SF
1328static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1329{
1330 struct enic *enic = vnic_dev_priv(rq->vdev);
1331
1332 if (!buf->os_buf)
1333 return;
1334
1335 pci_unmap_single(enic->pdev, buf->dma_addr,
1336 buf->len, PCI_DMA_FROMDEVICE);
1337 dev_kfree_skb_any(buf->os_buf);
1338}
1339
01f2e4ea
SF
1340static int enic_rq_alloc_buf(struct vnic_rq *rq)
1341{
1342 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1343 struct net_device *netdev = enic->netdev;
01f2e4ea 1344 struct sk_buff *skb;
1825aca6 1345 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF
1346 unsigned int os_buf_index = 0;
1347 dma_addr_t dma_addr;
1348
89d71a66 1349 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF
1350 if (!skb)
1351 return -ENOMEM;
1352
1353 dma_addr = pci_map_single(enic->pdev, skb->data,
1354 len, PCI_DMA_FROMDEVICE);
1355
1356 enic_queue_rq_desc(rq, skb, os_buf_index,
1357 dma_addr, len);
1358
1359 return 0;
1360}
1361
4badc385
SF
1362static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
1363{
1364 struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
1365
1366 if (vnic_rq_posting_soon(rq)) {
1367
1368 /* SW workaround for A0 HW erratum: if we're just about
1369 * to write posted_index, insert a dummy desc
1370 * of type resvd
1371 */
1372
1373 rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
1374 vnic_rq_post(rq, 0, 0, 0, 0);
1375 } else {
1376 return enic_rq_alloc_buf(rq);
1377 }
1378
1379 return 0;
1380}
1381
383ab92f
VK
1382static int enic_dev_hw_version(struct enic *enic,
1383 enum vnic_dev_hw_version *hw_ver)
1384{
1385 int err;
1386
1387 spin_lock(&enic->devcmd_lock);
1388 err = vnic_dev_hw_version(enic->vdev, hw_ver);
1389 spin_unlock(&enic->devcmd_lock);
1390
1391 return err;
1392}
1393
4badc385
SF
1394static int enic_set_rq_alloc_buf(struct enic *enic)
1395{
1396 enum vnic_dev_hw_version hw_ver;
1397 int err;
1398
383ab92f 1399 err = enic_dev_hw_version(enic, &hw_ver);
4badc385
SF
1400 if (err)
1401 return err;
1402
1403 switch (hw_ver) {
1404 case VNIC_DEV_HW_VER_A1:
1405 enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
1406 break;
1407 case VNIC_DEV_HW_VER_A2:
1408 case VNIC_DEV_HW_VER_UNKNOWN:
1409 enic->rq_alloc_buf = enic_rq_alloc_buf;
1410 break;
1411 default:
1412 return -ENODEV;
1413 }
1414
1415 return 0;
1416}
1417
01f2e4ea
SF
1418static void enic_rq_indicate_buf(struct vnic_rq *rq,
1419 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1420 int skipped, void *opaque)
1421{
1422 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1423 struct net_device *netdev = enic->netdev;
01f2e4ea
SF
1424 struct sk_buff *skb;
1425
1426 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1427 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1428 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1429 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1430 u8 packet_error;
f8cac14a 1431 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF
1432 u32 rss_hash;
1433
1434 if (skipped)
1435 return;
1436
1437 skb = buf->os_buf;
1438 prefetch(skb->data - NET_IP_ALIGN);
1439 pci_unmap_single(enic->pdev, buf->dma_addr,
1440 buf->len, PCI_DMA_FROMDEVICE);
1441
1442 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1443 &type, &color, &q_number, &completed_index,
1444 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1445 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1446 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF
1447 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1448 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1449 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1450 &fcs_ok);
1451
1452 if (packet_error) {
1453
350991e1
SF
1454 if (!fcs_ok) {
1455 if (bytes_written > 0)
1456 enic->rq_bad_fcs++;
1457 else if (bytes_written == 0)
1458 enic->rq_truncated_pkts++;
1459 }
01f2e4ea
SF
1460
1461 dev_kfree_skb_any(skb);
1462
1463 return;
1464 }
1465
1466 if (eop && bytes_written > 0) {
1467
1468 /* Good receive
1469 */
1470
1471 skb_put(skb, bytes_written);
86ca9db7 1472 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF
1473
1474 if (enic->csum_rx_enabled && !csum_not_calc) {
1475 skb->csum = htons(checksum);
1476 skb->ip_summed = CHECKSUM_COMPLETE;
1477 }
1478
86ca9db7 1479 skb->dev = netdev;
01f2e4ea 1480
f8cac14a
VK
1481 if (enic->vlan_group && vlan_stripped &&
1482 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1483
88132f55 1484 if (netdev->features & NETIF_F_GRO)
717258ba
VK
1485 vlan_gro_receive(&enic->napi[q_number],
1486 enic->vlan_group, vlan_tci, skb);
01f2e4ea
SF
1487 else
1488 vlan_hwaccel_receive_skb(skb,
f8cac14a 1489 enic->vlan_group, vlan_tci);
01f2e4ea
SF
1490
1491 } else {
1492
88132f55 1493 if (netdev->features & NETIF_F_GRO)
717258ba 1494 napi_gro_receive(&enic->napi[q_number], skb);
01f2e4ea
SF
1495 else
1496 netif_receive_skb(skb);
1497
1498 }
01f2e4ea
SF
1499 } else {
1500
1501 /* Buffer overflow
1502 */
1503
1504 dev_kfree_skb_any(skb);
1505 }
1506}
1507
1508static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1509 u8 type, u16 q_number, u16 completed_index, void *opaque)
1510{
1511 struct enic *enic = vnic_dev_priv(vdev);
1512
1513 vnic_rq_service(&enic->rq[q_number], cq_desc,
1514 completed_index, VNIC_RQ_RETURN_DESC,
1515 enic_rq_indicate_buf, opaque);
1516
1517 return 0;
1518}
1519
01f2e4ea
SF
1520static int enic_poll(struct napi_struct *napi, int budget)
1521{
717258ba
VK
1522 struct net_device *netdev = napi->dev;
1523 struct enic *enic = netdev_priv(netdev);
1524 unsigned int cq_rq = enic_cq_rq(enic, 0);
1525 unsigned int cq_wq = enic_cq_wq(enic, 0);
1526 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF
1527 unsigned int rq_work_to_do = budget;
1528 unsigned int wq_work_to_do = -1; /* no limit */
1529 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1530 int err;
01f2e4ea
SF
1531
1532 /* Service RQ (first) and WQ
1533 */
1534
717258ba 1535 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF
1536 rq_work_to_do, enic_rq_service, NULL);
1537
717258ba 1538 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF
1539 wq_work_to_do, enic_wq_service, NULL);
1540
1541 /* Accumulate intr event credits for this polling
1542 * cycle. An intr event is the completion of a
1543 * a WQ or RQ packet.
1544 */
1545
1546 work_done = rq_work_done + wq_work_done;
1547
1548 if (work_done > 0)
717258ba 1549 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF
1550 work_done,
1551 0 /* don't unmask intr */,
1552 0 /* don't reset intr timer */);
1553
2d6ddced 1554 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea 1555
2d6ddced
SF
1556 /* Buffer allocation failed. Stay in polling
1557 * mode so we can try to fill the ring again.
1558 */
01f2e4ea 1559
2d6ddced
SF
1560 if (err)
1561 rq_work_done = rq_work_to_do;
01f2e4ea 1562
2d6ddced 1563 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1564
2d6ddced 1565 /* Some work done, but not enough to stay in polling,
88132f55 1566 * exit polling
01f2e4ea
SF
1567 */
1568
288379f0 1569 napi_complete(napi);
717258ba 1570 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF
1571 }
1572
1573 return rq_work_done;
1574}
1575
1576static int enic_poll_msix(struct napi_struct *napi, int budget)
1577{
717258ba
VK
1578 struct net_device *netdev = napi->dev;
1579 struct enic *enic = netdev_priv(netdev);
1580 unsigned int rq = (napi - &enic->napi[0]);
1581 unsigned int cq = enic_cq_rq(enic, rq);
1582 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF
1583 unsigned int work_to_do = budget;
1584 unsigned int work_done;
2d6ddced 1585 int err;
01f2e4ea
SF
1586
1587 /* Service RQ
1588 */
1589
717258ba 1590 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF
1591 work_to_do, enic_rq_service, NULL);
1592
2d6ddced
SF
1593 /* Return intr event credits for this polling
1594 * cycle. An intr event is the completion of a
1595 * RQ packet.
1596 */
01f2e4ea 1597
2d6ddced 1598 if (work_done > 0)
717258ba 1599 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF
1600 work_done,
1601 0 /* don't unmask intr */,
1602 0 /* don't reset intr timer */);
01f2e4ea 1603
717258ba 1604 err = vnic_rq_fill(&enic->rq[rq], enic->rq_alloc_buf);
2d6ddced
SF
1605
1606 /* Buffer allocation failed. Stay in polling mode
1607 * so we can try to fill the ring again.
1608 */
1609
1610 if (err)
1611 work_done = work_to_do;
1612
1613 if (work_done < work_to_do) {
1614
1615 /* Some work done, but not enough to stay in polling,
88132f55 1616 * exit polling
01f2e4ea
SF
1617 */
1618
288379f0 1619 napi_complete(napi);
717258ba 1620 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF
1621 }
1622
1623 return work_done;
1624}
1625
1626static void enic_notify_timer(unsigned long data)
1627{
1628 struct enic *enic = (struct enic *)data;
1629
1630 enic_notify_check(enic);
1631
25f0a061
SF
1632 mod_timer(&enic->notify_timer,
1633 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF
1634}
1635
1636static void enic_free_intr(struct enic *enic)
1637{
1638 struct net_device *netdev = enic->netdev;
1639 unsigned int i;
1640
1641 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1642 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF
1643 free_irq(enic->pdev->irq, netdev);
1644 break;
8f4d248c
SF
1645 case VNIC_DEV_INTR_MODE_MSI:
1646 free_irq(enic->pdev->irq, enic);
1647 break;
01f2e4ea
SF
1648 case VNIC_DEV_INTR_MODE_MSIX:
1649 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1650 if (enic->msix[i].requested)
1651 free_irq(enic->msix_entry[i].vector,
1652 enic->msix[i].devid);
1653 break;
1654 default:
1655 break;
1656 }
1657}
1658
1659static int enic_request_intr(struct enic *enic)
1660{
1661 struct net_device *netdev = enic->netdev;
717258ba 1662 unsigned int i, intr;
01f2e4ea
SF
1663 int err = 0;
1664
1665 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1666
1667 case VNIC_DEV_INTR_MODE_INTX:
1668
1669 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1670 IRQF_SHARED, netdev->name, netdev);
1671 break;
1672
1673 case VNIC_DEV_INTR_MODE_MSI:
1674
1675 err = request_irq(enic->pdev->irq, enic_isr_msi,
1676 0, netdev->name, enic);
1677 break;
1678
1679 case VNIC_DEV_INTR_MODE_MSIX:
1680
717258ba
VK
1681 for (i = 0; i < enic->rq_count; i++) {
1682 intr = enic_msix_rq_intr(enic, i);
1683 sprintf(enic->msix[intr].devname,
1684 "%.11s-rx-%d", netdev->name, i);
1685 enic->msix[intr].isr = enic_isr_msix_rq;
1686 enic->msix[intr].devid = &enic->napi[i];
1687 }
01f2e4ea 1688
717258ba
VK
1689 for (i = 0; i < enic->wq_count; i++) {
1690 intr = enic_msix_wq_intr(enic, i);
1691 sprintf(enic->msix[intr].devname,
1692 "%.11s-tx-%d", netdev->name, i);
1693 enic->msix[intr].isr = enic_isr_msix_wq;
1694 enic->msix[intr].devid = enic;
1695 }
01f2e4ea 1696
717258ba
VK
1697 intr = enic_msix_err_intr(enic);
1698 sprintf(enic->msix[intr].devname,
01f2e4ea 1699 "%.11s-err", netdev->name);
717258ba
VK
1700 enic->msix[intr].isr = enic_isr_msix_err;
1701 enic->msix[intr].devid = enic;
01f2e4ea 1702
717258ba
VK
1703 intr = enic_msix_notify_intr(enic);
1704 sprintf(enic->msix[intr].devname,
01f2e4ea 1705 "%.11s-notify", netdev->name);
717258ba
VK
1706 enic->msix[intr].isr = enic_isr_msix_notify;
1707 enic->msix[intr].devid = enic;
1708
1709 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1710 enic->msix[i].requested = 0;
01f2e4ea 1711
717258ba 1712 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF
1713 err = request_irq(enic->msix_entry[i].vector,
1714 enic->msix[i].isr, 0,
1715 enic->msix[i].devname,
1716 enic->msix[i].devid);
1717 if (err) {
1718 enic_free_intr(enic);
1719 break;
1720 }
1721 enic->msix[i].requested = 1;
1722 }
1723
1724 break;
1725
1726 default:
1727 break;
1728 }
1729
1730 return err;
1731}
1732
b3d18d19
SF
1733static void enic_synchronize_irqs(struct enic *enic)
1734{
1735 unsigned int i;
1736
1737 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1738 case VNIC_DEV_INTR_MODE_INTX:
1739 case VNIC_DEV_INTR_MODE_MSI:
1740 synchronize_irq(enic->pdev->irq);
1741 break;
1742 case VNIC_DEV_INTR_MODE_MSIX:
1743 for (i = 0; i < enic->intr_count; i++)
1744 synchronize_irq(enic->msix_entry[i].vector);
1745 break;
1746 default:
1747 break;
1748 }
1749}
1750
383ab92f 1751static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF
1752{
1753 int err;
1754
56ac88b3 1755 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF
1756 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1757 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK
1758 err = vnic_dev_notify_set(enic->vdev,
1759 enic_legacy_notify_intr());
01f2e4ea
SF
1760 break;
1761 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK
1762 err = vnic_dev_notify_set(enic->vdev,
1763 enic_msix_notify_intr(enic));
01f2e4ea
SF
1764 break;
1765 default:
1766 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1767 break;
1768 }
56ac88b3 1769 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF
1770
1771 return err;
1772}
1773
383ab92f
VK
1774static int enic_dev_notify_unset(struct enic *enic)
1775{
1776 int err;
1777
1778 spin_lock(&enic->devcmd_lock);
1779 err = vnic_dev_notify_unset(enic->vdev);
1780 spin_unlock(&enic->devcmd_lock);
1781
1782 return err;
1783}
1784
1785static int enic_dev_enable(struct enic *enic)
1786{
1787 int err;
1788
1789 spin_lock(&enic->devcmd_lock);
2db77e0f 1790 err = vnic_dev_enable_wait(enic->vdev);
383ab92f
VK
1791 spin_unlock(&enic->devcmd_lock);
1792
1793 return err;
1794}
1795
1796static int enic_dev_disable(struct enic *enic)
1797{
1798 int err;
1799
1800 spin_lock(&enic->devcmd_lock);
1801 err = vnic_dev_disable(enic->vdev);
1802 spin_unlock(&enic->devcmd_lock);
1803
1804 return err;
1805}
1806
01f2e4ea
SF
1807static void enic_notify_timer_start(struct enic *enic)
1808{
1809 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1810 case VNIC_DEV_INTR_MODE_MSI:
1811 mod_timer(&enic->notify_timer, jiffies);
1812 break;
1813 default:
1814 /* Using intr for notification for INTx/MSI-X */
1815 break;
1816 };
1817}
1818
1819/* rtnl lock is held, process context */
1820static int enic_open(struct net_device *netdev)
1821{
1822 struct enic *enic = netdev_priv(netdev);
1823 unsigned int i;
1824 int err;
1825
4b75a442
SF
1826 err = enic_request_intr(enic);
1827 if (err) {
a7a79deb 1828 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF
1829 return err;
1830 }
1831
383ab92f 1832 err = enic_dev_notify_set(enic);
4b75a442 1833 if (err) {
a7a79deb
VK
1834 netdev_err(netdev,
1835 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF
1836 goto err_out_free_intr;
1837 }
1838
01f2e4ea 1839 for (i = 0; i < enic->rq_count; i++) {
2d6ddced
SF
1840 vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
1841 /* Need at least one buffer on ring to get going */
1842 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1843 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1844 err = -ENOMEM;
4b75a442 1845 goto err_out_notify_unset;
01f2e4ea
SF
1846 }
1847 }
1848
1849 for (i = 0; i < enic->wq_count; i++)
1850 vnic_wq_enable(&enic->wq[i]);
1851 for (i = 0; i < enic->rq_count; i++)
1852 vnic_rq_enable(&enic->rq[i]);
1853
f8bd9091 1854 enic_dev_add_station_addr(enic);
01f2e4ea
SF
1855 enic_set_multicast_list(netdev);
1856
1857 netif_wake_queue(netdev);
717258ba
VK
1858
1859 for (i = 0; i < enic->rq_count; i++)
1860 napi_enable(&enic->napi[i]);
1861
383ab92f 1862 enic_dev_enable(enic);
01f2e4ea
SF
1863
1864 for (i = 0; i < enic->intr_count; i++)
1865 vnic_intr_unmask(&enic->intr[i]);
1866
1867 enic_notify_timer_start(enic);
1868
1869 return 0;
4b75a442
SF
1870
1871err_out_notify_unset:
383ab92f 1872 enic_dev_notify_unset(enic);
4b75a442
SF
1873err_out_free_intr:
1874 enic_free_intr(enic);
1875
1876 return err;
01f2e4ea
SF
1877}
1878
1879/* rtnl lock is held, process context */
1880static int enic_stop(struct net_device *netdev)
1881{
1882 struct enic *enic = netdev_priv(netdev);
1883 unsigned int i;
1884 int err;
1885
29046f9b 1886 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1887 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK
1888 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1889 }
b3d18d19
SF
1890
1891 enic_synchronize_irqs(enic);
1892
01f2e4ea
SF
1893 del_timer_sync(&enic->notify_timer);
1894
383ab92f 1895 enic_dev_disable(enic);
717258ba
VK
1896
1897 for (i = 0; i < enic->rq_count; i++)
1898 napi_disable(&enic->napi[i]);
1899
b3d18d19
SF
1900 netif_carrier_off(netdev);
1901 netif_tx_disable(netdev);
f8bd9091
SF
1902 enic_dev_del_station_addr(enic);
1903
01f2e4ea
SF
1904 for (i = 0; i < enic->wq_count; i++) {
1905 err = vnic_wq_disable(&enic->wq[i]);
1906 if (err)
1907 return err;
1908 }
1909 for (i = 0; i < enic->rq_count; i++) {
1910 err = vnic_rq_disable(&enic->rq[i]);
1911 if (err)
1912 return err;
1913 }
1914
383ab92f 1915 enic_dev_notify_unset(enic);
4b75a442
SF
1916 enic_free_intr(enic);
1917
01f2e4ea
SF
1918 for (i = 0; i < enic->wq_count; i++)
1919 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1920 for (i = 0; i < enic->rq_count; i++)
1921 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1922 for (i = 0; i < enic->cq_count; i++)
1923 vnic_cq_clean(&enic->cq[i]);
1924 for (i = 0; i < enic->intr_count; i++)
1925 vnic_intr_clean(&enic->intr[i]);
1926
1927 return 0;
1928}
1929
1930static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1931{
1932 struct enic *enic = netdev_priv(netdev);
1933 int running = netif_running(netdev);
1934
25f0a061
SF
1935 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1936 return -EINVAL;
1937
01f2e4ea
SF
1938 if (running)
1939 enic_stop(netdev);
1940
01f2e4ea
SF
1941 netdev->mtu = new_mtu;
1942
1943 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK
1944 netdev_warn(netdev,
1945 "interface MTU (%d) set higher than port MTU (%d)\n",
1946 netdev->mtu, enic->port_mtu);
01f2e4ea
SF
1947
1948 if (running)
1949 enic_open(netdev);
1950
1951 return 0;
1952}
1953
1954#ifdef CONFIG_NET_POLL_CONTROLLER
1955static void enic_poll_controller(struct net_device *netdev)
1956{
1957 struct enic *enic = netdev_priv(netdev);
1958 struct vnic_dev *vdev = enic->vdev;
717258ba 1959 unsigned int i, intr;
01f2e4ea
SF
1960
1961 switch (vnic_dev_get_intr_mode(vdev)) {
1962 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK
1963 for (i = 0; i < enic->rq_count; i++) {
1964 intr = enic_msix_rq_intr(enic, i);
1965 enic_isr_msix_rq(enic->msix_entry[intr].vector, enic);
1966 }
1967 intr = enic_msix_wq_intr(enic, i);
1968 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
01f2e4ea
SF
1969 break;
1970 case VNIC_DEV_INTR_MODE_MSI:
1971 enic_isr_msi(enic->pdev->irq, enic);
1972 break;
1973 case VNIC_DEV_INTR_MODE_INTX:
1974 enic_isr_legacy(enic->pdev->irq, netdev);
1975 break;
1976 default:
1977 break;
1978 }
1979}
1980#endif
1981
1982static int enic_dev_wait(struct vnic_dev *vdev,
1983 int (*start)(struct vnic_dev *, int),
1984 int (*finished)(struct vnic_dev *, int *),
1985 int arg)
1986{
1987 unsigned long time;
1988 int done;
1989 int err;
1990
1991 BUG_ON(in_interrupt());
1992
1993 err = start(vdev, arg);
1994 if (err)
1995 return err;
1996
1997 /* Wait for func to complete...2 seconds max
1998 */
1999
2000 time = jiffies + (HZ * 2);
2001 do {
2002
2003 err = finished(vdev, &done);
2004 if (err)
2005 return err;
2006
2007 if (done)
2008 return 0;
2009
2010 schedule_timeout_uninterruptible(HZ / 10);
2011
2012 } while (time_after(time, jiffies));
2013
2014 return -ETIMEDOUT;
2015}
2016
2017static int enic_dev_open(struct enic *enic)
2018{
2019 int err;
2020
2021 err = enic_dev_wait(enic->vdev, vnic_dev_open,
2022 vnic_dev_open_done, 0);
2023 if (err)
a7a79deb
VK
2024 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
2025 err);
01f2e4ea
SF
2026
2027 return err;
2028}
2029
99ef5639 2030static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF
2031{
2032 int err;
2033
99ef5639
VK
2034 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
2035 vnic_dev_hang_reset_done, 0);
01f2e4ea 2036 if (err)
a7a79deb
VK
2037 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
2038 err);
01f2e4ea
SF
2039
2040 return err;
2041}
2042
717258ba
VK
2043static int enic_set_rsskey(struct enic *enic)
2044{
1f4f067f 2045 dma_addr_t rss_key_buf_pa;
717258ba
VK
2046 union vnic_rss_key *rss_key_buf_va = NULL;
2047 union vnic_rss_key rss_key = {
2048 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
2049 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
2050 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
2051 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
2052 };
2053 int err;
2054
2055 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
2056 sizeof(union vnic_rss_key), &rss_key_buf_pa);
2057 if (!rss_key_buf_va)
2058 return -ENOMEM;
2059
2060 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
2061
2062 spin_lock(&enic->devcmd_lock);
2063 err = enic_set_rss_key(enic,
2064 rss_key_buf_pa,
2065 sizeof(union vnic_rss_key));
2066 spin_unlock(&enic->devcmd_lock);
2067
2068 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
2069 rss_key_buf_va, rss_key_buf_pa);
2070
2071 return err;
2072}
2073
2074static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
2075{
1f4f067f 2076 dma_addr_t rss_cpu_buf_pa;
717258ba
VK
2077 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
2078 unsigned int i;
2079 int err;
2080
2081 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
2082 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
2083 if (!rss_cpu_buf_va)
2084 return -ENOMEM;
2085
2086 for (i = 0; i < (1 << rss_hash_bits); i++)
2087 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
2088
2089 spin_lock(&enic->devcmd_lock);
2090 err = enic_set_rss_cpu(enic,
2091 rss_cpu_buf_pa,
2092 sizeof(union vnic_rss_cpu));
2093 spin_unlock(&enic->devcmd_lock);
2094
2095 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
2096 rss_cpu_buf_va, rss_cpu_buf_pa);
2097
2098 return err;
2099}
2100
2101static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2102 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 2103{
68f71708
SF
2104 const u8 tso_ipid_split_en = 0;
2105 const u8 ig_vlan_strip_en = 1;
383ab92f 2106 int err;
68f71708 2107
717258ba
VK
2108 /* Enable VLAN tag stripping.
2109 */
68f71708 2110
383ab92f
VK
2111 spin_lock(&enic->devcmd_lock);
2112 err = enic_set_nic_cfg(enic,
68f71708
SF
2113 rss_default_cpu, rss_hash_type,
2114 rss_hash_bits, rss_base_cpu,
2115 rss_enable, tso_ipid_split_en,
2116 ig_vlan_strip_en);
383ab92f
VK
2117 spin_unlock(&enic->devcmd_lock);
2118
2119 return err;
2120}
2121
717258ba
VK
2122static int enic_set_rss_nic_cfg(struct enic *enic)
2123{
2124 struct device *dev = enic_get_dev(enic);
2125 const u8 rss_default_cpu = 0;
2126 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
2127 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
2128 NIC_CFG_RSS_HASH_TYPE_IPV6 |
2129 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2130 const u8 rss_hash_bits = 7;
2131 const u8 rss_base_cpu = 0;
2132 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2133
2134 if (rss_enable) {
2135 if (!enic_set_rsskey(enic)) {
2136 if (enic_set_rsscpu(enic, rss_hash_bits)) {
2137 rss_enable = 0;
2138 dev_warn(dev, "RSS disabled, "
2139 "Failed to set RSS cpu indirection table.");
2140 }
2141 } else {
2142 rss_enable = 0;
2143 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2144 }
2145 }
2146
2147 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2148 rss_hash_bits, rss_base_cpu, rss_enable);
2149}
2150
383ab92f
VK
2151static int enic_dev_hang_notify(struct enic *enic)
2152{
2153 int err;
2154
2155 spin_lock(&enic->devcmd_lock);
2156 err = vnic_dev_hang_notify(enic->vdev);
2157 spin_unlock(&enic->devcmd_lock);
2158
2159 return err;
68f71708
SF
2160}
2161
2fdba388 2162static int enic_dev_set_ig_vlan_rewrite_mode(struct enic *enic)
f8cac14a
VK
2163{
2164 int err;
2165
2166 spin_lock(&enic->devcmd_lock);
2167 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
2168 IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);
2169 spin_unlock(&enic->devcmd_lock);
2170
2171 return err;
2172}
2173
01f2e4ea
SF
2174static void enic_reset(struct work_struct *work)
2175{
2176 struct enic *enic = container_of(work, struct enic, reset);
2177
2178 if (!netif_running(enic->netdev))
2179 return;
2180
2181 rtnl_lock();
2182
383ab92f 2183 enic_dev_hang_notify(enic);
01f2e4ea 2184 enic_stop(enic->netdev);
99ef5639
VK
2185 enic_dev_hang_reset(enic);
2186 enic_reset_multicast_list(enic);
01f2e4ea 2187 enic_init_vnic_resources(enic);
717258ba 2188 enic_set_rss_nic_cfg(enic);
f8cac14a 2189 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF
2190 enic_open(enic->netdev);
2191
2192 rtnl_unlock();
2193}
2194
2195static int enic_set_intr_mode(struct enic *enic)
2196{
717258ba 2197 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
6ba9cdc0 2198 unsigned int m = 1;
01f2e4ea
SF
2199 unsigned int i;
2200
2201 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2202 * on system capabilities.
01f2e4ea
SF
2203 *
2204 * Try MSI-X first
2205 *
2206 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2207 * (the second to last INTR is used for WQ/RQ errors)
2208 * (the last INTR is used for notifications)
2209 */
2210
2211 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2212 for (i = 0; i < n + m + 2; i++)
2213 enic->msix_entry[i].entry = i;
2214
717258ba
VK
2215 /* Use multiple RQs if RSS is enabled
2216 */
2217
2218 if (ENIC_SETTING(enic, RSS) &&
2219 enic->config.intr_mode < 1 &&
01f2e4ea
SF
2220 enic->rq_count >= n &&
2221 enic->wq_count >= m &&
2222 enic->cq_count >= n + m &&
717258ba 2223 enic->intr_count >= n + m + 2) {
01f2e4ea 2224
717258ba 2225 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2226
717258ba
VK
2227 enic->rq_count = n;
2228 enic->wq_count = m;
2229 enic->cq_count = n + m;
2230 enic->intr_count = n + m + 2;
01f2e4ea 2231
717258ba
VK
2232 vnic_dev_set_intr_mode(enic->vdev,
2233 VNIC_DEV_INTR_MODE_MSIX);
2234
2235 return 0;
2236 }
2237 }
2238
2239 if (enic->config.intr_mode < 1 &&
2240 enic->rq_count >= 1 &&
2241 enic->wq_count >= m &&
2242 enic->cq_count >= 1 + m &&
2243 enic->intr_count >= 1 + m + 2) {
2244 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2245
2246 enic->rq_count = 1;
2247 enic->wq_count = m;
2248 enic->cq_count = 1 + m;
2249 enic->intr_count = 1 + m + 2;
2250
2251 vnic_dev_set_intr_mode(enic->vdev,
2252 VNIC_DEV_INTR_MODE_MSIX);
2253
2254 return 0;
2255 }
01f2e4ea
SF
2256 }
2257
2258 /* Next try MSI
2259 *
2260 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2261 */
2262
2263 if (enic->config.intr_mode < 2 &&
2264 enic->rq_count >= 1 &&
2265 enic->wq_count >= 1 &&
2266 enic->cq_count >= 2 &&
2267 enic->intr_count >= 1 &&
2268 !pci_enable_msi(enic->pdev)) {
2269
2270 enic->rq_count = 1;
2271 enic->wq_count = 1;
2272 enic->cq_count = 2;
2273 enic->intr_count = 1;
2274
2275 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2276
2277 return 0;
2278 }
2279
2280 /* Next try INTx
2281 *
2282 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2283 * (the first INTR is used for WQ/RQ)
2284 * (the second INTR is used for WQ/RQ errors)
2285 * (the last INTR is used for notifications)
2286 */
2287
2288 if (enic->config.intr_mode < 3 &&
2289 enic->rq_count >= 1 &&
2290 enic->wq_count >= 1 &&
2291 enic->cq_count >= 2 &&
2292 enic->intr_count >= 3) {
2293
2294 enic->rq_count = 1;
2295 enic->wq_count = 1;
2296 enic->cq_count = 2;
2297 enic->intr_count = 3;
2298
2299 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2300
2301 return 0;
2302 }
2303
2304 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2305
2306 return -EINVAL;
2307}
2308
2309static void enic_clear_intr_mode(struct enic *enic)
2310{
2311 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2312 case VNIC_DEV_INTR_MODE_MSIX:
2313 pci_disable_msix(enic->pdev);
2314 break;
2315 case VNIC_DEV_INTR_MODE_MSI:
2316 pci_disable_msi(enic->pdev);
2317 break;
2318 default:
2319 break;
2320 }
2321
2322 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2323}
2324
f8bd9091
SF
2325static const struct net_device_ops enic_netdev_dynamic_ops = {
2326 .ndo_open = enic_open,
2327 .ndo_stop = enic_stop,
2328 .ndo_start_xmit = enic_hard_start_xmit,
2329 .ndo_get_stats = enic_get_stats,
2330 .ndo_validate_addr = eth_validate_addr,
2331 .ndo_set_multicast_list = enic_set_multicast_list,
2332 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2333 .ndo_change_mtu = enic_change_mtu,
2334 .ndo_vlan_rx_register = enic_vlan_rx_register,
2335 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2336 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2337 .ndo_tx_timeout = enic_tx_timeout,
2338 .ndo_set_vf_port = enic_set_vf_port,
2339 .ndo_get_vf_port = enic_get_vf_port,
2340#ifdef CONFIG_NET_POLL_CONTROLLER
2341 .ndo_poll_controller = enic_poll_controller,
2342#endif
2343};
2344
afe29f7a
SH
2345static const struct net_device_ops enic_netdev_ops = {
2346 .ndo_open = enic_open,
2347 .ndo_stop = enic_stop,
00829823 2348 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH
2349 .ndo_get_stats = enic_get_stats,
2350 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2351 .ndo_set_mac_address = enic_set_mac_address,
383ab92f 2352 .ndo_set_multicast_list = enic_set_multicast_list,
afe29f7a
SH
2353 .ndo_change_mtu = enic_change_mtu,
2354 .ndo_vlan_rx_register = enic_vlan_rx_register,
2355 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2356 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2357 .ndo_tx_timeout = enic_tx_timeout,
2358#ifdef CONFIG_NET_POLL_CONTROLLER
2359 .ndo_poll_controller = enic_poll_controller,
2360#endif
2361};
2362
2fdba388 2363static void enic_dev_deinit(struct enic *enic)
6fdfa970 2364{
717258ba
VK
2365 unsigned int i;
2366
2367 for (i = 0; i < enic->rq_count; i++)
2368 netif_napi_del(&enic->napi[i]);
2369
6fdfa970
SF
2370 enic_free_vnic_resources(enic);
2371 enic_clear_intr_mode(enic);
2372}
2373
2fdba388 2374static int enic_dev_init(struct enic *enic)
6fdfa970 2375{
a7a79deb 2376 struct device *dev = enic_get_dev(enic);
6fdfa970 2377 struct net_device *netdev = enic->netdev;
717258ba 2378 unsigned int i;
6fdfa970
SF
2379 int err;
2380
2381 /* Get vNIC configuration
2382 */
2383
2384 err = enic_get_vnic_config(enic);
2385 if (err) {
a7a79deb 2386 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF
2387 return err;
2388 }
2389
2390 /* Get available resource counts
2391 */
2392
2393 enic_get_res_counts(enic);
2394
2395 /* Set interrupt mode based on resource counts and system
2396 * capabilities
2397 */
2398
2399 err = enic_set_intr_mode(enic);
2400 if (err) {
a7a79deb
VK
2401 dev_err(dev, "Failed to set intr mode based on resource "
2402 "counts and system capabilities, aborting\n");
6fdfa970
SF
2403 return err;
2404 }
2405
2406 /* Allocate and configure vNIC resources
2407 */
2408
2409 err = enic_alloc_vnic_resources(enic);
2410 if (err) {
a7a79deb 2411 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF
2412 goto err_out_free_vnic_resources;
2413 }
2414
2415 enic_init_vnic_resources(enic);
2416
2417 err = enic_set_rq_alloc_buf(enic);
2418 if (err) {
a7a79deb 2419 dev_err(dev, "Failed to set RQ buffer allocator, aborting\n");
6fdfa970
SF
2420 goto err_out_free_vnic_resources;
2421 }
2422
717258ba 2423 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2424 if (err) {
a7a79deb 2425 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF
2426 goto err_out_free_vnic_resources;
2427 }
2428
f8cac14a
VK
2429 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2430 if (err) {
53c90536 2431 dev_err(dev,
f8cac14a
VK
2432 "Failed to set ingress vlan rewrite mode, aborting.\n");
2433 goto err_out_free_vnic_resources;
2434 }
2435
6fdfa970
SF
2436 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2437 default:
717258ba 2438 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF
2439 break;
2440 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK
2441 for (i = 0; i < enic->rq_count; i++)
2442 netif_napi_add(netdev, &enic->napi[i],
2443 enic_poll_msix, 64);
6fdfa970
SF
2444 break;
2445 }
2446
2447 return 0;
2448
2449err_out_free_vnic_resources:
2450 enic_clear_intr_mode(enic);
2451 enic_free_vnic_resources(enic);
2452
2453 return err;
2454}
2455
27e6c7d3
SF
2456static void enic_iounmap(struct enic *enic)
2457{
2458 unsigned int i;
2459
2460 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2461 if (enic->bar[i].vaddr)
2462 iounmap(enic->bar[i].vaddr);
2463}
2464
01f2e4ea
SF
2465static int __devinit enic_probe(struct pci_dev *pdev,
2466 const struct pci_device_id *ent)
2467{
a7a79deb 2468 struct device *dev = &pdev->dev;
01f2e4ea
SF
2469 struct net_device *netdev;
2470 struct enic *enic;
2471 int using_dac = 0;
2472 unsigned int i;
2473 int err;
2474
01f2e4ea
SF
2475 /* Allocate net device structure and initialize. Private
2476 * instance data is initialized to zero.
2477 */
2478
2479 netdev = alloc_etherdev(sizeof(struct enic));
2480 if (!netdev) {
a7a79deb 2481 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF
2482 return -ENOMEM;
2483 }
2484
01f2e4ea
SF
2485 pci_set_drvdata(pdev, netdev);
2486
2487 SET_NETDEV_DEV(netdev, &pdev->dev);
2488
2489 enic = netdev_priv(netdev);
2490 enic->netdev = netdev;
2491 enic->pdev = pdev;
2492
2493 /* Setup PCI resources
2494 */
2495
29046f9b 2496 err = pci_enable_device_mem(pdev);
01f2e4ea 2497 if (err) {
a7a79deb 2498 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF
2499 goto err_out_free_netdev;
2500 }
2501
2502 err = pci_request_regions(pdev, DRV_NAME);
2503 if (err) {
a7a79deb 2504 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF
2505 goto err_out_disable_device;
2506 }
2507
2508 pci_set_master(pdev);
2509
2510 /* Query PCI controller on system for DMA addressing
2511 * limitation for the device. Try 40-bit first, and
2512 * fail to 32-bit.
2513 */
2514
50cf156a 2515 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2516 if (err) {
284901a9 2517 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2518 if (err) {
a7a79deb 2519 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF
2520 goto err_out_release_regions;
2521 }
284901a9 2522 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2523 if (err) {
a7a79deb
VK
2524 dev_err(dev, "Unable to obtain %u-bit DMA "
2525 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF
2526 goto err_out_release_regions;
2527 }
2528 } else {
50cf156a 2529 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2530 if (err) {
a7a79deb
VK
2531 dev_err(dev, "Unable to obtain %u-bit DMA "
2532 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF
2533 goto err_out_release_regions;
2534 }
2535 using_dac = 1;
2536 }
2537
27e6c7d3 2538 /* Map vNIC resources from BAR0-5
01f2e4ea
SF
2539 */
2540
27e6c7d3
SF
2541 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2542 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2543 continue;
2544 enic->bar[i].len = pci_resource_len(pdev, i);
2545 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2546 if (!enic->bar[i].vaddr) {
a7a79deb 2547 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF
2548 err = -ENODEV;
2549 goto err_out_iounmap;
2550 }
2551 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF
2552 }
2553
2554 /* Register vNIC device
2555 */
2556
27e6c7d3
SF
2557 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2558 ARRAY_SIZE(enic->bar));
01f2e4ea 2559 if (!enic->vdev) {
a7a79deb 2560 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF
2561 err = -ENODEV;
2562 goto err_out_iounmap;
2563 }
2564
2565 /* Issue device open to get device in known state
2566 */
2567
2568 err = enic_dev_open(enic);
2569 if (err) {
a7a79deb 2570 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF
2571 goto err_out_vnic_unregister;
2572 }
2573
2574 /* Issue device init to initialize the vnic-to-switch link.
2575 * We'll start with carrier off and wait for link UP
2576 * notification later to turn on carrier. We don't need
2577 * to wait here for the vnic-to-switch link initialization
2578 * to complete; link UP notification is the indication that
2579 * the process is complete.
2580 */
2581
2582 netif_carrier_off(netdev);
2583
a7a79deb
VK
2584 /* Do not call dev_init for a dynamic vnic.
2585 * For a dynamic vnic, init_prov_info will be
2586 * called later by an upper layer.
2587 */
2588
f8bd9091
SF
2589 if (!enic_is_dynamic(enic)) {
2590 err = vnic_dev_init(enic->vdev, 0);
2591 if (err) {
a7a79deb 2592 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF
2593 goto err_out_dev_close;
2594 }
01f2e4ea
SF
2595 }
2596
383ab92f
VK
2597 /* Setup devcmd lock
2598 */
2599
2600 spin_lock_init(&enic->devcmd_lock);
2601
6fdfa970 2602 err = enic_dev_init(enic);
01f2e4ea 2603 if (err) {
a7a79deb 2604 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF
2605 goto err_out_dev_close;
2606 }
2607
383ab92f 2608 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF
2609 */
2610
2611 init_timer(&enic->notify_timer);
2612 enic->notify_timer.function = enic_notify_timer;
2613 enic->notify_timer.data = (unsigned long)enic;
2614
2615 INIT_WORK(&enic->reset, enic_reset);
2616
2617 for (i = 0; i < enic->wq_count; i++)
2618 spin_lock_init(&enic->wq_lock[i]);
2619
01f2e4ea
SF
2620 /* Register net device
2621 */
2622
2623 enic->port_mtu = enic->config.mtu;
2624 (void)enic_change_mtu(netdev, enic->port_mtu);
2625
2626 err = enic_set_mac_addr(netdev, enic->mac_addr);
2627 if (err) {
a7a79deb 2628 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2629 goto err_out_dev_deinit;
01f2e4ea
SF
2630 }
2631
7c844599
SF
2632 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2633 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2634
f8bd9091
SF
2635 if (enic_is_dynamic(enic))
2636 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2637 else
2638 netdev->netdev_ops = &enic_netdev_ops;
2639
01f2e4ea
SF
2640 netdev->watchdog_timeo = 2 * HZ;
2641 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2642
73c1ea9b 2643 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK
2644 if (ENIC_SETTING(enic, LOOP)) {
2645 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2646 enic->loop_enable = 1;
2647 enic->loop_tag = enic->config.loop_tag;
2648 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2649 }
01f2e4ea
SF
2650 if (ENIC_SETTING(enic, TXCSUM))
2651 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2652 if (ENIC_SETTING(enic, TSO))
2653 netdev->features |= NETIF_F_TSO |
2654 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7 2655 if (ENIC_SETTING(enic, LRO))
88132f55 2656 netdev->features |= NETIF_F_GRO;
01f2e4ea
SF
2657 if (using_dac)
2658 netdev->features |= NETIF_F_HIGHDMA;
2659
01f2e4ea
SF
2660 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
2661
01f2e4ea
SF
2662 err = register_netdev(netdev);
2663 if (err) {
a7a79deb 2664 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2665 goto err_out_dev_deinit;
01f2e4ea
SF
2666 }
2667
2668 return 0;
2669
6fdfa970
SF
2670err_out_dev_deinit:
2671 enic_dev_deinit(enic);
01f2e4ea
SF
2672err_out_dev_close:
2673 vnic_dev_close(enic->vdev);
2674err_out_vnic_unregister:
01f2e4ea
SF
2675 vnic_dev_unregister(enic->vdev);
2676err_out_iounmap:
2677 enic_iounmap(enic);
2678err_out_release_regions:
2679 pci_release_regions(pdev);
2680err_out_disable_device:
2681 pci_disable_device(pdev);
2682err_out_free_netdev:
2683 pci_set_drvdata(pdev, NULL);
2684 free_netdev(netdev);
2685
2686 return err;
2687}
2688
2689static void __devexit enic_remove(struct pci_dev *pdev)
2690{
2691 struct net_device *netdev = pci_get_drvdata(pdev);
2692
2693 if (netdev) {
2694 struct enic *enic = netdev_priv(netdev);
2695
2696 flush_scheduled_work();
2697 unregister_netdev(netdev);
6fdfa970 2698 enic_dev_deinit(enic);
01f2e4ea 2699 vnic_dev_close(enic->vdev);
01f2e4ea
SF
2700 vnic_dev_unregister(enic->vdev);
2701 enic_iounmap(enic);
2702 pci_release_regions(pdev);
2703 pci_disable_device(pdev);
2704 pci_set_drvdata(pdev, NULL);
2705 free_netdev(netdev);
2706 }
2707}
2708
2709static struct pci_driver enic_driver = {
2710 .name = DRV_NAME,
2711 .id_table = enic_id_table,
2712 .probe = enic_probe,
2713 .remove = __devexit_p(enic_remove),
2714};
2715
2716static int __init enic_init_module(void)
2717{
a7a79deb 2718 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF
2719
2720 return pci_register_driver(&enic_driver);
2721}
2722
2723static void __exit enic_cleanup_module(void)
2724{
2725 pci_unregister_driver(&enic_driver);
2726}
2727
2728module_init(enic_init_module);
2729module_exit(enic_cleanup_module);