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be2net: Changes to update ethtool get_settings function to return appropriate values.
[net-next-2.6.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94
SP		 1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
29module_param(rx_frag_size, uint, S_IRUGO);
30MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
6b7c5b94 32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374
AK		 33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
34 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
6b7c5b94
SP		 36 { 0 }
37};
38MODULE_DEVICE_TABLE(pci, be_dev_ids);
39
40static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
41{
42 struct be_dma_mem *mem = &q->dma_mem;
43 if (mem->va)
44 pci_free_consistent(adapter->pdev, mem->size,
45 mem->va, mem->dma);
46}
47
48static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
49 u16 len, u16 entry_size)
50{
51 struct be_dma_mem *mem = &q->dma_mem;
52
53 memset(q, 0, sizeof(*q));
54 q->len = len;
55 q->entry_size = entry_size;
56 mem->size = len * entry_size;
57 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
58 if (!mem->va)
59 return -1;
60 memset(mem->va, 0, mem->size);
61 return 0;
62}
63
8788fdc2 64static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 65{
8788fdc2 66 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 67 u32 reg = ioread32(addr);
68 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e
SP		 69
70 if (!enabled && enable)
6b7c5b94 71 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 72 else if (enabled && !enable)
6b7c5b94 73 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 74 else
6b7c5b94 75 return;
5f0b849e 76
6b7c5b94
SP		 77 iowrite32(reg, addr);
78}
79
8788fdc2 80static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 81{
82 u32 val = 0;
83 val |= qid & DB_RQ_RING_ID_MASK;
84 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 85 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 86}
87
8788fdc2 88static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 89{
90 u32 val = 0;
91 val |= qid & DB_TXULP_RING_ID_MASK;
92 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 93 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 94}
95
8788fdc2 96static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 97 bool arm, bool clear_int, u16 num_popped)
98{
99 u32 val = 0;
100 val |= qid & DB_EQ_RING_ID_MASK;
101 if (arm)
102 val |= 1 << DB_EQ_REARM_SHIFT;
103 if (clear_int)
104 val |= 1 << DB_EQ_CLR_SHIFT;
105 val |= 1 << DB_EQ_EVNT_SHIFT;
106 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 107 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 108}
109
8788fdc2 110void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 111{
112 u32 val = 0;
113 val |= qid & DB_CQ_RING_ID_MASK;
114 if (arm)
115 val |= 1 << DB_CQ_REARM_SHIFT;
116 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 117 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 118}
119
6b7c5b94
SP		 120static int be_mac_addr_set(struct net_device *netdev, void *p)
121{
122 struct be_adapter *adapter = netdev_priv(netdev);
123 struct sockaddr *addr = p;
124 int status = 0;
125
a65027e4
SP		 126 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
127 if (status)
128 return status;
6b7c5b94 129
a65027e4
SP		 130 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
131 adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 132 if (!status)
133 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
134
135 return status;
136}
137
b31c50a7 138void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 139{
140 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
141 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
142 struct be_port_rxf_stats *port_stats =
143 &rxf_stats->port[adapter->port_num];
78122a52 144 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 145 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94
SP		 146
147 dev_stats->rx_packets = port_stats->rx_total_frames;
148 dev_stats->tx_packets = port_stats->tx_unicastframes +
149 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
150 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
151 (u64) port_stats->rx_bytes_lsd;
152 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
153 (u64) port_stats->tx_bytes_lsd;
154
155 /* bad pkts received */
156 dev_stats->rx_errors = port_stats->rx_crc_errors +
157 port_stats->rx_alignment_symbol_errors +
158 port_stats->rx_in_range_errors +
68110868
SP		 159 port_stats->rx_out_range_errors +
160 port_stats->rx_frame_too_long +
161 port_stats->rx_dropped_too_small +
162 port_stats->rx_dropped_too_short +
163 port_stats->rx_dropped_header_too_small +
164 port_stats->rx_dropped_tcp_length +
165 port_stats->rx_dropped_runt +
166 port_stats->rx_tcp_checksum_errs +
167 port_stats->rx_ip_checksum_errs +
168 port_stats->rx_udp_checksum_errs;
169
170 /* no space in linux buffers: best possible approximation */
171 dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
6b7c5b94
SP		 172
173 /* detailed rx errors */
174 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 175 port_stats->rx_out_range_errors +
176 port_stats->rx_frame_too_long;
177
6b7c5b94
SP		 178 /* receive ring buffer overflow */
179 dev_stats->rx_over_errors = 0;
68110868 180
6b7c5b94
SP		 181 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
182
183 /* frame alignment errors */
184 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 185
6b7c5b94
SP		 186 /* receiver fifo overrun */
187 /* drops_no_pbuf is no per i/f, it's per BE card */
188 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
189 port_stats->rx_input_fifo_overflow +
190 rxf_stats->rx_drops_no_pbuf;
191 /* receiver missed packetd */
192 dev_stats->rx_missed_errors = 0;
68110868
SP		 193
194 /* packet transmit problems */
195 dev_stats->tx_errors = 0;
196
197 /* no space available in linux */
198 dev_stats->tx_dropped = 0;
199
c5b9b92e 200 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 201 dev_stats->collisions = 0;
202
6b7c5b94
SP		 203 /* detailed tx_errors */
204 dev_stats->tx_aborted_errors = 0;
205 dev_stats->tx_carrier_errors = 0;
206 dev_stats->tx_fifo_errors = 0;
207 dev_stats->tx_heartbeat_errors = 0;
208 dev_stats->tx_window_errors = 0;
209}
210
8788fdc2 211void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 212{
6b7c5b94
SP		 213 struct net_device *netdev = adapter->netdev;
214
6b7c5b94 215 /* If link came up or went down */
a8f447bd
SP		 216 if (adapter->link_up != link_up) {
217 if (link_up) {
6b7c5b94
SP		 218 netif_start_queue(netdev);
219 netif_carrier_on(netdev);
220 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 221 } else {
222 netif_stop_queue(netdev);
223 netif_carrier_off(netdev);
224 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 225 }
a8f447bd 226 adapter->link_up = link_up;
6b7c5b94 227 }
6b7c5b94
SP		 228}
229
230/* Update the EQ delay n BE based on the RX frags consumed / sec */
231static void be_rx_eqd_update(struct be_adapter *adapter)
232{
6b7c5b94
SP		 233 struct be_eq_obj *rx_eq = &adapter->rx_eq;
234 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 235 ulong now = jiffies;
236 u32 eqd;
237
238 if (!rx_eq->enable_aic)
239 return;
240
241 /* Wrapped around */
242 if (time_before(now, stats->rx_fps_jiffies)) {
243 stats->rx_fps_jiffies = now;
244 return;
245 }
6b7c5b94
SP		 246
247 /* Update once a second */
4097f663 248 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 249 return;
250
251 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 252 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 253
4097f663 254 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 255 stats->be_prev_rx_frags = stats->be_rx_frags;
256 eqd = stats->be_rx_fps / 110000;
257 eqd = eqd << 3;
258 if (eqd > rx_eq->max_eqd)
259 eqd = rx_eq->max_eqd;
260 if (eqd < rx_eq->min_eqd)
261 eqd = rx_eq->min_eqd;
262 if (eqd < 10)
263 eqd = 0;
264 if (eqd != rx_eq->cur_eqd)
8788fdc2 265 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 266
267 rx_eq->cur_eqd = eqd;
268}
269
6b7c5b94
SP		 270static struct net_device_stats *be_get_stats(struct net_device *dev)
271{
78122a52 272 return &dev->stats;
6b7c5b94
SP		 273}
274
65f71b8b
SH		 275static u32 be_calc_rate(u64 bytes, unsigned long ticks)
276{
277 u64 rate = bytes;
278
279 do_div(rate, ticks / HZ);
280 rate <<= 3; /* bytes/sec -> bits/sec */
281 do_div(rate, 1000000ul); /* MB/Sec */
282
283 return rate;
284}
285
4097f663
SP		 286static void be_tx_rate_update(struct be_adapter *adapter)
287{
288 struct be_drvr_stats *stats = drvr_stats(adapter);
289 ulong now = jiffies;
290
291 /* Wrapped around? */
292 if (time_before(now, stats->be_tx_jiffies)) {
293 stats->be_tx_jiffies = now;
294 return;
295 }
296
297 /* Update tx rate once in two seconds */
298 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 299 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
300 - stats->be_tx_bytes_prev,
301 now - stats->be_tx_jiffies);
4097f663
SP		 302 stats->be_tx_jiffies = now;
303 stats->be_tx_bytes_prev = stats->be_tx_bytes;
304 }
305}
306
6b7c5b94
SP		 307static void be_tx_stats_update(struct be_adapter *adapter,
308 u32 wrb_cnt, u32 copied, bool stopped)
309{
4097f663 310 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 311 stats->be_tx_reqs++;
312 stats->be_tx_wrbs += wrb_cnt;
313 stats->be_tx_bytes += copied;
314 if (stopped)
315 stats->be_tx_stops++;
6b7c5b94
SP		 316}
317
318/* Determine number of WRB entries needed to xmit data in an skb */
319static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
320{
ebc8d2ab
DM		 321 int cnt = (skb->len > skb->data_len);
322
323 cnt += skb_shinfo(skb)->nr_frags;
324
6b7c5b94
SP		 325 /* to account for hdr wrb */
326 cnt++;
327 if (cnt & 1) {
328 /* add a dummy to make it an even num */
329 cnt++;
330 *dummy = true;
331 } else
332 *dummy = false;
333 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
334 return cnt;
335}
336
337static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
338{
339 wrb->frag_pa_hi = upper_32_bits(addr);
340 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
341 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
342}
343
344static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
345 bool vlan, u32 wrb_cnt, u32 len)
346{
347 memset(hdr, 0, sizeof(*hdr));
348
349 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
350
351 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
352 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
353 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
354 hdr, skb_shinfo(skb)->gso_size);
355 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
356 if (is_tcp_pkt(skb))
357 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
358 else if (is_udp_pkt(skb))
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
360 }
361
362 if (vlan && vlan_tx_tag_present(skb)) {
363 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
364 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
365 hdr, vlan_tx_tag_get(skb));
366 }
367
368 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
369 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
372}
373
374
375static int make_tx_wrbs(struct be_adapter *adapter,
376 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
377{
378 u64 busaddr;
379 u32 i, copied = 0;
380 struct pci_dev *pdev = adapter->pdev;
381 struct sk_buff *first_skb = skb;
382 struct be_queue_info *txq = &adapter->tx_obj.q;
383 struct be_eth_wrb *wrb;
384 struct be_eth_hdr_wrb *hdr;
385
6b7c5b94 386 hdr = queue_head_node(txq);
c190e3c8 387 atomic_add(wrb_cnt, &txq->used);
6b7c5b94
SP		 388 queue_head_inc(txq);
389
c190e3c8
AK		 390 if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
391 dev_err(&pdev->dev, "TX DMA mapping failed\n");
392 return 0;
393 }
394
ebc8d2ab
DM		 395 if (skb->len > skb->data_len) {
396 int len = skb->len - skb->data_len;
ebc8d2ab 397 wrb = queue_head_node(txq);
c190e3c8 398 busaddr = skb_shinfo(skb)->dma_head;
ebc8d2ab
DM		 399 wrb_fill(wrb, busaddr, len);
400 be_dws_cpu_to_le(wrb, sizeof(*wrb));
401 queue_head_inc(txq);
402 copied += len;
403 }
6b7c5b94 404
ebc8d2ab
DM		 405 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
406 struct skb_frag_struct *frag =
407 &skb_shinfo(skb)->frags[i];
c190e3c8
AK		 408
409 busaddr = skb_shinfo(skb)->dma_maps[i];
ebc8d2ab
DM		 410 wrb = queue_head_node(txq);
411 wrb_fill(wrb, busaddr, frag->size);
412 be_dws_cpu_to_le(wrb, sizeof(*wrb));
413 queue_head_inc(txq);
414 copied += frag->size;
6b7c5b94
SP		 415 }
416
417 if (dummy_wrb) {
418 wrb = queue_head_node(txq);
419 wrb_fill(wrb, 0, 0);
420 be_dws_cpu_to_le(wrb, sizeof(*wrb));
421 queue_head_inc(txq);
422 }
423
424 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
425 wrb_cnt, copied);
426 be_dws_cpu_to_le(hdr, sizeof(*hdr));
427
428 return copied;
429}
430
61357325 431static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 432 struct net_device *netdev)
6b7c5b94
SP		 433{
434 struct be_adapter *adapter = netdev_priv(netdev);
435 struct be_tx_obj *tx_obj = &adapter->tx_obj;
436 struct be_queue_info *txq = &tx_obj->q;
437 u32 wrb_cnt = 0, copied = 0;
438 u32 start = txq->head;
439 bool dummy_wrb, stopped = false;
440
441 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
442
443 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 444 if (copied) {
445 /* record the sent skb in the sent_skb table */
446 BUG_ON(tx_obj->sent_skb_list[start]);
447 tx_obj->sent_skb_list[start] = skb;
448
449 /* Ensure txq has space for the next skb; Else stop the queue
450 * *BEFORE* ringing the tx doorbell, so that we serialze the
451 * tx compls of the current transmit which'll wake up the queue
452 */
453 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
454 txq->len) {
455 netif_stop_queue(netdev);
456 stopped = true;
457 }
6b7c5b94 458
c190e3c8 459 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 460
c190e3c8
AK		 461 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
462 } else {
463 txq->head = start;
464 dev_kfree_skb_any(skb);
6b7c5b94 465 }
6b7c5b94
SP		 466 return NETDEV_TX_OK;
467}
468
469static int be_change_mtu(struct net_device *netdev, int new_mtu)
470{
471 struct be_adapter *adapter = netdev_priv(netdev);
472 if (new_mtu < BE_MIN_MTU ||
473 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
474 dev_info(&adapter->pdev->dev,
475 "MTU must be between %d and %d bytes\n",
476 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
477 return -EINVAL;
478 }
479 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
480 netdev->mtu, new_mtu);
481 netdev->mtu = new_mtu;
482 return 0;
483}
484
485/*
486 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
487 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
488 * set the BE in promiscuous VLAN mode.
489 */
b31c50a7 490static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 491{
6b7c5b94
SP		 492 u16 vtag[BE_NUM_VLANS_SUPPORTED];
493 u16 ntags = 0, i;
b31c50a7 494 int status;
6b7c5b94
SP		 495
496 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
497 /* Construct VLAN Table to give to HW */
498 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
499 if (adapter->vlan_tag[i]) {
500 vtag[ntags] = cpu_to_le16(i);
501 ntags++;
502 }
503 }
b31c50a7
SP		 504 status = be_cmd_vlan_config(adapter, adapter->if_handle,
505 vtag, ntags, 1, 0);
6b7c5b94 506 } else {
b31c50a7
SP		 507 status = be_cmd_vlan_config(adapter, adapter->if_handle,
508 NULL, 0, 1, 1);
6b7c5b94 509 }
b31c50a7 510 return status;
6b7c5b94
SP		 511}
512
513static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
514{
515 struct be_adapter *adapter = netdev_priv(netdev);
516 struct be_eq_obj *rx_eq = &adapter->rx_eq;
517 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 518
8788fdc2
SP		 519 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
520 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 521 adapter->vlan_grp = grp;
8788fdc2
SP		 522 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
523 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 524}
525
526static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
527{
528 struct be_adapter *adapter = netdev_priv(netdev);
529
530 adapter->num_vlans++;
531 adapter->vlan_tag[vid] = 1;
532
b31c50a7 533 be_vid_config(adapter);
6b7c5b94
SP		 534}
535
536static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
537{
538 struct be_adapter *adapter = netdev_priv(netdev);
539
540 adapter->num_vlans--;
541 adapter->vlan_tag[vid] = 0;
542
543 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
b31c50a7 544 be_vid_config(adapter);
6b7c5b94
SP		 545}
546
24307eef 547static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 548{
549 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 550
24307eef 551 if (netdev->flags & IFF_PROMISC) {
8788fdc2 552 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 553 adapter->promiscuous = true;
554 goto done;
6b7c5b94
SP		 555 }
556
24307eef
SP		 557 /* BE was previously in promiscous mode; disable it */
558 if (adapter->promiscuous) {
559 adapter->promiscuous = false;
8788fdc2 560 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 561 }
562
24307eef 563 if (netdev->flags & IFF_ALLMULTI) {
8788fdc2 564 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
24307eef 565 goto done;
6b7c5b94 566 }
6b7c5b94 567
8788fdc2 568 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
24307eef
SP		 569 netdev->mc_count);
570done:
571 return;
6b7c5b94
SP		 572}
573
4097f663 574static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 575{
4097f663
SP		 576 struct be_drvr_stats *stats = drvr_stats(adapter);
577 ulong now = jiffies;
6b7c5b94 578
4097f663
SP		 579 /* Wrapped around */
580 if (time_before(now, stats->be_rx_jiffies)) {
581 stats->be_rx_jiffies = now;
582 return;
583 }
6b7c5b94
SP		 584
585 /* Update the rate once in two seconds */
4097f663 586 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 587 return;
588
65f71b8b
SH		 589 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
590 - stats->be_rx_bytes_prev,
591 now - stats->be_rx_jiffies);
4097f663 592 stats->be_rx_jiffies = now;
6b7c5b94
SP		 593 stats->be_rx_bytes_prev = stats->be_rx_bytes;
594}
595
4097f663
SP		 596static void be_rx_stats_update(struct be_adapter *adapter,
597 u32 pktsize, u16 numfrags)
598{
599 struct be_drvr_stats *stats = drvr_stats(adapter);
600
601 stats->be_rx_compl++;
602 stats->be_rx_frags += numfrags;
603 stats->be_rx_bytes += pktsize;
604}
605
728a9972
AK		 606static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
607{
608 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
609
610 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
611 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
612 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
613 if (ip_version) {
614 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
615 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
616 }
617 ipv6_chk = (ip_version && (tcpf || udpf));
618
619 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
620}
621
6b7c5b94
SP		 622static struct be_rx_page_info *
623get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
624{
625 struct be_rx_page_info *rx_page_info;
626 struct be_queue_info *rxq = &adapter->rx_obj.q;
627
628 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
629 BUG_ON(!rx_page_info->page);
630
631 if (rx_page_info->last_page_user)
632 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
633 adapter->big_page_size, PCI_DMA_FROMDEVICE);
634
635 atomic_dec(&rxq->used);
636 return rx_page_info;
637}
638
639/* Throwaway the data in the Rx completion */
640static void be_rx_compl_discard(struct be_adapter *adapter,
641 struct be_eth_rx_compl *rxcp)
642{
643 struct be_queue_info *rxq = &adapter->rx_obj.q;
644 struct be_rx_page_info *page_info;
645 u16 rxq_idx, i, num_rcvd;
646
647 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
648 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
649
650 for (i = 0; i < num_rcvd; i++) {
651 page_info = get_rx_page_info(adapter, rxq_idx);
652 put_page(page_info->page);
653 memset(page_info, 0, sizeof(*page_info));
654 index_inc(&rxq_idx, rxq->len);
655 }
656}
657
658/*
659 * skb_fill_rx_data forms a complete skb for an ether frame
660 * indicated by rxcp.
661 */
662static void skb_fill_rx_data(struct be_adapter *adapter,
663 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
664{
665 struct be_queue_info *rxq = &adapter->rx_obj.q;
666 struct be_rx_page_info *page_info;
bd46cb6c 667 u16 rxq_idx, i, num_rcvd, j;
fa77406a 668 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 669 u8 *start;
670
671 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
672 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
673 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
674
675 page_info = get_rx_page_info(adapter, rxq_idx);
676
677 start = page_address(page_info->page) + page_info->page_offset;
678 prefetch(start);
679
680 /* Copy data in the first descriptor of this completion */
681 curr_frag_len = min(pktsize, rx_frag_size);
682
683 /* Copy the header portion into skb_data */
684 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
685 memcpy(skb->data, start, hdr_len);
686 skb->len = curr_frag_len;
687 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
688 /* Complete packet has now been moved to data */
689 put_page(page_info->page);
690 skb->data_len = 0;
691 skb->tail += curr_frag_len;
692 } else {
693 skb_shinfo(skb)->nr_frags = 1;
694 skb_shinfo(skb)->frags[0].page = page_info->page;
695 skb_shinfo(skb)->frags[0].page_offset =
696 page_info->page_offset + hdr_len;
697 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
698 skb->data_len = curr_frag_len - hdr_len;
699 skb->tail += hdr_len;
700 }
701 memset(page_info, 0, sizeof(*page_info));
702
703 if (pktsize <= rx_frag_size) {
704 BUG_ON(num_rcvd != 1);
76fbb429 705 goto done;
6b7c5b94
SP		 706 }
707
708 /* More frags present for this completion */
fa77406a 709 size = pktsize;
bd46cb6c 710 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 711 size -= curr_frag_len;
6b7c5b94
SP		 712 index_inc(&rxq_idx, rxq->len);
713 page_info = get_rx_page_info(adapter, rxq_idx);
714
fa77406a 715 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 716
bd46cb6c
AK		 717 /* Coalesce all frags from the same physical page in one slot */
718 if (page_info->page_offset == 0) {
719 /* Fresh page */
720 j++;
721 skb_shinfo(skb)->frags[j].page = page_info->page;
722 skb_shinfo(skb)->frags[j].page_offset =
723 page_info->page_offset;
724 skb_shinfo(skb)->frags[j].size = 0;
725 skb_shinfo(skb)->nr_frags++;
726 } else {
727 put_page(page_info->page);
728 }
729
730 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 731 skb->len += curr_frag_len;
732 skb->data_len += curr_frag_len;
6b7c5b94
SP		 733
734 memset(page_info, 0, sizeof(*page_info));
735 }
bd46cb6c 736 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 737
76fbb429 738done:
4097f663 739 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 740 return;
741}
742
5be93b9a 743/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 744static void be_rx_compl_process(struct be_adapter *adapter,
745 struct be_eth_rx_compl *rxcp)
746{
747 struct sk_buff *skb;
dcb9b564
AK		 748 u32 vlanf, vid;
749 u8 vtm;
6b7c5b94 750
dcb9b564
AK		 751 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
752 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
753
754 /* vlanf could be wrongly set in some cards.
755 * ignore if vtm is not set */
756 if ((adapter->cap == 0x400) && !vtm)
757 vlanf = 0;
6b7c5b94 758
89d71a66 759 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
6b7c5b94
SP		 760 if (!skb) {
761 if (net_ratelimit())
762 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
763 be_rx_compl_discard(adapter, rxcp);
764 return;
765 }
766
6b7c5b94
SP		 767 skb_fill_rx_data(adapter, skb, rxcp);
768
728a9972 769 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 770 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 771 else
772 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 773
774 skb->truesize = skb->len + sizeof(struct sk_buff);
775 skb->protocol = eth_type_trans(skb, adapter->netdev);
776 skb->dev = adapter->netdev;
777
dcb9b564 778 if (vlanf) {
6b7c5b94
SP		 779 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
780 kfree_skb(skb);
781 return;
782 }
783 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
784 vid = be16_to_cpu(vid);
785 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
786 } else {
787 netif_receive_skb(skb);
788 }
789
6b7c5b94
SP		 790 return;
791}
792
5be93b9a
AK		 793/* Process the RX completion indicated by rxcp when GRO is enabled */
794static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 795 struct be_eth_rx_compl *rxcp)
796{
797 struct be_rx_page_info *page_info;
5be93b9a 798 struct sk_buff *skb = NULL;
6b7c5b94 799 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 800 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 801 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 802 u16 i, rxq_idx = 0, vid, j;
dcb9b564 803 u8 vtm;
6b7c5b94
SP		 804
805 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
806 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
807 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
808 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 809 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
810
811 /* vlanf could be wrongly set in some cards.
812 * ignore if vtm is not set */
813 if ((adapter->cap == 0x400) && !vtm)
814 vlanf = 0;
6b7c5b94 815
5be93b9a
AK		 816 skb = napi_get_frags(&eq_obj->napi);
817 if (!skb) {
818 be_rx_compl_discard(adapter, rxcp);
819 return;
820 }
821
6b7c5b94 822 remaining = pkt_size;
bd46cb6c 823 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 824 page_info = get_rx_page_info(adapter, rxq_idx);
825
826 curr_frag_len = min(remaining, rx_frag_size);
827
bd46cb6c
AK		 828 /* Coalesce all frags from the same physical page in one slot */
829 if (i == 0 || page_info->page_offset == 0) {
830 /* First frag or Fresh page */
831 j++;
5be93b9a
AK		 832 skb_shinfo(skb)->frags[j].page = page_info->page;
833 skb_shinfo(skb)->frags[j].page_offset =
834 page_info->page_offset;
835 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 836 } else {
837 put_page(page_info->page);
838 }
5be93b9a 839 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 840
bd46cb6c 841 remaining -= curr_frag_len;
6b7c5b94 842 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 843 memset(page_info, 0, sizeof(*page_info));
844 }
bd46cb6c 845 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 846
5be93b9a
AK		 847 skb_shinfo(skb)->nr_frags = j + 1;
848 skb->len = pkt_size;
849 skb->data_len = pkt_size;
850 skb->truesize += pkt_size;
851 skb->ip_summed = CHECKSUM_UNNECESSARY;
852
6b7c5b94 853 if (likely(!vlanf)) {
5be93b9a 854 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 855 } else {
856 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
857 vid = be16_to_cpu(vid);
858
859 if (!adapter->vlan_grp || adapter->num_vlans == 0)
860 return;
861
5be93b9a 862 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 863 }
864
4097f663 865 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 866 return;
867}
868
869static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
870{
871 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
872
873 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
874 return NULL;
875
876 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
877
6b7c5b94
SP		 878 queue_tail_inc(&adapter->rx_obj.cq);
879 return rxcp;
880}
881
a7a0ef31
SP		 882/* To reset the valid bit, we need to reset the whole word as
883 * when walking the queue the valid entries are little-endian
884 * and invalid entries are host endian
885 */
886static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
887{
888 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
889}
890
6b7c5b94
SP		 891static inline struct page *be_alloc_pages(u32 size)
892{
893 gfp_t alloc_flags = GFP_ATOMIC;
894 u32 order = get_order(size);
895 if (order > 0)
896 alloc_flags |= __GFP_COMP;
897 return alloc_pages(alloc_flags, order);
898}
899
900/*
901 * Allocate a page, split it to fragments of size rx_frag_size and post as
902 * receive buffers to BE
903 */
904static void be_post_rx_frags(struct be_adapter *adapter)
905{
906 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
907 struct be_rx_page_info *page_info = NULL;
908 struct be_queue_info *rxq = &adapter->rx_obj.q;
909 struct page *pagep = NULL;
910 struct be_eth_rx_d *rxd;
911 u64 page_dmaaddr = 0, frag_dmaaddr;
912 u32 posted, page_offset = 0;
913
6b7c5b94
SP		 914 page_info = &page_info_tbl[rxq->head];
915 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
916 if (!pagep) {
917 pagep = be_alloc_pages(adapter->big_page_size);
918 if (unlikely(!pagep)) {
919 drvr_stats(adapter)->be_ethrx_post_fail++;
920 break;
921 }
922 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
923 adapter->big_page_size,
924 PCI_DMA_FROMDEVICE);
925 page_info->page_offset = 0;
926 } else {
927 get_page(pagep);
928 page_info->page_offset = page_offset + rx_frag_size;
929 }
930 page_offset = page_info->page_offset;
931 page_info->page = pagep;
932 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
933 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
934
935 rxd = queue_head_node(rxq);
936 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
937 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
938 queue_head_inc(rxq);
939
940 /* Any space left in the current big page for another frag? */
941 if ((page_offset + rx_frag_size + rx_frag_size) >
942 adapter->big_page_size) {
943 pagep = NULL;
944 page_info->last_page_user = true;
945 }
946 page_info = &page_info_tbl[rxq->head];
947 }
948 if (pagep)
949 page_info->last_page_user = true;
950
951 if (posted) {
6b7c5b94 952 atomic_add(posted, &rxq->used);
8788fdc2 953 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 954 } else if (atomic_read(&rxq->used) == 0) {
955 /* Let be_worker replenish when memory is available */
956 adapter->rx_post_starved = true;
6b7c5b94
SP		 957 }
958
959 return;
960}
961
5fb379ee 962static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 963{
6b7c5b94
SP		 964 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
965
966 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
967 return NULL;
968
969 be_dws_le_to_cpu(txcp, sizeof(*txcp));
970
971 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
972
973 queue_tail_inc(tx_cq);
974 return txcp;
975}
976
977static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
978{
979 struct be_queue_info *txq = &adapter->tx_obj.q;
6b7c5b94
SP		 980 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
981 struct sk_buff *sent_skb;
6b7c5b94
SP		 982 u16 cur_index, num_wrbs = 0;
983
984 cur_index = txq->tail;
985 sent_skb = sent_skbs[cur_index];
986 BUG_ON(!sent_skb);
987 sent_skbs[cur_index] = NULL;
988
989 do {
990 cur_index = txq->tail;
6b7c5b94
SP		 991 num_wrbs++;
992 queue_tail_inc(txq);
993 } while (cur_index != last_index);
994
995 atomic_sub(num_wrbs, &txq->used);
c190e3c8 996 skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
6b7c5b94
SP		 997 kfree_skb(sent_skb);
998}
999
859b1e4e
SP		 1000static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1001{
1002 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1003
1004 if (!eqe->evt)
1005 return NULL;
1006
1007 eqe->evt = le32_to_cpu(eqe->evt);
1008 queue_tail_inc(&eq_obj->q);
1009 return eqe;
1010}
1011
1012static int event_handle(struct be_adapter *adapter,
1013 struct be_eq_obj *eq_obj)
1014{
1015 struct be_eq_entry *eqe;
1016 u16 num = 0;
1017
1018 while ((eqe = event_get(eq_obj)) != NULL) {
1019 eqe->evt = 0;
1020 num++;
1021 }
1022
1023 /* Deal with any spurious interrupts that come
1024 * without events
1025 */
1026 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1027 if (num)
1028 napi_schedule(&eq_obj->napi);
1029
1030 return num;
1031}
1032
1033/* Just read and notify events without processing them.
1034 * Used at the time of destroying event queues */
1035static void be_eq_clean(struct be_adapter *adapter,
1036 struct be_eq_obj *eq_obj)
1037{
1038 struct be_eq_entry *eqe;
1039 u16 num = 0;
1040
1041 while ((eqe = event_get(eq_obj)) != NULL) {
1042 eqe->evt = 0;
1043 num++;
1044 }
1045
1046 if (num)
1047 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1048}
1049
6b7c5b94
SP		 1050static void be_rx_q_clean(struct be_adapter *adapter)
1051{
1052 struct be_rx_page_info *page_info;
1053 struct be_queue_info *rxq = &adapter->rx_obj.q;
1054 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1055 struct be_eth_rx_compl *rxcp;
1056 u16 tail;
1057
1058 /* First cleanup pending rx completions */
1059 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1060 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1061 be_rx_compl_reset(rxcp);
8788fdc2 1062 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1063 }
1064
1065 /* Then free posted rx buffer that were not used */
1066 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1067 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1068 page_info = get_rx_page_info(adapter, tail);
1069 put_page(page_info->page);
1070 memset(page_info, 0, sizeof(*page_info));
1071 }
1072 BUG_ON(atomic_read(&rxq->used));
1073}
1074
a8e9179a 1075static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1076{
a8e9179a 1077 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1078 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1079 struct be_eth_tx_compl *txcp;
1080 u16 end_idx, cmpl = 0, timeo = 0;
1081
1082 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1083 do {
1084 while ((txcp = be_tx_compl_get(tx_cq))) {
1085 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1086 wrb_index, txcp);
1087 be_tx_compl_process(adapter, end_idx);
1088 cmpl++;
1089 }
1090 if (cmpl) {
1091 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1092 cmpl = 0;
1093 }
1094
1095 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1096 break;
1097
1098 mdelay(1);
1099 } while (true);
1100
1101 if (atomic_read(&txq->used))
1102 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1103 atomic_read(&txq->used));
6b7c5b94
SP		 1104}
1105
5fb379ee
SP		 1106static void be_mcc_queues_destroy(struct be_adapter *adapter)
1107{
1108 struct be_queue_info *q;
5fb379ee 1109
8788fdc2 1110 q = &adapter->mcc_obj.q;
5fb379ee 1111 if (q->created)
8788fdc2 1112 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1113 be_queue_free(adapter, q);
1114
8788fdc2 1115 q = &adapter->mcc_obj.cq;
5fb379ee 1116 if (q->created)
8788fdc2 1117 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1118 be_queue_free(adapter, q);
1119}
1120
1121/* Must be called only after TX qs are created as MCC shares TX EQ */
1122static int be_mcc_queues_create(struct be_adapter *adapter)
1123{
1124 struct be_queue_info *q, *cq;
5fb379ee
SP		 1125
1126 /* Alloc MCC compl queue */
8788fdc2 1127 cq = &adapter->mcc_obj.cq;
5fb379ee 1128 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1129 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1130 goto err;
1131
1132 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1133 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1134 goto mcc_cq_free;
1135
1136 /* Alloc MCC queue */
8788fdc2 1137 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1138 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1139 goto mcc_cq_destroy;
1140
1141 /* Ask BE to create MCC queue */
8788fdc2 1142 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1143 goto mcc_q_free;
1144
1145 return 0;
1146
1147mcc_q_free:
1148 be_queue_free(adapter, q);
1149mcc_cq_destroy:
8788fdc2 1150 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1151mcc_cq_free:
1152 be_queue_free(adapter, cq);
1153err:
1154 return -1;
1155}
1156
6b7c5b94
SP		 1157static void be_tx_queues_destroy(struct be_adapter *adapter)
1158{
1159 struct be_queue_info *q;
1160
1161 q = &adapter->tx_obj.q;
a8e9179a 1162 if (q->created)
8788fdc2 1163 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1164 be_queue_free(adapter, q);
1165
1166 q = &adapter->tx_obj.cq;
1167 if (q->created)
8788fdc2 1168 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1169 be_queue_free(adapter, q);
1170
859b1e4e
SP		 1171 /* Clear any residual events */
1172 be_eq_clean(adapter, &adapter->tx_eq);
1173
6b7c5b94
SP		 1174 q = &adapter->tx_eq.q;
1175 if (q->created)
8788fdc2 1176 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1177 be_queue_free(adapter, q);
1178}
1179
1180static int be_tx_queues_create(struct be_adapter *adapter)
1181{
1182 struct be_queue_info *eq, *q, *cq;
1183
1184 adapter->tx_eq.max_eqd = 0;
1185 adapter->tx_eq.min_eqd = 0;
1186 adapter->tx_eq.cur_eqd = 96;
1187 adapter->tx_eq.enable_aic = false;
1188 /* Alloc Tx Event queue */
1189 eq = &adapter->tx_eq.q;
1190 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1191 return -1;
1192
1193 /* Ask BE to create Tx Event queue */
8788fdc2 1194 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94
SP		 1195 goto tx_eq_free;
1196 /* Alloc TX eth compl queue */
1197 cq = &adapter->tx_obj.cq;
1198 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1199 sizeof(struct be_eth_tx_compl)))
1200 goto tx_eq_destroy;
1201
1202 /* Ask BE to create Tx eth compl queue */
8788fdc2 1203 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1204 goto tx_cq_free;
1205
1206 /* Alloc TX eth queue */
1207 q = &adapter->tx_obj.q;
1208 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1209 goto tx_cq_destroy;
1210
1211 /* Ask BE to create Tx eth queue */
8788fdc2 1212 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1213 goto tx_q_free;
1214 return 0;
1215
1216tx_q_free:
1217 be_queue_free(adapter, q);
1218tx_cq_destroy:
8788fdc2 1219 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1220tx_cq_free:
1221 be_queue_free(adapter, cq);
1222tx_eq_destroy:
8788fdc2 1223 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1224tx_eq_free:
1225 be_queue_free(adapter, eq);
1226 return -1;
1227}
1228
1229static void be_rx_queues_destroy(struct be_adapter *adapter)
1230{
1231 struct be_queue_info *q;
1232
1233 q = &adapter->rx_obj.q;
1234 if (q->created) {
8788fdc2 1235 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
6b7c5b94
SP		 1236 be_rx_q_clean(adapter);
1237 }
1238 be_queue_free(adapter, q);
1239
1240 q = &adapter->rx_obj.cq;
1241 if (q->created)
8788fdc2 1242 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1243 be_queue_free(adapter, q);
1244
859b1e4e
SP		 1245 /* Clear any residual events */
1246 be_eq_clean(adapter, &adapter->rx_eq);
1247
6b7c5b94
SP		 1248 q = &adapter->rx_eq.q;
1249 if (q->created)
8788fdc2 1250 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1251 be_queue_free(adapter, q);
1252}
1253
1254static int be_rx_queues_create(struct be_adapter *adapter)
1255{
1256 struct be_queue_info *eq, *q, *cq;
1257 int rc;
1258
6b7c5b94
SP		 1259 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1260 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1261 adapter->rx_eq.min_eqd = 0;
1262 adapter->rx_eq.cur_eqd = 0;
1263 adapter->rx_eq.enable_aic = true;
1264
1265 /* Alloc Rx Event queue */
1266 eq = &adapter->rx_eq.q;
1267 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1268 sizeof(struct be_eq_entry));
1269 if (rc)
1270 return rc;
1271
1272 /* Ask BE to create Rx Event queue */
8788fdc2 1273 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1274 if (rc)
1275 goto rx_eq_free;
1276
1277 /* Alloc RX eth compl queue */
1278 cq = &adapter->rx_obj.cq;
1279 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1280 sizeof(struct be_eth_rx_compl));
1281 if (rc)
1282 goto rx_eq_destroy;
1283
1284 /* Ask BE to create Rx eth compl queue */
8788fdc2 1285 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1286 if (rc)
1287 goto rx_cq_free;
1288
1289 /* Alloc RX eth queue */
1290 q = &adapter->rx_obj.q;
1291 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1292 if (rc)
1293 goto rx_cq_destroy;
1294
1295 /* Ask BE to create Rx eth queue */
8788fdc2 1296 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1297 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1298 if (rc)
1299 goto rx_q_free;
1300
1301 return 0;
1302rx_q_free:
1303 be_queue_free(adapter, q);
1304rx_cq_destroy:
8788fdc2 1305 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1306rx_cq_free:
1307 be_queue_free(adapter, cq);
1308rx_eq_destroy:
8788fdc2 1309 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1310rx_eq_free:
1311 be_queue_free(adapter, eq);
1312 return rc;
1313}
6b7c5b94 1314
b628bde2
SP		 1315/* There are 8 evt ids per func. Retruns the evt id's bit number */
1316static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1317{
1318 return eq_id - 8 * be_pci_func(adapter);
1319}
1320
6b7c5b94
SP		 1321static irqreturn_t be_intx(int irq, void *dev)
1322{
1323 struct be_adapter *adapter = dev;
8788fdc2 1324 int isr;
6b7c5b94 1325
8788fdc2 1326 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
eec368fb 1327 be_pci_func(adapter) * CEV_ISR_SIZE);
c001c213 1328 if (!isr)
8788fdc2 1329 return IRQ_NONE;
6b7c5b94 1330
8788fdc2
SP		 1331 event_handle(adapter, &adapter->tx_eq);
1332 event_handle(adapter, &adapter->rx_eq);
c001c213 1333
8788fdc2 1334 return IRQ_HANDLED;
6b7c5b94
SP		 1335}
1336
1337static irqreturn_t be_msix_rx(int irq, void *dev)
1338{
1339 struct be_adapter *adapter = dev;
1340
8788fdc2 1341 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1342
1343 return IRQ_HANDLED;
1344}
1345
5fb379ee 1346static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1347{
1348 struct be_adapter *adapter = dev;
1349
8788fdc2 1350 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1351
1352 return IRQ_HANDLED;
1353}
1354
5be93b9a 1355static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1356 struct be_eth_rx_compl *rxcp)
1357{
1358 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1359 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1360
1361 if (err)
1362 drvr_stats(adapter)->be_rxcp_err++;
1363
5be93b9a 1364 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1365}
1366
1367int be_poll_rx(struct napi_struct *napi, int budget)
1368{
1369 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1370 struct be_adapter *adapter =
1371 container_of(rx_eq, struct be_adapter, rx_eq);
1372 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1373 struct be_eth_rx_compl *rxcp;
1374 u32 work_done;
1375
1376 for (work_done = 0; work_done < budget; work_done++) {
1377 rxcp = be_rx_compl_get(adapter);
1378 if (!rxcp)
1379 break;
1380
5be93b9a
AK		 1381 if (do_gro(adapter, rxcp))
1382 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1383 else
1384 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1385
1386 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1387 }
1388
6b7c5b94
SP		 1389 /* Refill the queue */
1390 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1391 be_post_rx_frags(adapter);
1392
1393 /* All consumed */
1394 if (work_done < budget) {
1395 napi_complete(napi);
8788fdc2 1396 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1397 } else {
1398 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1399 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1400 }
1401 return work_done;
1402}
1403
5fb379ee 1404void be_process_tx(struct be_adapter *adapter)
6b7c5b94 1405{
5fb379ee
SP		 1406 struct be_queue_info *txq = &adapter->tx_obj.q;
1407 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94
SP		 1408 struct be_eth_tx_compl *txcp;
1409 u32 num_cmpl = 0;
1410 u16 end_idx;
1411
5fb379ee 1412 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94
SP		 1413 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1414 wrb_index, txcp);
1415 be_tx_compl_process(adapter, end_idx);
1416 num_cmpl++;
1417 }
1418
5fb379ee 1419 if (num_cmpl) {
8788fdc2 1420 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
5fb379ee
SP		 1421
1422 /* As Tx wrbs have been freed up, wake up netdev queue if
1423 * it was stopped due to lack of tx wrbs.
1424 */
1425 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1426 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1427 netif_wake_queue(adapter->netdev);
1428 }
1429
1430 drvr_stats(adapter)->be_tx_events++;
1431 drvr_stats(adapter)->be_tx_compl += num_cmpl;
6b7c5b94 1432 }
5fb379ee
SP		 1433}
1434
1435/* As TX and MCC share the same EQ check for both TX and MCC completions.
1436 * For TX/MCC we don't honour budget; consume everything
1437 */
1438static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1439{
1440 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1441 struct be_adapter *adapter =
1442 container_of(tx_eq, struct be_adapter, tx_eq);
6b7c5b94
SP		 1443
1444 napi_complete(napi);
1445
5fb379ee 1446 be_process_tx(adapter);
6b7c5b94 1447
8788fdc2 1448 be_process_mcc(adapter);
6b7c5b94
SP		 1449
1450 return 1;
1451}
1452
ea1dae11
SP		 1453static void be_worker(struct work_struct *work)
1454{
1455 struct be_adapter *adapter =
1456 container_of(work, struct be_adapter, work.work);
ea1dae11 1457
b31c50a7 1458 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1459
1460 /* Set EQ delay */
1461 be_rx_eqd_update(adapter);
1462
4097f663
SP		 1463 be_tx_rate_update(adapter);
1464 be_rx_rate_update(adapter);
1465
ea1dae11
SP		 1466 if (adapter->rx_post_starved) {
1467 adapter->rx_post_starved = false;
1468 be_post_rx_frags(adapter);
1469 }
1470
1471 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1472}
1473
6b7c5b94
SP		 1474static void be_msix_enable(struct be_adapter *adapter)
1475{
1476 int i, status;
1477
1478 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1479 adapter->msix_entries[i].entry = i;
1480
1481 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1482 BE_NUM_MSIX_VECTORS);
1483 if (status == 0)
1484 adapter->msix_enabled = true;
1485 return;
1486}
1487
1488static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1489{
b628bde2
SP		 1490 return adapter->msix_entries[
1491 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1492}
1493
b628bde2
SP		 1494static int be_request_irq(struct be_adapter *adapter,
1495 struct be_eq_obj *eq_obj,
1496 void *handler, char *desc)
6b7c5b94
SP		 1497{
1498 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1499 int vec;
1500
1501 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1502 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1503 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1504}
1505
1506static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1507{
1508 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1509 free_irq(vec, adapter);
1510}
6b7c5b94 1511
b628bde2
SP		 1512static int be_msix_register(struct be_adapter *adapter)
1513{
1514 int status;
1515
1516 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1517 if (status)
1518 goto err;
1519
b628bde2
SP		 1520 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1521 if (status)
1522 goto free_tx_irq;
1523
6b7c5b94 1524 return 0;
b628bde2
SP		 1525
1526free_tx_irq:
1527 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1528err:
1529 dev_warn(&adapter->pdev->dev,
1530 "MSIX Request IRQ failed - err %d\n", status);
1531 pci_disable_msix(adapter->pdev);
1532 adapter->msix_enabled = false;
1533 return status;
1534}
1535
1536static int be_irq_register(struct be_adapter *adapter)
1537{
1538 struct net_device *netdev = adapter->netdev;
1539 int status;
1540
1541 if (adapter->msix_enabled) {
1542 status = be_msix_register(adapter);
1543 if (status == 0)
1544 goto done;
1545 }
1546
1547 /* INTx */
1548 netdev->irq = adapter->pdev->irq;
1549 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1550 adapter);
1551 if (status) {
1552 dev_err(&adapter->pdev->dev,
1553 "INTx request IRQ failed - err %d\n", status);
1554 return status;
1555 }
1556done:
1557 adapter->isr_registered = true;
1558 return 0;
1559}
1560
1561static void be_irq_unregister(struct be_adapter *adapter)
1562{
1563 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1564
1565 if (!adapter->isr_registered)
1566 return;
1567
1568 /* INTx */
1569 if (!adapter->msix_enabled) {
1570 free_irq(netdev->irq, adapter);
1571 goto done;
1572 }
1573
1574 /* MSIx */
b628bde2
SP		 1575 be_free_irq(adapter, &adapter->tx_eq);
1576 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1577done:
1578 adapter->isr_registered = false;
1579 return;
1580}
1581
1582static int be_open(struct net_device *netdev)
1583{
1584 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1585 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1586 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1587 bool link_up;
1588 int status;
0388f251
SB		 1589 u8 mac_speed;
1590 u16 link_speed;
5fb379ee
SP		 1591
1592 /* First time posting */
1593 be_post_rx_frags(adapter);
1594
1595 napi_enable(&rx_eq->napi);
1596 napi_enable(&tx_eq->napi);
1597
1598 be_irq_register(adapter);
1599
8788fdc2 1600 be_intr_set(adapter, true);
5fb379ee
SP		 1601
1602 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1603 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1604 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1605
1606 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1607 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1608
0388f251
SB		 1609 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1610 &link_speed);
a8f447bd
SP		 1611 if (status)
1612 return status;
1613 be_link_status_update(adapter, link_up);
5fb379ee
SP		 1614
1615 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1616 return 0;
1617}
1618
1619static int be_setup(struct be_adapter *adapter)
1620{
5fb379ee 1621 struct net_device *netdev = adapter->netdev;
73d540f2 1622 u32 cap_flags, en_flags;
6b7c5b94
SP		 1623 int status;
1624
73d540f2
SP		 1625 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1626 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1627 BE_IF_FLAGS_PROMISCUOUS |
1628 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1629 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1630 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1631
1632 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1633 netdev->dev_addr, false/* pmac_invalid */,
1634 &adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 1635 if (status != 0)
1636 goto do_none;
1637
6b7c5b94
SP		 1638 status = be_tx_queues_create(adapter);
1639 if (status != 0)
1640 goto if_destroy;
1641
1642 status = be_rx_queues_create(adapter);
1643 if (status != 0)
1644 goto tx_qs_destroy;
1645
5fb379ee
SP		 1646 status = be_mcc_queues_create(adapter);
1647 if (status != 0)
1648 goto rx_qs_destroy;
6b7c5b94 1649
b31c50a7
SP		 1650 status = be_vid_config(adapter);
1651 if (status != 0)
1652 goto mccqs_destroy;
1653
1654 status = be_cmd_set_flow_control(adapter, true, true);
1655 if (status != 0)
1656 goto mccqs_destroy;
6b7c5b94
SP		 1657 return 0;
1658
b31c50a7
SP		 1659mccqs_destroy:
1660 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1661rx_qs_destroy:
1662 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1663tx_qs_destroy:
1664 be_tx_queues_destroy(adapter);
1665if_destroy:
8788fdc2 1666 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1667do_none:
1668 return status;
1669}
1670
5fb379ee
SP		 1671static int be_clear(struct be_adapter *adapter)
1672{
1a8887d8 1673 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1674 be_rx_queues_destroy(adapter);
1675 be_tx_queues_destroy(adapter);
1676
8788fdc2 1677 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1678
5fb379ee
SP		 1679 return 0;
1680}
1681
6b7c5b94
SP		 1682static int be_close(struct net_device *netdev)
1683{
1684 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1685 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1686 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1687 int vec;
1688
b305be78 1689 cancel_delayed_work_sync(&adapter->work);
6b7c5b94
SP		 1690
1691 netif_stop_queue(netdev);
1692 netif_carrier_off(netdev);
a8f447bd 1693 adapter->link_up = false;
6b7c5b94 1694
8788fdc2 1695 be_intr_set(adapter, false);
6b7c5b94
SP		 1696
1697 if (adapter->msix_enabled) {
1698 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1699 synchronize_irq(vec);
1700 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1701 synchronize_irq(vec);
1702 } else {
1703 synchronize_irq(netdev->irq);
1704 }
1705 be_irq_unregister(adapter);
1706
1707 napi_disable(&rx_eq->napi);
1708 napi_disable(&tx_eq->napi);
1709
a8e9179a
SP		 1710 /* Wait for all pending tx completions to arrive so that
1711 * all tx skbs are freed.
1712 */
1713 be_tx_compl_clean(adapter);
1714
6b7c5b94
SP		 1715 return 0;
1716}
1717
84517482
AK		 1718#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1719char flash_cookie[2][16] = {"*** SE FLAS",
1720 "H DIRECTORY *** "};
1721static int be_flash_image(struct be_adapter *adapter,
1722 const struct firmware *fw,
1723 struct be_dma_mem *flash_cmd, u32 flash_type)
1724{
1725 int status;
1726 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1727 int num_bytes;
1728 const u8 *p = fw->data;
1729 struct be_cmd_write_flashrom *req = flash_cmd->va;
1730
1731 switch (flash_type) {
1732 case FLASHROM_TYPE_ISCSI_ACTIVE:
1733 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1734 image_size = FLASH_IMAGE_MAX_SIZE;
1735 break;
1736 case FLASHROM_TYPE_ISCSI_BACKUP:
1737 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1738 image_size = FLASH_IMAGE_MAX_SIZE;
1739 break;
1740 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1741 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1742 image_size = FLASH_IMAGE_MAX_SIZE;
1743 break;
1744 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1745 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1746 image_size = FLASH_IMAGE_MAX_SIZE;
1747 break;
1748 case FLASHROM_TYPE_BIOS:
1749 image_offset = FLASH_iSCSI_BIOS_START;
1750 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1751 break;
1752 case FLASHROM_TYPE_FCOE_BIOS:
1753 image_offset = FLASH_FCoE_BIOS_START;
1754 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1755 break;
1756 case FLASHROM_TYPE_PXE_BIOS:
1757 image_offset = FLASH_PXE_BIOS_START;
1758 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1759 break;
1760 default:
1761 return 0;
1762 }
1763
1764 p += sizeof(struct flash_file_hdr) + image_offset;
1765 if (p + image_size > fw->data + fw->size)
1766 return -1;
1767
1768 total_bytes = image_size;
1769
1770 while (total_bytes) {
1771 if (total_bytes > 32*1024)
1772 num_bytes = 32*1024;
1773 else
1774 num_bytes = total_bytes;
1775 total_bytes -= num_bytes;
1776
1777 if (!total_bytes)
1778 flash_op = FLASHROM_OPER_FLASH;
1779 else
1780 flash_op = FLASHROM_OPER_SAVE;
1781 memcpy(req->params.data_buf, p, num_bytes);
1782 p += num_bytes;
1783 status = be_cmd_write_flashrom(adapter, flash_cmd,
1784 flash_type, flash_op, num_bytes);
1785 if (status) {
1786 dev_err(&adapter->pdev->dev,
1787 "cmd to write to flash rom failed. type/op %d/%d\n",
1788 flash_type, flash_op);
1789 return -1;
1790 }
1791 yield();
1792 }
1793
1794 return 0;
1795}
1796
1797int be_load_fw(struct be_adapter *adapter, u8 *func)
1798{
1799 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1800 const struct firmware *fw;
1801 struct flash_file_hdr *fhdr;
1802 struct flash_section_info *fsec = NULL;
1803 struct be_dma_mem flash_cmd;
1804 int status;
1805 const u8 *p;
1806 bool entry_found = false;
1807 int flash_type;
1808 char fw_ver[FW_VER_LEN];
1809 char fw_cfg;
1810
1811 status = be_cmd_get_fw_ver(adapter, fw_ver);
1812 if (status)
1813 return status;
1814
1815 fw_cfg = *(fw_ver + 2);
1816 if (fw_cfg == '0')
1817 fw_cfg = '1';
1818 strcpy(fw_file, func);
1819
1820 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1821 if (status)
1822 goto fw_exit;
1823
1824 p = fw->data;
1825 fhdr = (struct flash_file_hdr *) p;
1826 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1827 dev_err(&adapter->pdev->dev,
1828 "Firmware(%s) load error (signature did not match)\n",
1829 fw_file);
1830 status = -1;
1831 goto fw_exit;
1832 }
1833
1834 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1835
1836 p += sizeof(struct flash_file_hdr);
1837 while (p < (fw->data + fw->size)) {
1838 fsec = (struct flash_section_info *)p;
1839 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1840 entry_found = true;
1841 break;
1842 }
1843 p += 32;
1844 }
1845
1846 if (!entry_found) {
1847 status = -1;
1848 dev_err(&adapter->pdev->dev,
1849 "Flash cookie not found in firmware image\n");
1850 goto fw_exit;
1851 }
1852
1853 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1854 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1855 &flash_cmd.dma);
1856 if (!flash_cmd.va) {
1857 status = -ENOMEM;
1858 dev_err(&adapter->pdev->dev,
1859 "Memory allocation failure while flashing\n");
1860 goto fw_exit;
1861 }
1862
1863 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1864 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1865 status = be_flash_image(adapter, fw, &flash_cmd,
1866 flash_type);
1867 if (status)
1868 break;
1869 }
1870
1871 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1872 flash_cmd.dma);
1873 if (status) {
1874 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1875 goto fw_exit;
1876 }
1877
1878 dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
1879
1880fw_exit:
1881 release_firmware(fw);
1882 return status;
1883}
1884
6b7c5b94
SP		 1885static struct net_device_ops be_netdev_ops = {
1886 .ndo_open = be_open,
1887 .ndo_stop = be_close,
1888 .ndo_start_xmit = be_xmit,
1889 .ndo_get_stats = be_get_stats,
1890 .ndo_set_rx_mode = be_set_multicast_list,
1891 .ndo_set_mac_address = be_mac_addr_set,
1892 .ndo_change_mtu = be_change_mtu,
1893 .ndo_validate_addr = eth_validate_addr,
1894 .ndo_vlan_rx_register = be_vlan_register,
1895 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
1896 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
1897};
1898
1899static void be_netdev_init(struct net_device *netdev)
1900{
1901 struct be_adapter *adapter = netdev_priv(netdev);
1902
1903 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34
AK		 1904 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
1905 NETIF_F_GRO;
6b7c5b94
SP		 1906
1907 netdev->flags |= IFF_MULTICAST;
1908
728a9972
AK		 1909 adapter->rx_csum = true;
1910
c190e3c8
AK		 1911 netif_set_gso_max_size(netdev, 65535);
1912
6b7c5b94
SP		 1913 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
1914
1915 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
1916
6b7c5b94
SP		 1917 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
1918 BE_NAPI_WEIGHT);
5fb379ee 1919 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 1920 BE_NAPI_WEIGHT);
1921
1922 netif_carrier_off(netdev);
1923 netif_stop_queue(netdev);
1924}
1925
1926static void be_unmap_pci_bars(struct be_adapter *adapter)
1927{
8788fdc2
SP		 1928 if (adapter->csr)
1929 iounmap(adapter->csr);
1930 if (adapter->db)
1931 iounmap(adapter->db);
1932 if (adapter->pcicfg)
1933 iounmap(adapter->pcicfg);
6b7c5b94
SP		 1934}
1935
1936static int be_map_pci_bars(struct be_adapter *adapter)
1937{
1938 u8 __iomem *addr;
1939
1940 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
1941 pci_resource_len(adapter->pdev, 2));
1942 if (addr == NULL)
1943 return -ENOMEM;
8788fdc2 1944 adapter->csr = addr;
6b7c5b94
SP		 1945
1946 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
1947 128 * 1024);
1948 if (addr == NULL)
1949 goto pci_map_err;
8788fdc2 1950 adapter->db = addr;
6b7c5b94
SP		 1951
1952 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
1953 pci_resource_len(adapter->pdev, 1));
1954 if (addr == NULL)
1955 goto pci_map_err;
8788fdc2 1956 adapter->pcicfg = addr;
6b7c5b94
SP		 1957
1958 return 0;
1959pci_map_err:
1960 be_unmap_pci_bars(adapter);
1961 return -ENOMEM;
1962}
1963
1964
1965static void be_ctrl_cleanup(struct be_adapter *adapter)
1966{
8788fdc2 1967 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 1968
1969 be_unmap_pci_bars(adapter);
1970
1971 if (mem->va)
1972 pci_free_consistent(adapter->pdev, mem->size,
1973 mem->va, mem->dma);
1974}
1975
6b7c5b94
SP		 1976static int be_ctrl_init(struct be_adapter *adapter)
1977{
8788fdc2
SP		 1978 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
1979 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
6b7c5b94 1980 int status;
6b7c5b94
SP		 1981
1982 status = be_map_pci_bars(adapter);
1983 if (status)
1984 return status;
1985
1986 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
1987 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
1988 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
1989 if (!mbox_mem_alloc->va) {
1990 be_unmap_pci_bars(adapter);
1991 return -1;
1992 }
1993 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
1994 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
1995 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
1996 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
8788fdc2
SP		 1997 spin_lock_init(&adapter->mbox_lock);
1998 spin_lock_init(&adapter->mcc_lock);
1999 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2000
6b7c5b94
SP		 2001 return 0;
2002}
2003
2004static void be_stats_cleanup(struct be_adapter *adapter)
2005{
2006 struct be_stats_obj *stats = &adapter->stats;
2007 struct be_dma_mem *cmd = &stats->cmd;
2008
2009 if (cmd->va)
2010 pci_free_consistent(adapter->pdev, cmd->size,
2011 cmd->va, cmd->dma);
2012}
2013
2014static int be_stats_init(struct be_adapter *adapter)
2015{
2016 struct be_stats_obj *stats = &adapter->stats;
2017 struct be_dma_mem *cmd = &stats->cmd;
2018
2019 cmd->size = sizeof(struct be_cmd_req_get_stats);
2020 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2021 if (cmd->va == NULL)
2022 return -1;
2023 return 0;
2024}
2025
2026static void __devexit be_remove(struct pci_dev *pdev)
2027{
2028 struct be_adapter *adapter = pci_get_drvdata(pdev);
2029 if (!adapter)
2030 return;
2031
2032 unregister_netdev(adapter->netdev);
2033
5fb379ee
SP		 2034 be_clear(adapter);
2035
6b7c5b94
SP		 2036 be_stats_cleanup(adapter);
2037
2038 be_ctrl_cleanup(adapter);
2039
2040 if (adapter->msix_enabled) {
2041 pci_disable_msix(adapter->pdev);
2042 adapter->msix_enabled = false;
2043 }
2044
2045 pci_set_drvdata(pdev, NULL);
2046 pci_release_regions(pdev);
2047 pci_disable_device(pdev);
2048
2049 free_netdev(adapter->netdev);
2050}
2051
2052static int be_hw_up(struct be_adapter *adapter)
2053{
6b7c5b94
SP		 2054 int status;
2055
8788fdc2 2056 status = be_cmd_POST(adapter);
6b7c5b94
SP		 2057 if (status)
2058 return status;
2059
43a04fdc
SP		 2060 status = be_cmd_reset_function(adapter);
2061 if (status)
2062 return status;
2063
8788fdc2 2064 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2065 if (status)
2066 return status;
2067
dcb9b564
AK		 2068 status = be_cmd_query_fw_cfg(adapter,
2069 &adapter->port_num, &adapter->cap);
6b7c5b94
SP		 2070 return status;
2071}
2072
2073static int __devinit be_probe(struct pci_dev *pdev,
2074 const struct pci_device_id *pdev_id)
2075{
2076 int status = 0;
2077 struct be_adapter *adapter;
2078 struct net_device *netdev;
6b7c5b94
SP		 2079 u8 mac[ETH_ALEN];
2080
2081 status = pci_enable_device(pdev);
2082 if (status)
2083 goto do_none;
2084
2085 status = pci_request_regions(pdev, DRV_NAME);
2086 if (status)
2087 goto disable_dev;
2088 pci_set_master(pdev);
2089
2090 netdev = alloc_etherdev(sizeof(struct be_adapter));
2091 if (netdev == NULL) {
2092 status = -ENOMEM;
2093 goto rel_reg;
2094 }
2095 adapter = netdev_priv(netdev);
2096 adapter->pdev = pdev;
2097 pci_set_drvdata(pdev, adapter);
2098 adapter->netdev = netdev;
2099
2100 be_msix_enable(adapter);
2101
e930438c 2102 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2103 if (!status) {
2104 netdev->features |= NETIF_F_HIGHDMA;
2105 } else {
e930438c 2106 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2107 if (status) {
2108 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2109 goto free_netdev;
2110 }
2111 }
2112
6b7c5b94
SP		 2113 status = be_ctrl_init(adapter);
2114 if (status)
2115 goto free_netdev;
2116
2117 status = be_stats_init(adapter);
2118 if (status)
2119 goto ctrl_clean;
2120
2121 status = be_hw_up(adapter);
2122 if (status)
2123 goto stats_clean;
2124
8788fdc2 2125 status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
6b7c5b94
SP		 2126 true /* permanent */, 0);
2127 if (status)
2128 goto stats_clean;
2129 memcpy(netdev->dev_addr, mac, ETH_ALEN);
2130
2131 INIT_DELAYED_WORK(&adapter->work, be_worker);
2132 be_netdev_init(netdev);
2133 SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
2134
5fb379ee
SP		 2135 status = be_setup(adapter);
2136 if (status)
2137 goto stats_clean;
6b7c5b94
SP		 2138 status = register_netdev(netdev);
2139 if (status != 0)
5fb379ee 2140 goto unsetup;
6b7c5b94 2141
c4ca2374 2142 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2143 return 0;
2144
5fb379ee
SP		 2145unsetup:
2146 be_clear(adapter);
6b7c5b94
SP		 2147stats_clean:
2148 be_stats_cleanup(adapter);
2149ctrl_clean:
2150 be_ctrl_cleanup(adapter);
2151free_netdev:
2152 free_netdev(adapter->netdev);
2153rel_reg:
2154 pci_release_regions(pdev);
2155disable_dev:
2156 pci_disable_device(pdev);
2157do_none:
c4ca2374 2158 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2159 return status;
2160}
2161
2162static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2163{
2164 struct be_adapter *adapter = pci_get_drvdata(pdev);
2165 struct net_device *netdev = adapter->netdev;
2166
2167 netif_device_detach(netdev);
2168 if (netif_running(netdev)) {
2169 rtnl_lock();
2170 be_close(netdev);
2171 rtnl_unlock();
2172 }
9b0365f1 2173 be_clear(adapter);
6b7c5b94
SP		 2174
2175 pci_save_state(pdev);
2176 pci_disable_device(pdev);
2177 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2178 return 0;
2179}
2180
2181static int be_resume(struct pci_dev *pdev)
2182{
2183 int status = 0;
2184 struct be_adapter *adapter = pci_get_drvdata(pdev);
2185 struct net_device *netdev = adapter->netdev;
2186
2187 netif_device_detach(netdev);
2188
2189 status = pci_enable_device(pdev);
2190 if (status)
2191 return status;
2192
2193 pci_set_power_state(pdev, 0);
2194 pci_restore_state(pdev);
2195
9b0365f1 2196 be_setup(adapter);
6b7c5b94
SP		 2197 if (netif_running(netdev)) {
2198 rtnl_lock();
2199 be_open(netdev);
2200 rtnl_unlock();
2201 }
2202 netif_device_attach(netdev);
2203 return 0;
2204}
2205
2206static struct pci_driver be_driver = {
2207 .name = DRV_NAME,
2208 .id_table = be_dev_ids,
2209 .probe = be_probe,
2210 .remove = be_remove,
2211 .suspend = be_suspend,
2212 .resume = be_resume
2213};
2214
2215static int __init be_init_module(void)
2216{
2217 if (rx_frag_size != 8192 && rx_frag_size != 4096
2218 && rx_frag_size != 2048) {
2219 printk(KERN_WARNING DRV_NAME
2220 " : Module param rx_frag_size must be 2048/4096/8192."
2221 " Using 2048\n");
2222 rx_frag_size = 2048;
2223 }
6b7c5b94
SP		 2224
2225 return pci_register_driver(&be_driver);
2226}
2227module_init(be_init_module);
2228
2229static void __exit be_exit_module(void)
2230{
2231 pci_unregister_driver(&be_driver);
2232}
2233module_exit(be_exit_module);
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