[net-next-2.6.git] / drivers / mmc / host / tmio_mmc.h

/* Definitons for use with the tmio_mmc.c
 *
 * (c) 2004 Ian Molton <spyro@f2s.com>
 * (c) 2007 Ian Molton <spyro@f2s.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/highmem.h>
#include <linux/interrupt.h>
#include <linux/dmaengine.h>

#define CTL_SD_CMD 0x00
#define CTL_ARG_REG 0x04
#define CTL_STOP_INTERNAL_ACTION 0x08
#define CTL_XFER_BLK_COUNT 0xa
#define CTL_RESPONSE 0x0c
#define CTL_STATUS 0x1c
#define CTL_IRQ_MASK 0x20
#define CTL_SD_CARD_CLK_CTL 0x24
#define CTL_SD_XFER_LEN 0x26
#define CTL_SD_MEM_CARD_OPT 0x28
#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
#define CTL_SD_DATA_PORT 0x30
#define CTL_TRANSACTION_CTL 0x34
#define CTL_RESET_SD 0xe0
#define CTL_SDIO_REGS 0x100
#define CTL_CLK_AND_WAIT_CTL 0x138
#define CTL_RESET_SDIO 0x1e0

/* Definitions for values the CTRL_STATUS register can take. */
#define TMIO_STAT_CMDRESPEND    0x00000001
#define TMIO_STAT_DATAEND       0x00000004
#define TMIO_STAT_CARD_REMOVE   0x00000008
#define TMIO_STAT_CARD_INSERT   0x00000010
#define TMIO_STAT_SIGSTATE      0x00000020
#define TMIO_STAT_WRPROTECT     0x00000080
#define TMIO_STAT_CARD_REMOVE_A 0x00000100
#define TMIO_STAT_CARD_INSERT_A 0x00000200
#define TMIO_STAT_SIGSTATE_A    0x00000400
#define TMIO_STAT_CMD_IDX_ERR   0x00010000
#define TMIO_STAT_CRCFAIL       0x00020000
#define TMIO_STAT_STOPBIT_ERR   0x00040000
#define TMIO_STAT_DATATIMEOUT   0x00080000
#define TMIO_STAT_RXOVERFLOW    0x00100000
#define TMIO_STAT_TXUNDERRUN    0x00200000
#define TMIO_STAT_CMDTIMEOUT    0x00400000
#define TMIO_STAT_RXRDY         0x01000000
#define TMIO_STAT_TXRQ          0x02000000
#define TMIO_STAT_ILL_FUNC      0x20000000
#define TMIO_STAT_CMD_BUSY      0x40000000
#define TMIO_STAT_ILL_ACCESS    0x80000000

/* Define some IRQ masks */
/* This is the mask used at reset by the chip */
#define TMIO_MASK_ALL           0x837f031d
#define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
#define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
		TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
#define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)


#define enable_mmc_irqs(host, i) \
	do { \
		u32 mask;\
		mask  = sd_ctrl_read32((host), CTL_IRQ_MASK); \
		mask &= ~((i) & TMIO_MASK_IRQ); \
		sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
	} while (0)

#define disable_mmc_irqs(host, i) \
	do { \
		u32 mask;\
		mask  = sd_ctrl_read32((host), CTL_IRQ_MASK); \
		mask |= ((i) & TMIO_MASK_IRQ); \
		sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
	} while (0)

#define ack_mmc_irqs(host, i) \
	do { \
		sd_ctrl_write32((host), CTL_STATUS, ~(i)); \
	} while (0)


struct tmio_mmc_host {
	void __iomem *ctl;
	unsigned long bus_shift;
	struct mmc_command      *cmd;
	struct mmc_request      *mrq;
	struct mmc_data         *data;
	struct mmc_host         *mmc;
	int                     irq;

	/* Callbacks for clock / power control */
	void (*set_pwr)(struct platform_device *host, int state);
	void (*set_clk_div)(struct platform_device *host, int state);

	/* pio related stuff */
	struct scatterlist      *sg_ptr;
	unsigned int            sg_len;
	unsigned int            sg_off;

	struct platform_device *pdev;

	/* DMA support */
	struct dma_chan		*chan_rx;
	struct dma_chan		*chan_tx;
	struct tasklet_struct	dma_complete;
	struct tasklet_struct	dma_issue;
#ifdef CONFIG_TMIO_MMC_DMA
	struct dma_async_tx_descriptor *desc;
	unsigned int            dma_sglen;
	dma_cookie_t		cookie;
#endif
};

#include <linux/io.h>

static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
{
	return readw(host->ctl + (addr << host->bus_shift));
}

static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
		u16 *buf, int count)
{
	readsw(host->ctl + (addr << host->bus_shift), buf, count);
}

static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
{
	return readw(host->ctl + (addr << host->bus_shift)) |
	       readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
}

static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
		u16 val)
{
	writew(val, host->ctl + (addr << host->bus_shift));
}

static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
		u16 *buf, int count)
{
	writesw(host->ctl + (addr << host->bus_shift), buf, count);
}

static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
		u32 val)
{
	writew(val, host->ctl + (addr << host->bus_shift));
	writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
}

#include <linux/scatterlist.h>
#include <linux/blkdev.h>

static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
	struct mmc_data *data)
{
	host->sg_len = data->sg_len;
	host->sg_ptr = data->sg;
	host->sg_off = 0;
}

static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
{
	host->sg_ptr = sg_next(host->sg_ptr);
	host->sg_off = 0;
	return --host->sg_len;
}

static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
	unsigned long *flags)
{
	struct scatterlist *sg = host->sg_ptr;

	local_irq_save(*flags);
	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
}

static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
	unsigned long *flags)
{
	kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
	local_irq_restore(*flags);
}

#ifdef CONFIG_MMC_DEBUG

#define STATUS_TO_TEXT(a) \
	do { \
		if (status & TMIO_STAT_##a) \
			printk(#a); \
	} while (0)

void pr_debug_status(u32 status)
{
	printk(KERN_DEBUG "status: %08x = ", status);
	STATUS_TO_TEXT(CARD_REMOVE);
	STATUS_TO_TEXT(CARD_INSERT);
	STATUS_TO_TEXT(SIGSTATE);
	STATUS_TO_TEXT(WRPROTECT);
	STATUS_TO_TEXT(CARD_REMOVE_A);
	STATUS_TO_TEXT(CARD_INSERT_A);
	STATUS_TO_TEXT(SIGSTATE_A);
	STATUS_TO_TEXT(CMD_IDX_ERR);
	STATUS_TO_TEXT(STOPBIT_ERR);
	STATUS_TO_TEXT(ILL_FUNC);
	STATUS_TO_TEXT(CMD_BUSY);
	STATUS_TO_TEXT(CMDRESPEND);
	STATUS_TO_TEXT(DATAEND);
	STATUS_TO_TEXT(CRCFAIL);
	STATUS_TO_TEXT(DATATIMEOUT);
	STATUS_TO_TEXT(CMDTIMEOUT);
	STATUS_TO_TEXT(RXOVERFLOW);
	STATUS_TO_TEXT(TXUNDERRUN);
	STATUS_TO_TEXT(RXRDY);
	STATUS_TO_TEXT(TXRQ);
	STATUS_TO_TEXT(ILL_ACCESS);
	printk("\n");
}

#else
#define pr_debug_status(s)  do { } while (0)
#endif
Commit	Line	Data
4a48998f IM	1	/* Definitons for use with the tmio_mmc.c
	2	*
	3	* (c) 2004 Ian Molton <spyro@f2s.com>
	4	* (c) 2007 Ian Molton <spyro@f2s.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
4cb32906 AB	11
4cb32906 AB	12	#include <linux/highmem.h>
311f3ac7 GL	13	#include <linux/interrupt.h>
311f3ac7 GL	14	#include <linux/dmaengine.h>
4cb32906	15
4a48998f IM	16	#define CTL_SD_CMD 0x00
	17	#define CTL_ARG_REG 0x04
	18	#define CTL_STOP_INTERNAL_ACTION 0x08
	19	#define CTL_XFER_BLK_COUNT 0xa
	20	#define CTL_RESPONSE 0x0c
	21	#define CTL_STATUS 0x1c
	22	#define CTL_IRQ_MASK 0x20
	23	#define CTL_SD_CARD_CLK_CTL 0x24
	24	#define CTL_SD_XFER_LEN 0x26
	25	#define CTL_SD_MEM_CARD_OPT 0x28
	26	#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
	27	#define CTL_SD_DATA_PORT 0x30
	28	#define CTL_TRANSACTION_CTL 0x34
	29	#define CTL_RESET_SD 0xe0
	30	#define CTL_SDIO_REGS 0x100
	31	#define CTL_CLK_AND_WAIT_CTL 0x138
	32	#define CTL_RESET_SDIO 0x1e0
	33
	34	/* Definitions for values the CTRL_STATUS register can take. */
	35	#define TMIO_STAT_CMDRESPEND 0x00000001
	36	#define TMIO_STAT_DATAEND 0x00000004
	37	#define TMIO_STAT_CARD_REMOVE 0x00000008
	38	#define TMIO_STAT_CARD_INSERT 0x00000010
	39	#define TMIO_STAT_SIGSTATE 0x00000020
	40	#define TMIO_STAT_WRPROTECT 0x00000080
	41	#define TMIO_STAT_CARD_REMOVE_A 0x00000100
	42	#define TMIO_STAT_CARD_INSERT_A 0x00000200
	43	#define TMIO_STAT_SIGSTATE_A 0x00000400
	44	#define TMIO_STAT_CMD_IDX_ERR 0x00010000
	45	#define TMIO_STAT_CRCFAIL 0x00020000
	46	#define TMIO_STAT_STOPBIT_ERR 0x00040000
	47	#define TMIO_STAT_DATATIMEOUT 0x00080000
	48	#define TMIO_STAT_RXOVERFLOW 0x00100000
	49	#define TMIO_STAT_TXUNDERRUN 0x00200000
	50	#define TMIO_STAT_CMDTIMEOUT 0x00400000
	51	#define TMIO_STAT_RXRDY 0x01000000
	52	#define TMIO_STAT_TXRQ 0x02000000
	53	#define TMIO_STAT_ILL_FUNC 0x20000000
	54	#define TMIO_STAT_CMD_BUSY 0x40000000
	55	#define TMIO_STAT_ILL_ACCESS 0x80000000
	56
	57	/* Define some IRQ masks */
	58	/* This is the mask used at reset by the chip */
	59	#define TMIO_MASK_ALL 0x837f031d
a8c39d8d GL	60	#define TMIO_MASK_READOP (TMIO_STAT_RXRDY \| TMIO_STAT_DATAEND)
a8c39d8d GL	61	#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ \| TMIO_STAT_DATAEND)
4a48998f IM	62	#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND \| TMIO_STAT_CMDTIMEOUT \| \
	63	TMIO_STAT_CARD_REMOVE \| TMIO_STAT_CARD_INSERT)
	64	#define TMIO_MASK_IRQ (TMIO_MASK_READOP \| TMIO_MASK_WRITEOP \| TMIO_MASK_CMD)
	65
5e74672c PZ	66
5e74672c PZ	67	#define enable_mmc_irqs(host, i) \
4a48998f IM	68	do { \
4a48998f IM	69	u32 mask;\
5e74672c	70	mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
4a48998f	71	mask &= ~((i) & TMIO_MASK_IRQ); \
5e74672c	72	sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
4a48998f IM	73	} while (0)
4a48998f IM	74
5e74672c	75	#define disable_mmc_irqs(host, i) \
4a48998f IM	76	do { \
4a48998f IM	77	u32 mask;\
5e74672c	78	mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
4a48998f	79	mask \|= ((i) & TMIO_MASK_IRQ); \
5e74672c	80	sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
4a48998f IM	81	} while (0)
4a48998f IM	82
5e74672c	83	#define ack_mmc_irqs(host, i) \
4a48998f	84	do { \
b78d6c5f	85	sd_ctrl_write32((host), CTL_STATUS, ~(i)); \
4a48998f IM	86	} while (0)
	87
	88
	89	struct tmio_mmc_host {
4a48998f	90	void __iomem *ctl;
5e74672c	91	unsigned long bus_shift;
4a48998f IM	92	struct mmc_command *cmd;
	93	struct mmc_request *mrq;
	94	struct mmc_data *data;
	95	struct mmc_host *mmc;
	96	int irq;
	97
64e8867b IM	98	/* Callbacks for clock / power control */
	99	void (set_pwr)(struct platform_device host, int state);
	100	void (set_clk_div)(struct platform_device host, int state);
	101
4a48998f IM	102	/* pio related stuff */
	103	struct scatterlist *sg_ptr;
	104	unsigned int sg_len;
	105	unsigned int sg_off;
64e8867b IM	106
64e8867b IM	107	struct platform_device *pdev;
311f3ac7 GL	108
	109	/* DMA support */
	110	struct dma_chan *chan_rx;
	111	struct dma_chan *chan_tx;
	112	struct tasklet_struct dma_complete;
	113	struct tasklet_struct dma_issue;
	114	#ifdef CONFIG_TMIO_MMC_DMA
	115	struct dma_async_tx_descriptor *desc;
	116	unsigned int dma_sglen;
	117	dma_cookie_t cookie;
	118	#endif
4a48998f IM	119	};
4a48998f IM	120
5e74672c PZ	121	#include <linux/io.h>
	122
	123	static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
	124	{
	125	return readw(host->ctl + (addr << host->bus_shift));
	126	}
	127
	128	static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
	129	u16 *buf, int count)
	130	{
	131	readsw(host->ctl + (addr << host->bus_shift), buf, count);
	132	}
	133
	134	static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
	135	{
	136	return readw(host->ctl + (addr << host->bus_shift)) \|
	137	readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
	138	}
	139
	140	static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
	141	u16 val)
	142	{
	143	writew(val, host->ctl + (addr << host->bus_shift));
	144	}
	145
	146	static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
	147	u16 *buf, int count)
	148	{
	149	writesw(host->ctl + (addr << host->bus_shift), buf, count);
	150	}
	151
	152	static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
	153	u32 val)
	154	{
	155	writew(val, host->ctl + (addr << host->bus_shift));
	156	writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
	157	}
	158
4a48998f IM	159	#include <linux/scatterlist.h>
	160	#include <linux/blkdev.h>
	161
	162	static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
	163	struct mmc_data *data)
	164	{
	165	host->sg_len = data->sg_len;
	166	host->sg_ptr = data->sg;
	167	host->sg_off = 0;
	168	}
	169
	170	static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
	171	{
	172	host->sg_ptr = sg_next(host->sg_ptr);
	173	host->sg_off = 0;
	174	return --host->sg_len;
	175	}
	176
	177	static inline char tmio_mmc_kmap_atomic(struct tmio_mmc_host host,
	178	unsigned long *flags)
	179	{
	180	struct scatterlist *sg = host->sg_ptr;
	181
	182	local_irq_save(*flags);
	183	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
	184	}
	185
	186	static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
	187	unsigned long *flags)
	188	{
	189	kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
	190	local_irq_restore(*flags);
	191	}
	192
	193	#ifdef CONFIG_MMC_DEBUG
	194
	195	#define STATUS_TO_TEXT(a) \
	196	do { \
	197	if (status & TMIO_STAT_##a) \
fe246eb0	198	printk(#a); \
4a48998f IM	199	} while (0)
4a48998f IM	200
fe246eb0	201	void pr_debug_status(u32 status)
4a48998f IM	202	{
	203	printk(KERN_DEBUG "status: %08x = ", status);
	204	STATUS_TO_TEXT(CARD_REMOVE);
	205	STATUS_TO_TEXT(CARD_INSERT);
	206	STATUS_TO_TEXT(SIGSTATE);
	207	STATUS_TO_TEXT(WRPROTECT);
	208	STATUS_TO_TEXT(CARD_REMOVE_A);
	209	STATUS_TO_TEXT(CARD_INSERT_A);
	210	STATUS_TO_TEXT(SIGSTATE_A);
	211	STATUS_TO_TEXT(CMD_IDX_ERR);
	212	STATUS_TO_TEXT(STOPBIT_ERR);
	213	STATUS_TO_TEXT(ILL_FUNC);
	214	STATUS_TO_TEXT(CMD_BUSY);
	215	STATUS_TO_TEXT(CMDRESPEND);
	216	STATUS_TO_TEXT(DATAEND);
	217	STATUS_TO_TEXT(CRCFAIL);
	218	STATUS_TO_TEXT(DATATIMEOUT);
	219	STATUS_TO_TEXT(CMDTIMEOUT);
	220	STATUS_TO_TEXT(RXOVERFLOW);
	221	STATUS_TO_TEXT(TXUNDERRUN);
	222	STATUS_TO_TEXT(RXRDY);
	223	STATUS_TO_TEXT(TXRQ);
	224	STATUS_TO_TEXT(ILL_ACCESS);
	225	printk("\n");
	226	}
	227
	228	#else
	229	#define pr_debug_status(s) do { } while (0)
	230	#endif