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Commit | Line | Data |
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2b7a5056 WS |
1 | /* |
2 | * at24.c - handle most I2C EEPROMs | |
3 | * | |
4 | * Copyright (C) 2005-2007 David Brownell | |
5 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/mutex.h> | |
18 | #include <linux/sysfs.h> | |
19 | #include <linux/mod_devicetable.h> | |
20 | #include <linux/log2.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/jiffies.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/i2c/at24.h> | |
25 | ||
26 | /* | |
27 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
28 | * Differences between different vendor product lines (like Atmel AT24C or | |
29 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
30 | * There are also I2C RAM chips, likewise interchangeable. One example | |
31 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
32 | * | |
33 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
34 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
35 | * big a page size also loses data. And it's not safe to assume that the | |
36 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
37 | * uses 0x51, for just one example. | |
38 | * | |
39 | * Accordingly, explicit board-specific configuration data should be used | |
40 | * in almost all cases. (One partial exception is an SMBus used to access | |
41 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
42 | * | |
43 | * So this driver uses "new style" I2C driver binding, expecting to be | |
44 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
45 | * similar kernel-resident tables; or, configuration data coming from | |
46 | * a bootloader. | |
47 | * | |
48 | * Other than binding model, current differences from "eeprom" driver are | |
49 | * that this one handles write access and isn't restricted to 24c02 devices. | |
50 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
51 | * which won't work on pure SMBus systems. | |
52 | */ | |
53 | ||
54 | struct at24_data { | |
55 | struct at24_platform_data chip; | |
7274ec8b | 56 | struct memory_accessor macc; |
7aeb9664 | 57 | int use_smbus; |
2b7a5056 WS |
58 | |
59 | /* | |
60 | * Lock protects against activities from other Linux tasks, | |
61 | * but not from changes by other I2C masters. | |
62 | */ | |
63 | struct mutex lock; | |
64 | struct bin_attribute bin; | |
65 | ||
66 | u8 *writebuf; | |
67 | unsigned write_max; | |
68 | unsigned num_addresses; | |
69 | ||
70 | /* | |
71 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
72 | * them for us, and we'll use them with SMBus calls. | |
73 | */ | |
74 | struct i2c_client *client[]; | |
75 | }; | |
76 | ||
77 | /* | |
78 | * This parameter is to help this driver avoid blocking other drivers out | |
79 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
80 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
81 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
82 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
83 | * | |
84 | * This value is forced to be a power of two so that writes align on pages. | |
85 | */ | |
86 | static unsigned io_limit = 128; | |
87 | module_param(io_limit, uint, 0); | |
88 | MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); | |
89 | ||
90 | /* | |
91 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
92 | * it's important to recover from write timeouts. | |
93 | */ | |
94 | static unsigned write_timeout = 25; | |
95 | module_param(write_timeout, uint, 0); | |
96 | MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); | |
97 | ||
98 | #define AT24_SIZE_BYTELEN 5 | |
99 | #define AT24_SIZE_FLAGS 8 | |
100 | ||
101 | #define AT24_BITMASK(x) (BIT(x) - 1) | |
102 | ||
103 | /* create non-zero magic value for given eeprom parameters */ | |
104 | #define AT24_DEVICE_MAGIC(_len, _flags) \ | |
105 | ((1 << AT24_SIZE_FLAGS | (_flags)) \ | |
106 | << AT24_SIZE_BYTELEN | ilog2(_len)) | |
107 | ||
108 | static const struct i2c_device_id at24_ids[] = { | |
109 | /* needs 8 addresses as A0-A2 are ignored */ | |
110 | { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) }, | |
111 | /* old variants can't be handled with this generic entry! */ | |
112 | { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) }, | |
113 | { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) }, | |
114 | /* spd is a 24c02 in memory DIMMs */ | |
115 | { "spd", AT24_DEVICE_MAGIC(2048 / 8, | |
116 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, | |
117 | { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) }, | |
118 | /* 24rf08 quirk is handled at i2c-core */ | |
119 | { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) }, | |
120 | { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) }, | |
121 | { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) }, | |
122 | { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) }, | |
123 | { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) }, | |
124 | { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) }, | |
125 | { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) }, | |
126 | { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) }, | |
127 | { "at24", 0 }, | |
128 | { /* END OF LIST */ } | |
129 | }; | |
130 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
131 | ||
132 | /*-------------------------------------------------------------------------*/ | |
133 | ||
134 | /* | |
135 | * This routine supports chips which consume multiple I2C addresses. It | |
136 | * computes the addressing information to be used for a given r/w request. | |
137 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
138 | */ | |
139 | static struct i2c_client *at24_translate_offset(struct at24_data *at24, | |
140 | unsigned *offset) | |
141 | { | |
142 | unsigned i; | |
143 | ||
144 | if (at24->chip.flags & AT24_FLAG_ADDR16) { | |
145 | i = *offset >> 16; | |
146 | *offset &= 0xffff; | |
147 | } else { | |
148 | i = *offset >> 8; | |
149 | *offset &= 0xff; | |
150 | } | |
151 | ||
152 | return at24->client[i]; | |
153 | } | |
154 | ||
155 | static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, | |
156 | unsigned offset, size_t count) | |
157 | { | |
158 | struct i2c_msg msg[2]; | |
159 | u8 msgbuf[2]; | |
160 | struct i2c_client *client; | |
4d29196c | 161 | unsigned long timeout, read_time; |
2b7a5056 WS |
162 | int status, i; |
163 | ||
164 | memset(msg, 0, sizeof(msg)); | |
165 | ||
166 | /* | |
167 | * REVISIT some multi-address chips don't rollover page reads to | |
168 | * the next slave address, so we may need to truncate the count. | |
169 | * Those chips might need another quirk flag. | |
170 | * | |
171 | * If the real hardware used four adjacent 24c02 chips and that | |
172 | * were misconfigured as one 24c08, that would be a similar effect: | |
173 | * one "eeprom" file not four, but larger reads would fail when | |
174 | * they crossed certain pages. | |
175 | */ | |
176 | ||
177 | /* | |
178 | * Slave address and byte offset derive from the offset. Always | |
179 | * set the byte address; on a multi-master board, another master | |
180 | * may have changed the chip's "current" address pointer. | |
181 | */ | |
182 | client = at24_translate_offset(at24, &offset); | |
183 | ||
184 | if (count > io_limit) | |
185 | count = io_limit; | |
186 | ||
7aeb9664 JD |
187 | switch (at24->use_smbus) { |
188 | case I2C_SMBUS_I2C_BLOCK_DATA: | |
4d29196c | 189 | /* Smaller eeproms can work given some SMBus extension calls */ |
2b7a5056 WS |
190 | if (count > I2C_SMBUS_BLOCK_MAX) |
191 | count = I2C_SMBUS_BLOCK_MAX; | |
7aeb9664 JD |
192 | break; |
193 | case I2C_SMBUS_WORD_DATA: | |
194 | count = 2; | |
195 | break; | |
196 | case I2C_SMBUS_BYTE_DATA: | |
197 | count = 1; | |
198 | break; | |
199 | default: | |
4d29196c WS |
200 | /* |
201 | * When we have a better choice than SMBus calls, use a | |
202 | * combined I2C message. Write address; then read up to | |
203 | * io_limit data bytes. Note that read page rollover helps us | |
204 | * here (unlike writes). msgbuf is u8 and will cast to our | |
205 | * needs. | |
206 | */ | |
207 | i = 0; | |
208 | if (at24->chip.flags & AT24_FLAG_ADDR16) | |
209 | msgbuf[i++] = offset >> 8; | |
210 | msgbuf[i++] = offset; | |
211 | ||
212 | msg[0].addr = client->addr; | |
213 | msg[0].buf = msgbuf; | |
214 | msg[0].len = i; | |
215 | ||
216 | msg[1].addr = client->addr; | |
217 | msg[1].flags = I2C_M_RD; | |
218 | msg[1].buf = buf; | |
219 | msg[1].len = count; | |
2b7a5056 WS |
220 | } |
221 | ||
222 | /* | |
4d29196c WS |
223 | * Reads fail if the previous write didn't complete yet. We may |
224 | * loop a few times until this one succeeds, waiting at least | |
225 | * long enough for one entire page write to work. | |
2b7a5056 | 226 | */ |
4d29196c WS |
227 | timeout = jiffies + msecs_to_jiffies(write_timeout); |
228 | do { | |
229 | read_time = jiffies; | |
7aeb9664 JD |
230 | switch (at24->use_smbus) { |
231 | case I2C_SMBUS_I2C_BLOCK_DATA: | |
4d29196c WS |
232 | status = i2c_smbus_read_i2c_block_data(client, offset, |
233 | count, buf); | |
7aeb9664 JD |
234 | break; |
235 | case I2C_SMBUS_WORD_DATA: | |
236 | status = i2c_smbus_read_word_data(client, offset); | |
237 | if (status >= 0) { | |
238 | buf[0] = status & 0xff; | |
239 | buf[1] = status >> 8; | |
240 | status = count; | |
241 | } | |
242 | break; | |
243 | case I2C_SMBUS_BYTE_DATA: | |
244 | status = i2c_smbus_read_byte_data(client, offset); | |
245 | if (status >= 0) { | |
246 | buf[0] = status; | |
247 | status = count; | |
248 | } | |
249 | break; | |
250 | default: | |
4d29196c WS |
251 | status = i2c_transfer(client->adapter, msg, 2); |
252 | if (status == 2) | |
253 | status = count; | |
254 | } | |
255 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
256 | count, offset, status, jiffies); | |
2b7a5056 | 257 | |
4d29196c WS |
258 | if (status == count) |
259 | return count; | |
2b7a5056 | 260 | |
4d29196c WS |
261 | /* REVISIT: at HZ=100, this is sloooow */ |
262 | msleep(1); | |
263 | } while (time_before(read_time, timeout)); | |
2b7a5056 | 264 | |
4d29196c | 265 | return -ETIMEDOUT; |
2b7a5056 WS |
266 | } |
267 | ||
7274ec8b | 268 | static ssize_t at24_read(struct at24_data *at24, |
2b7a5056 WS |
269 | char *buf, loff_t off, size_t count) |
270 | { | |
2b7a5056 WS |
271 | ssize_t retval = 0; |
272 | ||
2b7a5056 WS |
273 | if (unlikely(!count)) |
274 | return count; | |
275 | ||
276 | /* | |
277 | * Read data from chip, protecting against concurrent updates | |
278 | * from this host, but not from other I2C masters. | |
279 | */ | |
280 | mutex_lock(&at24->lock); | |
281 | ||
282 | while (count) { | |
283 | ssize_t status; | |
284 | ||
285 | status = at24_eeprom_read(at24, buf, off, count); | |
286 | if (status <= 0) { | |
287 | if (retval == 0) | |
288 | retval = status; | |
289 | break; | |
290 | } | |
291 | buf += status; | |
292 | off += status; | |
293 | count -= status; | |
294 | retval += status; | |
295 | } | |
296 | ||
297 | mutex_unlock(&at24->lock); | |
298 | ||
299 | return retval; | |
300 | } | |
301 | ||
2c3c8bea CW |
302 | static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj, |
303 | struct bin_attribute *attr, | |
7274ec8b KH |
304 | char *buf, loff_t off, size_t count) |
305 | { | |
306 | struct at24_data *at24; | |
2b7a5056 | 307 | |
7274ec8b KH |
308 | at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); |
309 | return at24_read(at24, buf, off, count); | |
310 | } | |
2b7a5056 WS |
311 | |
312 | ||
313 | /* | |
314 | * Note that if the hardware write-protect pin is pulled high, the whole | |
315 | * chip is normally write protected. But there are plenty of product | |
316 | * variants here, including OTP fuses and partial chip protect. | |
317 | * | |
318 | * We only use page mode writes; the alternative is sloooow. This routine | |
319 | * writes at most one page. | |
320 | */ | |
280ca299 | 321 | static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, |
2b7a5056 WS |
322 | unsigned offset, size_t count) |
323 | { | |
324 | struct i2c_client *client; | |
325 | struct i2c_msg msg; | |
326 | ssize_t status; | |
327 | unsigned long timeout, write_time; | |
328 | unsigned next_page; | |
329 | ||
330 | /* Get corresponding I2C address and adjust offset */ | |
331 | client = at24_translate_offset(at24, &offset); | |
332 | ||
333 | /* write_max is at most a page */ | |
334 | if (count > at24->write_max) | |
335 | count = at24->write_max; | |
336 | ||
337 | /* Never roll over backwards, to the start of this page */ | |
338 | next_page = roundup(offset + 1, at24->chip.page_size); | |
339 | if (offset + count > next_page) | |
340 | count = next_page - offset; | |
341 | ||
342 | /* If we'll use I2C calls for I/O, set up the message */ | |
343 | if (!at24->use_smbus) { | |
344 | int i = 0; | |
345 | ||
346 | msg.addr = client->addr; | |
347 | msg.flags = 0; | |
348 | ||
349 | /* msg.buf is u8 and casts will mask the values */ | |
350 | msg.buf = at24->writebuf; | |
351 | if (at24->chip.flags & AT24_FLAG_ADDR16) | |
352 | msg.buf[i++] = offset >> 8; | |
353 | ||
354 | msg.buf[i++] = offset; | |
355 | memcpy(&msg.buf[i], buf, count); | |
356 | msg.len = i + count; | |
357 | } | |
358 | ||
359 | /* | |
360 | * Writes fail if the previous one didn't complete yet. We may | |
361 | * loop a few times until this one succeeds, waiting at least | |
362 | * long enough for one entire page write to work. | |
363 | */ | |
364 | timeout = jiffies + msecs_to_jiffies(write_timeout); | |
365 | do { | |
366 | write_time = jiffies; | |
367 | if (at24->use_smbus) { | |
368 | status = i2c_smbus_write_i2c_block_data(client, | |
369 | offset, count, buf); | |
370 | if (status == 0) | |
371 | status = count; | |
372 | } else { | |
373 | status = i2c_transfer(client->adapter, &msg, 1); | |
374 | if (status == 1) | |
375 | status = count; | |
376 | } | |
2ce5b34f | 377 | dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", |
2b7a5056 WS |
378 | count, offset, status, jiffies); |
379 | ||
380 | if (status == count) | |
381 | return count; | |
382 | ||
383 | /* REVISIT: at HZ=100, this is sloooow */ | |
384 | msleep(1); | |
385 | } while (time_before(write_time, timeout)); | |
386 | ||
387 | return -ETIMEDOUT; | |
388 | } | |
389 | ||
280ca299 GU |
390 | static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off, |
391 | size_t count) | |
2b7a5056 | 392 | { |
2b7a5056 WS |
393 | ssize_t retval = 0; |
394 | ||
2b7a5056 WS |
395 | if (unlikely(!count)) |
396 | return count; | |
397 | ||
398 | /* | |
399 | * Write data to chip, protecting against concurrent updates | |
400 | * from this host, but not from other I2C masters. | |
401 | */ | |
402 | mutex_lock(&at24->lock); | |
403 | ||
404 | while (count) { | |
405 | ssize_t status; | |
406 | ||
407 | status = at24_eeprom_write(at24, buf, off, count); | |
408 | if (status <= 0) { | |
409 | if (retval == 0) | |
410 | retval = status; | |
411 | break; | |
412 | } | |
413 | buf += status; | |
414 | off += status; | |
415 | count -= status; | |
416 | retval += status; | |
417 | } | |
418 | ||
419 | mutex_unlock(&at24->lock); | |
420 | ||
421 | return retval; | |
422 | } | |
423 | ||
2c3c8bea CW |
424 | static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, |
425 | struct bin_attribute *attr, | |
7274ec8b KH |
426 | char *buf, loff_t off, size_t count) |
427 | { | |
428 | struct at24_data *at24; | |
429 | ||
430 | at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); | |
431 | return at24_write(at24, buf, off, count); | |
432 | } | |
433 | ||
434 | /*-------------------------------------------------------------------------*/ | |
435 | ||
436 | /* | |
437 | * This lets other kernel code access the eeprom data. For example, it | |
438 | * might hold a board's Ethernet address, or board-specific calibration | |
439 | * data generated on the manufacturing floor. | |
440 | */ | |
441 | ||
442 | static ssize_t at24_macc_read(struct memory_accessor *macc, char *buf, | |
443 | off_t offset, size_t count) | |
444 | { | |
445 | struct at24_data *at24 = container_of(macc, struct at24_data, macc); | |
446 | ||
447 | return at24_read(at24, buf, offset, count); | |
448 | } | |
449 | ||
280ca299 | 450 | static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf, |
7274ec8b KH |
451 | off_t offset, size_t count) |
452 | { | |
453 | struct at24_data *at24 = container_of(macc, struct at24_data, macc); | |
454 | ||
455 | return at24_write(at24, buf, offset, count); | |
456 | } | |
457 | ||
2b7a5056 WS |
458 | /*-------------------------------------------------------------------------*/ |
459 | ||
460 | static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
461 | { | |
462 | struct at24_platform_data chip; | |
463 | bool writable; | |
7aeb9664 | 464 | int use_smbus = 0; |
2b7a5056 WS |
465 | struct at24_data *at24; |
466 | int err; | |
467 | unsigned i, num_addresses; | |
468 | kernel_ulong_t magic; | |
469 | ||
470 | if (client->dev.platform_data) { | |
471 | chip = *(struct at24_platform_data *)client->dev.platform_data; | |
472 | } else { | |
473 | if (!id->driver_data) { | |
474 | err = -ENODEV; | |
475 | goto err_out; | |
476 | } | |
477 | magic = id->driver_data; | |
478 | chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); | |
479 | magic >>= AT24_SIZE_BYTELEN; | |
480 | chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); | |
481 | /* | |
482 | * This is slow, but we can't know all eeproms, so we better | |
483 | * play safe. Specifying custom eeprom-types via platform_data | |
484 | * is recommended anyhow. | |
485 | */ | |
486 | chip.page_size = 1; | |
7274ec8b KH |
487 | |
488 | chip.setup = NULL; | |
489 | chip.context = NULL; | |
2b7a5056 WS |
490 | } |
491 | ||
492 | if (!is_power_of_2(chip.byte_len)) | |
493 | dev_warn(&client->dev, | |
494 | "byte_len looks suspicious (no power of 2)!\n"); | |
495 | if (!is_power_of_2(chip.page_size)) | |
496 | dev_warn(&client->dev, | |
497 | "page_size looks suspicious (no power of 2)!\n"); | |
498 | ||
499 | /* Use I2C operations unless we're stuck with SMBus extensions. */ | |
500 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
501 | if (chip.flags & AT24_FLAG_ADDR16) { | |
502 | err = -EPFNOSUPPORT; | |
503 | goto err_out; | |
504 | } | |
7aeb9664 | 505 | if (i2c_check_functionality(client->adapter, |
2b7a5056 | 506 | I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { |
7aeb9664 JD |
507 | use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; |
508 | } else if (i2c_check_functionality(client->adapter, | |
509 | I2C_FUNC_SMBUS_READ_WORD_DATA)) { | |
510 | use_smbus = I2C_SMBUS_WORD_DATA; | |
511 | } else if (i2c_check_functionality(client->adapter, | |
512 | I2C_FUNC_SMBUS_READ_BYTE_DATA)) { | |
513 | use_smbus = I2C_SMBUS_BYTE_DATA; | |
514 | } else { | |
2b7a5056 WS |
515 | err = -EPFNOSUPPORT; |
516 | goto err_out; | |
517 | } | |
2b7a5056 WS |
518 | } |
519 | ||
520 | if (chip.flags & AT24_FLAG_TAKE8ADDR) | |
521 | num_addresses = 8; | |
522 | else | |
523 | num_addresses = DIV_ROUND_UP(chip.byte_len, | |
524 | (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
525 | ||
526 | at24 = kzalloc(sizeof(struct at24_data) + | |
527 | num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); | |
528 | if (!at24) { | |
529 | err = -ENOMEM; | |
530 | goto err_out; | |
531 | } | |
532 | ||
533 | mutex_init(&at24->lock); | |
534 | at24->use_smbus = use_smbus; | |
535 | at24->chip = chip; | |
536 | at24->num_addresses = num_addresses; | |
537 | ||
538 | /* | |
539 | * Export the EEPROM bytes through sysfs, since that's convenient. | |
540 | * By default, only root should see the data (maybe passwords etc) | |
541 | */ | |
d07b56b3 | 542 | sysfs_bin_attr_init(&at24->bin); |
2b7a5056 WS |
543 | at24->bin.attr.name = "eeprom"; |
544 | at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; | |
2b7a5056 WS |
545 | at24->bin.read = at24_bin_read; |
546 | at24->bin.size = chip.byte_len; | |
547 | ||
7274ec8b KH |
548 | at24->macc.read = at24_macc_read; |
549 | ||
2b7a5056 WS |
550 | writable = !(chip.flags & AT24_FLAG_READONLY); |
551 | if (writable) { | |
552 | if (!use_smbus || i2c_check_functionality(client->adapter, | |
553 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { | |
554 | ||
555 | unsigned write_max = chip.page_size; | |
556 | ||
7274ec8b KH |
557 | at24->macc.write = at24_macc_write; |
558 | ||
2b7a5056 WS |
559 | at24->bin.write = at24_bin_write; |
560 | at24->bin.attr.mode |= S_IWUSR; | |
561 | ||
562 | if (write_max > io_limit) | |
563 | write_max = io_limit; | |
564 | if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) | |
565 | write_max = I2C_SMBUS_BLOCK_MAX; | |
566 | at24->write_max = write_max; | |
567 | ||
568 | /* buffer (data + address at the beginning) */ | |
569 | at24->writebuf = kmalloc(write_max + 2, GFP_KERNEL); | |
570 | if (!at24->writebuf) { | |
571 | err = -ENOMEM; | |
572 | goto err_struct; | |
573 | } | |
574 | } else { | |
575 | dev_warn(&client->dev, | |
576 | "cannot write due to controller restrictions."); | |
577 | } | |
578 | } | |
579 | ||
580 | at24->client[0] = client; | |
581 | ||
582 | /* use dummy devices for multiple-address chips */ | |
583 | for (i = 1; i < num_addresses; i++) { | |
584 | at24->client[i] = i2c_new_dummy(client->adapter, | |
585 | client->addr + i); | |
586 | if (!at24->client[i]) { | |
587 | dev_err(&client->dev, "address 0x%02x unavailable\n", | |
588 | client->addr + i); | |
589 | err = -EADDRINUSE; | |
590 | goto err_clients; | |
591 | } | |
592 | } | |
593 | ||
594 | err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin); | |
595 | if (err) | |
596 | goto err_clients; | |
597 | ||
598 | i2c_set_clientdata(client, at24); | |
599 | ||
2ce5b34f | 600 | dev_info(&client->dev, "%zu byte %s EEPROM %s\n", |
2b7a5056 WS |
601 | at24->bin.size, client->name, |
602 | writable ? "(writable)" : "(read-only)"); | |
7aeb9664 JD |
603 | if (use_smbus == I2C_SMBUS_WORD_DATA || |
604 | use_smbus == I2C_SMBUS_BYTE_DATA) { | |
605 | dev_notice(&client->dev, "Falling back to %s reads, " | |
606 | "performance will suffer\n", use_smbus == | |
607 | I2C_SMBUS_WORD_DATA ? "word" : "byte"); | |
608 | } | |
2b7a5056 | 609 | dev_dbg(&client->dev, |
7aeb9664 | 610 | "page_size %d, num_addresses %d, write_max %d, use_smbus %d\n", |
2b7a5056 | 611 | chip.page_size, num_addresses, |
7aeb9664 | 612 | at24->write_max, use_smbus); |
2b7a5056 | 613 | |
7274ec8b KH |
614 | /* export data to kernel code */ |
615 | if (chip.setup) | |
616 | chip.setup(&at24->macc, chip.context); | |
617 | ||
2b7a5056 WS |
618 | return 0; |
619 | ||
620 | err_clients: | |
621 | for (i = 1; i < num_addresses; i++) | |
622 | if (at24->client[i]) | |
623 | i2c_unregister_device(at24->client[i]); | |
624 | ||
625 | kfree(at24->writebuf); | |
626 | err_struct: | |
627 | kfree(at24); | |
628 | err_out: | |
629 | dev_dbg(&client->dev, "probe error %d\n", err); | |
630 | return err; | |
631 | } | |
632 | ||
633 | static int __devexit at24_remove(struct i2c_client *client) | |
634 | { | |
635 | struct at24_data *at24; | |
636 | int i; | |
637 | ||
638 | at24 = i2c_get_clientdata(client); | |
639 | sysfs_remove_bin_file(&client->dev.kobj, &at24->bin); | |
640 | ||
641 | for (i = 1; i < at24->num_addresses; i++) | |
642 | i2c_unregister_device(at24->client[i]); | |
643 | ||
644 | kfree(at24->writebuf); | |
645 | kfree(at24); | |
2b7a5056 WS |
646 | return 0; |
647 | } | |
648 | ||
649 | /*-------------------------------------------------------------------------*/ | |
650 | ||
651 | static struct i2c_driver at24_driver = { | |
652 | .driver = { | |
653 | .name = "at24", | |
654 | .owner = THIS_MODULE, | |
655 | }, | |
656 | .probe = at24_probe, | |
657 | .remove = __devexit_p(at24_remove), | |
658 | .id_table = at24_ids, | |
659 | }; | |
660 | ||
661 | static int __init at24_init(void) | |
662 | { | |
663 | io_limit = rounddown_pow_of_two(io_limit); | |
664 | return i2c_add_driver(&at24_driver); | |
665 | } | |
666 | module_init(at24_init); | |
667 | ||
668 | static void __exit at24_exit(void) | |
669 | { | |
670 | i2c_del_driver(&at24_driver); | |
671 | } | |
672 | module_exit(at24_exit); | |
673 | ||
674 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
675 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
676 | MODULE_LICENSE("GPL"); |