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drm/i915: don't access FW_BLC_SELF on 965G
[net-next-2.6.git] / drivers / gpu / drm / i915 / i915_debugfs.c
CommitLineData
2017263e
BG		 1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
5a0e3ad6 31#include <linux/slab.h>
2017263e
BG		 32#include "drmP.h"
33#include "drm.h"
34#include "i915_drm.h"
35#include "i915_drv.h"
36
37#define DRM_I915_RING_DEBUG 1
38
39
40#if defined(CONFIG_DEBUG_FS)
41
433e12f7
BG		 42#define ACTIVE_LIST 1
43#define FLUSHING_LIST 2
44#define INACTIVE_LIST 3
2017263e 45
a6172a80
CW		 46static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
47{
48 if (obj_priv->user_pin_count > 0)
49 return "P";
50 else if (obj_priv->pin_count > 0)
51 return "p";
52 else
53 return " ";
54}
55
56static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
57{
58 switch (obj_priv->tiling_mode) {
59 default:
60 case I915_TILING_NONE: return " ";
61 case I915_TILING_X: return "X";
62 case I915_TILING_Y: return "Y";
63 }
64}
65
433e12f7 66static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG		 67{
68 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG		 69 uintptr_t list = (uintptr_t) node->info_ent->data;
70 struct list_head *head;
2017263e
BG		 71 struct drm_device *dev = node->minor->dev;
72 drm_i915_private_t *dev_priv = dev->dev_private;
73 struct drm_i915_gem_object *obj_priv;
5e118f41 74 spinlock_t *lock = NULL;
2017263e 75
433e12f7
BG		 76 switch (list) {
77 case ACTIVE_LIST:
78 seq_printf(m, "Active:\n");
5e118f41 79 lock = &dev_priv->mm.active_list_lock;
852835f3 80 head = &dev_priv->render_ring.active_list;
433e12f7
BG		 81 break;
82 case INACTIVE_LIST:
a17458fc 83 seq_printf(m, "Inactive:\n");
433e12f7
BG		 84 head = &dev_priv->mm.inactive_list;
85 break;
86 case FLUSHING_LIST:
87 seq_printf(m, "Flushing:\n");
88 head = &dev_priv->mm.flushing_list;
89 break;
90 default:
91 DRM_INFO("Ooops, unexpected list\n");
92 return 0;
2017263e 93 }
2017263e 94
a17458fc
BG		 95 if (lock)
96 spin_lock(lock);
433e12f7 97 list_for_each_entry(obj_priv, head, list)
2017263e 98 {
fcffb947 99 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
a8089e84 100 &obj_priv->base,
a6172a80 101 get_pin_flag(obj_priv),
a8089e84
DV		 102 obj_priv->base.size,
103 obj_priv->base.read_domains,
104 obj_priv->base.write_domain,
725ceaa0 105 obj_priv->last_rendering_seqno,
fcffb947
CW		 106 obj_priv->dirty ? " dirty" : "",
107 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
f4ceda89 108
a8089e84
DV		 109 if (obj_priv->base.name)
110 seq_printf(m, " (name: %d)", obj_priv->base.name);
f4ceda89 111 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
a01c75b3
BG		 112 seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
113 if (obj_priv->gtt_space != NULL)
114 seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset);
115
f4ceda89 116 seq_printf(m, "\n");
2017263e 117 }
5e118f41
CW		 118
119 if (lock)
120 spin_unlock(lock);
2017263e
BG		 121 return 0;
122}
123
124static int i915_gem_request_info(struct seq_file *m, void *data)
125{
126 struct drm_info_node *node = (struct drm_info_node *) m->private;
127 struct drm_device *dev = node->minor->dev;
128 drm_i915_private_t *dev_priv = dev->dev_private;
129 struct drm_i915_gem_request *gem_request;
130
131 seq_printf(m, "Request:\n");
852835f3
ZN		 132 list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
133 list) {
2017263e
BG		 134 seq_printf(m, " %d @ %d\n",
135 gem_request->seqno,
136 (int) (jiffies - gem_request->emitted_jiffies));
137 }
138 return 0;
139}
140
141static int i915_gem_seqno_info(struct seq_file *m, void *data)
142{
143 struct drm_info_node *node = (struct drm_info_node *) m->private;
144 struct drm_device *dev = node->minor->dev;
145 drm_i915_private_t *dev_priv = dev->dev_private;
146
e20f9c64 147 if (dev_priv->render_ring.status_page.page_addr != NULL) {
2017263e 148 seq_printf(m, "Current sequence: %d\n",
852835f3 149 i915_get_gem_seqno(dev, &dev_priv->render_ring));
2017263e
BG		 150 } else {
151 seq_printf(m, "Current sequence: hws uninitialized\n");
152 }
153 seq_printf(m, "Waiter sequence: %d\n",
154 dev_priv->mm.waiting_gem_seqno);
155 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
156 return 0;
157}
158
159
160static int i915_interrupt_info(struct seq_file *m, void *data)
161{
162 struct drm_info_node *node = (struct drm_info_node *) m->private;
163 struct drm_device *dev = node->minor->dev;
164 drm_i915_private_t *dev_priv = dev->dev_private;
165
bad720ff 166 if (!HAS_PCH_SPLIT(dev)) {
5f6a1695
ZW		 167 seq_printf(m, "Interrupt enable: %08x\n",
168 I915_READ(IER));
169 seq_printf(m, "Interrupt identity: %08x\n",
170 I915_READ(IIR));
171 seq_printf(m, "Interrupt mask: %08x\n",
172 I915_READ(IMR));
173 seq_printf(m, "Pipe A stat: %08x\n",
174 I915_READ(PIPEASTAT));
175 seq_printf(m, "Pipe B stat: %08x\n",
176 I915_READ(PIPEBSTAT));
177 } else {
178 seq_printf(m, "North Display Interrupt enable: %08x\n",
179 I915_READ(DEIER));
180 seq_printf(m, "North Display Interrupt identity: %08x\n",
181 I915_READ(DEIIR));
182 seq_printf(m, "North Display Interrupt mask: %08x\n",
183 I915_READ(DEIMR));
184 seq_printf(m, "South Display Interrupt enable: %08x\n",
185 I915_READ(SDEIER));
186 seq_printf(m, "South Display Interrupt identity: %08x\n",
187 I915_READ(SDEIIR));
188 seq_printf(m, "South Display Interrupt mask: %08x\n",
189 I915_READ(SDEIMR));
190 seq_printf(m, "Graphics Interrupt enable: %08x\n",
191 I915_READ(GTIER));
192 seq_printf(m, "Graphics Interrupt identity: %08x\n",
193 I915_READ(GTIIR));
194 seq_printf(m, "Graphics Interrupt mask: %08x\n",
195 I915_READ(GTIMR));
196 }
2017263e
BG		 197 seq_printf(m, "Interrupts received: %d\n",
198 atomic_read(&dev_priv->irq_received));
e20f9c64 199 if (dev_priv->render_ring.status_page.page_addr != NULL) {
2017263e 200 seq_printf(m, "Current sequence: %d\n",
852835f3 201 i915_get_gem_seqno(dev, &dev_priv->render_ring));
2017263e
BG		 202 } else {
203 seq_printf(m, "Current sequence: hws uninitialized\n");
204 }
205 seq_printf(m, "Waiter sequence: %d\n",
206 dev_priv->mm.waiting_gem_seqno);
207 seq_printf(m, "IRQ sequence: %d\n",
208 dev_priv->mm.irq_gem_seqno);
209 return 0;
210}
211
a6172a80
CW		 212static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
213{
214 struct drm_info_node *node = (struct drm_info_node *) m->private;
215 struct drm_device *dev = node->minor->dev;
216 drm_i915_private_t *dev_priv = dev->dev_private;
217 int i;
218
219 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
220 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
221 for (i = 0; i < dev_priv->num_fence_regs; i++) {
222 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
223
224 if (obj == NULL) {
225 seq_printf(m, "Fenced object[%2d] = unused\n", i);
226 } else {
227 struct drm_i915_gem_object *obj_priv;
228
23010e43 229 obj_priv = to_intel_bo(obj);
a6172a80 230 seq_printf(m, "Fenced object[%2d] = %p: %s "
0b4d569d 231 "%08x %08zx %08x %s %08x %08x %d",
a6172a80
CW		 232 i, obj, get_pin_flag(obj_priv),
233 obj_priv->gtt_offset,
234 obj->size, obj_priv->stride,
235 get_tiling_flag(obj_priv),
236 obj->read_domains, obj->write_domain,
237 obj_priv->last_rendering_seqno);
238 if (obj->name)
239 seq_printf(m, " (name: %d)", obj->name);
240 seq_printf(m, "\n");
241 }
242 }
243
244 return 0;
245}
246
2017263e
BG		 247static int i915_hws_info(struct seq_file *m, void *data)
248{
249 struct drm_info_node *node = (struct drm_info_node *) m->private;
250 struct drm_device *dev = node->minor->dev;
251 drm_i915_private_t *dev_priv = dev->dev_private;
252 int i;
253 volatile u32 *hws;
254
e20f9c64 255 hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
2017263e
BG		 256 if (hws == NULL)
257 return 0;
258
259 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
260 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
261 i * 4,
262 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
263 }
264 return 0;
265}
266
6911a9b8
BG		 267static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
268{
269 int page, i;
270 uint32_t *mem;
271
272 for (page = 0; page < page_count; page++) {
ba86bf8b 273 mem = kmap_atomic(pages[page], KM_USER0);
6911a9b8
BG		 274 for (i = 0; i < PAGE_SIZE; i += 4)
275 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
656cb793 276 kunmap_atomic(mem, KM_USER0);
6911a9b8
BG		 277 }
278}
279
280static int i915_batchbuffer_info(struct seq_file *m, void *data)
281{
282 struct drm_info_node *node = (struct drm_info_node *) m->private;
283 struct drm_device *dev = node->minor->dev;
284 drm_i915_private_t *dev_priv = dev->dev_private;
285 struct drm_gem_object *obj;
286 struct drm_i915_gem_object *obj_priv;
287 int ret;
288
289 spin_lock(&dev_priv->mm.active_list_lock);
290
852835f3
ZN		 291 list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list,
292 list) {
a8089e84 293 obj = &obj_priv->base;
6911a9b8 294 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
4bdadb97 295 ret = i915_gem_object_get_pages(obj, 0);
6911a9b8
BG		 296 if (ret) {
297 DRM_ERROR("Failed to get pages: %d\n", ret);
298 spin_unlock(&dev_priv->mm.active_list_lock);
299 return ret;
300 }
301
302 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
303 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
304
305 i915_gem_object_put_pages(obj);
306 }
307 }
308
309 spin_unlock(&dev_priv->mm.active_list_lock);
310
311 return 0;
312}
313
314static int i915_ringbuffer_data(struct seq_file *m, void *data)
315{
316 struct drm_info_node *node = (struct drm_info_node *) m->private;
317 struct drm_device *dev = node->minor->dev;
318 drm_i915_private_t *dev_priv = dev->dev_private;
319 u8 *virt;
320 uint32_t *ptr, off;
321
8187a2b7 322 if (!dev_priv->render_ring.gem_object) {
6911a9b8
BG		 323 seq_printf(m, "No ringbuffer setup\n");
324 return 0;
325 }
326
d3301d86 327 virt = dev_priv->render_ring.virtual_start;
6911a9b8 328
8187a2b7 329 for (off = 0; off < dev_priv->render_ring.size; off += 4) {
6911a9b8
BG		 330 ptr = (uint32_t *)(virt + off);
331 seq_printf(m, "%08x : %08x\n", off, *ptr);
332 }
333
334 return 0;
335}
336
337static int i915_ringbuffer_info(struct seq_file *m, void *data)
338{
339 struct drm_info_node *node = (struct drm_info_node *) m->private;
340 struct drm_device *dev = node->minor->dev;
341 drm_i915_private_t *dev_priv = dev->dev_private;
0ef82af7 342 unsigned int head, tail;
6911a9b8
BG		 343
344 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
345 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
6911a9b8
BG		 346
347 seq_printf(m, "RingHead : %08x\n", head);
348 seq_printf(m, "RingTail : %08x\n", tail);
8187a2b7 349 seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
76cff81a 350 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
6911a9b8
BG		 351
352 return 0;
353}
354
9df30794
CW		 355static const char *pin_flag(int pinned)
356{
357 if (pinned > 0)
358 return " P";
359 else if (pinned < 0)
360 return " p";
361 else
362 return "";
363}
364
365static const char *tiling_flag(int tiling)
366{
367 switch (tiling) {
368 default:
369 case I915_TILING_NONE: return "";
370 case I915_TILING_X: return " X";
371 case I915_TILING_Y: return " Y";
372 }
373}
374
375static const char *dirty_flag(int dirty)
376{
377 return dirty ? " dirty" : "";
378}
379
380static const char *purgeable_flag(int purgeable)
381{
382 return purgeable ? " purgeable" : "";
383}
384
63eeaf38
JB		 385static int i915_error_state(struct seq_file *m, void *unused)
386{
387 struct drm_info_node *node = (struct drm_info_node *) m->private;
388 struct drm_device *dev = node->minor->dev;
389 drm_i915_private_t *dev_priv = dev->dev_private;
390 struct drm_i915_error_state *error;
391 unsigned long flags;
9df30794 392 int i, page, offset, elt;
63eeaf38
JB		 393
394 spin_lock_irqsave(&dev_priv->error_lock, flags);
395 if (!dev_priv->first_error) {
396 seq_printf(m, "no error state collected\n");
397 goto out;
398 }
399
400 error = dev_priv->first_error;
401
8a905236
JB		 402 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
403 error->time.tv_usec);
9df30794 404 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
63eeaf38
JB		 405 seq_printf(m, "EIR: 0x%08x\n", error->eir);
406 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
407 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
408 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
409 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
410 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
411 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
412 if (IS_I965G(dev)) {
413 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
414 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
415 }
9df30794
CW		 416 seq_printf(m, "seqno: 0x%08x\n", error->seqno);
417
418 if (error->active_bo_count) {
419 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
420
421 for (i = 0; i < error->active_bo_count; i++) {
422 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
423 error->active_bo[i].gtt_offset,
424 error->active_bo[i].size,
425 error->active_bo[i].read_domains,
426 error->active_bo[i].write_domain,
427 error->active_bo[i].seqno,
428 pin_flag(error->active_bo[i].pinned),
429 tiling_flag(error->active_bo[i].tiling),
430 dirty_flag(error->active_bo[i].dirty),
431 purgeable_flag(error->active_bo[i].purgeable));
432
433 if (error->active_bo[i].name)
434 seq_printf(m, " (name: %d)", error->active_bo[i].name);
435 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
436 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
437
438 seq_printf(m, "\n");
439 }
440 }
441
442 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
443 if (error->batchbuffer[i]) {
444 struct drm_i915_error_object *obj = error->batchbuffer[i];
445
446 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
447 offset = 0;
448 for (page = 0; page < obj->page_count; page++) {
449 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
450 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
451 offset += 4;
452 }
453 }
454 }
455 }
456
457 if (error->ringbuffer) {
458 struct drm_i915_error_object *obj = error->ringbuffer;
459
460 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
461 offset = 0;
462 for (page = 0; page < obj->page_count; page++) {
463 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
464 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
465 offset += 4;
466 }
467 }
468 }
63eeaf38
JB		 469
470out:
471 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
472
473 return 0;
474}
6911a9b8 475
f97108d1
JB		 476static int i915_rstdby_delays(struct seq_file *m, void *unused)
477{
478 struct drm_info_node *node = (struct drm_info_node *) m->private;
479 struct drm_device *dev = node->minor->dev;
480 drm_i915_private_t *dev_priv = dev->dev_private;
481 u16 crstanddelay = I915_READ16(CRSTANDVID);
482
483 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
484
485 return 0;
486}
487
488static int i915_cur_delayinfo(struct seq_file *m, void *unused)
489{
490 struct drm_info_node *node = (struct drm_info_node *) m->private;
491 struct drm_device *dev = node->minor->dev;
492 drm_i915_private_t *dev_priv = dev->dev_private;
493 u16 rgvswctl = I915_READ16(MEMSWCTL);
7648fa99 494 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
f97108d1 495
7648fa99
JB		 496 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
497 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
498 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
499 MEMSTAT_VID_SHIFT);
500 seq_printf(m, "Current P-state: %d\n",
501 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
f97108d1
JB		 502
503 return 0;
504}
505
506static int i915_delayfreq_table(struct seq_file *m, void *unused)
507{
508 struct drm_info_node *node = (struct drm_info_node *) m->private;
509 struct drm_device *dev = node->minor->dev;
510 drm_i915_private_t *dev_priv = dev->dev_private;
511 u32 delayfreq;
512 int i;
513
514 for (i = 0; i < 16; i++) {
515 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
7648fa99
JB		 516 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
517 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
f97108d1
JB		 518 }
519
520 return 0;
521}
522
523static inline int MAP_TO_MV(int map)
524{
525 return 1250 - (map * 25);
526}
527
528static int i915_inttoext_table(struct seq_file *m, void *unused)
529{
530 struct drm_info_node *node = (struct drm_info_node *) m->private;
531 struct drm_device *dev = node->minor->dev;
532 drm_i915_private_t *dev_priv = dev->dev_private;
533 u32 inttoext;
534 int i;
535
536 for (i = 1; i <= 32; i++) {
537 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
538 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
539 }
540
541 return 0;
542}
543
544static int i915_drpc_info(struct seq_file *m, void *unused)
545{
546 struct drm_info_node *node = (struct drm_info_node *) m->private;
547 struct drm_device *dev = node->minor->dev;
548 drm_i915_private_t *dev_priv = dev->dev_private;
549 u32 rgvmodectl = I915_READ(MEMMODECTL);
7648fa99
JB		 550 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
551 u16 crstandvid = I915_READ16(CRSTANDVID);
f97108d1
JB		 552
553 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
554 "yes" : "no");
555 seq_printf(m, "Boost freq: %d\n",
556 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
557 MEMMODE_BOOST_FREQ_SHIFT);
558 seq_printf(m, "HW control enabled: %s\n",
559 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
560 seq_printf(m, "SW control enabled: %s\n",
561 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
562 seq_printf(m, "Gated voltage change: %s\n",
563 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
564 seq_printf(m, "Starting frequency: P%d\n",
565 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
7648fa99 566 seq_printf(m, "Max P-state: P%d\n",
f97108d1 567 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
7648fa99
JB		 568 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
569 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
570 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
571 seq_printf(m, "Render standby enabled: %s\n",
572 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
f97108d1
JB		 573
574 return 0;
575}
576
b5e50c3f
JB		 577static int i915_fbc_status(struct seq_file *m, void *unused)
578{
579 struct drm_info_node *node = (struct drm_info_node *) m->private;
580 struct drm_device *dev = node->minor->dev;
b5e50c3f 581 drm_i915_private_t *dev_priv = dev->dev_private;
b5e50c3f 582
ee5382ae 583 if (!I915_HAS_FBC(dev)) {
b5e50c3f
JB		 584 seq_printf(m, "FBC unsupported on this chipset\n");
585 return 0;
586 }
587
ee5382ae 588 if (intel_fbc_enabled(dev)) {
b5e50c3f
JB		 589 seq_printf(m, "FBC enabled\n");
590 } else {
591 seq_printf(m, "FBC disabled: ");
592 switch (dev_priv->no_fbc_reason) {
593 case FBC_STOLEN_TOO_SMALL:
594 seq_printf(m, "not enough stolen memory");
595 break;
596 case FBC_UNSUPPORTED_MODE:
597 seq_printf(m, "mode not supported");
598 break;
599 case FBC_MODE_TOO_LARGE:
600 seq_printf(m, "mode too large");
601 break;
602 case FBC_BAD_PLANE:
603 seq_printf(m, "FBC unsupported on plane");
604 break;
605 case FBC_NOT_TILED:
606 seq_printf(m, "scanout buffer not tiled");
607 break;
608 default:
609 seq_printf(m, "unknown reason");
610 }
611 seq_printf(m, "\n");
612 }
613 return 0;
614}
615
4a9bef37
JB		 616static int i915_sr_status(struct seq_file *m, void *unused)
617{
618 struct drm_info_node *node = (struct drm_info_node *) m->private;
619 struct drm_device *dev = node->minor->dev;
620 drm_i915_private_t *dev_priv = dev->dev_private;
621 bool sr_enabled = false;
622
adcdbc66 623 if (IS_I965GM(dev) || IS_I945G(dev) || IS_I945GM(dev))
4a9bef37
JB		 624 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
625 else if (IS_I915GM(dev))
626 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
627 else if (IS_PINEVIEW(dev))
628 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
629
630 seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :
631 "disabled");
632
633 return 0;
634}
635
7648fa99
JB		 636static int i915_emon_status(struct seq_file *m, void *unused)
637{
638 struct drm_info_node *node = (struct drm_info_node *) m->private;
639 struct drm_device *dev = node->minor->dev;
640 drm_i915_private_t *dev_priv = dev->dev_private;
641 unsigned long temp, chipset, gfx;
642
643 temp = i915_mch_val(dev_priv);
644 chipset = i915_chipset_val(dev_priv);
645 gfx = i915_gfx_val(dev_priv);
646
647 seq_printf(m, "GMCH temp: %ld\n", temp);
648 seq_printf(m, "Chipset power: %ld\n", chipset);
649 seq_printf(m, "GFX power: %ld\n", gfx);
650 seq_printf(m, "Total power: %ld\n", chipset + gfx);
651
652 return 0;
653}
654
655static int i915_gfxec(struct seq_file *m, void *unused)
656{
657 struct drm_info_node *node = (struct drm_info_node *) m->private;
658 struct drm_device *dev = node->minor->dev;
659 drm_i915_private_t *dev_priv = dev->dev_private;
660
661 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
662
663 return 0;
664}
665
f3cd474b
CW		 666static int
667i915_wedged_open(struct inode *inode,
668 struct file *filp)
669{
670 filp->private_data = inode->i_private;
671 return 0;
672}
673
674static ssize_t
675i915_wedged_read(struct file *filp,
676 char __user *ubuf,
677 size_t max,
678 loff_t *ppos)
679{
680 struct drm_device *dev = filp->private_data;
681 drm_i915_private_t *dev_priv = dev->dev_private;
682 char buf[80];
683 int len;
684
685 len = snprintf(buf, sizeof (buf),
686 "wedged : %d\n",
687 atomic_read(&dev_priv->mm.wedged));
688
689 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
690}
691
692static ssize_t
693i915_wedged_write(struct file *filp,
694 const char __user *ubuf,
695 size_t cnt,
696 loff_t *ppos)
697{
698 struct drm_device *dev = filp->private_data;
699 drm_i915_private_t *dev_priv = dev->dev_private;
700 char buf[20];
701 int val = 1;
702
703 if (cnt > 0) {
704 if (cnt > sizeof (buf) - 1)
705 return -EINVAL;
706
707 if (copy_from_user(buf, ubuf, cnt))
708 return -EFAULT;
709 buf[cnt] = 0;
710
711 val = simple_strtoul(buf, NULL, 0);
712 }
713
714 DRM_INFO("Manually setting wedged to %d\n", val);
715
716 atomic_set(&dev_priv->mm.wedged, val);
717 if (val) {
718 DRM_WAKEUP(&dev_priv->irq_queue);
719 queue_work(dev_priv->wq, &dev_priv->error_work);
720 }
721
722 return cnt;
723}
724
725static const struct file_operations i915_wedged_fops = {
726 .owner = THIS_MODULE,
727 .open = i915_wedged_open,
728 .read = i915_wedged_read,
729 .write = i915_wedged_write,
730};
731
732/* As the drm_debugfs_init() routines are called before dev->dev_private is
733 * allocated we need to hook into the minor for release. */
734static int
735drm_add_fake_info_node(struct drm_minor *minor,
736 struct dentry *ent,
737 const void *key)
738{
739 struct drm_info_node *node;
740
741 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
742 if (node == NULL) {
743 debugfs_remove(ent);
744 return -ENOMEM;
745 }
746
747 node->minor = minor;
748 node->dent = ent;
749 node->info_ent = (void *) key;
750 list_add(&node->list, &minor->debugfs_nodes.list);
751
752 return 0;
753}
754
755static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
756{
757 struct drm_device *dev = minor->dev;
758 struct dentry *ent;
759
760 ent = debugfs_create_file("i915_wedged",
761 S_IRUGO | S_IWUSR,
762 root, dev,
763 &i915_wedged_fops);
764 if (IS_ERR(ent))
765 return PTR_ERR(ent);
766
767 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
768}
9e3a6d15 769
27c202ad 770static struct drm_info_list i915_debugfs_list[] = {
433e12f7
BG		 771 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
772 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
773 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2017263e
BG		 774 {"i915_gem_request", i915_gem_request_info, 0},
775 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 776 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e
BG		 777 {"i915_gem_interrupt", i915_interrupt_info, 0},
778 {"i915_gem_hws", i915_hws_info, 0},
6911a9b8
BG		 779 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
780 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
781 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 782 {"i915_error_state", i915_error_state, 0},
f97108d1
JB		 783 {"i915_rstdby_delays", i915_rstdby_delays, 0},
784 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
785 {"i915_delayfreq_table", i915_delayfreq_table, 0},
786 {"i915_inttoext_table", i915_inttoext_table, 0},
787 {"i915_drpc_info", i915_drpc_info, 0},
7648fa99
JB		 788 {"i915_emon_status", i915_emon_status, 0},
789 {"i915_gfxec", i915_gfxec, 0},
b5e50c3f 790 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 791 {"i915_sr_status", i915_sr_status, 0},
2017263e 792};
27c202ad 793#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 794
27c202ad 795int i915_debugfs_init(struct drm_minor *minor)
2017263e 796{
f3cd474b
CW		 797 int ret;
798
799 ret = i915_wedged_create(minor->debugfs_root, minor);
800 if (ret)
801 return ret;
802
27c202ad
BG		 803 return drm_debugfs_create_files(i915_debugfs_list,
804 I915_DEBUGFS_ENTRIES,
2017263e
BG		 805 minor->debugfs_root, minor);
806}
807
27c202ad 808void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 809{
27c202ad
BG		 810 drm_debugfs_remove_files(i915_debugfs_list,
811 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH		 812 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
813 1, minor);
2017263e
BG		 814}
815
816#endif /* CONFIG_DEBUG_FS */
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