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drm/i915: introduce intel_ring_buffer structure (V2)
[net-next-2.6.git] / drivers / gpu / drm / i915 / i915_debugfs.c
CommitLineData
2017263e
BG		 1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
5a0e3ad6 31#include <linux/slab.h>
2017263e
BG		 32#include "drmP.h"
33#include "drm.h"
34#include "i915_drm.h"
35#include "i915_drv.h"
36
37#define DRM_I915_RING_DEBUG 1
38
39
40#if defined(CONFIG_DEBUG_FS)
41
433e12f7
BG		 42#define ACTIVE_LIST 1
43#define FLUSHING_LIST 2
44#define INACTIVE_LIST 3
2017263e 45
a6172a80
CW		 46static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
47{
48 if (obj_priv->user_pin_count > 0)
49 return "P";
50 else if (obj_priv->pin_count > 0)
51 return "p";
52 else
53 return " ";
54}
55
56static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
57{
58 switch (obj_priv->tiling_mode) {
59 default:
60 case I915_TILING_NONE: return " ";
61 case I915_TILING_X: return "X";
62 case I915_TILING_Y: return "Y";
63 }
64}
65
433e12f7 66static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG		 67{
68 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG		 69 uintptr_t list = (uintptr_t) node->info_ent->data;
70 struct list_head *head;
2017263e
BG		 71 struct drm_device *dev = node->minor->dev;
72 drm_i915_private_t *dev_priv = dev->dev_private;
73 struct drm_i915_gem_object *obj_priv;
5e118f41 74 spinlock_t *lock = NULL;
2017263e 75
433e12f7
BG		 76 switch (list) {
77 case ACTIVE_LIST:
78 seq_printf(m, "Active:\n");
5e118f41 79 lock = &dev_priv->mm.active_list_lock;
433e12f7
BG		 80 head = &dev_priv->mm.active_list;
81 break;
82 case INACTIVE_LIST:
a17458fc 83 seq_printf(m, "Inactive:\n");
433e12f7
BG		 84 head = &dev_priv->mm.inactive_list;
85 break;
86 case FLUSHING_LIST:
87 seq_printf(m, "Flushing:\n");
88 head = &dev_priv->mm.flushing_list;
89 break;
90 default:
91 DRM_INFO("Ooops, unexpected list\n");
92 return 0;
2017263e 93 }
2017263e 94
a17458fc
BG		 95 if (lock)
96 spin_lock(lock);
433e12f7 97 list_for_each_entry(obj_priv, head, list)
2017263e 98 {
fcffb947 99 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
a8089e84 100 &obj_priv->base,
a6172a80 101 get_pin_flag(obj_priv),
a8089e84
DV		 102 obj_priv->base.size,
103 obj_priv->base.read_domains,
104 obj_priv->base.write_domain,
725ceaa0 105 obj_priv->last_rendering_seqno,
fcffb947
CW		 106 obj_priv->dirty ? " dirty" : "",
107 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
f4ceda89 108
a8089e84
DV		 109 if (obj_priv->base.name)
110 seq_printf(m, " (name: %d)", obj_priv->base.name);
f4ceda89 111 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
a01c75b3
BG		 112 seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
113 if (obj_priv->gtt_space != NULL)
114 seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset);
115
f4ceda89 116 seq_printf(m, "\n");
2017263e 117 }
5e118f41
CW		 118
119 if (lock)
120 spin_unlock(lock);
2017263e
BG		 121 return 0;
122}
123
124static int i915_gem_request_info(struct seq_file *m, void *data)
125{
126 struct drm_info_node *node = (struct drm_info_node *) m->private;
127 struct drm_device *dev = node->minor->dev;
128 drm_i915_private_t *dev_priv = dev->dev_private;
129 struct drm_i915_gem_request *gem_request;
130
131 seq_printf(m, "Request:\n");
132 list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) {
133 seq_printf(m, " %d @ %d\n",
134 gem_request->seqno,
135 (int) (jiffies - gem_request->emitted_jiffies));
136 }
137 return 0;
138}
139
140static int i915_gem_seqno_info(struct seq_file *m, void *data)
141{
142 struct drm_info_node *node = (struct drm_info_node *) m->private;
143 struct drm_device *dev = node->minor->dev;
144 drm_i915_private_t *dev_priv = dev->dev_private;
145
146 if (dev_priv->hw_status_page != NULL) {
147 seq_printf(m, "Current sequence: %d\n",
148 i915_get_gem_seqno(dev));
149 } else {
150 seq_printf(m, "Current sequence: hws uninitialized\n");
151 }
152 seq_printf(m, "Waiter sequence: %d\n",
153 dev_priv->mm.waiting_gem_seqno);
154 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
155 return 0;
156}
157
158
159static int i915_interrupt_info(struct seq_file *m, void *data)
160{
161 struct drm_info_node *node = (struct drm_info_node *) m->private;
162 struct drm_device *dev = node->minor->dev;
163 drm_i915_private_t *dev_priv = dev->dev_private;
164
bad720ff 165 if (!HAS_PCH_SPLIT(dev)) {
5f6a1695
ZW		 166 seq_printf(m, "Interrupt enable: %08x\n",
167 I915_READ(IER));
168 seq_printf(m, "Interrupt identity: %08x\n",
169 I915_READ(IIR));
170 seq_printf(m, "Interrupt mask: %08x\n",
171 I915_READ(IMR));
172 seq_printf(m, "Pipe A stat: %08x\n",
173 I915_READ(PIPEASTAT));
174 seq_printf(m, "Pipe B stat: %08x\n",
175 I915_READ(PIPEBSTAT));
176 } else {
177 seq_printf(m, "North Display Interrupt enable: %08x\n",
178 I915_READ(DEIER));
179 seq_printf(m, "North Display Interrupt identity: %08x\n",
180 I915_READ(DEIIR));
181 seq_printf(m, "North Display Interrupt mask: %08x\n",
182 I915_READ(DEIMR));
183 seq_printf(m, "South Display Interrupt enable: %08x\n",
184 I915_READ(SDEIER));
185 seq_printf(m, "South Display Interrupt identity: %08x\n",
186 I915_READ(SDEIIR));
187 seq_printf(m, "South Display Interrupt mask: %08x\n",
188 I915_READ(SDEIMR));
189 seq_printf(m, "Graphics Interrupt enable: %08x\n",
190 I915_READ(GTIER));
191 seq_printf(m, "Graphics Interrupt identity: %08x\n",
192 I915_READ(GTIIR));
193 seq_printf(m, "Graphics Interrupt mask: %08x\n",
194 I915_READ(GTIMR));
195 }
2017263e
BG		 196 seq_printf(m, "Interrupts received: %d\n",
197 atomic_read(&dev_priv->irq_received));
198 if (dev_priv->hw_status_page != NULL) {
199 seq_printf(m, "Current sequence: %d\n",
200 i915_get_gem_seqno(dev));
201 } else {
202 seq_printf(m, "Current sequence: hws uninitialized\n");
203 }
204 seq_printf(m, "Waiter sequence: %d\n",
205 dev_priv->mm.waiting_gem_seqno);
206 seq_printf(m, "IRQ sequence: %d\n",
207 dev_priv->mm.irq_gem_seqno);
208 return 0;
209}
210
a6172a80
CW		 211static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
212{
213 struct drm_info_node *node = (struct drm_info_node *) m->private;
214 struct drm_device *dev = node->minor->dev;
215 drm_i915_private_t *dev_priv = dev->dev_private;
216 int i;
217
218 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
219 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
220 for (i = 0; i < dev_priv->num_fence_regs; i++) {
221 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
222
223 if (obj == NULL) {
224 seq_printf(m, "Fenced object[%2d] = unused\n", i);
225 } else {
226 struct drm_i915_gem_object *obj_priv;
227
23010e43 228 obj_priv = to_intel_bo(obj);
a6172a80 229 seq_printf(m, "Fenced object[%2d] = %p: %s "
0b4d569d 230 "%08x %08zx %08x %s %08x %08x %d",
a6172a80
CW		 231 i, obj, get_pin_flag(obj_priv),
232 obj_priv->gtt_offset,
233 obj->size, obj_priv->stride,
234 get_tiling_flag(obj_priv),
235 obj->read_domains, obj->write_domain,
236 obj_priv->last_rendering_seqno);
237 if (obj->name)
238 seq_printf(m, " (name: %d)", obj->name);
239 seq_printf(m, "\n");
240 }
241 }
242
243 return 0;
244}
245
2017263e
BG		 246static int i915_hws_info(struct seq_file *m, void *data)
247{
248 struct drm_info_node *node = (struct drm_info_node *) m->private;
249 struct drm_device *dev = node->minor->dev;
250 drm_i915_private_t *dev_priv = dev->dev_private;
251 int i;
252 volatile u32 *hws;
253
254 hws = (volatile u32 *)dev_priv->hw_status_page;
255 if (hws == NULL)
256 return 0;
257
258 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
259 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
260 i * 4,
261 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
262 }
263 return 0;
264}
265
6911a9b8
BG		 266static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
267{
268 int page, i;
269 uint32_t *mem;
270
271 for (page = 0; page < page_count; page++) {
ba86bf8b 272 mem = kmap_atomic(pages[page], KM_USER0);
6911a9b8
BG		 273 for (i = 0; i < PAGE_SIZE; i += 4)
274 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
656cb793 275 kunmap_atomic(mem, KM_USER0);
6911a9b8
BG		 276 }
277}
278
279static int i915_batchbuffer_info(struct seq_file *m, void *data)
280{
281 struct drm_info_node *node = (struct drm_info_node *) m->private;
282 struct drm_device *dev = node->minor->dev;
283 drm_i915_private_t *dev_priv = dev->dev_private;
284 struct drm_gem_object *obj;
285 struct drm_i915_gem_object *obj_priv;
286 int ret;
287
288 spin_lock(&dev_priv->mm.active_list_lock);
289
290 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
a8089e84 291 obj = &obj_priv->base;
6911a9b8 292 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
4bdadb97 293 ret = i915_gem_object_get_pages(obj, 0);
6911a9b8
BG		 294 if (ret) {
295 DRM_ERROR("Failed to get pages: %d\n", ret);
296 spin_unlock(&dev_priv->mm.active_list_lock);
297 return ret;
298 }
299
300 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
301 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
302
303 i915_gem_object_put_pages(obj);
304 }
305 }
306
307 spin_unlock(&dev_priv->mm.active_list_lock);
308
309 return 0;
310}
311
312static int i915_ringbuffer_data(struct seq_file *m, void *data)
313{
314 struct drm_info_node *node = (struct drm_info_node *) m->private;
315 struct drm_device *dev = node->minor->dev;
316 drm_i915_private_t *dev_priv = dev->dev_private;
317 u8 *virt;
318 uint32_t *ptr, off;
319
8187a2b7 320 if (!dev_priv->render_ring.gem_object) {
6911a9b8
BG		 321 seq_printf(m, "No ringbuffer setup\n");
322 return 0;
323 }
324
d3301d86 325 virt = dev_priv->render_ring.virtual_start;
6911a9b8 326
8187a2b7 327 for (off = 0; off < dev_priv->render_ring.size; off += 4) {
6911a9b8
BG		 328 ptr = (uint32_t *)(virt + off);
329 seq_printf(m, "%08x : %08x\n", off, *ptr);
330 }
331
332 return 0;
333}
334
335static int i915_ringbuffer_info(struct seq_file *m, void *data)
336{
337 struct drm_info_node *node = (struct drm_info_node *) m->private;
338 struct drm_device *dev = node->minor->dev;
339 drm_i915_private_t *dev_priv = dev->dev_private;
0ef82af7 340 unsigned int head, tail;
6911a9b8
BG		 341
342 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
343 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
6911a9b8
BG		 344
345 seq_printf(m, "RingHead : %08x\n", head);
346 seq_printf(m, "RingTail : %08x\n", tail);
8187a2b7 347 seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
76cff81a 348 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
6911a9b8
BG		 349
350 return 0;
351}
352
9df30794
CW		 353static const char *pin_flag(int pinned)
354{
355 if (pinned > 0)
356 return " P";
357 else if (pinned < 0)
358 return " p";
359 else
360 return "";
361}
362
363static const char *tiling_flag(int tiling)
364{
365 switch (tiling) {
366 default:
367 case I915_TILING_NONE: return "";
368 case I915_TILING_X: return " X";
369 case I915_TILING_Y: return " Y";
370 }
371}
372
373static const char *dirty_flag(int dirty)
374{
375 return dirty ? " dirty" : "";
376}
377
378static const char *purgeable_flag(int purgeable)
379{
380 return purgeable ? " purgeable" : "";
381}
382
63eeaf38
JB		 383static int i915_error_state(struct seq_file *m, void *unused)
384{
385 struct drm_info_node *node = (struct drm_info_node *) m->private;
386 struct drm_device *dev = node->minor->dev;
387 drm_i915_private_t *dev_priv = dev->dev_private;
388 struct drm_i915_error_state *error;
389 unsigned long flags;
9df30794 390 int i, page, offset, elt;
63eeaf38
JB		 391
392 spin_lock_irqsave(&dev_priv->error_lock, flags);
393 if (!dev_priv->first_error) {
394 seq_printf(m, "no error state collected\n");
395 goto out;
396 }
397
398 error = dev_priv->first_error;
399
8a905236
JB		 400 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
401 error->time.tv_usec);
9df30794 402 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
63eeaf38
JB		 403 seq_printf(m, "EIR: 0x%08x\n", error->eir);
404 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
405 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
406 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
407 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
408 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
409 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
410 if (IS_I965G(dev)) {
411 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
412 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
413 }
9df30794
CW		 414 seq_printf(m, "seqno: 0x%08x\n", error->seqno);
415
416 if (error->active_bo_count) {
417 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
418
419 for (i = 0; i < error->active_bo_count; i++) {
420 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
421 error->active_bo[i].gtt_offset,
422 error->active_bo[i].size,
423 error->active_bo[i].read_domains,
424 error->active_bo[i].write_domain,
425 error->active_bo[i].seqno,
426 pin_flag(error->active_bo[i].pinned),
427 tiling_flag(error->active_bo[i].tiling),
428 dirty_flag(error->active_bo[i].dirty),
429 purgeable_flag(error->active_bo[i].purgeable));
430
431 if (error->active_bo[i].name)
432 seq_printf(m, " (name: %d)", error->active_bo[i].name);
433 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
434 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
435
436 seq_printf(m, "\n");
437 }
438 }
439
440 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
441 if (error->batchbuffer[i]) {
442 struct drm_i915_error_object *obj = error->batchbuffer[i];
443
444 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
445 offset = 0;
446 for (page = 0; page < obj->page_count; page++) {
447 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
448 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
449 offset += 4;
450 }
451 }
452 }
453 }
454
455 if (error->ringbuffer) {
456 struct drm_i915_error_object *obj = error->ringbuffer;
457
458 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
459 offset = 0;
460 for (page = 0; page < obj->page_count; page++) {
461 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
462 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
463 offset += 4;
464 }
465 }
466 }
63eeaf38
JB		 467
468out:
469 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
470
471 return 0;
472}
6911a9b8 473
f97108d1
JB		 474static int i915_rstdby_delays(struct seq_file *m, void *unused)
475{
476 struct drm_info_node *node = (struct drm_info_node *) m->private;
477 struct drm_device *dev = node->minor->dev;
478 drm_i915_private_t *dev_priv = dev->dev_private;
479 u16 crstanddelay = I915_READ16(CRSTANDVID);
480
481 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
482
483 return 0;
484}
485
486static int i915_cur_delayinfo(struct seq_file *m, void *unused)
487{
488 struct drm_info_node *node = (struct drm_info_node *) m->private;
489 struct drm_device *dev = node->minor->dev;
490 drm_i915_private_t *dev_priv = dev->dev_private;
491 u16 rgvswctl = I915_READ16(MEMSWCTL);
492
493 seq_printf(m, "Last command: 0x%01x\n", (rgvswctl >> 13) & 0x3);
494 seq_printf(m, "Command status: %d\n", (rgvswctl >> 12) & 1);
495 seq_printf(m, "P%d DELAY 0x%02x\n", (rgvswctl >> 8) & 0xf,
496 rgvswctl & 0x3f);
497
498 return 0;
499}
500
501static int i915_delayfreq_table(struct seq_file *m, void *unused)
502{
503 struct drm_info_node *node = (struct drm_info_node *) m->private;
504 struct drm_device *dev = node->minor->dev;
505 drm_i915_private_t *dev_priv = dev->dev_private;
506 u32 delayfreq;
507 int i;
508
509 for (i = 0; i < 16; i++) {
510 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
511 seq_printf(m, "P%02dVIDFREQ: 0x%08x\n", i, delayfreq);
512 }
513
514 return 0;
515}
516
517static inline int MAP_TO_MV(int map)
518{
519 return 1250 - (map * 25);
520}
521
522static int i915_inttoext_table(struct seq_file *m, void *unused)
523{
524 struct drm_info_node *node = (struct drm_info_node *) m->private;
525 struct drm_device *dev = node->minor->dev;
526 drm_i915_private_t *dev_priv = dev->dev_private;
527 u32 inttoext;
528 int i;
529
530 for (i = 1; i <= 32; i++) {
531 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
532 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
533 }
534
535 return 0;
536}
537
538static int i915_drpc_info(struct seq_file *m, void *unused)
539{
540 struct drm_info_node *node = (struct drm_info_node *) m->private;
541 struct drm_device *dev = node->minor->dev;
542 drm_i915_private_t *dev_priv = dev->dev_private;
543 u32 rgvmodectl = I915_READ(MEMMODECTL);
544
545 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
546 "yes" : "no");
547 seq_printf(m, "Boost freq: %d\n",
548 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
549 MEMMODE_BOOST_FREQ_SHIFT);
550 seq_printf(m, "HW control enabled: %s\n",
551 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
552 seq_printf(m, "SW control enabled: %s\n",
553 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
554 seq_printf(m, "Gated voltage change: %s\n",
555 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
556 seq_printf(m, "Starting frequency: P%d\n",
557 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
558 seq_printf(m, "Max frequency: P%d\n",
559 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
560 seq_printf(m, "Min frequency: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
561
562 return 0;
563}
564
b5e50c3f
JB		 565static int i915_fbc_status(struct seq_file *m, void *unused)
566{
567 struct drm_info_node *node = (struct drm_info_node *) m->private;
568 struct drm_device *dev = node->minor->dev;
b5e50c3f 569 drm_i915_private_t *dev_priv = dev->dev_private;
b5e50c3f 570
ee5382ae 571 if (!I915_HAS_FBC(dev)) {
b5e50c3f
JB		 572 seq_printf(m, "FBC unsupported on this chipset\n");
573 return 0;
574 }
575
ee5382ae 576 if (intel_fbc_enabled(dev)) {
b5e50c3f
JB		 577 seq_printf(m, "FBC enabled\n");
578 } else {
579 seq_printf(m, "FBC disabled: ");
580 switch (dev_priv->no_fbc_reason) {
581 case FBC_STOLEN_TOO_SMALL:
582 seq_printf(m, "not enough stolen memory");
583 break;
584 case FBC_UNSUPPORTED_MODE:
585 seq_printf(m, "mode not supported");
586 break;
587 case FBC_MODE_TOO_LARGE:
588 seq_printf(m, "mode too large");
589 break;
590 case FBC_BAD_PLANE:
591 seq_printf(m, "FBC unsupported on plane");
592 break;
593 case FBC_NOT_TILED:
594 seq_printf(m, "scanout buffer not tiled");
595 break;
596 default:
597 seq_printf(m, "unknown reason");
598 }
599 seq_printf(m, "\n");
600 }
601 return 0;
602}
603
4a9bef37
JB		 604static int i915_sr_status(struct seq_file *m, void *unused)
605{
606 struct drm_info_node *node = (struct drm_info_node *) m->private;
607 struct drm_device *dev = node->minor->dev;
608 drm_i915_private_t *dev_priv = dev->dev_private;
609 bool sr_enabled = false;
610
611 if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev))
612 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
613 else if (IS_I915GM(dev))
614 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
615 else if (IS_PINEVIEW(dev))
616 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
617
618 seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :
619 "disabled");
620
621 return 0;
622}
623
f3cd474b
CW		 624static int
625i915_wedged_open(struct inode *inode,
626 struct file *filp)
627{
628 filp->private_data = inode->i_private;
629 return 0;
630}
631
632static ssize_t
633i915_wedged_read(struct file *filp,
634 char __user *ubuf,
635 size_t max,
636 loff_t *ppos)
637{
638 struct drm_device *dev = filp->private_data;
639 drm_i915_private_t *dev_priv = dev->dev_private;
640 char buf[80];
641 int len;
642
643 len = snprintf(buf, sizeof (buf),
644 "wedged : %d\n",
645 atomic_read(&dev_priv->mm.wedged));
646
647 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
648}
649
650static ssize_t
651i915_wedged_write(struct file *filp,
652 const char __user *ubuf,
653 size_t cnt,
654 loff_t *ppos)
655{
656 struct drm_device *dev = filp->private_data;
657 drm_i915_private_t *dev_priv = dev->dev_private;
658 char buf[20];
659 int val = 1;
660
661 if (cnt > 0) {
662 if (cnt > sizeof (buf) - 1)
663 return -EINVAL;
664
665 if (copy_from_user(buf, ubuf, cnt))
666 return -EFAULT;
667 buf[cnt] = 0;
668
669 val = simple_strtoul(buf, NULL, 0);
670 }
671
672 DRM_INFO("Manually setting wedged to %d\n", val);
673
674 atomic_set(&dev_priv->mm.wedged, val);
675 if (val) {
676 DRM_WAKEUP(&dev_priv->irq_queue);
677 queue_work(dev_priv->wq, &dev_priv->error_work);
678 }
679
680 return cnt;
681}
682
683static const struct file_operations i915_wedged_fops = {
684 .owner = THIS_MODULE,
685 .open = i915_wedged_open,
686 .read = i915_wedged_read,
687 .write = i915_wedged_write,
688};
689
690/* As the drm_debugfs_init() routines are called before dev->dev_private is
691 * allocated we need to hook into the minor for release. */
692static int
693drm_add_fake_info_node(struct drm_minor *minor,
694 struct dentry *ent,
695 const void *key)
696{
697 struct drm_info_node *node;
698
699 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
700 if (node == NULL) {
701 debugfs_remove(ent);
702 return -ENOMEM;
703 }
704
705 node->minor = minor;
706 node->dent = ent;
707 node->info_ent = (void *) key;
708 list_add(&node->list, &minor->debugfs_nodes.list);
709
710 return 0;
711}
712
713static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
714{
715 struct drm_device *dev = minor->dev;
716 struct dentry *ent;
717
718 ent = debugfs_create_file("i915_wedged",
719 S_IRUGO | S_IWUSR,
720 root, dev,
721 &i915_wedged_fops);
722 if (IS_ERR(ent))
723 return PTR_ERR(ent);
724
725 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
726}
9e3a6d15 727
27c202ad 728static struct drm_info_list i915_debugfs_list[] = {
433e12f7
BG		 729 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
730 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
731 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2017263e
BG		 732 {"i915_gem_request", i915_gem_request_info, 0},
733 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 734 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e
BG		 735 {"i915_gem_interrupt", i915_interrupt_info, 0},
736 {"i915_gem_hws", i915_hws_info, 0},
6911a9b8
BG		 737 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
738 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
739 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 740 {"i915_error_state", i915_error_state, 0},
f97108d1
JB		 741 {"i915_rstdby_delays", i915_rstdby_delays, 0},
742 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
743 {"i915_delayfreq_table", i915_delayfreq_table, 0},
744 {"i915_inttoext_table", i915_inttoext_table, 0},
745 {"i915_drpc_info", i915_drpc_info, 0},
b5e50c3f 746 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 747 {"i915_sr_status", i915_sr_status, 0},
2017263e 748};
27c202ad 749#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 750
27c202ad 751int i915_debugfs_init(struct drm_minor *minor)
2017263e 752{
f3cd474b
CW		 753 int ret;
754
755 ret = i915_wedged_create(minor->debugfs_root, minor);
756 if (ret)
757 return ret;
758
27c202ad
BG		 759 return drm_debugfs_create_files(i915_debugfs_list,
760 I915_DEBUGFS_ENTRIES,
2017263e
BG		 761 minor->debugfs_root, minor);
762}
763
27c202ad 764void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 765{
27c202ad
BG		 766 drm_debugfs_remove_files(i915_debugfs_list,
767 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH		 768 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
769 1, minor);
2017263e
BG		 770}
771
772#endif /* CONFIG_DEBUG_FS */
Clone of davem's net-next-2.6 tree