[net-next-2.6.git] / drivers / gpu / drm / i810 / i810_drv.h

/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
 *
 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
 *	    Jeff Hartmann <jhartmann@valinux.com>
 *
 */

#ifndef _I810_DRV_H_
#define _I810_DRV_H_

/* General customization:
 */

#define DRIVER_AUTHOR		"VA Linux Systems Inc."

#define DRIVER_NAME		"i810"
#define DRIVER_DESC		"Intel i810"
#define DRIVER_DATE		"20030605"

/* Interface history
 *
 * 1.1   - XFree86 4.1
 * 1.2   - XvMC interfaces
 *       - XFree86 4.2
 * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
 *       - Remove requirement for interrupt (leave stubs again)
 * 1.3   - Add page flipping.
 * 1.4   - fix DRM interface
 */
#define DRIVER_MAJOR		1
#define DRIVER_MINOR		4
#define DRIVER_PATCHLEVEL	0

typedef struct drm_i810_buf_priv {
	u32 *in_use;
	int my_use_idx;
	int currently_mapped;
	void *virtual;
	void *kernel_virtual;
	drm_local_map_t map;
} drm_i810_buf_priv_t;

typedef struct _drm_i810_ring_buffer {
	int tail_mask;
	unsigned long Start;
	unsigned long End;
	unsigned long Size;
	u8 *virtual_start;
	int head;
	int tail;
	int space;
	drm_local_map_t map;
} drm_i810_ring_buffer_t;

typedef struct drm_i810_private {
	struct drm_local_map *sarea_map;
	struct drm_local_map *mmio_map;

	drm_i810_sarea_t *sarea_priv;
	drm_i810_ring_buffer_t ring;

	void *hw_status_page;
	unsigned long counter;

	dma_addr_t dma_status_page;

	struct drm_buf *mmap_buffer;

	u32 front_di1, back_di1, zi1;

	int back_offset;
	int depth_offset;
	int overlay_offset;
	int overlay_physical;
	int w, h;
	int pitch;
	int back_pitch;
	int depth_pitch;

	int do_boxes;
	int dma_used;

	int current_page;
	int page_flipping;

	wait_queue_head_t irq_queue;
	atomic_t irq_received;
	atomic_t irq_emitted;

	int front_offset;
} drm_i810_private_t;

				/* i810_dma.c */
extern int i810_driver_dma_quiescent(struct drm_device *dev);
extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
					       struct drm_file *file_priv);
extern int i810_driver_load(struct drm_device *, unsigned long flags);
extern void i810_driver_lastclose(struct drm_device *dev);
extern void i810_driver_preclose(struct drm_device *dev,
				 struct drm_file *file_priv);
extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
					       struct drm_file *file_priv);
extern int i810_driver_device_is_agp(struct drm_device *dev);

extern struct drm_ioctl_desc i810_ioctls[];
extern int i810_max_ioctl;

#define I810_BASE(reg)		((unsigned long) \
				dev_priv->mmio_map->handle)
#define I810_ADDR(reg)		(I810_BASE(reg) + reg)
#define I810_DEREF(reg)		(*(__volatile__ int *)I810_ADDR(reg))
#define I810_READ(reg)		I810_DEREF(reg)
#define I810_WRITE(reg, val)	do { I810_DEREF(reg) = val; } while (0)
#define I810_DEREF16(reg)	(*(__volatile__ u16 *)I810_ADDR(reg))
#define I810_READ16(reg)	I810_DEREF16(reg)
#define I810_WRITE16(reg, val)	do { I810_DEREF16(reg) = val; } while (0)

#define I810_VERBOSE 0
#define RING_LOCALS	unsigned int outring, ringmask; \
			volatile char *virt;

#define BEGIN_LP_RING(n) do {					\
	if (I810_VERBOSE)					\
		DRM_DEBUG("BEGIN_LP_RING(%d)\n", n);		\
	if (dev_priv->ring.space < n*4)				\
		i810_wait_ring(dev, n*4);			\
	dev_priv->ring.space -= n*4;				\
	outring = dev_priv->ring.tail;				\
	ringmask = dev_priv->ring.tail_mask;			\
	virt = dev_priv->ring.virtual_start;			\
} while (0)

#define ADVANCE_LP_RING() do {					\
	if (I810_VERBOSE)					\
		DRM_DEBUG("ADVANCE_LP_RING\n");			\
	dev_priv->ring.tail = outring;				\
	I810_WRITE(LP_RING + RING_TAIL, outring);		\
} while (0)

#define OUT_RING(n) do {					\
	if (I810_VERBOSE)					\
		DRM_DEBUG("   OUT_RING %x\n", (int)(n));	\
	*(volatile unsigned int *)(virt + outring) = n;		\
	outring += 4;						\
	outring &= ringmask;					\
} while (0)

#define GFX_OP_USER_INTERRUPT		((0<<29)|(2<<23))
#define GFX_OP_BREAKPOINT_INTERRUPT	((0<<29)|(1<<23))
#define CMD_REPORT_HEAD			(7<<23)
#define CMD_STORE_DWORD_IDX		((0x21<<23) | 0x1)
#define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)

#define INST_PARSER_CLIENT   0x00000000
#define INST_OP_FLUSH        0x02000000
#define INST_FLUSH_MAP_CACHE 0x00000001

#define BB1_START_ADDR_MASK   (~0x7)
#define BB1_PROTECTED         (1<<0)
#define BB1_UNPROTECTED       (0<<0)
#define BB2_END_ADDR_MASK     (~0x7)

#define I810REG_HWSTAM		0x02098
#define I810REG_INT_IDENTITY_R	0x020a4
#define I810REG_INT_MASK_R	0x020a8
#define I810REG_INT_ENABLE_R	0x020a0

#define LP_RING			0x2030
#define HP_RING			0x2040
#define RING_TAIL		0x00
#define TAIL_ADDR		0x000FFFF8
#define RING_HEAD		0x04
#define HEAD_WRAP_COUNT		0xFFE00000
#define HEAD_WRAP_ONE		0x00200000
#define HEAD_ADDR		0x001FFFFC
#define RING_START		0x08
#define START_ADDR		0x00FFFFF8
#define RING_LEN		0x0C
#define RING_NR_PAGES		0x000FF000
#define RING_REPORT_MASK	0x00000006
#define RING_REPORT_64K		0x00000002
#define RING_REPORT_128K	0x00000004
#define RING_NO_REPORT		0x00000000
#define RING_VALID_MASK		0x00000001
#define RING_VALID		0x00000001
#define RING_INVALID		0x00000000

#define GFX_OP_SCISSOR         ((0x3<<29)|(0x1c<<24)|(0x10<<19))
#define SC_UPDATE_SCISSOR       (0x1<<1)
#define SC_ENABLE_MASK          (0x1<<0)
#define SC_ENABLE               (0x1<<0)

#define GFX_OP_SCISSOR_INFO    ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
#define SCI_YMIN_MASK      (0xffff<<16)
#define SCI_XMIN_MASK      (0xffff<<0)
#define SCI_YMAX_MASK      (0xffff<<16)
#define SCI_XMAX_MASK      (0xffff<<0)

#define GFX_OP_COLOR_FACTOR      ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
#define GFX_OP_MAP_INFO          ((0x3<<29)|(0x1d<<24)|0x2)
#define GFX_OP_DESTBUFFER_VARS   ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
#define GFX_OP_DRAWRECT_INFO     ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
#define GFX_OP_PRIMITIVE         ((0x3<<29)|(0x1f<<24))

#define CMD_OP_Z_BUFFER_INFO     ((0x0<<29)|(0x16<<23))
#define CMD_OP_DESTBUFFER_INFO   ((0x0<<29)|(0x15<<23))
#define CMD_OP_FRONTBUFFER_INFO  ((0x0<<29)|(0x14<<23))
#define CMD_OP_WAIT_FOR_EVENT    ((0x0<<29)|(0x03<<23))

#define BR00_BITBLT_CLIENT   0x40000000
#define BR00_OP_COLOR_BLT    0x10000000
#define BR00_OP_SRC_COPY_BLT 0x10C00000
#define BR13_SOLID_PATTERN   0x80000000

#define WAIT_FOR_PLANE_A_SCANLINES (1<<1)
#define WAIT_FOR_PLANE_A_FLIP      (1<<2)
#define WAIT_FOR_VBLANK (1<<3)

#endif
Commit	Line	Data
1da177e4 LT	1	/* i810_drv.h -- Private header for the Matrox g200/g400 driver -- linux-c --
	2	* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
	3	*
	4	* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
	5	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	6	* All rights reserved.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the "Software"),
	10	* to deal in the Software without restriction, including without limitation
	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	12	* and/or sell copies of the Software, and to permit persons to whom the
	13	* Software is furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice (including the next
	16	* paragraph) shall be included in all copies or substantial portions of the
	17	* Software.
	18	*
	19	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	20	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	21	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	22	* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	23	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	24	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	25	* DEALINGS IN THE SOFTWARE.
	26	*
	27	* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
bc5f4523	28	* Jeff Hartmann <jhartmann@valinux.com>
1da177e4 LT	29	*
	30	*/
	31
	32	#ifndef _I810_DRV_H_
	33	#define _I810_DRV_H_
	34
	35	/* General customization:
	36	*/
	37
	38	#define DRIVER_AUTHOR "VA Linux Systems Inc."
	39
	40	#define DRIVER_NAME "i810"
	41	#define DRIVER_DESC "Intel i810"
	42	#define DRIVER_DATE "20030605"
	43
	44	/* Interface history
	45	*
	46	* 1.1 - XFree86 4.1
	47	* 1.2 - XvMC interfaces
	48	* - XFree86 4.2
	49	* 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
	50	* - Remove requirement for interrupt (leave stubs again)
	51	* 1.3 - Add page flipping.
	52	* 1.4 - fix DRM interface
	53	*/
	54	#define DRIVER_MAJOR 1
	55	#define DRIVER_MINOR 4
	56	#define DRIVER_PATCHLEVEL 0
	57
	58	typedef struct drm_i810_buf_priv {
b5e89ed5 DA	59	u32 *in_use;
b5e89ed5 DA	60	int my_use_idx;
1da177e4 LT	61	int currently_mapped;
	62	void *virtual;
	63	void *kernel_virtual;
b9094d3a	64	drm_local_map_t map;
1da177e4 LT	65	} drm_i810_buf_priv_t;
1da177e4 LT	66
b5e89ed5	67	typedef struct _drm_i810_ring_buffer {
1da177e4 LT	68	int tail_mask;
	69	unsigned long Start;
	70	unsigned long End;
	71	unsigned long Size;
	72	u8 *virtual_start;
	73	int head;
	74	int tail;
	75	int space;
b9094d3a	76	drm_local_map_t map;
1da177e4 LT	77	} drm_i810_ring_buffer_t;
	78
	79	typedef struct drm_i810_private {
f77d390c BH	80	struct drm_local_map *sarea_map;
f77d390c BH	81	struct drm_local_map *mmio_map;
1da177e4 LT	82
1da177e4 LT	83	drm_i810_sarea_t *sarea_priv;
b5e89ed5	84	drm_i810_ring_buffer_t ring;
1da177e4	85
b5e89ed5 DA	86	void *hw_status_page;
b5e89ed5 DA	87	unsigned long counter;
1da177e4 LT	88
	89	dma_addr_t dma_status_page;
	90
056219e2	91	struct drm_buf *mmap_buffer;
1da177e4	92
1da177e4 LT	93	u32 front_di1, back_di1, zi1;
	94
	95	int back_offset;
	96	int depth_offset;
	97	int overlay_offset;
	98	int overlay_physical;
	99	int w, h;
	100	int pitch;
b5e89ed5	101	int back_pitch;
1da177e4 LT	102	int depth_pitch;
	103
	104	int do_boxes;
	105	int dma_used;
	106
	107	int current_page;
	108	int page_flipping;
	109
	110	wait_queue_head_t irq_queue;
b5e89ed5 DA	111	atomic_t irq_received;
	112	atomic_t irq_emitted;
	113
	114	int front_offset;
1da177e4 LT	115	} drm_i810_private_t;
	116
	117	/* i810_dma.c */
aca791c2 NK	118	extern int i810_driver_dma_quiescent(struct drm_device *dev);
aca791c2 NK	119	extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
6c340eac	120	struct drm_file *file_priv);
22eae947	121	extern int i810_driver_load(struct drm_device *, unsigned long flags);
aca791c2 NK	122	extern void i810_driver_lastclose(struct drm_device *dev);
aca791c2 NK	123	extern void i810_driver_preclose(struct drm_device *dev,
6c340eac	124	struct drm_file *file_priv);
aca791c2	125	extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
6c340eac	126	struct drm_file *file_priv);
aca791c2	127	extern int i810_driver_device_is_agp(struct drm_device *dev);
1da177e4	128
c153f45f	129	extern struct drm_ioctl_desc i810_ioctls[];
b3a83639 DA	130	extern int i810_max_ioctl;
b3a83639 DA	131
1da177e4 LT	132	#define I810_BASE(reg) ((unsigned long) \
	133	dev_priv->mmio_map->handle)
	134	#define I810_ADDR(reg) (I810_BASE(reg) + reg)
aca791c2	135	#define I810_DEREF(reg) ((__volatile__ int )I810_ADDR(reg))
1da177e4	136	#define I810_READ(reg) I810_DEREF(reg)
aca791c2 NK	137	#define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0)
aca791c2 NK	138	#define I810_DEREF16(reg) ((__volatile__ u16 )I810_ADDR(reg))
1da177e4	139	#define I810_READ16(reg) I810_DEREF16(reg)
aca791c2	140	#define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0)
1da177e4 LT	141
	142	#define I810_VERBOSE 0
	143	#define RING_LOCALS unsigned int outring, ringmask; \
aca791c2 NK	144	volatile char *virt;
	145
	146	#define BEGIN_LP_RING(n) do { \
	147	if (I810_VERBOSE) \
	148	DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \
	149	if (dev_priv->ring.space < n*4) \
	150	i810_wait_ring(dev, n*4); \
	151	dev_priv->ring.space -= n*4; \
	152	outring = dev_priv->ring.tail; \
	153	ringmask = dev_priv->ring.tail_mask; \
	154	virt = dev_priv->ring.virtual_start; \
1da177e4 LT	155	} while (0)
1da177e4 LT	156
aca791c2 NK	157	#define ADVANCE_LP_RING() do { \
	158	if (I810_VERBOSE) \
	159	DRM_DEBUG("ADVANCE_LP_RING\n"); \
bc5f4523	160	dev_priv->ring.tail = outring; \
aca791c2 NK	161	I810_WRITE(LP_RING + RING_TAIL, outring); \
	162	} while (0)
	163
	164	#define OUT_RING(n) do { \
	165	if (I810_VERBOSE) \
	166	DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
	167	(volatile unsigned int )(virt + outring) = n; \
	168	outring += 4; \
	169	outring &= ringmask; \
1da177e4 LT	170	} while (0)
1da177e4 LT	171
bc5f4523	172	#define GFX_OP_USER_INTERRUPT ((0<<29)\|(2<<23))
1da177e4 LT	173	#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)\|(1<<23))
	174	#define CMD_REPORT_HEAD (7<<23)
	175	#define CMD_STORE_DWORD_IDX ((0x21<<23) \| 0x1)
	176	#define CMD_OP_BATCH_BUFFER ((0x0<<29)\|(0x30<<23)\|0x1)
	177
	178	#define INST_PARSER_CLIENT 0x00000000
	179	#define INST_OP_FLUSH 0x02000000
	180	#define INST_FLUSH_MAP_CACHE 0x00000001
	181
1da177e4 LT	182	#define BB1_START_ADDR_MASK (~0x7)
	183	#define BB1_PROTECTED (1<<0)
	184	#define BB1_UNPROTECTED (0<<0)
	185	#define BB2_END_ADDR_MASK (~0x7)
	186
	187	#define I810REG_HWSTAM 0x02098
	188	#define I810REG_INT_IDENTITY_R 0x020a4
bc5f4523	189	#define I810REG_INT_MASK_R 0x020a8
1da177e4 LT	190	#define I810REG_INT_ENABLE_R 0x020a0
1da177e4 LT	191
bc5f4523 DA	192	#define LP_RING 0x2030
	193	#define HP_RING 0x2040
	194	#define RING_TAIL 0x00
1da177e4	195	#define TAIL_ADDR 0x000FFFF8
bc5f4523 DA	196	#define RING_HEAD 0x04
	197	#define HEAD_WRAP_COUNT 0xFFE00000
	198	#define HEAD_WRAP_ONE 0x00200000
	199	#define HEAD_ADDR 0x001FFFFC
	200	#define RING_START 0x08
	201	#define START_ADDR 0x00FFFFF8
	202	#define RING_LEN 0x0C
	203	#define RING_NR_PAGES 0x000FF000
	204	#define RING_REPORT_MASK 0x00000006
	205	#define RING_REPORT_64K 0x00000002
	206	#define RING_REPORT_128K 0x00000004
	207	#define RING_NO_REPORT 0x00000000
	208	#define RING_VALID_MASK 0x00000001
	209	#define RING_VALID 0x00000001
	210	#define RING_INVALID 0x00000000
1da177e4 LT	211
	212	#define GFX_OP_SCISSOR ((0x3<<29)\|(0x1c<<24)\|(0x10<<19))
	213	#define SC_UPDATE_SCISSOR (0x1<<1)
	214	#define SC_ENABLE_MASK (0x1<<0)
	215	#define SC_ENABLE (0x1<<0)
	216
	217	#define GFX_OP_SCISSOR_INFO ((0x3<<29)\|(0x1d<<24)\|(0x81<<16)\|(0x1))
	218	#define SCI_YMIN_MASK (0xffff<<16)
	219	#define SCI_XMIN_MASK (0xffff<<0)
	220	#define SCI_YMAX_MASK (0xffff<<16)
	221	#define SCI_XMAX_MASK (0xffff<<0)
	222
	223	#define GFX_OP_COLOR_FACTOR ((0x3<<29)\|(0x1d<<24)\|(0x1<<16)\|0x0)
	224	#define GFX_OP_STIPPLE ((0x3<<29)\|(0x1d<<24)\|(0x83<<16))
	225	#define GFX_OP_MAP_INFO ((0x3<<29)\|(0x1d<<24)\|0x2)
	226	#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)\|(0x1d<<24)\|(0x85<<16)\|0x0)
	227	#define GFX_OP_DRAWRECT_INFO ((0x3<<29)\|(0x1d<<24)\|(0x80<<16)\|(0x3))
	228	#define GFX_OP_PRIMITIVE ((0x3<<29)\|(0x1f<<24))
	229
	230	#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)\|(0x16<<23))
	231	#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)\|(0x15<<23))
	232	#define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)\|(0x14<<23))
	233	#define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)\|(0x03<<23))
	234
	235	#define BR00_BITBLT_CLIENT 0x40000000
	236	#define BR00_OP_COLOR_BLT 0x10000000
	237	#define BR00_OP_SRC_COPY_BLT 0x10C00000
	238	#define BR13_SOLID_PATTERN 0x80000000
	239
b5e89ed5 DA	240	#define WAIT_FOR_PLANE_A_SCANLINES (1<<1)
b5e89ed5 DA	241	#define WAIT_FOR_PLANE_A_FLIP (1<<2)
1da177e4 LT	242	#define WAIT_FOR_VBLANK (1<<3)
	243
	244	#endif