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3e135d88 PO |
1 | /* |
2 | * Intel CPU Microcode Update Driver for Linux | |
3 | * | |
4 | * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> | |
5 | * 2006 Shaohua Li <shaohua.li@intel.com> | |
6 | * | |
7 | * This driver allows to upgrade microcode on Intel processors | |
8 | * belonging to IA-32 family - PentiumPro, Pentium II, | |
9 | * Pentium III, Xeon, Pentium 4, etc. | |
10 | * | |
11 | * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture | |
12 | * Software Developer's Manual | |
13 | * Order Number 253668 or free download from: | |
14 | * | |
15 | * http://developer.intel.com/design/pentium4/manuals/253668.htm | |
16 | * | |
17 | * For more information, go to http://www.urbanmyth.org/microcode | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or | |
20 | * modify it under the terms of the GNU General Public License | |
21 | * as published by the Free Software Foundation; either version | |
22 | * 2 of the License, or (at your option) any later version. | |
23 | * | |
24 | * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
25 | * Initial release. | |
26 | * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
27 | * Added read() support + cleanups. | |
28 | * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
29 | * Added 'device trimming' support. open(O_WRONLY) zeroes | |
30 | * and frees the saved copy of applied microcode. | |
31 | * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
32 | * Made to use devfs (/dev/cpu/microcode) + cleanups. | |
33 | * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com> | |
34 | * Added misc device support (now uses both devfs and misc). | |
35 | * Added MICROCODE_IOCFREE ioctl to clear memory. | |
36 | * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com> | |
37 | * Messages for error cases (non Intel & no suitable microcode). | |
38 | * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com> | |
39 | * Removed ->release(). Removed exclusive open and status bitmap. | |
40 | * Added microcode_rwsem to serialize read()/write()/ioctl(). | |
41 | * Removed global kernel lock usage. | |
42 | * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com> | |
43 | * Write 0 to 0x8B msr and then cpuid before reading revision, | |
44 | * so that it works even if there were no update done by the | |
45 | * BIOS. Otherwise, reading from 0x8B gives junk (which happened | |
46 | * to be 0 on my machine which is why it worked even when I | |
47 | * disabled update by the BIOS) | |
48 | * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix. | |
49 | * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and | |
50 | * Tigran Aivazian <tigran@veritas.com> | |
51 | * Intel Pentium 4 processor support and bugfixes. | |
52 | * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com> | |
53 | * Bugfix for HT (Hyper-Threading) enabled processors | |
54 | * whereby processor resources are shared by all logical processors | |
55 | * in a single CPU package. | |
56 | * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and | |
57 | * Tigran Aivazian <tigran@veritas.com>, | |
d33dcb9e PO |
58 | * Serialize updates as required on HT processors due to |
59 | * speculative nature of implementation. | |
3e135d88 PO |
60 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> |
61 | * Fix the panic when writing zero-length microcode chunk. | |
62 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, | |
63 | * Jun Nakajima <jun.nakajima@intel.com> | |
64 | * Support for the microcode updates in the new format. | |
65 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> | |
66 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl | |
67 | * because we no longer hold a copy of applied microcode | |
68 | * in kernel memory. | |
69 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> | |
70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | |
71 | * Thanks to Stuart Swales for pointing out this bug. | |
72 | */ | |
f58e1f53 JP |
73 | |
74 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
75 | ||
4bae1967 | 76 | #include <linux/platform_device.h> |
4bae1967 | 77 | #include <linux/miscdevice.h> |
871b72dd | 78 | #include <linux/capability.h> |
4bae1967 IM |
79 | #include <linux/kernel.h> |
80 | #include <linux/module.h> | |
3e135d88 PO |
81 | #include <linux/mutex.h> |
82 | #include <linux/cpu.h> | |
4bae1967 IM |
83 | #include <linux/fs.h> |
84 | #include <linux/mm.h> | |
3e135d88 | 85 | |
3e135d88 | 86 | #include <asm/microcode.h> |
4bae1967 | 87 | #include <asm/processor.h> |
3e135d88 PO |
88 | |
89 | MODULE_DESCRIPTION("Microcode Update Driver"); | |
90 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); | |
91 | MODULE_LICENSE("GPL"); | |
92 | ||
4bae1967 | 93 | #define MICROCODE_VERSION "2.00" |
3e135d88 | 94 | |
4bae1967 | 95 | static struct microcode_ops *microcode_ops; |
3e135d88 | 96 | |
871b72dd DA |
97 | /* |
98 | * Synchronization. | |
99 | * | |
100 | * All non cpu-hotplug-callback call sites use: | |
101 | * | |
102 | * - microcode_mutex to synchronize with each other; | |
103 | * - get/put_online_cpus() to synchronize with | |
104 | * the cpu-hotplug-callback call sites. | |
105 | * | |
106 | * We guarantee that only a single cpu is being | |
107 | * updated at any particular moment of time. | |
108 | */ | |
d45de409 | 109 | static DEFINE_MUTEX(microcode_mutex); |
3e135d88 | 110 | |
4bae1967 | 111 | struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; |
8d86f390 | 112 | EXPORT_SYMBOL_GPL(ucode_cpu_info); |
3e135d88 | 113 | |
871b72dd DA |
114 | /* |
115 | * Operations that are run on a target cpu: | |
116 | */ | |
117 | ||
118 | struct cpu_info_ctx { | |
119 | struct cpu_signature *cpu_sig; | |
120 | int err; | |
121 | }; | |
122 | ||
123 | static void collect_cpu_info_local(void *arg) | |
124 | { | |
125 | struct cpu_info_ctx *ctx = arg; | |
126 | ||
127 | ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(), | |
128 | ctx->cpu_sig); | |
129 | } | |
130 | ||
131 | static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig) | |
132 | { | |
133 | struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 }; | |
134 | int ret; | |
135 | ||
136 | ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1); | |
137 | if (!ret) | |
138 | ret = ctx.err; | |
139 | ||
140 | return ret; | |
141 | } | |
142 | ||
143 | static int collect_cpu_info(int cpu) | |
144 | { | |
145 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
146 | int ret; | |
147 | ||
148 | memset(uci, 0, sizeof(*uci)); | |
149 | ||
150 | ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig); | |
151 | if (!ret) | |
152 | uci->valid = 1; | |
153 | ||
154 | return ret; | |
155 | } | |
156 | ||
157 | struct apply_microcode_ctx { | |
158 | int err; | |
159 | }; | |
160 | ||
161 | static void apply_microcode_local(void *arg) | |
162 | { | |
163 | struct apply_microcode_ctx *ctx = arg; | |
164 | ||
165 | ctx->err = microcode_ops->apply_microcode(smp_processor_id()); | |
166 | } | |
167 | ||
168 | static int apply_microcode_on_target(int cpu) | |
169 | { | |
170 | struct apply_microcode_ctx ctx = { .err = 0 }; | |
171 | int ret; | |
172 | ||
173 | ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1); | |
174 | if (!ret) | |
175 | ret = ctx.err; | |
176 | ||
177 | return ret; | |
178 | } | |
179 | ||
3e135d88 | 180 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE |
a0a29b62 | 181 | static int do_microcode_update(const void __user *buf, size_t size) |
3e135d88 | 182 | { |
3e135d88 | 183 | int error = 0; |
3e135d88 | 184 | int cpu; |
6f66cbc6 | 185 | |
a0a29b62 DA |
186 | for_each_online_cpu(cpu) { |
187 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
871b72dd | 188 | enum ucode_state ustate; |
a0a29b62 DA |
189 | |
190 | if (!uci->valid) | |
191 | continue; | |
6f66cbc6 | 192 | |
871b72dd DA |
193 | ustate = microcode_ops->request_microcode_user(cpu, buf, size); |
194 | if (ustate == UCODE_ERROR) { | |
195 | error = -1; | |
196 | break; | |
197 | } else if (ustate == UCODE_OK) | |
198 | apply_microcode_on_target(cpu); | |
3e135d88 | 199 | } |
871b72dd | 200 | |
3e135d88 PO |
201 | return error; |
202 | } | |
203 | ||
3f10940e | 204 | static int microcode_open(struct inode *inode, struct file *file) |
3e135d88 | 205 | { |
3f10940e | 206 | return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM; |
3e135d88 PO |
207 | } |
208 | ||
d33dcb9e PO |
209 | static ssize_t microcode_write(struct file *file, const char __user *buf, |
210 | size_t len, loff_t *ppos) | |
3e135d88 | 211 | { |
871b72dd | 212 | ssize_t ret = -EINVAL; |
3e135d88 | 213 | |
4481374c | 214 | if ((len >> PAGE_SHIFT) > totalram_pages) { |
f58e1f53 | 215 | pr_err("too much data (max %ld pages)\n", totalram_pages); |
871b72dd | 216 | return ret; |
3e135d88 PO |
217 | } |
218 | ||
219 | get_online_cpus(); | |
220 | mutex_lock(µcode_mutex); | |
221 | ||
871b72dd | 222 | if (do_microcode_update(buf, len) == 0) |
3e135d88 PO |
223 | ret = (ssize_t)len; |
224 | ||
225 | mutex_unlock(µcode_mutex); | |
226 | put_online_cpus(); | |
227 | ||
228 | return ret; | |
229 | } | |
230 | ||
231 | static const struct file_operations microcode_fops = { | |
871b72dd DA |
232 | .owner = THIS_MODULE, |
233 | .write = microcode_write, | |
234 | .open = microcode_open, | |
6038f373 | 235 | .llseek = no_llseek, |
3e135d88 PO |
236 | }; |
237 | ||
238 | static struct miscdevice microcode_dev = { | |
871b72dd DA |
239 | .minor = MICROCODE_MINOR, |
240 | .name = "microcode", | |
e454cea2 | 241 | .nodename = "cpu/microcode", |
871b72dd | 242 | .fops = µcode_fops, |
3e135d88 PO |
243 | }; |
244 | ||
d33dcb9e | 245 | static int __init microcode_dev_init(void) |
3e135d88 PO |
246 | { |
247 | int error; | |
248 | ||
249 | error = misc_register(µcode_dev); | |
250 | if (error) { | |
f58e1f53 | 251 | pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR); |
3e135d88 PO |
252 | return error; |
253 | } | |
254 | ||
255 | return 0; | |
256 | } | |
257 | ||
d33dcb9e | 258 | static void microcode_dev_exit(void) |
3e135d88 PO |
259 | { |
260 | misc_deregister(µcode_dev); | |
261 | } | |
262 | ||
263 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | |
578454ff | 264 | MODULE_ALIAS("devname:cpu/microcode"); |
3e135d88 | 265 | #else |
4bae1967 IM |
266 | #define microcode_dev_init() 0 |
267 | #define microcode_dev_exit() do { } while (0) | |
3e135d88 PO |
268 | #endif |
269 | ||
270 | /* fake device for request_firmware */ | |
4bae1967 | 271 | static struct platform_device *microcode_pdev; |
3e135d88 | 272 | |
871b72dd | 273 | static int reload_for_cpu(int cpu) |
af5c820a | 274 | { |
871b72dd | 275 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
af5c820a RR |
276 | int err = 0; |
277 | ||
278 | mutex_lock(µcode_mutex); | |
279 | if (uci->valid) { | |
871b72dd DA |
280 | enum ucode_state ustate; |
281 | ||
282 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); | |
283 | if (ustate == UCODE_OK) | |
284 | apply_microcode_on_target(cpu); | |
285 | else | |
286 | if (ustate == UCODE_ERROR) | |
287 | err = -EINVAL; | |
af5c820a RR |
288 | } |
289 | mutex_unlock(µcode_mutex); | |
871b72dd | 290 | |
af5c820a RR |
291 | return err; |
292 | } | |
293 | ||
3e135d88 PO |
294 | static ssize_t reload_store(struct sys_device *dev, |
295 | struct sysdev_attribute *attr, | |
871b72dd | 296 | const char *buf, size_t size) |
3e135d88 | 297 | { |
871b72dd | 298 | unsigned long val; |
3e135d88 | 299 | int cpu = dev->id; |
871b72dd DA |
300 | int ret = 0; |
301 | char *end; | |
3e135d88 | 302 | |
871b72dd | 303 | val = simple_strtoul(buf, &end, 0); |
3e135d88 PO |
304 | if (end == buf) |
305 | return -EINVAL; | |
871b72dd | 306 | |
3e135d88 | 307 | if (val == 1) { |
3e135d88 | 308 | get_online_cpus(); |
af5c820a | 309 | if (cpu_online(cpu)) |
871b72dd | 310 | ret = reload_for_cpu(cpu); |
3e135d88 | 311 | put_online_cpus(); |
3e135d88 | 312 | } |
871b72dd DA |
313 | |
314 | if (!ret) | |
315 | ret = size; | |
316 | ||
317 | return ret; | |
3e135d88 PO |
318 | } |
319 | ||
320 | static ssize_t version_show(struct sys_device *dev, | |
321 | struct sysdev_attribute *attr, char *buf) | |
322 | { | |
323 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
324 | ||
d45de409 | 325 | return sprintf(buf, "0x%x\n", uci->cpu_sig.rev); |
3e135d88 PO |
326 | } |
327 | ||
328 | static ssize_t pf_show(struct sys_device *dev, | |
329 | struct sysdev_attribute *attr, char *buf) | |
330 | { | |
331 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
332 | ||
d45de409 | 333 | return sprintf(buf, "0x%x\n", uci->cpu_sig.pf); |
3e135d88 PO |
334 | } |
335 | ||
336 | static SYSDEV_ATTR(reload, 0200, NULL, reload_store); | |
337 | static SYSDEV_ATTR(version, 0400, version_show, NULL); | |
338 | static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL); | |
339 | ||
340 | static struct attribute *mc_default_attrs[] = { | |
341 | &attr_reload.attr, | |
342 | &attr_version.attr, | |
343 | &attr_processor_flags.attr, | |
344 | NULL | |
345 | }; | |
346 | ||
347 | static struct attribute_group mc_attr_group = { | |
871b72dd DA |
348 | .attrs = mc_default_attrs, |
349 | .name = "microcode", | |
3e135d88 PO |
350 | }; |
351 | ||
871b72dd | 352 | static void microcode_fini_cpu(int cpu) |
d45de409 DA |
353 | { |
354 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
355 | ||
d45de409 DA |
356 | microcode_ops->microcode_fini_cpu(cpu); |
357 | uci->valid = 0; | |
280a9ca5 DA |
358 | } |
359 | ||
871b72dd | 360 | static enum ucode_state microcode_resume_cpu(int cpu) |
d45de409 DA |
361 | { |
362 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
363 | ||
871b72dd DA |
364 | if (!uci->mc) |
365 | return UCODE_NFOUND; | |
366 | ||
f58e1f53 | 367 | pr_debug("CPU%d updated upon resume\n", cpu); |
871b72dd DA |
368 | apply_microcode_on_target(cpu); |
369 | ||
370 | return UCODE_OK; | |
d45de409 DA |
371 | } |
372 | ||
871b72dd | 373 | static enum ucode_state microcode_init_cpu(int cpu) |
d45de409 | 374 | { |
871b72dd | 375 | enum ucode_state ustate; |
d45de409 | 376 | |
871b72dd DA |
377 | if (collect_cpu_info(cpu)) |
378 | return UCODE_ERROR; | |
d45de409 | 379 | |
871b72dd DA |
380 | /* --dimm. Trigger a delayed update? */ |
381 | if (system_state != SYSTEM_RUNNING) | |
382 | return UCODE_NFOUND; | |
d45de409 | 383 | |
871b72dd | 384 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); |
d45de409 | 385 | |
871b72dd | 386 | if (ustate == UCODE_OK) { |
f58e1f53 | 387 | pr_debug("CPU%d updated upon init\n", cpu); |
871b72dd | 388 | apply_microcode_on_target(cpu); |
d45de409 DA |
389 | } |
390 | ||
871b72dd | 391 | return ustate; |
d45de409 DA |
392 | } |
393 | ||
871b72dd | 394 | static enum ucode_state microcode_update_cpu(int cpu) |
d45de409 | 395 | { |
871b72dd DA |
396 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
397 | enum ucode_state ustate; | |
d45de409 | 398 | |
2f99f5c8 | 399 | if (uci->valid) |
871b72dd DA |
400 | ustate = microcode_resume_cpu(cpu); |
401 | else | |
402 | ustate = microcode_init_cpu(cpu); | |
d45de409 | 403 | |
871b72dd | 404 | return ustate; |
d45de409 DA |
405 | } |
406 | ||
407 | static int mc_sysdev_add(struct sys_device *sys_dev) | |
3e135d88 PO |
408 | { |
409 | int err, cpu = sys_dev->id; | |
3e135d88 PO |
410 | |
411 | if (!cpu_online(cpu)) | |
412 | return 0; | |
413 | ||
f58e1f53 | 414 | pr_debug("CPU%d added\n", cpu); |
3e135d88 PO |
415 | |
416 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); | |
417 | if (err) | |
418 | return err; | |
419 | ||
871b72dd DA |
420 | if (microcode_init_cpu(cpu) == UCODE_ERROR) |
421 | err = -EINVAL; | |
af5c820a RR |
422 | |
423 | return err; | |
3e135d88 PO |
424 | } |
425 | ||
3e135d88 PO |
426 | static int mc_sysdev_remove(struct sys_device *sys_dev) |
427 | { | |
428 | int cpu = sys_dev->id; | |
429 | ||
430 | if (!cpu_online(cpu)) | |
431 | return 0; | |
432 | ||
f58e1f53 | 433 | pr_debug("CPU%d removed\n", cpu); |
d45de409 | 434 | microcode_fini_cpu(cpu); |
3e135d88 PO |
435 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); |
436 | return 0; | |
437 | } | |
438 | ||
439 | static int mc_sysdev_resume(struct sys_device *dev) | |
440 | { | |
441 | int cpu = dev->id; | |
871b72dd | 442 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
3e135d88 PO |
443 | |
444 | if (!cpu_online(cpu)) | |
445 | return 0; | |
a1c75cc5 | 446 | |
871b72dd DA |
447 | /* |
448 | * All non-bootup cpus are still disabled, | |
449 | * so only CPU 0 will apply ucode here. | |
450 | * | |
451 | * Moreover, there can be no concurrent | |
452 | * updates from any other places at this point. | |
453 | */ | |
454 | WARN_ON(cpu != 0); | |
455 | ||
456 | if (uci->valid && uci->mc) | |
457 | microcode_ops->apply_microcode(cpu); | |
458 | ||
3e135d88 PO |
459 | return 0; |
460 | } | |
461 | ||
462 | static struct sysdev_driver mc_sysdev_driver = { | |
871b72dd DA |
463 | .add = mc_sysdev_add, |
464 | .remove = mc_sysdev_remove, | |
465 | .resume = mc_sysdev_resume, | |
3e135d88 PO |
466 | }; |
467 | ||
468 | static __cpuinit int | |
469 | mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | |
470 | { | |
471 | unsigned int cpu = (unsigned long)hcpu; | |
472 | struct sys_device *sys_dev; | |
473 | ||
474 | sys_dev = get_cpu_sysdev(cpu); | |
475 | switch (action) { | |
3e135d88 | 476 | case CPU_ONLINE: |
3e135d88 | 477 | case CPU_ONLINE_FROZEN: |
871b72dd | 478 | microcode_update_cpu(cpu); |
d45de409 | 479 | case CPU_DOWN_FAILED: |
3e135d88 | 480 | case CPU_DOWN_FAILED_FROZEN: |
f58e1f53 | 481 | pr_debug("CPU%d added\n", cpu); |
3e135d88 | 482 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) |
f58e1f53 | 483 | pr_err("Failed to create group for CPU%d\n", cpu); |
3e135d88 PO |
484 | break; |
485 | case CPU_DOWN_PREPARE: | |
3e135d88 PO |
486 | case CPU_DOWN_PREPARE_FROZEN: |
487 | /* Suspend is in progress, only remove the interface */ | |
488 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); | |
f58e1f53 | 489 | pr_debug("CPU%d removed\n", cpu); |
d45de409 DA |
490 | break; |
491 | case CPU_DEAD: | |
492 | case CPU_UP_CANCELED_FROZEN: | |
493 | /* The CPU refused to come up during a system resume */ | |
494 | microcode_fini_cpu(cpu); | |
3e135d88 PO |
495 | break; |
496 | } | |
497 | return NOTIFY_OK; | |
498 | } | |
499 | ||
500 | static struct notifier_block __refdata mc_cpu_notifier = { | |
4bae1967 | 501 | .notifier_call = mc_cpu_callback, |
3e135d88 PO |
502 | }; |
503 | ||
18dbc916 | 504 | static int __init microcode_init(void) |
3e135d88 | 505 | { |
18dbc916 | 506 | struct cpuinfo_x86 *c = &cpu_data(0); |
3e135d88 PO |
507 | int error; |
508 | ||
18dbc916 DA |
509 | if (c->x86_vendor == X86_VENDOR_INTEL) |
510 | microcode_ops = init_intel_microcode(); | |
82b07865 | 511 | else if (c->x86_vendor == X86_VENDOR_AMD) |
18dbc916 | 512 | microcode_ops = init_amd_microcode(); |
8d86f390 | 513 | |
18dbc916 | 514 | if (!microcode_ops) { |
f58e1f53 | 515 | pr_err("no support for this CPU vendor\n"); |
18dbc916 DA |
516 | return -ENODEV; |
517 | } | |
3e135d88 | 518 | |
3e135d88 PO |
519 | microcode_pdev = platform_device_register_simple("microcode", -1, |
520 | NULL, 0); | |
521 | if (IS_ERR(microcode_pdev)) { | |
522 | microcode_dev_exit(); | |
523 | return PTR_ERR(microcode_pdev); | |
524 | } | |
525 | ||
526 | get_online_cpus(); | |
871b72dd DA |
527 | mutex_lock(µcode_mutex); |
528 | ||
3e135d88 | 529 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); |
871b72dd DA |
530 | |
531 | mutex_unlock(µcode_mutex); | |
3e135d88 | 532 | put_online_cpus(); |
871b72dd | 533 | |
3e135d88 | 534 | if (error) { |
3e135d88 PO |
535 | platform_device_unregister(microcode_pdev); |
536 | return error; | |
537 | } | |
538 | ||
871b72dd DA |
539 | error = microcode_dev_init(); |
540 | if (error) | |
541 | return error; | |
542 | ||
3e135d88 | 543 | register_hotcpu_notifier(&mc_cpu_notifier); |
8d86f390 | 544 | |
871b72dd | 545 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION |
f58e1f53 | 546 | " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n"); |
8d86f390 | 547 | |
3e135d88 PO |
548 | return 0; |
549 | } | |
871b72dd | 550 | module_init(microcode_init); |
3e135d88 | 551 | |
18dbc916 | 552 | static void __exit microcode_exit(void) |
3e135d88 PO |
553 | { |
554 | microcode_dev_exit(); | |
555 | ||
556 | unregister_hotcpu_notifier(&mc_cpu_notifier); | |
557 | ||
558 | get_online_cpus(); | |
871b72dd DA |
559 | mutex_lock(µcode_mutex); |
560 | ||
3e135d88 | 561 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); |
871b72dd DA |
562 | |
563 | mutex_unlock(µcode_mutex); | |
3e135d88 PO |
564 | put_online_cpus(); |
565 | ||
566 | platform_device_unregister(microcode_pdev); | |
3e135d88 | 567 | |
8d86f390 PO |
568 | microcode_ops = NULL; |
569 | ||
871b72dd | 570 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); |
8d86f390 | 571 | } |
18dbc916 | 572 | module_exit(microcode_exit); |