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1da177e4
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1/*
2 * arch/ppc/platforms/85xx/mpc8560_ads.c
3 *
4 * MPC8560ADS board specific routines
5 *
4c8d3d99 6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
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7 *
8 * Copyright 2004 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/config.h>
17#include <linux/stddef.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/errno.h>
21#include <linux/reboot.h>
22#include <linux/pci.h>
23#include <linux/kdev_t.h>
24#include <linux/major.h>
25#include <linux/console.h>
26#include <linux/delay.h>
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27#include <linux/seq_file.h>
28#include <linux/root_dev.h>
29#include <linux/serial.h>
30#include <linux/tty.h> /* for linux/serial_core.h */
31#include <linux/serial_core.h>
32#include <linux/initrd.h>
33#include <linux/module.h>
34#include <linux/fsl_devices.h>
35
36#include <asm/system.h>
37#include <asm/pgtable.h>
38#include <asm/page.h>
39#include <asm/atomic.h>
40#include <asm/time.h>
41#include <asm/io.h>
42#include <asm/machdep.h>
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43#include <asm/open_pic.h>
44#include <asm/bootinfo.h>
45#include <asm/pci-bridge.h>
46#include <asm/mpc85xx.h>
47#include <asm/irq.h>
48#include <asm/immap_85xx.h>
49#include <asm/kgdb.h>
50#include <asm/ppc_sys.h>
51#include <asm/cpm2.h>
52#include <mm/mmu_decl.h>
53
54#include <syslib/cpm2_pic.h>
55#include <syslib/ppc85xx_common.h>
56#include <syslib/ppc85xx_setup.h>
57
1da177e4 58
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59static const char *GFAR_PHY_0 = "phy0:0";
60static const char *GFAR_PHY_1 = "phy0:1";
61static const char *GFAR_PHY_3 = "phy0:3";
62
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63/* ************************************************************************
64 *
65 * Setup the architecture
66 *
67 */
68
69static void __init
70mpc8560ads_setup_arch(void)
71{
72 bd_t *binfo = (bd_t *) __res;
73 unsigned int freq;
74 struct gianfar_platform_data *pdata;
b37665e0 75 struct gianfar_mdio_data *mdata;
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76
77 cpm2_reset();
78
79 /* get the core frequency */
80 freq = binfo->bi_intfreq;
81
82 if (ppc_md.progress)
83 ppc_md.progress("mpc8560ads_setup_arch()", 0);
84
85 /* Set loops_per_jiffy to a half-way reasonable value,
86 for use until calibrate_delay gets called. */
87 loops_per_jiffy = freq / HZ;
88
89#ifdef CONFIG_PCI
90 /* setup PCI host bridges */
91 mpc85xx_setup_hose();
92#endif
93
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94 /* setup the board related info for the MDIO bus */
95 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
96
97 mdata->irq[0] = MPC85xx_IRQ_EXT5;
98 mdata->irq[1] = MPC85xx_IRQ_EXT5;
99 mdata->irq[2] = -1;
100 mdata->irq[3] = MPC85xx_IRQ_EXT5;
101 mdata->irq[31] = -1;
102 mdata->paddr += binfo->bi_immr_base;
103
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104 /* setup the board related information for the enet controllers */
105 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
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106 if (pdata) {
107 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
b37665e0 108 pdata->bus_id = GFAR_PHY_0;
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109 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
110 }
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111
112 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
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113 if (pdata) {
114 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
b37665e0 115 pdata->bus_id = GFAR_PHY_1;
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116 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
117 }
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118
119#ifdef CONFIG_BLK_DEV_INITRD
120 if (initrd_start)
121 ROOT_DEV = Root_RAM0;
122 else
123#endif
124#ifdef CONFIG_ROOT_NFS
125 ROOT_DEV = Root_NFS;
126#else
127 ROOT_DEV = Root_HDA1;
128#endif
129}
130
131static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
132{
133 while ((irq = cpm2_get_irq(regs)) >= 0)
134 __do_IRQ(irq, regs);
135 return IRQ_HANDLED;
136}
137
138static struct irqaction cpm2_irqaction = {
139 .handler = cpm2_cascade,
140 .flags = SA_INTERRUPT,
141 .mask = CPU_MASK_NONE,
142 .name = "cpm2_cascade",
143};
144
145static void __init
146mpc8560_ads_init_IRQ(void)
147{
148 /* Setup OpenPIC */
149 mpc85xx_ads_init_IRQ();
150
151 /* Setup CPM2 PIC */
152 cpm2_init_IRQ();
153
154 setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
155
156 return;
157}
158
159
160
161/* ************************************************************************ */
162void __init
163platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
164 unsigned long r6, unsigned long r7)
165{
166 /* parse_bootinfo must always be called first */
167 parse_bootinfo(find_bootinfo());
168
169 /*
170 * If we were passed in a board information, copy it into the
171 * residual data area.
172 */
173 if (r3) {
174 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
175 sizeof (bd_t));
176
177 }
178#if defined(CONFIG_BLK_DEV_INITRD)
179 /*
180 * If the init RAM disk has been configured in, and there's a valid
181 * starting address for it, set it up.
182 */
183 if (r4) {
184 initrd_start = r4 + KERNELBASE;
185 initrd_end = r5 + KERNELBASE;
186 }
187#endif /* CONFIG_BLK_DEV_INITRD */
188
189 /* Copy the kernel command line arguments to a safe place. */
190
191 if (r6) {
192 *(char *) (r7 + KERNELBASE) = 0;
193 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
194 }
195
196 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
197
198 /* setup the PowerPC module struct */
199 ppc_md.setup_arch = mpc8560ads_setup_arch;
200 ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
201
202 ppc_md.init_IRQ = mpc8560_ads_init_IRQ;
203 ppc_md.get_irq = openpic_get_irq;
204
205 ppc_md.restart = mpc85xx_restart;
206 ppc_md.power_off = mpc85xx_power_off;
207 ppc_md.halt = mpc85xx_halt;
208
209 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
210
211 ppc_md.time_init = NULL;
212 ppc_md.set_rtc_time = NULL;
213 ppc_md.get_rtc_time = NULL;
214 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
215
216 if (ppc_md.progress)
217 ppc_md.progress("mpc8560ads_init(): exit", 0);
218
219 return;
220}