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a0ae9c7c AB |
1 | config PPC64 |
2 | bool "64-bit kernel" | |
3 | default n | |
105988c0 | 4 | select PPC_HAVE_PMU_SUPPORT |
a0ae9c7c AB |
5 | help |
6 | This option selects whether a 32-bit or a 64-bit kernel | |
7 | will be built. | |
8 | ||
9 | menu "Processor support" | |
10 | choice | |
11 | prompt "Processor Type" | |
12 | depends on PPC32 | |
a0ae9c7c | 13 | help |
b9fd305d AB |
14 | There are five families of 32 bit PowerPC chips supported. |
15 | The most common ones are the desktop and server CPUs (601, 603, | |
16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their | |
e177edcd | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
b9fd305d AB |
18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
19 | (85xx) each form a family of their own that is not compatible | |
20 | with the others. | |
21 | ||
22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | |
23 | ||
48c93112 | 24 | config PPC_BOOK3S_32 |
e177edcd | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
a0ae9c7c AB |
26 | select PPC_FPU |
27 | ||
a0ae9c7c AB |
28 | config PPC_85xx |
29 | bool "Freescale 85xx" | |
30 | select E500 | |
a0ae9c7c | 31 | |
a0ae9c7c AB |
32 | config PPC_8xx |
33 | bool "Freescale 8xx" | |
34 | select FSL_SOC | |
35 | select 8xx | |
1088a209 | 36 | select PPC_LIB_RHEAP |
a0ae9c7c AB |
37 | |
38 | config 40x | |
39 | bool "AMCC 40x" | |
40 | select PPC_DCR_NATIVE | |
9dae8afd | 41 | select PPC_UDBG_16550 |
93173ce2 | 42 | select 4xx_SOC |
b500563b | 43 | select PPC_PCI_CHOICE |
a0ae9c7c AB |
44 | |
45 | config 44x | |
46 | bool "AMCC 44x" | |
47 | select PPC_DCR_NATIVE | |
1d5499b5 | 48 | select PPC_UDBG_16550 |
93173ce2 | 49 | select 4xx_SOC |
b500563b | 50 | select PPC_PCI_CHOICE |
4ee7084e | 51 | select PHYS_64BIT |
a0ae9c7c AB |
52 | |
53 | config E200 | |
54 | bool "Freescale e200" | |
55 | ||
56 | endchoice | |
57 | ||
2d27cfd3 BH |
58 | choice |
59 | prompt "Processor Type" | |
5b7c3c91 | 60 | depends on PPC64 |
2d27cfd3 BH |
61 | help |
62 | There are two families of 64 bit PowerPC chips supported. | |
63 | The most common ones are the desktop and server CPUs | |
64 | (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) | |
65 | ||
66 | The other are the "embedded" processors compliant with the | |
67 | "Book 3E" variant of the architecture | |
68 | ||
69 | config PPC_BOOK3S_64 | |
70 | bool "Server processors" | |
5b7c3c91 BH |
71 | select PPC_FPU |
72 | ||
2d27cfd3 BH |
73 | config PPC_BOOK3E_64 |
74 | bool "Embedded processors" | |
75 | select PPC_FPU # Make it a choice ? | |
76 | ||
77 | endchoice | |
78 | ||
48c93112 BH |
79 | config PPC_BOOK3S |
80 | def_bool y | |
81 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 | |
28794d34 | 82 | |
2d27cfd3 BH |
83 | config PPC_BOOK3E |
84 | def_bool y | |
85 | depends on PPC_BOOK3E_64 | |
86 | ||
a0ae9c7c AB |
87 | config POWER4_ONLY |
88 | bool "Optimize for POWER4" | |
28794d34 | 89 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
90 | default n |
91 | ---help--- | |
92 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. | |
93 | The resulting binary will not work on POWER3 or RS64 processors | |
94 | when compiled with binutils 2.15 or later. | |
95 | ||
5b7c3c91 BH |
96 | config 6xx |
97 | def_bool y | |
98 | depends on PPC32 && PPC_BOOK3S | |
7325927e | 99 | select PPC_HAVE_PMU_SUPPORT |
5b7c3c91 | 100 | |
a0ae9c7c AB |
101 | config POWER3 |
102 | bool | |
28794d34 | 103 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
104 | default y if !POWER4_ONLY |
105 | ||
106 | config POWER4 | |
28794d34 | 107 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
108 | def_bool y |
109 | ||
3164cccd AB |
110 | config TUNE_CELL |
111 | bool "Optimize for Cell Broadband Engine" | |
28794d34 | 112 | depends on PPC64 && PPC_BOOK3S |
3164cccd AB |
113 | help |
114 | Cause the compiler to optimize for the PPE of the Cell Broadband | |
115 | Engine. This will make the code run considerably faster on Cell | |
116 | but somewhat slower on other machines. This option only changes | |
117 | the scheduling of instructions, not the selection of instructions | |
118 | itself, so the resulting kernel will keep running on all other | |
119 | machines. When building a kernel that is supposed to run only | |
120 | on Cell, you should also select the POWER4_ONLY option. | |
121 | ||
a0ae9c7c AB |
122 | # this is temp to handle compat with arch=ppc |
123 | config 8xx | |
124 | bool | |
125 | ||
a0ae9c7c | 126 | config E500 |
39aef685 | 127 | select FSL_EMB_PERFMON |
a0ae9c7c AB |
128 | bool |
129 | ||
3dfa8773 KG |
130 | config PPC_E500MC |
131 | bool "e500mc Support" | |
132 | select PPC_FPU | |
133 | depends on E500 | |
134 | ||
a0ae9c7c AB |
135 | config PPC_FPU |
136 | bool | |
137 | default y if PPC64 | |
138 | ||
5753c082 KG |
139 | config FSL_EMB_PERFMON |
140 | bool "Freescale Embedded Perfmon" | |
141 | depends on E500 || PPC_83xx | |
142 | help | |
143 | This is the Performance Monitor support found on the e500 core | |
144 | and some e300 cores (c3 and c4). Select this only if your | |
145 | core supports the Embedded Performance Monitor APU | |
146 | ||
a0ae9c7c AB |
147 | config 4xx |
148 | bool | |
149 | depends on 40x || 44x | |
150 | default y | |
151 | ||
152 | config BOOKE | |
153 | bool | |
2d27cfd3 | 154 | depends on E200 || E500 || 44x || PPC_BOOK3E |
a0ae9c7c AB |
155 | default y |
156 | ||
157 | config FSL_BOOKE | |
158 | bool | |
159 | depends on E200 || E500 | |
160 | default y | |
161 | ||
39aef685 | 162 | |
a0ae9c7c AB |
163 | config PTE_64BIT |
164 | bool | |
4ee7084e BB |
165 | depends on 44x || E500 || PPC_86xx |
166 | default y if PHYS_64BIT | |
a0ae9c7c AB |
167 | |
168 | config PHYS_64BIT | |
4ee7084e BB |
169 | bool 'Large physical address support' if E500 || PPC_86xx |
170 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx | |
a0ae9c7c AB |
171 | ---help--- |
172 | This option enables kernel support for larger than 32-bit physical | |
4ee7084e BB |
173 | addresses. This feature may not be available on all cores. |
174 | ||
175 | If you have more than 3.5GB of RAM or so, you also need to enable | |
176 | SWIOTLB under Kernel Options for this to work. The actual number | |
177 | is platform-dependent. | |
a0ae9c7c AB |
178 | |
179 | If in doubt, say N here. | |
180 | ||
181 | config ALTIVEC | |
182 | bool "AltiVec Support" | |
28794d34 | 183 | depends on 6xx || POWER4 |
a0ae9c7c AB |
184 | ---help--- |
185 | This option enables kernel support for the Altivec extensions to the | |
186 | PowerPC processor. The kernel currently supports saving and restoring | |
187 | altivec registers, and turning on the 'altivec enable' bit so user | |
188 | processes can execute altivec instructions. | |
189 | ||
190 | This option is only usefully if you have a processor that supports | |
191 | altivec (G4, otherwise known as 74xx series), but does not have | |
192 | any affect on a non-altivec cpu (it does, however add code to the | |
193 | kernel). | |
194 | ||
195 | If in doubt, say Y here. | |
196 | ||
96d5b52c MN |
197 | config VSX |
198 | bool "VSX Support" | |
199 | depends on POWER4 && ALTIVEC && PPC_FPU | |
200 | ---help--- | |
201 | ||
202 | This option enables kernel support for the Vector Scaler extensions | |
203 | to the PowerPC processor. The kernel currently supports saving and | |
204 | restoring VSX registers, and turning on the 'VSX enable' bit so user | |
205 | processes can execute VSX instructions. | |
206 | ||
207 | This option is only useful if you have a processor that supports | |
208 | VSX (P7 and above), but does not have any affect on a non-VSX | |
209 | CPUs (it does, however add code to the kernel). | |
210 | ||
211 | If in doubt, say Y here. | |
212 | ||
a0ae9c7c AB |
213 | config SPE |
214 | bool "SPE Support" | |
3dfa8773 | 215 | depends on E200 || (E500 && !PPC_E500MC) |
a0ae9c7c AB |
216 | default y |
217 | ---help--- | |
218 | This option enables kernel support for the Signal Processing | |
219 | Extensions (SPE) to the PowerPC processor. The kernel currently | |
220 | supports saving and restoring SPE registers, and turning on the | |
221 | 'spe enable' bit so user processes can execute SPE instructions. | |
222 | ||
223 | This option is only useful if you have a processor that supports | |
224 | SPE (e500, otherwise known as 85xx series), but does not have any | |
225 | effect on a non-spe cpu (it does, however add code to the kernel). | |
226 | ||
227 | If in doubt, say Y here. | |
228 | ||
229 | config PPC_STD_MMU | |
5b7c3c91 BH |
230 | def_bool y |
231 | depends on PPC_BOOK3S | |
a0ae9c7c AB |
232 | |
233 | config PPC_STD_MMU_32 | |
234 | def_bool y | |
235 | depends on PPC_STD_MMU && PPC32 | |
236 | ||
5e696617 BH |
237 | config PPC_STD_MMU_64 |
238 | def_bool y | |
239 | depends on PPC_STD_MMU && PPC64 | |
240 | ||
241 | config PPC_MMU_NOHASH | |
242 | def_bool y | |
243 | depends on !PPC_STD_MMU | |
244 | ||
2d27cfd3 BH |
245 | config PPC_MMU_NOHASH_32 |
246 | def_bool y | |
247 | depends on PPC_MMU_NOHASH && PPC32 | |
248 | ||
249 | config PPC_MMU_NOHASH_64 | |
250 | def_bool y | |
251 | depends on PPC_MMU_NOHASH && PPC64 | |
252 | ||
70fe3af8 KG |
253 | config PPC_BOOK3E_MMU |
254 | def_bool y | |
2d27cfd3 | 255 | depends on FSL_BOOKE || PPC_BOOK3E |
70fe3af8 | 256 | |
a0ae9c7c AB |
257 | config PPC_MM_SLICES |
258 | bool | |
ca9153a3 | 259 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
a0ae9c7c AB |
260 | default n |
261 | ||
262 | config VIRT_CPU_ACCOUNTING | |
263 | bool "Deterministic task and CPU time accounting" | |
264 | depends on PPC64 | |
265 | default y | |
266 | help | |
267 | Select this option to enable more accurate task and CPU time | |
268 | accounting. This is done by reading a CPU counter on each | |
269 | kernel entry and exit and on transitions within the kernel | |
270 | between system, softirq and hardirq state, so there is a | |
271 | small performance impact. This also enables accounting of | |
272 | stolen time on logically-partitioned systems running on | |
273 | IBM POWER5-based machines. | |
274 | ||
275 | If in doubt, say Y here. | |
276 | ||
105988c0 PM |
277 | config PPC_HAVE_PMU_SUPPORT |
278 | bool | |
279 | ||
280 | config PPC_PERF_CTRS | |
281 | def_bool y | |
cdd6c482 | 282 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
105988c0 | 283 | help |
cdd6c482 | 284 | This enables the powerpc-specific perf_event back-end. |
105988c0 | 285 | |
a0ae9c7c | 286 | config SMP |
2d27cfd3 | 287 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE |
a0ae9c7c AB |
288 | bool "Symmetric multi-processing support" |
289 | ---help--- | |
290 | This enables support for systems with more than one CPU. If you have | |
291 | a system with only one CPU, say N. If you have a system with more | |
292 | than one CPU, say Y. Note that the kernel does not currently | |
293 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors | |
294 | since they have inadequate hardware support for multiprocessor | |
295 | operation. | |
296 | ||
297 | If you say N here, the kernel will run on single and multiprocessor | |
298 | machines, but will use only one CPU of a multiprocessor machine. If | |
299 | you say Y here, the kernel will run on single-processor machines. | |
300 | On a single-processor machine, the kernel will run faster if you say | |
301 | N here. | |
302 | ||
303 | If you don't know what to do here, say N. | |
304 | ||
305 | config NR_CPUS | |
2d8ae638 MN |
306 | int "Maximum number of CPUs (2-8192)" |
307 | range 2 8192 | |
a0ae9c7c AB |
308 | depends on SMP |
309 | default "32" if PPC64 | |
310 | default "4" | |
311 | ||
312 | config NOT_COHERENT_CACHE | |
313 | bool | |
e177edcd | 314 | depends on 4xx || 8xx || E200 || PPC_MPC512x |
a0ae9c7c AB |
315 | default y |
316 | ||
f8eb77d6 | 317 | config CHECK_CACHE_COHERENCY |
a0ae9c7c AB |
318 | bool |
319 | ||
320 | endmenu |