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ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
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1da177e4 1/*
0ddbccd1 2 * linux/arch/arm/mm/dma-mapping.c
1da177e4
LT
3 *
4 * Copyright (C) 2000-2004 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * DMA uncached mapping support.
11 */
12#include <linux/module.h>
13#include <linux/mm.h>
5a0e3ad6 14#include <linux/gfp.h>
1da177e4
LT
15#include <linux/errno.h>
16#include <linux/list.h>
17#include <linux/init.h>
18#include <linux/device.h>
19#include <linux/dma-mapping.h>
20
23759dc6 21#include <asm/memory.h>
43377453 22#include <asm/highmem.h>
1da177e4 23#include <asm/cacheflush.h>
1da177e4 24#include <asm/tlbflush.h>
37134cd5
KH
25#include <asm/sizes.h>
26
ab6494f0
CM
27static u64 get_coherent_dma_mask(struct device *dev)
28{
29 u64 mask = ISA_DMA_THRESHOLD;
30
31 if (dev) {
32 mask = dev->coherent_dma_mask;
33
34 /*
35 * Sanity check the DMA mask - it must be non-zero, and
36 * must be able to be satisfied by a DMA allocation.
37 */
38 if (mask == 0) {
39 dev_warn(dev, "coherent DMA mask is unset\n");
40 return 0;
41 }
42
43 if ((~mask) & ISA_DMA_THRESHOLD) {
44 dev_warn(dev, "coherent DMA mask %#llx is smaller "
45 "than system GFP_DMA mask %#llx\n",
46 mask, (unsigned long long)ISA_DMA_THRESHOLD);
47 return 0;
48 }
49 }
1da177e4 50
ab6494f0
CM
51 return mask;
52}
53
7a9a32a9
RK
54/*
55 * Allocate a DMA buffer for 'dev' of size 'size' using the
56 * specified gfp mask. Note that 'size' must be page aligned.
57 */
58static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
59{
60 unsigned long order = get_order(size);
61 struct page *page, *p, *e;
62 void *ptr;
63 u64 mask = get_coherent_dma_mask(dev);
64
65#ifdef CONFIG_DMA_API_DEBUG
66 u64 limit = (mask + 1) & ~mask;
67 if (limit && size >= limit) {
68 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
69 size, mask);
70 return NULL;
71 }
72#endif
73
74 if (!mask)
75 return NULL;
76
77 if (mask < 0xffffffffULL)
78 gfp |= GFP_DMA;
79
80 page = alloc_pages(gfp, order);
81 if (!page)
82 return NULL;
83
84 /*
85 * Now split the huge page and free the excess pages
86 */
87 split_page(page, order);
88 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
89 __free_page(p);
90
91 /*
92 * Ensure that the allocated pages are zeroed, and that any data
93 * lurking in the kernel direct-mapped region is invalidated.
94 */
95 ptr = page_address(page);
96 memset(ptr, 0, size);
97 dmac_flush_range(ptr, ptr + size);
98 outer_flush_range(__pa(ptr), __pa(ptr) + size);
99
100 return page;
101}
102
103/*
104 * Free a DMA buffer. 'size' must be page aligned.
105 */
106static void __dma_free_buffer(struct page *page, size_t size)
107{
108 struct page *e = page + (size >> PAGE_SHIFT);
109
110 while (page < e) {
111 __free_page(page);
112 page++;
113 }
114}
115
ab6494f0 116#ifdef CONFIG_MMU
a5e9d38b
CM
117/* Sanity check size */
118#if (CONSISTENT_DMA_SIZE % SZ_2M)
119#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
120#endif
121
122#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
123#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
124#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
125
1da177e4 126/*
37134cd5 127 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
1da177e4 128 */
37134cd5 129static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
1da177e4 130
13ccf3ad 131#include "vmregion.h"
1da177e4 132
13ccf3ad
RK
133static struct arm_vmregion_head consistent_head = {
134 .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
1da177e4
LT
135 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
136 .vm_start = CONSISTENT_BASE,
137 .vm_end = CONSISTENT_END,
138};
139
1da177e4
LT
140#ifdef CONFIG_HUGETLB_PAGE
141#error ARM Coherent DMA allocator does not (yet) support huge TLB
142#endif
143
88c58f3b
RK
144/*
145 * Initialise the consistent memory allocation.
146 */
147static int __init consistent_init(void)
148{
149 int ret = 0;
150 pgd_t *pgd;
151 pmd_t *pmd;
152 pte_t *pte;
153 int i = 0;
154 u32 base = CONSISTENT_BASE;
155
156 do {
157 pgd = pgd_offset(&init_mm, base);
158 pmd = pmd_alloc(&init_mm, pgd, base);
159 if (!pmd) {
160 printk(KERN_ERR "%s: no pmd tables\n", __func__);
161 ret = -ENOMEM;
162 break;
163 }
164 WARN_ON(!pmd_none(*pmd));
165
166 pte = pte_alloc_kernel(pmd, base);
167 if (!pte) {
168 printk(KERN_ERR "%s: no pte tables\n", __func__);
169 ret = -ENOMEM;
170 break;
171 }
172
173 consistent_pte[i++] = pte;
174 base += (1 << PGDIR_SHIFT);
175 } while (base < CONSISTENT_END);
176
177 return ret;
178}
179
180core_initcall(consistent_init);
181
1da177e4 182static void *
31ebf944 183__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
1da177e4 184{
13ccf3ad 185 struct arm_vmregion *c;
1da177e4 186
ebd7a845
RK
187 if (!consistent_pte[0]) {
188 printk(KERN_ERR "%s: not initialised\n", __func__);
189 dump_stack();
ebd7a845
RK
190 return NULL;
191 }
192
1da177e4
LT
193 /*
194 * Allocate a virtual address in the consistent mapping region.
195 */
13ccf3ad 196 c = arm_vmregion_alloc(&consistent_head, size,
1da177e4
LT
197 gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
198 if (c) {
37134cd5 199 pte_t *pte;
37134cd5
KH
200 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
201 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
1da177e4 202
37134cd5 203 pte = consistent_pte[idx] + off;
1da177e4
LT
204 c->vm_pages = page;
205
1da177e4
LT
206 do {
207 BUG_ON(!pte_none(*pte));
208
ad1ae2fe 209 set_pte_ext(pte, mk_pte(page, prot), 0);
1da177e4
LT
210 page++;
211 pte++;
37134cd5
KH
212 off++;
213 if (off >= PTRS_PER_PTE) {
214 off = 0;
215 pte = consistent_pte[++idx];
216 }
1da177e4
LT
217 } while (size -= PAGE_SIZE);
218
1da177e4
LT
219 return (void *)c->vm_start;
220 }
1da177e4
LT
221 return NULL;
222}
695ae0af
RK
223
224static void __dma_free_remap(void *cpu_addr, size_t size)
225{
226 struct arm_vmregion *c;
227 unsigned long addr;
228 pte_t *ptep;
229 int idx;
230 u32 off;
231
232 c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
233 if (!c) {
234 printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
235 __func__, cpu_addr);
236 dump_stack();
237 return;
238 }
239
240 if ((c->vm_end - c->vm_start) != size) {
241 printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
242 __func__, c->vm_end - c->vm_start, size);
243 dump_stack();
244 size = c->vm_end - c->vm_start;
245 }
246
247 idx = CONSISTENT_PTE_INDEX(c->vm_start);
248 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
249 ptep = consistent_pte[idx] + off;
250 addr = c->vm_start;
251 do {
252 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
695ae0af
RK
253
254 ptep++;
255 addr += PAGE_SIZE;
256 off++;
257 if (off >= PTRS_PER_PTE) {
258 off = 0;
259 ptep = consistent_pte[++idx];
260 }
261
acaac256
RK
262 if (pte_none(pte) || !pte_present(pte))
263 printk(KERN_CRIT "%s: bad page in kernel page table\n",
264 __func__);
695ae0af
RK
265 } while (size -= PAGE_SIZE);
266
267 flush_tlb_kernel_range(c->vm_start, c->vm_end);
268
269 arm_vmregion_free(&consistent_head, c);
270}
271
ab6494f0 272#else /* !CONFIG_MMU */
695ae0af 273
31ebf944
RK
274#define __dma_alloc_remap(page, size, gfp, prot) page_address(page)
275#define __dma_free_remap(addr, size) do { } while (0)
276
277#endif /* CONFIG_MMU */
278
ab6494f0
CM
279static void *
280__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
281 pgprot_t prot)
282{
04da5694 283 struct page *page;
31ebf944 284 void *addr;
ab6494f0 285
04da5694
RK
286 *handle = ~0;
287 size = PAGE_ALIGN(size);
ab6494f0 288
04da5694
RK
289 page = __dma_alloc_buffer(dev, size, gfp);
290 if (!page)
291 return NULL;
ab6494f0 292
31ebf944
RK
293 if (!arch_is_coherent())
294 addr = __dma_alloc_remap(page, size, gfp, prot);
295 else
296 addr = page_address(page);
695ae0af 297
31ebf944
RK
298 if (addr)
299 *handle = page_to_dma(dev, page);
695ae0af 300
31ebf944
RK
301 return addr;
302}
1da177e4
LT
303
304/*
305 * Allocate DMA-coherent memory space and return both the kernel remapped
306 * virtual and bus address for that space.
307 */
308void *
f9e3214a 309dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
1da177e4 310{
1fe53268
DES
311 void *memory;
312
313 if (dma_alloc_from_coherent(dev, size, handle, &memory))
314 return memory;
315
1da177e4 316 return __dma_alloc(dev, size, handle, gfp,
26a26d32 317 pgprot_dmacoherent(pgprot_kernel));
1da177e4
LT
318}
319EXPORT_SYMBOL(dma_alloc_coherent);
320
321/*
322 * Allocate a writecombining region, in much the same way as
323 * dma_alloc_coherent above.
324 */
325void *
f9e3214a 326dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
1da177e4
LT
327{
328 return __dma_alloc(dev, size, handle, gfp,
329 pgprot_writecombine(pgprot_kernel));
330}
331EXPORT_SYMBOL(dma_alloc_writecombine);
332
333static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
334 void *cpu_addr, dma_addr_t dma_addr, size_t size)
335{
ab6494f0
CM
336 int ret = -ENXIO;
337#ifdef CONFIG_MMU
13ccf3ad
RK
338 unsigned long user_size, kern_size;
339 struct arm_vmregion *c;
1da177e4
LT
340
341 user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
342
13ccf3ad 343 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
1da177e4
LT
344 if (c) {
345 unsigned long off = vma->vm_pgoff;
346
347 kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
348
349 if (off < kern_size &&
350 user_size <= (kern_size - off)) {
1da177e4
LT
351 ret = remap_pfn_range(vma, vma->vm_start,
352 page_to_pfn(c->vm_pages) + off,
353 user_size << PAGE_SHIFT,
354 vma->vm_page_prot);
355 }
356 }
ab6494f0 357#endif /* CONFIG_MMU */
1da177e4
LT
358
359 return ret;
360}
361
362int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
363 void *cpu_addr, dma_addr_t dma_addr, size_t size)
364{
26a26d32 365 vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
1da177e4
LT
366 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
367}
368EXPORT_SYMBOL(dma_mmap_coherent);
369
370int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
371 void *cpu_addr, dma_addr_t dma_addr, size_t size)
372{
373 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
374 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
375}
376EXPORT_SYMBOL(dma_mmap_writecombine);
377
378/*
379 * free a page as defined by the above mapping.
5edf71ae 380 * Must not be called with IRQs disabled.
1da177e4
LT
381 */
382void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
383{
5edf71ae
RK
384 WARN_ON(irqs_disabled());
385
1fe53268
DES
386 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
387 return;
388
3e82d012
RK
389 size = PAGE_ALIGN(size);
390
695ae0af
RK
391 if (!arch_is_coherent())
392 __dma_free_remap(cpu_addr, size);
7a9a32a9
RK
393
394 __dma_free_buffer(dma_to_page(dev, handle), size);
1da177e4
LT
395}
396EXPORT_SYMBOL(dma_free_coherent);
397
1da177e4
LT
398/*
399 * Make an area consistent for devices.
105ef9a0
DW
400 * Note: Drivers should NOT use this function directly, as it will break
401 * platforms with CONFIG_DMABOUNCE.
402 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
1da177e4 403 */
4ea0d737
RK
404void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,
405 enum dma_data_direction dir)
406{
2ffe2da3
RK
407 unsigned long paddr;
408
a9c9147e
RK
409 BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
410
411 dmac_map_area(kaddr, size, dir);
2ffe2da3
RK
412
413 paddr = __pa(kaddr);
414 if (dir == DMA_FROM_DEVICE) {
415 outer_inv_range(paddr, paddr + size);
416 } else {
417 outer_clean_range(paddr, paddr + size);
418 }
419 /* FIXME: non-speculating: flush on bidirectional mappings? */
4ea0d737
RK
420}
421EXPORT_SYMBOL(___dma_single_cpu_to_dev);
422
423void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,
424 enum dma_data_direction dir)
425{
a9c9147e
RK
426 BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
427
2ffe2da3
RK
428 /* FIXME: non-speculating: not required */
429 /* don't bother invalidating if DMA to device */
430 if (dir != DMA_TO_DEVICE) {
431 unsigned long paddr = __pa(kaddr);
432 outer_inv_range(paddr, paddr + size);
433 }
434
a9c9147e 435 dmac_unmap_area(kaddr, size, dir);
4ea0d737
RK
436}
437EXPORT_SYMBOL(___dma_single_dev_to_cpu);
afd1a321 438
4ea0d737 439static void dma_cache_maint_page(struct page *page, unsigned long offset,
a9c9147e
RK
440 size_t size, enum dma_data_direction dir,
441 void (*op)(const void *, size_t, int))
43377453
NP
442{
443 /*
444 * A single sg entry may refer to multiple physically contiguous
445 * pages. But we still need to process highmem pages individually.
446 * If highmem is not configured then the bulk of this loop gets
447 * optimized out.
448 */
449 size_t left = size;
450 do {
451 size_t len = left;
93f1d629
RK
452 void *vaddr;
453
454 if (PageHighMem(page)) {
455 if (len + offset > PAGE_SIZE) {
456 if (offset >= PAGE_SIZE) {
457 page += offset / PAGE_SIZE;
458 offset %= PAGE_SIZE;
459 }
460 len = PAGE_SIZE - offset;
461 }
462 vaddr = kmap_high_get(page);
463 if (vaddr) {
464 vaddr += offset;
a9c9147e 465 op(vaddr, len, dir);
93f1d629 466 kunmap_high(page);
7e5a69e8
NP
467 } else if (cache_is_vipt()) {
468 pte_t saved_pte;
469 vaddr = kmap_high_l1_vipt(page, &saved_pte);
470 op(vaddr + offset, len, dir);
471 kunmap_high_l1_vipt(page, saved_pte);
43377453 472 }
93f1d629
RK
473 } else {
474 vaddr = page_address(page) + offset;
a9c9147e 475 op(vaddr, len, dir);
43377453 476 }
43377453
NP
477 offset = 0;
478 page++;
479 left -= len;
480 } while (left);
481}
4ea0d737
RK
482
483void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
484 size_t size, enum dma_data_direction dir)
485{
65af191a 486 unsigned long paddr;
65af191a 487
a9c9147e 488 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
65af191a
RK
489
490 paddr = page_to_phys(page) + off;
2ffe2da3
RK
491 if (dir == DMA_FROM_DEVICE) {
492 outer_inv_range(paddr, paddr + size);
493 } else {
494 outer_clean_range(paddr, paddr + size);
495 }
496 /* FIXME: non-speculating: flush on bidirectional mappings? */
4ea0d737
RK
497}
498EXPORT_SYMBOL(___dma_page_cpu_to_dev);
499
500void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
501 size_t size, enum dma_data_direction dir)
502{
2ffe2da3
RK
503 unsigned long paddr = page_to_phys(page) + off;
504
505 /* FIXME: non-speculating: not required */
506 /* don't bother invalidating if DMA to device */
507 if (dir != DMA_TO_DEVICE)
508 outer_inv_range(paddr, paddr + size);
509
a9c9147e 510 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
4ea0d737
RK
511}
512EXPORT_SYMBOL(___dma_page_dev_to_cpu);
43377453 513
afd1a321
RK
514/**
515 * dma_map_sg - map a set of SG buffers for streaming mode DMA
516 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
517 * @sg: list of buffers
518 * @nents: number of buffers to map
519 * @dir: DMA transfer direction
520 *
521 * Map a set of buffers described by scatterlist in streaming mode for DMA.
522 * This is the scatter-gather version of the dma_map_single interface.
523 * Here the scatter gather list elements are each tagged with the
524 * appropriate dma address and length. They are obtained via
525 * sg_dma_{address,length}.
526 *
527 * Device ownership issues as mentioned for dma_map_single are the same
528 * here.
529 */
530int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
531 enum dma_data_direction dir)
532{
533 struct scatterlist *s;
01135d92 534 int i, j;
afd1a321
RK
535
536 for_each_sg(sg, s, nents, i) {
01135d92
RK
537 s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
538 s->length, dir);
539 if (dma_mapping_error(dev, s->dma_address))
540 goto bad_mapping;
afd1a321 541 }
afd1a321 542 return nents;
01135d92
RK
543
544 bad_mapping:
545 for_each_sg(sg, s, i, j)
546 dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
547 return 0;
afd1a321
RK
548}
549EXPORT_SYMBOL(dma_map_sg);
550
551/**
552 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
553 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
554 * @sg: list of buffers
555 * @nents: number of buffers to unmap (returned from dma_map_sg)
556 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
557 *
558 * Unmap a set of streaming mode DMA translations. Again, CPU access
559 * rules concerning calls here are the same as for dma_unmap_single().
560 */
561void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
562 enum dma_data_direction dir)
563{
01135d92
RK
564 struct scatterlist *s;
565 int i;
566
567 for_each_sg(sg, s, nents, i)
568 dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
afd1a321
RK
569}
570EXPORT_SYMBOL(dma_unmap_sg);
571
572/**
573 * dma_sync_sg_for_cpu
574 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
575 * @sg: list of buffers
576 * @nents: number of buffers to map (returned from dma_map_sg)
577 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
578 */
579void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
580 int nents, enum dma_data_direction dir)
581{
582 struct scatterlist *s;
583 int i;
584
585 for_each_sg(sg, s, nents, i) {
18eabe23
RK
586 if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
587 sg_dma_len(s), dir))
588 continue;
589
590 __dma_page_dev_to_cpu(sg_page(s), s->offset,
591 s->length, dir);
afd1a321
RK
592 }
593}
594EXPORT_SYMBOL(dma_sync_sg_for_cpu);
595
596/**
597 * dma_sync_sg_for_device
598 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
599 * @sg: list of buffers
600 * @nents: number of buffers to map (returned from dma_map_sg)
601 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
602 */
603void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
604 int nents, enum dma_data_direction dir)
605{
606 struct scatterlist *s;
607 int i;
608
609 for_each_sg(sg, s, nents, i) {
2638b4db
RK
610 if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
611 sg_dma_len(s), dir))
612 continue;
613
18eabe23
RK
614 __dma_page_cpu_to_dev(sg_page(s), s->offset,
615 s->length, dir);
afd1a321
RK
616 }
617}
618EXPORT_SYMBOL(dma_sync_sg_for_device);