git://bbs.cooldavid.org / net-next-2.6.git / blame
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1 | /* linux/arch/arm/mach-s5pv310/include/mach/regs-clock.h |
| 2 | * | |
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
| 4 | * http://www.samsung.com/ | |
| 5 | * | |
| 6 | * S5PV310 - Clock register definitions | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | |
| 14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | |
| 15 | ||
| 16 | #include <mach/map.h> | |
| 17 | ||
| c598c47d | 18 | #define S5P_CLKREG(x) (S5P_VA_CMU + (x)) |
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19 | |
| 20 | #define S5P_INFORM0 S5P_CLKREG(0x800) | |
| 21 | ||
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22 | #define S5P_EPLL_CON0 S5P_CLKREG(0x0C110) |
| 23 | #define S5P_EPLL_CON1 S5P_CLKREG(0x0C114) | |
| 24 | #define S5P_VPLL_CON0 S5P_CLKREG(0x0C120) | |
| 25 | #define S5P_VPLL_CON1 S5P_CLKREG(0x0C124) | |
| c8bef140 | 26 | |
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27 | #define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210) |
| 28 | #define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214) | |
| c8bef140 | 29 | |
| c598c47d | 30 | #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250) |
| c8bef140 | 31 | |
| c598c47d | 32 | #define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510) |
| c8bef140 | 33 | |
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34 | #define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x0C550) |
| 35 | #define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x0C554) | |
| 36 | #define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x0C558) | |
| 37 | #define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x0C55C) | |
| 38 | #define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x0C560) | |
| 39 | #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) | |
| c8bef140 | 40 | |
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41 | #define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) |
| 42 | ||
| c598c47d | 43 | #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) |
| c8bef140 | 44 | |
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45 | #define S5P_CLKSRC_CORE S5P_CLKREG(0x10200) |
| 46 | #define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500) | |
| c8bef140 | 47 | |
| c598c47d KK |
48 | #define S5P_APLL_LOCK S5P_CLKREG(0x14000) |
| 49 | #define S5P_MPLL_LOCK S5P_CLKREG(0x14004) | |
| 50 | #define S5P_APLL_CON0 S5P_CLKREG(0x14100) | |
| 51 | #define S5P_APLL_CON1 S5P_CLKREG(0x14104) | |
| 52 | #define S5P_MPLL_CON0 S5P_CLKREG(0x14108) | |
| 53 | #define S5P_MPLL_CON1 S5P_CLKREG(0x1410C) | |
| c8bef140 | 54 | |
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55 | #define S5P_CLKSRC_CPU S5P_CLKREG(0x14200) |
| 56 | #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) | |
| c8bef140 | 57 | |
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58 | #define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) |
| 59 | #define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600) | |
| c8bef140 | 60 | |
| c598c47d | 61 | #define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800) |
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62 | |
| 63 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ |