[net-next-2.6.git] / arch / arm / mach-realview / realview_pba8.c

/*
 *  linux/arch/arm/mach-realview/realview_pba8.c
 *
 *  Copyright (C) 2008 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>

#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include <mach/hardware.h>
#include <mach/board-pba8.h>
#include <mach/irqs.h>

#include "core.h"

static struct map_desc realview_pba8_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_PCI
	{
		.virtual	= PCIX_UNIT_BASE,
		.pfn		= __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
		.length		= REALVIEW_PBA8_PCI_BASE_SIZE,
		.type		= MT_DEVICE
	},
#endif
#ifdef CONFIG_DEBUG_LL
	{
		.virtual	= IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#endif
};

static void __init realview_pba8_map_io(void)
{
	iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
}

static struct pl061_platform_data gpio0_plat_data = {
	.gpio_base	= 0,
	.irq_base	= -1,
};

static struct pl061_platform_data gpio1_plat_data = {
	.gpio_base	= 8,
	.irq_base	= -1,
};

static struct pl061_platform_data gpio2_plat_data = {
	.gpio_base	= 16,
	.irq_base	= -1,
};

/*
 * RealView PBA8Core AMBA devices
 */

#define GPIO2_IRQ		{ IRQ_PBA8_GPIO2, NO_IRQ }
#define GPIO2_DMA		{ 0, 0 }
#define GPIO3_IRQ		{ IRQ_PBA8_GPIO3, NO_IRQ }
#define GPIO3_DMA		{ 0, 0 }
#define AACI_IRQ		{ IRQ_PBA8_AACI, NO_IRQ }
#define AACI_DMA		{ 0x80, 0x81 }
#define MMCI0_IRQ		{ IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
#define MMCI0_DMA		{ 0x84, 0 }
#define KMI0_IRQ		{ IRQ_PBA8_KMI0, NO_IRQ }
#define KMI0_DMA		{ 0, 0 }
#define KMI1_IRQ		{ IRQ_PBA8_KMI1, NO_IRQ }
#define KMI1_DMA		{ 0, 0 }
#define PBA8_SMC_IRQ		{ NO_IRQ, NO_IRQ }
#define PBA8_SMC_DMA		{ 0, 0 }
#define MPMC_IRQ		{ NO_IRQ, NO_IRQ }
#define MPMC_DMA		{ 0, 0 }
#define PBA8_CLCD_IRQ		{ IRQ_PBA8_CLCD, NO_IRQ }
#define PBA8_CLCD_DMA		{ 0, 0 }
#define DMAC_IRQ		{ IRQ_PBA8_DMAC, NO_IRQ }
#define DMAC_DMA		{ 0, 0 }
#define SCTL_IRQ		{ NO_IRQ, NO_IRQ }
#define SCTL_DMA		{ 0, 0 }
#define PBA8_WATCHDOG_IRQ	{ IRQ_PBA8_WATCHDOG, NO_IRQ }
#define PBA8_WATCHDOG_DMA	{ 0, 0 }
#define PBA8_GPIO0_IRQ		{ IRQ_PBA8_GPIO0, NO_IRQ }
#define PBA8_GPIO0_DMA		{ 0, 0 }
#define GPIO1_IRQ		{ IRQ_PBA8_GPIO1, NO_IRQ }
#define GPIO1_DMA		{ 0, 0 }
#define PBA8_RTC_IRQ		{ IRQ_PBA8_RTC, NO_IRQ }
#define PBA8_RTC_DMA		{ 0, 0 }
#define SCI_IRQ			{ IRQ_PBA8_SCI, NO_IRQ }
#define SCI_DMA			{ 7, 6 }
#define PBA8_UART0_IRQ		{ IRQ_PBA8_UART0, NO_IRQ }
#define PBA8_UART0_DMA		{ 15, 14 }
#define PBA8_UART1_IRQ		{ IRQ_PBA8_UART1, NO_IRQ }
#define PBA8_UART1_DMA		{ 13, 12 }
#define PBA8_UART2_IRQ		{ IRQ_PBA8_UART2, NO_IRQ }
#define PBA8_UART2_DMA		{ 11, 10 }
#define PBA8_UART3_IRQ		{ IRQ_PBA8_UART3, NO_IRQ }
#define PBA8_UART3_DMA		{ 0x86, 0x87 }
#define PBA8_SSP_IRQ		{ IRQ_PBA8_SSP, NO_IRQ }
#define PBA8_SSP_DMA		{ 9, 8 }

/* FPGA Primecells */
AMBA_DEVICE(aaci,	"fpga:aaci",	AACI,		NULL);
AMBA_DEVICE(mmc0,	"fpga:mmc0",	MMCI0,		&realview_mmc0_plat_data);
AMBA_DEVICE(kmi0,	"fpga:kmi0",	KMI0,		NULL);
AMBA_DEVICE(kmi1,	"fpga:kmi1",	KMI1,		NULL);
AMBA_DEVICE(uart3,	"fpga:uart3",	PBA8_UART3,	NULL);

/* DevChip Primecells */
AMBA_DEVICE(smc,	"dev:smc",	PBA8_SMC,	NULL);
AMBA_DEVICE(sctl,	"dev:sctl",	SCTL,		NULL);
AMBA_DEVICE(wdog,	"dev:wdog",	PBA8_WATCHDOG, NULL);
AMBA_DEVICE(gpio0,	"dev:gpio0",	PBA8_GPIO0,	&gpio0_plat_data);
AMBA_DEVICE(gpio1,	"dev:gpio1",	GPIO1,		&gpio1_plat_data);
AMBA_DEVICE(gpio2,	"dev:gpio2",	GPIO2,		&gpio2_plat_data);
AMBA_DEVICE(rtc,	"dev:rtc",	PBA8_RTC,	NULL);
AMBA_DEVICE(sci0,	"dev:sci0",	SCI,		NULL);
AMBA_DEVICE(uart0,	"dev:uart0",	PBA8_UART0,	NULL);
AMBA_DEVICE(uart1,	"dev:uart1",	PBA8_UART1,	NULL);
AMBA_DEVICE(uart2,	"dev:uart2",	PBA8_UART2,	NULL);
AMBA_DEVICE(ssp0,	"dev:ssp0",	PBA8_SSP,	NULL);

/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd,	"issp:clcd",	PBA8_CLCD,	&clcd_plat_data);
AMBA_DEVICE(dmac,	"issp:dmac",	DMAC,		NULL);

static struct amba_device *amba_devs[] __initdata = {
	&dmac_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&smc_device,
	&clcd_device,
	&sctl_device,
	&wdog_device,
	&gpio0_device,
	&gpio1_device,
	&gpio2_device,
	&rtc_device,
	&sci0_device,
	&ssp0_device,
	&aaci_device,
	&mmc0_device,
	&kmi0_device,
	&kmi1_device,
};

/*
 * RealView PB-A8 platform devices
 */
static struct resource realview_pba8_flash_resource[] = {
	[0] = {
		.start		= REALVIEW_PBA8_FLASH0_BASE,
		.end		= REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= REALVIEW_PBA8_FLASH1_BASE,
		.end		= REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
};

static struct resource realview_pba8_smsc911x_resources[] = {
	[0] = {
		.start		= REALVIEW_PBA8_ETH_BASE,
		.end		= REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PBA8_ETH,
		.end		= IRQ_PBA8_ETH,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource realview_pba8_isp1761_resources[] = {
	[0] = {
		.start		= REALVIEW_PBA8_USB_BASE,
		.end		= REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PBA8_USB,
		.end		= IRQ_PBA8_USB,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource pmu_resource = {
	.start		= IRQ_PBA8_PMU,
	.end		= IRQ_PBA8_PMU,
	.flags		= IORESOURCE_IRQ,
};

static struct platform_device pmu_device = {
	.name			= "arm-pmu",
	.id			= ARM_PMU_DEVICE_CPU,
	.num_resources		= 1,
	.resource		= &pmu_resource,
};

static void __init gic_init_irq(void)
{
	/* ARM PB-A8 on-board GIC */
	gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
	gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
	gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
}

static void __init realview_pba8_timer_init(void)
{
	timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
	timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
	timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
	timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;

	realview_timer_init(IRQ_PBA8_TIMER0_1);
}

static struct sys_timer realview_pba8_timer = {
	.init		= realview_pba8_timer_init,
};

static void realview_pba8_reset(char mode)
{
	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);

	/*
	 * To reset, we hit the on-board reset register
	 * in the system FPGA
	 */
	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	__raw_writel(0x0000, reset_ctrl);
	__raw_writel(0x0004, reset_ctrl);
}

static void __init realview_pba8_init(void)
{
	int i;

	realview_flash_register(realview_pba8_flash_resource,
				ARRAY_SIZE(realview_pba8_flash_resource));
	realview_eth_register(NULL, realview_pba8_smsc911x_resources);
	platform_device_register(&realview_i2c_device);
	platform_device_register(&realview_cf_device);
	realview_usb_register(realview_pba8_isp1761_resources);
	platform_device_register(&pmu_device);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}

#ifdef CONFIG_LEDS
	leds_event = realview_leds_event;
#endif
	realview_reset = realview_pba8_reset;
}

MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	.phys_io	= REALVIEW_PBA8_UART0_BASE & SECTION_MASK,
	.io_pg_offst	= (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
	.boot_params	= PHYS_OFFSET + 0x00000100,
	.fixup		= realview_fixup,
	.map_io		= realview_pba8_map_io,
	.init_irq	= gic_init_irq,
	.timer		= &realview_pba8_timer,
	.init_machine	= realview_pba8_init,
MACHINE_END
Commit	Line	Data
e7c70825 BB	1	/*
	2	* linux/arch/arm/mach-realview/realview_pba8.c
	3	*
	4	* Copyright (C) 2008 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	#include <linux/init.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/sysdev.h>
	25	#include <linux/amba/bus.h>
eb7fffa3	26	#include <linux/amba/pl061.h>
6ef297f8	27	#include <linux/amba/mmci.h>
e7c70825 BB	28	#include <linux/io.h>
	29
	30	#include <asm/irq.h>
	31	#include <asm/leds.h>
	32	#include <asm/mach-types.h>
f417cbad	33	#include <asm/pmu.h>
cc9897df	34	#include <asm/pgtable.h>
e7c70825	35	#include <asm/hardware/gic.h>
e7c70825 BB	36
	37	#include <asm/mach/arch.h>
	38	#include <asm/mach/map.h>
e7c70825 BB	39	#include <asm/mach/time.h>
	40
	41	#include <mach/hardware.h>
	42	#include <mach/board-pba8.h>
	43	#include <mach/irqs.h>
	44
	45	#include "core.h"
e7c70825 BB	46
	47	static struct map_desc realview_pba8_io_desc[] __initdata = {
	48	{
	49	.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
	50	.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
	51	.length = SZ_4K,
	52	.type = MT_DEVICE,
	53	}, {
	54	.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
	55	.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
	56	.length = SZ_4K,
	57	.type = MT_DEVICE,
	58	}, {
	59	.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
	60	.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
	61	.length = SZ_4K,
	62	.type = MT_DEVICE,
	63	}, {
	64	.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
	65	.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
	66	.length = SZ_4K,
	67	.type = MT_DEVICE,
	68	}, {
	69	.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
	70	.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
	71	.length = SZ_4K,
	72	.type = MT_DEVICE,
	73	}, {
	74	.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
	75	.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
	76	.length = SZ_4K,
	77	.type = MT_DEVICE,
	78	},
	79	#ifdef CONFIG_PCI
	80	{
	81	.virtual = PCIX_UNIT_BASE,
	82	.pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
	83	.length = REALVIEW_PBA8_PCI_BASE_SIZE,
	84	.type = MT_DEVICE
	85	},
	86	#endif
	87	#ifdef CONFIG_DEBUG_LL
	88	{
	89	.virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
	90	.pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
	91	.length = SZ_4K,
	92	.type = MT_DEVICE,
	93	},
	94	#endif
	95	};
	96
	97	static void __init realview_pba8_map_io(void)
	98	{
	99	iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
	100	}
	101
eb7fffa3 RK	102	static struct pl061_platform_data gpio0_plat_data = {
	103	.gpio_base = 0,
	104	.irq_base = -1,
	105	};
	106
	107	static struct pl061_platform_data gpio1_plat_data = {
	108	.gpio_base = 8,
	109	.irq_base = -1,
	110	};
	111
	112	static struct pl061_platform_data gpio2_plat_data = {
	113	.gpio_base = 16,
	114	.irq_base = -1,
	115	};
	116
e7c70825 BB	117	/*
	118	* RealView PBA8Core AMBA devices
	119	*/
	120
	121	#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
	122	#define GPIO2_DMA { 0, 0 }
	123	#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
	124	#define GPIO3_DMA { 0, 0 }
	125	#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
	126	#define AACI_DMA { 0x80, 0x81 }
	127	#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
	128	#define MMCI0_DMA { 0x84, 0 }
	129	#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
	130	#define KMI0_DMA { 0, 0 }
	131	#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
	132	#define KMI1_DMA { 0, 0 }
	133	#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
	134	#define PBA8_SMC_DMA { 0, 0 }
	135	#define MPMC_IRQ { NO_IRQ, NO_IRQ }
	136	#define MPMC_DMA { 0, 0 }
	137	#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
	138	#define PBA8_CLCD_DMA { 0, 0 }
	139	#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
	140	#define DMAC_DMA { 0, 0 }
	141	#define SCTL_IRQ { NO_IRQ, NO_IRQ }
	142	#define SCTL_DMA { 0, 0 }
	143	#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
	144	#define PBA8_WATCHDOG_DMA { 0, 0 }
	145	#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
	146	#define PBA8_GPIO0_DMA { 0, 0 }
	147	#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
	148	#define GPIO1_DMA { 0, 0 }
	149	#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
	150	#define PBA8_RTC_DMA { 0, 0 }
	151	#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
	152	#define SCI_DMA { 7, 6 }
	153	#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
	154	#define PBA8_UART0_DMA { 15, 14 }
	155	#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
	156	#define PBA8_UART1_DMA { 13, 12 }
	157	#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
	158	#define PBA8_UART2_DMA { 11, 10 }
	159	#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
	160	#define PBA8_UART3_DMA { 0x86, 0x87 }
	161	#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
	162	#define PBA8_SSP_DMA { 9, 8 }
	163
	164	/* FPGA Primecells */
4321532c LW	165	AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
	166	AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
	167	AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
	168	AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
	169	AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
e7c70825 BB	170
e7c70825 BB	171	/* DevChip Primecells */
4321532c LW	172	AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
	173	AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
	174	AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
	175	AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
	176	AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
	177	AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
	178	AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
	179	AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
	180	AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
	181	AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
	182	AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
	183	AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, NULL);
e7c70825 BB	184
e7c70825 BB	185	/* Primecells on the NEC ISSP chip */
4321532c LW	186	AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
4321532c LW	187	AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
e7c70825 BB	188
	189	static struct amba_device *amba_devs[] __initdata = {
	190	&dmac_device,
	191	&uart0_device,
	192	&uart1_device,
	193	&uart2_device,
	194	&uart3_device,
	195	&smc_device,
	196	&clcd_device,
	197	&sctl_device,
	198	&wdog_device,
	199	&gpio0_device,
	200	&gpio1_device,
	201	&gpio2_device,
	202	&rtc_device,
	203	&sci0_device,
	204	&ssp0_device,
	205	&aaci_device,
	206	&mmc0_device,
	207	&kmi0_device,
	208	&kmi1_device,
	209	};
	210
	211	/*
	212	* RealView PB-A8 platform devices
	213	*/
	214	static struct resource realview_pba8_flash_resource[] = {
	215	[0] = {
	216	.start = REALVIEW_PBA8_FLASH0_BASE,
	217	.end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
	218	.flags = IORESOURCE_MEM,
	219	},
	220	[1] = {
	221	.start = REALVIEW_PBA8_FLASH1_BASE,
	222	.end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
	223	.flags = IORESOURCE_MEM,
	224	},
	225	};
	226
	227	static struct resource realview_pba8_smsc911x_resources[] = {
	228	[0] = {
	229	.start = REALVIEW_PBA8_ETH_BASE,
	230	.end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
	231	.flags = IORESOURCE_MEM,
	232	},
	233	[1] = {
	234	.start = IRQ_PBA8_ETH,
	235	.end = IRQ_PBA8_ETH,
	236	.flags = IORESOURCE_IRQ,
	237	},
	238	};
	239
7db21712 CM	240	static struct resource realview_pba8_isp1761_resources[] = {
	241	[0] = {
	242	.start = REALVIEW_PBA8_USB_BASE,
	243	.end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
	244	.flags = IORESOURCE_MEM,
	245	},
	246	[1] = {
	247	.start = IRQ_PBA8_USB,
	248	.end = IRQ_PBA8_USB,
	249	.flags = IORESOURCE_IRQ,
	250	},
	251	};
	252
f417cbad WD	253	static struct resource pmu_resource = {
	254	.start = IRQ_PBA8_PMU,
	255	.end = IRQ_PBA8_PMU,
	256	.flags = IORESOURCE_IRQ,
	257	};
	258
	259	static struct platform_device pmu_device = {
	260	.name = "arm-pmu",
	261	.id = ARM_PMU_DEVICE_CPU,
	262	.num_resources = 1,
	263	.resource = &pmu_resource,
	264	};
	265
e7c70825 BB	266	static void __init gic_init_irq(void)
	267	{
	268	/* ARM PB-A8 on-board GIC */
	269	gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
	270	gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
	271	gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
	272	}
	273
	274	static void __init realview_pba8_timer_init(void)
	275	{
	276	timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
	277	timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
	278	timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
	279	timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
	280
	281	realview_timer_init(IRQ_PBA8_TIMER0_1);
	282	}
	283
	284	static struct sys_timer realview_pba8_timer = {
	285	.init = realview_pba8_timer_init,
	286	};
	287
4c9f8be7 CT	288	static void realview_pba8_reset(char mode)
	289	{
	290	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	291	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	292
	293	/*
	294	* To reset, we hit the on-board reset register
	295	* in the system FPGA
	296	*/
	297	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	298	__raw_writel(0x0000, reset_ctrl);
	299	__raw_writel(0x0004, reset_ctrl);
	300	}
	301
e7c70825 BB	302	static void __init realview_pba8_init(void)
	303	{
	304	int i;
	305
	306	realview_flash_register(realview_pba8_flash_resource,
	307	ARRAY_SIZE(realview_pba8_flash_resource));
0a381330	308	realview_eth_register(NULL, realview_pba8_smsc911x_resources);
e7c70825	309	platform_device_register(&realview_i2c_device);
6be62ba2	310	platform_device_register(&realview_cf_device);
7db21712	311	realview_usb_register(realview_pba8_isp1761_resources);
f417cbad	312	platform_device_register(&pmu_device);
e7c70825 BB	313
	314	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	315	struct amba_device *d = amba_devs[i];
	316	amba_device_register(d, &iomem_resource);
	317	}
	318
	319	#ifdef CONFIG_LEDS
	320	leds_event = realview_leds_event;
	321	#endif
4c9f8be7	322	realview_reset = realview_pba8_reset;
e7c70825 BB	323	}
	324
	325	MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
	326	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
cc9897df	327	.phys_io = REALVIEW_PBA8_UART0_BASE & SECTION_MASK,
e7c70825 BB	328	.io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
e7c70825 BB	329	.boot_params = PHYS_OFFSET + 0x00000100,
5b39d154	330	.fixup = realview_fixup,
e7c70825 BB	331	.map_io = realview_pba8_map_io,
	332	.init_irq = gic_init_irq,
	333	.timer = &realview_pba8_timer,
	334	.init_machine = realview_pba8_init,
	335	MACHINE_END