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ARM: mx3: mx31lilly: fix build error for !CONFIG_USB_ULPI
[net-next-2.6.git] / arch / arm / mach-mx3 / mach-mx31lilly.c
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1/*
2 * LILLY-1131 module support
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * based on code for other MX31 boards,
7 *
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/types.h>
28#include <linux/init.h>
29#include <linux/clk.h>
066fb847 30#include <linux/gpio.h>
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31#include <linux/platform_device.h>
32#include <linux/interrupt.h>
33#include <linux/smsc911x.h>
38160e0b 34#include <linux/mtd/physmap.h>
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35#include <linux/spi/spi.h>
36#include <linux/mfd/mc13783.h>
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37#include <linux/usb/otg.h>
38#include <linux/usb/ulpi.h>
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39
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <asm/mach/time.h>
43#include <asm/mach/map.h>
44
45#include <mach/hardware.h>
46#include <mach/common.h>
47#include <mach/iomux-mx3.h>
48#include <mach/board-mx31lilly.h>
3ea2e1a4 49#include <mach/spi.h>
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50#include <mach/mxc_ehci.h>
51#include <mach/ulpi.h>
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52
53#include "devices.h"
54
55/*
56 * This file contains module-specific initialization routines for LILLY-1131.
57 * Initialization of peripherals found on the baseboard is implemented in the
58 * appropriate baseboard support code.
59 */
60
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61/* SMSC ethernet support */
62
63static struct resource smsc91x_resources[] = {
64 {
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65 .start = MX31_CS4_BASE_ADDR,
66 .end = MX31_CS4_BASE_ADDR + 0xffff,
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67 .flags = IORESOURCE_MEM,
68 },
69 {
70 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
71 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
72 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
73 }
74};
75
76static struct smsc911x_platform_config smsc911x_config = {
77 .phy_interface = PHY_INTERFACE_MODE_MII,
78 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
79 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
80 .flags = SMSC911X_USE_32BIT |
81 SMSC911X_SAVE_MAC_ADDRESS |
82 SMSC911X_FORCE_INTERNAL_PHY,
83};
84
85static struct platform_device smsc91x_device = {
86 .name = "smsc911x",
87 .id = -1,
88 .num_resources = ARRAY_SIZE(smsc91x_resources),
89 .resource = smsc91x_resources,
90 .dev = {
91 .platform_data = &smsc911x_config,
92 }
93};
94
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95/* NOR flash */
96static struct physmap_flash_data nor_flash_data = {
97 .width = 2,
98};
99
100static struct resource nor_flash_resource = {
101 .start = 0xa0000000,
102 .end = 0xa1ffffff,
103 .flags = IORESOURCE_MEM,
104};
105
106static struct platform_device physmap_flash_device = {
107 .name = "physmap-flash",
108 .id = 0,
109 .dev = {
110 .platform_data = &nor_flash_data,
111 },
112 .resource = &nor_flash_resource,
113 .num_resources = 1,
114};
115
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116/* USB */
117
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118#if defined(CONFIG_USB_ULPI)
119
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120#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
121 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
122
123static int usbotg_init(struct platform_device *pdev)
124{
125 unsigned int pins[] = {
126 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
127 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
128 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
129 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
130 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
131 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
132 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
133 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
134 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
135 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
136 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
137 MX31_PIN_USBOTG_STP__USBOTG_STP,
138 };
139
140 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
141
142 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
143 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
144 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
154
155 mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
156 mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
157
158 /* chip select */
159 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
160 "USBOTG_CS");
161 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
162 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
163
164 return 0;
165}
166
167static int usbh1_init(struct platform_device *pdev)
168{
169 int pins[] = {
170 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
171 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
172 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
173 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
174 MX31_PIN_CSPI1_SS2__USBH1_RCV,
175 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
176 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
177 };
178
179 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
180
181 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
182 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
183 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
184 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
185 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
186 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
187 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
188
189 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
190
191 return 0;
192}
193
194static int usbh2_init(struct platform_device *pdev)
195{
196 int pins[] = {
197 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
198 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
199 MX31_PIN_USBH2_CLK__USBH2_CLK,
200 MX31_PIN_USBH2_DIR__USBH2_DIR,
201 MX31_PIN_USBH2_NXT__USBH2_NXT,
202 MX31_PIN_USBH2_STP__USBH2_STP,
203 };
204
205 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
206
207 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
208 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
209 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
210 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
211 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
212 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
213 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
214 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
215 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
216 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
217 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
218 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
219
220 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
221
222 /* chip select */
223 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
224 "USBH2_CS");
225 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
226 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
227
228 return 0;
229}
230
231static struct mxc_usbh_platform_data usbotg_pdata = {
232 .init = usbotg_init,
233 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
234 .flags = MXC_EHCI_POWER_PINS_ENABLED,
235};
236
237static struct mxc_usbh_platform_data usbh1_pdata = {
238 .init = usbh1_init,
239 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
240 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
241};
242
243static struct mxc_usbh_platform_data usbh2_pdata = {
244 .init = usbh2_init,
245 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
246 .flags = MXC_EHCI_POWER_PINS_ENABLED,
247};
248
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249static void lilly1131_usb_init(void)
250{
251 usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
252 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
253 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
254 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
255
256 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
257 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
258}
259
260#else
261static inline void lilly1131_usb_init(void) {}
262#endif /* CONFIG_USB_ULPI */
cbaa6ca1 263
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264/* SPI */
265
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266static int spi_internal_chipselect[] = {
267 MXC_SPI_CS(0),
268 MXC_SPI_CS(1),
269 MXC_SPI_CS(2),
270};
271
272static struct spi_imx_master spi0_pdata = {
273 .chipselect = spi_internal_chipselect,
274 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
275};
276
277static struct spi_imx_master spi1_pdata = {
278 .chipselect = spi_internal_chipselect,
279 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
280};
281
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282static struct mc13783_platform_data mc13783_pdata __initdata = {
283 .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
284};
285
286static struct spi_board_info mc13783_dev __initdata = {
287 .modalias = "mc13783",
288 .max_speed_hz = 1000000,
289 .bus_num = 1,
290 .chip_select = 0,
291 .platform_data = &mc13783_pdata,
292};
293
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294static struct platform_device *devices[] __initdata = {
295 &smsc91x_device,
296 &physmap_flash_device,
297};
298
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299static int mx31lilly_baseboard;
300core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
301
302static void __init mx31lilly_board_init(void)
303{
304 switch (mx31lilly_baseboard) {
305 case MX31LILLY_NOBOARD:
306 break;
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307 case MX31LILLY_DB:
308 mx31lilly_db_init();
309 break;
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310 default:
311 printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
312 mx31lilly_baseboard);
313 }
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314
315 mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
316
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317 /* SPI */
318 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
319 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
320 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
321 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
322 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
323 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
324 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
325
326 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
327 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
328 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
329 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
330 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
331 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
332 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
333
334 mxc_register_device(&mxc_spi_device0, &spi0_pdata);
335 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
2cc32683 336 spi_register_board_info(&mc13783_dev, 1);
3ea2e1a4 337
cbaa6ca1 338 platform_add_devices(devices, ARRAY_SIZE(devices));
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339
340 /* USB */
4d5d8590 341 lilly1131_usb_init();
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342}
343
344static void __init mx31lilly_timer_init(void)
345{
346 mx31_clocks_init(26000000);
347}
348
349static struct sys_timer mx31lilly_timer = {
350 .init = mx31lilly_timer_init,
351};
352
353MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
f568dd7f 354 .phys_io = MX31_AIPS1_BASE_ADDR,
321ed164 355 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
34101237 356 .boot_params = MX3x_PHYS_OFFSET + 0x100,
65b1aa13 357 .map_io = mx31_map_io,
c5aa0ad0 358 .init_irq = mx31_init_irq,
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359 .init_machine = mx31lilly_board_init,
360 .timer = &mx31lilly_timer,
361MACHINE_END
362