From cd0ff491e3c0fdb01fb189987c4d822b1113cc53 Mon Sep 17 00:00:00 2001 From: Guo-Fu Tseng Date: Tue, 3 Aug 2010 17:07:28 +0800 Subject: [PATCH] Import jme 1.0 source --- Makefile | 23 +- jme.c | 1573 ++++++++++++++++++++++++++++++------------------------ jme.h | 556 +++++++++++-------- 3 files changed, 1218 insertions(+), 934 deletions(-) diff --git a/Makefile b/Makefile index 449d97c..8116d04 100644 --- a/Makefile +++ b/Makefile @@ -2,16 +2,9 @@ MODNAME := jme TEMPFILES := $(MODNAME).o $(MODNAME).mod.c $(MODNAME).mod.o Module.symvers .$(MODNAME).*.cmd .tmp_versions modules.order -DEBUG_FLAGS += -DDEBUG -#DEBUG_FLAGS += -DQUEUE_DEBUG -#DEBUG_FLAGS += -DVLAN_DEBUG -#DEBUG_FLAGS += -DCSUM_DEBUG -#DEBUG_FLAGS += -DTX_DEBUG -#DEBUG_FLAGS += -DRX_DEBUG -#DEBUG_FLAGS += -Wpointer-arith -Wbad-function-cast -Wsign-compare - EXTRA_CFLAGS += -Wall -O3 -#EXTRA_CFLAGS += $(DEBUG_FLAGS) +#EXTRA_CFLAGS += -DTX_DEBUG +#EXTRA_CFLAGS += -DREG_DEBUG obj-m := $(MODNAME).o @@ -19,12 +12,22 @@ ifeq (,$(BUILD_KERNEL)) BUILD_KERNEL=$(shell uname -r) endif -KSRC := /lib/modules/$(BUILD_KERNEL)/build +KSRC ?= /lib/modules/$(BUILD_KERNEL)/build all: @$(MAKE) -C $(KSRC) SUBDIRS=$(shell pwd) modules @rm -rf $(TEMPFILES) +checkstack: + $(MAKE) -C $(KSRC) SUBDIRS=$(shell pwd) modules + objdump -d $(obj-m) | perl $(KSRC)/scripts/checkstack.pl i386 + @rm -rf $(TEMPFILES) + +namespacecheck: + $(MAKE) -C $(KSRC) SUBDIRS=$(shell pwd) modules + perl $(KSRC)/scripts/namespace.pl + @rm -rf $(TEMPFILES) + clean: @rm -rf $(MODNAME).ko $(TEMPFILES) diff --git a/jme.c b/jme.c index 799c2d4..04565c9 100644 --- a/jme.c +++ b/jme.c @@ -21,11 +21,6 @@ * */ -/* - * TODO: - * - Decode register dump for ethtool. - */ - #include #include #include @@ -45,43 +40,46 @@ #include #include "jme.h" -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) -static struct net_device_stats * -jme_get_stats(struct net_device *netdev) -{ - struct jme_adapter *jme = netdev_priv(netdev); - return &jme->stats; -} -#endif +static int force_pseudohp = -1; +static int no_pseudohp = -1; +static int no_extplug = -1; +module_param(force_pseudohp, int, 0); +MODULE_PARM_DESC(force_pseudohp, + "Enable pseudo hot-plug feature manually by driver instead of BIOS."); +module_param(no_pseudohp, int, 0); +MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); +module_param(no_extplug, int, 0); +MODULE_PARM_DESC(no_extplug, + "Do not use external plug signal for pseudo hot-plug."); static int jme_mdio_read(struct net_device *netdev, int phy, int reg) { struct jme_adapter *jme = netdev_priv(netdev); - int i, val, again = (reg == MII_BMSR)?1:0; + int i, val, again = (reg == MII_BMSR) ? 1 : 0; read_again: - jwrite32(jme, JME_SMI, SMI_OP_REQ | + jwrite32(jme, JME_SMI, SMI_OP_REQ | smi_phy_addr(phy) | smi_reg_addr(reg)); wmb(); - for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { + for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { udelay(20); val = jread32(jme, JME_SMI); if ((val & SMI_OP_REQ) == 0) break; - } + } - if (i == 0) { - jeprintk("jme", "phy(%d) read timeout : %d\n", phy, reg); + if (i == 0) { + jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg); return 0; - } + } - if(again--) + if (again--) goto read_again; - return ((val & SMI_DATA_MASK) >> SMI_DATA_SHIFT); + return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; } static void @@ -103,22 +101,131 @@ jme_mdio_write(struct net_device *netdev, } if (i == 0) - jeprintk("jme", "phy(%d) write timeout : %d\n", phy, reg); + jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg); return; } -__always_inline static void +static void +jme_spi_start(struct pci_dev *pdev, struct jme_spi_op *spiop) +{ + spiop->sr |= SPI_EN; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + ndelay(spiop->halfclk << 2); + if (spiop->mode & SPI_MODE_CPOL) { + spiop->sr |= SPI_SCLK; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + ndelay(spiop->halfclk << 2); + } + spiop->sr &= ~SPI_CS; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + ndelay(spiop->halfclk); +} + +static void +jme_spi_write(struct pci_dev *pdev, struct jme_spi_op *spiop, u8 byte) +{ + int bit; + + for (bit = 0 ; bit < 8 ; ++bit) { + if (byte & 0x80) + spiop->sr |= SPI_MOSI; + else + spiop->sr &= ~SPI_MOSI; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + + byte <<= 1; + ndelay(spiop->halfclk); + spiop->sr ^= SPI_SCLK; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + + ndelay(spiop->halfclk); + spiop->sr ^= SPI_SCLK; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + } +} + +static void +jme_spi_read(struct pci_dev *pdev, struct jme_spi_op *spiop, u8 *byte) +{ + int bit; + u8 b; + + spiop->sr &= ~SPI_MOSI; + for (bit = 0 ; bit < 8 ; ++bit) { + *byte <<= 1; + ndelay(spiop->halfclk); + spiop->sr ^= SPI_SCLK; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + + ndelay(spiop->halfclk); + pci_read_config_byte(pdev, PCI_SPI, &b); + *byte |= !!(b & SPI_MISO); + spiop->sr ^= SPI_SCLK; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); + } +} + +static void +jme_spi_stop(struct pci_dev *pdev, struct jme_spi_op *spiop) +{ + spiop->sr &= ~SPI_EN; + spiop->sr |= SPI_CS; + pci_write_config_byte(pdev, PCI_SPI, spiop->sr); +} + +/** + * jme_spi_io - SPI Access helper function. + * @jme: Adapter informations + * @spiop: SPI operation. + * + * We have a SPI SW Access register in PCI configuration space, + * which directly connect to flash controller with SPI interface. + * This function is used to communicate with it in SPI protocol. + */ +static int +jme_spi_op(struct jme_adapter *jme, struct jme_spi_op *spiop) +{ + int i; + + /* + * Only support 8 bits for now + */ + if (spiop->bitn != 8) + return -EINVAL; + + /* + * Only support half-duplex for now + */ + if (spiop->mode & SPI_MODE_DUP) + return -EINVAL; + + spiop->halfclk = HALF_US / spiop->spd; + spiop->sr = SPI_CS; + jme_spi_start(jme->pdev, spiop); + + for (i = 0 ; i < spiop->wn ; ++i) + jme_spi_write(jme->pdev, spiop, spiop->kwbuf[i]); + + for (i = 0 ; i < spiop->rn ; ++i) + jme_spi_read(jme->pdev, spiop, spiop->krbuf + i); + + jme_spi_stop(jme->pdev, spiop); + + return 0; +} + +static inline void jme_reset_phy_processor(struct jme_adapter *jme) { - __u32 val; + u32 val; jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); - if(jme->pdev->device == JME_GE_DEVICE) + if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, @@ -137,7 +244,7 @@ jme_reset_phy_processor(struct jme_adapter *jme) static void jme_setup_wakeup_frame(struct jme_adapter *jme, - __u32 *mask, __u32 crc, int fnr) + u32 *mask, u32 crc, int fnr) { int i; @@ -152,7 +259,7 @@ jme_setup_wakeup_frame(struct jme_adapter *jme, /* * Setup Mask */ - for(i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { + for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { jwrite32(jme, JME_WFOI, ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | (fnr & WFOI_FRAME_SEL)); @@ -162,22 +269,32 @@ jme_setup_wakeup_frame(struct jme_adapter *jme, } } -__always_inline static void +static inline void jme_reset_mac_processor(struct jme_adapter *jme) { - __u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0,0,0,0}; - __u32 crc = 0xCDCDCDCD; - __u32 gpreg0; + u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; + u32 crc = 0xCDCDCDCD; + u32 gpreg0; int i; jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); udelay(2); jwrite32(jme, JME_GHC, jme->reg_ghc); + + jwrite32(jme, JME_RXDBA_LO, 0x00000000); + jwrite32(jme, JME_RXDBA_HI, 0x00000000); + jwrite32(jme, JME_RXQDC, 0x00000000); + jwrite32(jme, JME_RXNDA, 0x00000000); + jwrite32(jme, JME_TXDBA_LO, 0x00000000); + jwrite32(jme, JME_TXDBA_HI, 0x00000000); + jwrite32(jme, JME_TXQDC, 0x00000000); + jwrite32(jme, JME_TXNDA, 0x00000000); + jwrite32(jme, JME_RXMCHT_LO, 0x00000000); jwrite32(jme, JME_RXMCHT_HI, 0x00000000); - for(i = 0 ; i < WAKEUP_FRAME_NR ; ++i) + for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) jme_setup_wakeup_frame(jme, mask, crc, i); - if(jme->fpgaver) + if (jme->fpgaver) gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; else gpreg0 = GPREG0_DEFAULT; @@ -185,7 +302,14 @@ jme_reset_mac_processor(struct jme_adapter *jme) jwrite32(jme, JME_GPREG1, 0); } -__always_inline static void +static inline void +jme_reset_ghc_speed(struct jme_adapter *jme) +{ + jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); + jwrite32(jme, JME_GHC, jme->reg_ghc); +} + +static inline void jme_clear_pm(struct jme_adapter *jme) { jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); @@ -196,28 +320,26 @@ jme_clear_pm(struct jme_adapter *jme) static int jme_reload_eeprom(struct jme_adapter *jme) { - __u32 val; + u32 val; int i; val = jread32(jme, JME_SMBCSR); - if(val & SMBCSR_EEPROMD) - { + if (val & SMBCSR_EEPROMD) { val |= SMBCSR_CNACK; jwrite32(jme, JME_SMBCSR, val); val |= SMBCSR_RELOAD; jwrite32(jme, JME_SMBCSR, val); mdelay(12); - for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) - { + for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { mdelay(1); if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) break; } - if(i == 0) { - jeprintk("jme", "eeprom reload timeout\n"); + if (i == 0) { + jeprintk(jme->pdev, "eeprom reload timeout\n"); return -EIO; } } @@ -230,9 +352,9 @@ jme_load_macaddr(struct net_device *netdev) { struct jme_adapter *jme = netdev_priv(netdev); unsigned char macaddr[6]; - __u32 val; + u32 val; - spin_lock(&jme->macaddr_lock); + spin_lock_bh(&jme->macaddr_lock); val = jread32(jme, JME_RXUMA_LO); macaddr[0] = (val >> 0) & 0xFF; macaddr[1] = (val >> 8) & 0xFF; @@ -241,14 +363,14 @@ jme_load_macaddr(struct net_device *netdev) val = jread32(jme, JME_RXUMA_HI); macaddr[4] = (val >> 0) & 0xFF; macaddr[5] = (val >> 8) & 0xFF; - memcpy(netdev->dev_addr, macaddr, 6); - spin_unlock(&jme->macaddr_lock); + memcpy(netdev->dev_addr, macaddr, 6); + spin_unlock_bh(&jme->macaddr_lock); } -__always_inline static void +static inline void jme_set_rx_pcc(struct jme_adapter *jme, int p) { - switch(p) { + switch (p) { case PCC_OFF: jwrite32(jme, JME_PCCRX0, ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | @@ -274,8 +396,8 @@ jme_set_rx_pcc(struct jme_adapter *jme, int p) } wmb(); - if(!(jme->flags & JME_FLAG_POLL)) - dprintk(jme->dev->name, "Switched to PCC_P%d\n", p); + if (!(test_bit(JME_FLAG_POLL, &jme->flags))) + msg_rx_status(jme, "Switched to PCC_P%d\n", p); } static void @@ -300,60 +422,71 @@ jme_start_irq(struct jme_adapter *jme) jwrite32(jme, JME_IENS, INTR_ENABLE); } -__always_inline static void +static inline void jme_stop_irq(struct jme_adapter *jme) { /* * Disable Interrupts */ - jwrite32(jme, JME_IENC, INTR_ENABLE); + jwrite32f(jme, JME_IENC, INTR_ENABLE); } - -__always_inline static void +static inline void jme_enable_shadow(struct jme_adapter *jme) { jwrite32(jme, JME_SHBA_LO, - ((__u32)jme->shadow_dma & ~((__u32)0x1F)) | SHBA_POSTEN); + ((u32)jme->shadow_dma & ~((u32)0x1F)) | SHBA_POSTEN); } -__always_inline static void +static inline void jme_disable_shadow(struct jme_adapter *jme) { jwrite32(jme, JME_SHBA_LO, 0x0); } -static __u32 +static u32 jme_linkstat_from_phy(struct jme_adapter *jme) { - __u32 phylink, bmsr; + u32 phylink, bmsr; phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); - if(bmsr & BMSR_ANCOMP) + if (bmsr & BMSR_ANCOMP) phylink |= PHY_LINK_AUTONEG_COMPLETE; return phylink; } +static inline void +jme_set_gmii(struct jme_adapter *jme) +{ + jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); +} + +static inline void +jme_set_rgmii(struct jme_adapter *jme) +{ + jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); +} + static int jme_check_link(struct net_device *netdev, int testonly) { struct jme_adapter *jme = netdev_priv(netdev); - __u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr; + u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr; char linkmsg[64]; int rc = 0; linkmsg[0] = '\0'; - if(jme->fpgaver) + if (jme->fpgaver) phylink = jme_linkstat_from_phy(jme); else phylink = jread32(jme, JME_PHY_LINK); - if (phylink & PHY_LINK_UP) { - if(!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { + if (phylink & PHY_LINK_UP) { + if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { /* * If we did not enable AN * Speed/Duplex Info should be obtained from SMI @@ -364,7 +497,6 @@ jme_check_link(struct net_device *netdev, int testonly) jme->mii_if.phy_id, MII_BMCR); - phylink |= ((bmcr & BMCR_SPEED1000) && (bmcr & BMCR_SPEED100) == 0) ? PHY_LINK_SPEED_1000M : @@ -376,34 +508,32 @@ jme_check_link(struct net_device *netdev, int testonly) PHY_LINK_DUPLEX : 0; strcat(linkmsg, "Forced: "); - } - else { + } else { /* * Keep polling for speed/duplex resolve complete */ - while(!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && + while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && --cnt) { udelay(1); - if(jme->fpgaver) + if (jme->fpgaver) phylink = jme_linkstat_from_phy(jme); else phylink = jread32(jme, JME_PHY_LINK); } - - if(!cnt) - jeprintk(netdev->name, + if (!cnt) + jeprintk(jme->pdev, "Waiting speed resolve timeout.\n"); strcat(linkmsg, "ANed: "); } - if(jme->phylink == phylink) { + if (jme->phylink == phylink) { rc = 1; goto out; } - if(testonly) + if (testonly) goto out; jme->phylink = phylink; @@ -412,36 +542,42 @@ jme_check_link(struct net_device *netdev, int testonly) GHC_SPEED_100M | GHC_SPEED_1000M | GHC_DPX); - switch(phylink & PHY_LINK_SPEED_MASK) { - case PHY_LINK_SPEED_10M: - ghc |= GHC_SPEED_10M; - strcat(linkmsg, "10 Mbps, "); - break; - case PHY_LINK_SPEED_100M: - ghc |= GHC_SPEED_100M; - strcat(linkmsg, "100 Mbps, "); - break; - case PHY_LINK_SPEED_1000M: - ghc |= GHC_SPEED_1000M; - strcat(linkmsg, "1000 Mbps, "); - break; - default: - break; + switch (phylink & PHY_LINK_SPEED_MASK) { + case PHY_LINK_SPEED_10M: + ghc |= GHC_SPEED_10M; + strcat(linkmsg, "10 Mbps, "); + if (jme->rev == 0x11) + jme_set_gmii(jme); + break; + case PHY_LINK_SPEED_100M: + ghc |= GHC_SPEED_100M; + strcat(linkmsg, "100 Mbps, "); + if (jme->rev == 0x11) + jme_set_rgmii(jme); + break; + case PHY_LINK_SPEED_1000M: + ghc |= GHC_SPEED_1000M; + strcat(linkmsg, "1000 Mbps, "); + if (jme->rev == 0x11) + jme_set_gmii(jme); + break; + default: + break; } - ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0; + ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0; - strcat(linkmsg, (phylink &PHY_LINK_DUPLEX) ? + strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? "Full-Duplex, " : "Half-Duplex, "); - if(phylink & PHY_LINK_MDI_STAT) + if (phylink & PHY_LINK_MDI_STAT) strcat(linkmsg, "MDI-X"); else strcat(linkmsg, "MDI"); - if(phylink & PHY_LINK_DUPLEX) + if (phylink & PHY_LINK_DUPLEX) { jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); - else { + } else { jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | TXMCS_BACKOFF | TXMCS_CARRIERSENSE | @@ -455,16 +591,15 @@ jme_check_link(struct net_device *netdev, int testonly) jme->reg_ghc = ghc; jwrite32(jme, JME_GHC, ghc); - jprintk(netdev->name, "Link is up at %s.\n", linkmsg); - netif_carrier_on(netdev); - } - else { - if(testonly) + msg_link(jme, "Link is up at %s.\n", linkmsg); + netif_carrier_on(netdev); + } else { + if (testonly) goto out; - jprintk(netdev->name, "Link is down.\n"); + msg_link(jme, "Link is down.\n"); jme->phylink = 0; - netif_carrier_off(netdev); + netif_carrier_off(netdev); } out: @@ -481,7 +616,7 @@ jme_setup_tx_resources(struct jme_adapter *jme) &(txring->dmaalloc), GFP_ATOMIC); - if(!txring->alloc) { + if (!txring->alloc) { txring->desc = NULL; txring->dmaalloc = 0; txring->dma = 0; @@ -491,7 +626,7 @@ jme_setup_tx_resources(struct jme_adapter *jme) /* * 16 Bytes align */ - txring->desc = (void*)ALIGN((unsigned long)(txring->alloc), + txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), RING_DESC_ALIGN); txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); txring->next_to_use = 0; @@ -515,10 +650,10 @@ jme_free_tx_resources(struct jme_adapter *jme) struct jme_ring *txring = &(jme->txring[0]); struct jme_buffer_info *txbi = txring->bufinf; - if(txring->alloc) { - for(i = 0 ; i < jme->tx_ring_size ; ++i) { + if (txring->alloc) { + for (i = 0 ; i < jme->tx_ring_size ; ++i) { txbi = txring->bufinf + i; - if(txbi->skb) { + if (txbi->skb) { dev_kfree_skb(txbi->skb); txbi->skb = NULL; } @@ -544,13 +679,14 @@ jme_free_tx_resources(struct jme_adapter *jme) } -__always_inline static void +static inline void jme_enable_tx_engine(struct jme_adapter *jme) { /* * Select Queue 0 */ jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); + wmb(); /* * Setup TX Queue 0 DMA Bass Address @@ -574,7 +710,7 @@ jme_enable_tx_engine(struct jme_adapter *jme) } -__always_inline static void +static inline void jme_restart_tx_engine(struct jme_adapter *jme) { /* @@ -585,37 +721,34 @@ jme_restart_tx_engine(struct jme_adapter *jme) TXCS_ENABLE); } -__always_inline static void +static inline void jme_disable_tx_engine(struct jme_adapter *jme) { int i; - __u32 val; + u32 val; /* * Disable TX Engine */ jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); + wmb(); val = jread32(jme, JME_TXCS); - for(i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) - { + for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { mdelay(1); val = jread32(jme, JME_TXCS); + rmb(); } - if(!i) { - jeprintk(jme->dev->name, "Disable TX engine timeout.\n"); - jme_reset_mac_processor(jme); - } - - + if (!i) + jeprintk(jme->pdev, "Disable TX engine timeout.\n"); } static void jme_set_clean_rxdesc(struct jme_adapter *jme, int i) { struct jme_ring *rxring = jme->rxring; - register volatile struct rxdesc* rxdesc = rxring->desc; + register struct rxdesc *rxdesc = rxring->desc; struct jme_buffer_info *rxbi = rxring->bufinf; rxdesc += i; rxbi += i; @@ -626,7 +759,7 @@ jme_set_clean_rxdesc(struct jme_adapter *jme, int i) rxdesc->desc1.bufaddrl = cpu_to_le32( (__u64)rxbi->mapping & 0xFFFFFFFFUL); rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); - if(jme->dev->features & NETIF_F_HIGHDMA) + if (jme->dev->features & NETIF_F_HIGHDMA) rxdesc->desc1.flags = RXFLAG_64BIT; wmb(); rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; @@ -637,19 +770,13 @@ jme_make_new_rx_buf(struct jme_adapter *jme, int i) { struct jme_ring *rxring = &(jme->rxring[0]); struct jme_buffer_info *rxbi = rxring->bufinf + i; - unsigned long offset; - struct sk_buff* skb; + struct sk_buff *skb; skb = netdev_alloc_skb(jme->dev, jme->dev->mtu + RX_EXTRA_LEN); - if(unlikely(!skb)) + if (unlikely(!skb)) return -ENOMEM; - if(unlikely(offset = - (unsigned long)(skb->data) - & ((unsigned long)RX_BUF_DMA_ALIGN - 1))) - skb_reserve(skb, RX_BUF_DMA_ALIGN - offset); - rxbi->skb = skb; rxbi->len = skb_tailroom(skb); rxbi->mapping = pci_map_page(jme->pdev, @@ -668,7 +795,7 @@ jme_free_rx_buf(struct jme_adapter *jme, int i) struct jme_buffer_info *rxbi = rxring->bufinf; rxbi += i; - if(rxbi->skb) { + if (rxbi->skb) { pci_unmap_page(jme->pdev, rxbi->mapping, rxbi->len, @@ -686,8 +813,8 @@ jme_free_rx_resources(struct jme_adapter *jme) int i; struct jme_ring *rxring = &(jme->rxring[0]); - if(rxring->alloc) { - for(i = 0 ; i < jme->rx_ring_size ; ++i) + if (rxring->alloc) { + for (i = 0 ; i < jme->rx_ring_size ; ++i) jme_free_rx_buf(jme, i); dma_free_coherent(&(jme->pdev->dev), @@ -713,7 +840,7 @@ jme_setup_rx_resources(struct jme_adapter *jme) RX_RING_ALLOC_SIZE(jme->rx_ring_size), &(rxring->dmaalloc), GFP_ATOMIC); - if(!rxring->alloc) { + if (!rxring->alloc) { rxring->desc = NULL; rxring->dmaalloc = 0; rxring->dma = 0; @@ -723,7 +850,7 @@ jme_setup_rx_resources(struct jme_adapter *jme) /* * 16 Bytes align */ - rxring->desc = (void*)ALIGN((unsigned long)(rxring->alloc), + rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), RING_DESC_ALIGN); rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); rxring->next_to_use = 0; @@ -732,8 +859,8 @@ jme_setup_rx_resources(struct jme_adapter *jme) /* * Initiallize Receive Descriptors */ - for(i = 0 ; i < jme->rx_ring_size ; ++i) { - if(unlikely(jme_make_new_rx_buf(jme, i))) { + for (i = 0 ; i < jme->rx_ring_size ; ++i) { + if (unlikely(jme_make_new_rx_buf(jme, i))) { jme_free_rx_resources(jme); return -ENOMEM; } @@ -744,9 +871,16 @@ jme_setup_rx_resources(struct jme_adapter *jme) return 0; } -__always_inline static void +static inline void jme_enable_rx_engine(struct jme_adapter *jme) { + /* + * Select Queue 0 + */ + jwrite32(jme, JME_RXCS, jme->reg_rxcs | + RXCS_QUEUESEL_Q0); + wmb(); + /* * Setup RX DMA Bass Address */ @@ -774,7 +908,7 @@ jme_enable_rx_engine(struct jme_adapter *jme) RXCS_QST); } -__always_inline static void +static inline void jme_restart_rx_engine(struct jme_adapter *jme) { /* @@ -786,62 +920,56 @@ jme_restart_rx_engine(struct jme_adapter *jme) RXCS_QST); } - -__always_inline static void +static inline void jme_disable_rx_engine(struct jme_adapter *jme) { int i; - __u32 val; + u32 val; /* * Disable RX Engine */ jwrite32(jme, JME_RXCS, jme->reg_rxcs); + wmb(); val = jread32(jme, JME_RXCS); - for(i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) - { + for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { mdelay(1); val = jread32(jme, JME_RXCS); + rmb(); } - if(!i) - jeprintk(jme->dev->name, "Disable RX engine timeout.\n"); + if (!i) + jeprintk(jme->pdev, "Disable RX engine timeout.\n"); } static int -jme_rxsum_ok(struct jme_adapter *jme, __u16 flags) +jme_rxsum_ok(struct jme_adapter *jme, u16 flags) { - if(!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) + if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) return false; - if(unlikely((flags & RXWBFLAG_TCPON) && - !(flags & RXWBFLAG_TCPCS))) { - csum_dbg(jme->dev->name, "TCP Checksum error.\n"); + if (unlikely(!(flags & RXWBFLAG_MF) && + (flags & RXWBFLAG_TCPON) && !(flags & RXWBFLAG_TCPCS))) { + msg_rx_err(jme, "TCP Checksum error.\n"); goto out_sumerr; } - if(unlikely((flags & RXWBFLAG_UDPON) && - !(flags & RXWBFLAG_UDPCS))) { - csum_dbg(jme->dev->name, "UDP Checksum error.\n"); + if (unlikely(!(flags & RXWBFLAG_MF) && + (flags & RXWBFLAG_UDPON) && !(flags & RXWBFLAG_UDPCS))) { + msg_rx_err(jme, "UDP Checksum error.\n"); goto out_sumerr; } - if(unlikely((flags & RXWBFLAG_IPV4) && - !(flags & RXWBFLAG_IPCS))) { - csum_dbg(jme->dev->name, "IPv4 Checksum error.\n"); + if (unlikely((flags & RXWBFLAG_IPV4) && !(flags & RXWBFLAG_IPCS))) { + msg_rx_err(jme, "IPv4 Checksum error.\n"); goto out_sumerr; } return true; out_sumerr: - csum_dbg(jme->dev->name, "%s%s%s%s\n", - (flags & RXWBFLAG_IPV4)?"IPv4 ":"", - (flags & RXWBFLAG_IPV6)?"IPv6 ":"", - (flags & RXWBFLAG_UDPON)?"UDP ":"", - (flags & RXWBFLAG_TCPON)?"TCP":""); return false; } @@ -849,7 +977,7 @@ static void jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) { struct jme_ring *rxring = &(jme->rxring[0]); - volatile struct rxdesc *rxdesc = rxring->desc; + struct rxdesc *rxdesc = rxring->desc; struct jme_buffer_info *rxbi = rxring->bufinf; struct sk_buff *skb; int framesize; @@ -863,15 +991,14 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) rxbi->len, PCI_DMA_FROMDEVICE); - if(unlikely(jme_make_new_rx_buf(jme, idx))) { + if (unlikely(jme_make_new_rx_buf(jme, idx))) { pci_dma_sync_single_for_device(jme->pdev, rxbi->mapping, rxbi->len, PCI_DMA_FROMDEVICE); ++(NET_STAT(jme).rx_dropped); - } - else { + } else { framesize = le16_to_cpu(rxdesc->descwb.framesize) - RX_PREPAD_SIZE; @@ -879,28 +1006,22 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) skb_put(skb, framesize); skb->protocol = eth_type_trans(skb, jme->dev); - if(jme_rxsum_ok(jme, rxdesc->descwb.flags)) + if (jme_rxsum_ok(jme, rxdesc->descwb.flags)) skb->ip_summed = CHECKSUM_UNNECESSARY; else skb->ip_summed = CHECKSUM_NONE; - - if(rxdesc->descwb.flags & RXWBFLAG_TAGON) { - vlan_dbg(jme->dev->name, "VLAN: %04x\n", - rxdesc->descwb.vlan); - if(jme->vlgrp) { - vlan_dbg(jme->dev->name, - "VLAN Passed to kernel.\n"); + if (rxdesc->descwb.flags & RXWBFLAG_TAGON) { + if (jme->vlgrp) { jme->jme_vlan_rx(skb, jme->vlgrp, le32_to_cpu(rxdesc->descwb.vlan)); NET_STAT(jme).rx_bytes += 4; } - } - else { + } else { jme->jme_rx(skb); } - if((le16_to_cpu(rxdesc->descwb.flags) & RXWBFLAG_DEST) == + if ((le16_to_cpu(rxdesc->descwb.flags) & RXWBFLAG_DEST) == RXWBFLAG_DEST_MUL) ++(NET_STAT(jme).multicast); @@ -913,76 +1034,59 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) } - - static int jme_process_receive(struct jme_adapter *jme, int limit) { struct jme_ring *rxring = &(jme->rxring[0]); - volatile struct rxdesc *rxdesc = rxring->desc; + struct rxdesc *rxdesc = rxring->desc; int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; - if(unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) + if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) goto out_inc; - if(unlikely(atomic_read(&jme->link_changing) != 1)) + if (unlikely(atomic_read(&jme->link_changing) != 1)) goto out_inc; - if(unlikely(!netif_carrier_ok(jme->dev))) + if (unlikely(!netif_carrier_ok(jme->dev))) goto out_inc; i = atomic_read(&rxring->next_to_clean); - while( limit-- > 0 ) - { + while (limit-- > 0) { rxdesc = rxring->desc; rxdesc += i; - if((rxdesc->descwb.flags & RXWBFLAG_OWN) || + if ((rxdesc->descwb.flags & RXWBFLAG_OWN) || !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) goto out; desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; - rx_dbg(jme->dev->name, "RX: Cleaning %d\n", i); - - if(unlikely(desccnt > 1 || + if (unlikely(desccnt > 1 || rxdesc->descwb.errstat & RXWBERR_ALLERR)) { - if(rxdesc->descwb.errstat & RXWBERR_CRCERR) + if (rxdesc->descwb.errstat & RXWBERR_CRCERR) ++(NET_STAT(jme).rx_crc_errors); - else if(rxdesc->descwb.errstat & RXWBERR_OVERUN) + else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) ++(NET_STAT(jme).rx_fifo_errors); else ++(NET_STAT(jme).rx_errors); - if(desccnt > 1) { - rx_dbg(jme->dev->name, - "RX: More than one(%d) descriptor, " - "framelen=%d\n", - desccnt, le16_to_cpu(rxdesc->descwb.framesize)); + if (desccnt > 1) limit -= desccnt - 1; - } - for(j = i, ccnt = desccnt ; ccnt-- ; ) { + for (j = i, ccnt = desccnt ; ccnt-- ; ) { jme_set_clean_rxdesc(jme, j); j = (j + 1) & (mask); } - } - else { + } else { jme_alloc_and_feed_skb(jme, i); } i = (i + desccnt) & (mask); } - out: - rx_dbg(jme->dev->name, "RX: Stop at %d\n", i); - rx_dbg(jme->dev->name, "RX: RXNDA offset %d\n", - (jread32(jme, JME_RXNDA) - jread32(jme, JME_RXDBA_LO)) - >> 4); - atomic_set(&rxring->next_to_clean, i); out_inc: @@ -995,15 +1099,14 @@ out_inc: static void jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) { - if(likely(atmp == dpi->cur)) { + if (likely(atmp == dpi->cur)) { dpi->cnt = 0; return; } - if(dpi->attempt == atmp) { + if (dpi->attempt == atmp) { ++(dpi->cnt); - } - else { + } else { dpi->attempt = atmp; dpi->cnt = 0; } @@ -1015,15 +1118,17 @@ jme_dynamic_pcc(struct jme_adapter *jme) { register struct dynpcc_info *dpi = &(jme->dpi); - if((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) + if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) jme_attempt_pcc(dpi, PCC_P3); - else if((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD + else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || dpi->intr_cnt > PCC_INTR_THRESHOLD) jme_attempt_pcc(dpi, PCC_P2); else jme_attempt_pcc(dpi, PCC_P1); - if(unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { + if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { + if (dpi->attempt < dpi->cur) + tasklet_schedule(&jme->rxclean_task); jme_set_rx_pcc(jme, dpi->attempt); dpi->cur = dpi->attempt; dpi->cnt = 0; @@ -1041,95 +1146,160 @@ jme_start_pcc_timer(struct jme_adapter *jme) TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); } -__always_inline static void +static inline void jme_stop_pcc_timer(struct jme_adapter *jme) { jwrite32(jme, JME_TMCSR, 0); } +static void +jme_shutdown_nic(struct jme_adapter *jme) +{ + u32 phylink; + + phylink = jme_linkstat_from_phy(jme); + + if (!(phylink & PHY_LINK_UP)) { + /* + * Disable all interrupt before issue timer + */ + jme_stop_irq(jme); + jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); + } +} + static void jme_pcc_tasklet(unsigned long arg) { - struct jme_adapter *jme = (struct jme_adapter*)arg; + struct jme_adapter *jme = (struct jme_adapter *)arg; struct net_device *netdev = jme->dev; + if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { + jme_shutdown_nic(jme); + return; + } - if(unlikely(!netif_carrier_ok(netdev) || + if (unlikely(!netif_carrier_ok(netdev) || (atomic_read(&jme->link_changing) != 1) )) { jme_stop_pcc_timer(jme); return; } - if(!(jme->flags & JME_FLAG_POLL)) + if (!(test_bit(JME_FLAG_POLL, &jme->flags))) jme_dynamic_pcc(jme); jme_start_pcc_timer(jme); } -__always_inline static void +static inline void jme_polling_mode(struct jme_adapter *jme) { jme_set_rx_pcc(jme, PCC_OFF); } -__always_inline static void +static inline void jme_interrupt_mode(struct jme_adapter *jme) { jme_set_rx_pcc(jme, PCC_P1); } +static inline int +jme_pseudo_hotplug_enabled(struct jme_adapter *jme) +{ + u32 apmc; + apmc = jread32(jme, JME_APMC); + return apmc & JME_APMC_PSEUDO_HP_EN; +} + +static void +jme_start_shutdown_timer(struct jme_adapter *jme) +{ + u32 apmc; + + apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; + apmc &= ~JME_APMC_EPIEN_CTRL; + if (!no_extplug) { + jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); + wmb(); + } + jwrite32f(jme, JME_APMC, apmc); + + jwrite32f(jme, JME_TIMER2, 0); + set_bit(JME_FLAG_SHUTDOWN, &jme->flags); + jwrite32(jme, JME_TMCSR, + TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); +} + +static void +jme_stop_shutdown_timer(struct jme_adapter *jme) +{ + u32 apmc; + + jwrite32f(jme, JME_TMCSR, 0); + jwrite32f(jme, JME_TIMER2, 0); + clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); + + apmc = jread32(jme, JME_APMC); + apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); + jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); + wmb(); + jwrite32f(jme, JME_APMC, apmc); +} + static void jme_link_change_tasklet(unsigned long arg) { - struct jme_adapter *jme = (struct jme_adapter*)arg; + struct jme_adapter *jme = (struct jme_adapter *)arg; struct net_device *netdev = jme->dev; - int timeout = WAIT_TASKLET_TIMEOUT; int rc; - if(!atomic_dec_and_test(&jme->link_changing)) - goto out; + while (!atomic_dec_and_test(&jme->link_changing)) { + atomic_inc(&jme->link_changing); + msg_intr(jme, "Get link change lock failed.\n"); + while(atomic_read(&jme->link_changing) != 1) + msg_intr(jme, "Waiting link change lock.\n"); + } - if(jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) + if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) goto out; jme->old_mtu = netdev->mtu; netif_stop_queue(netdev); - - while(--timeout > 0 && - ( - atomic_read(&jme->rx_cleaning) != 1 || - atomic_read(&jme->tx_cleaning) != 1 - )) { - - mdelay(1); - } - - if(netif_carrier_ok(netdev)) { - jme_stop_pcc_timer(jme); + if (jme_pseudo_hotplug_enabled(jme)) + jme_stop_shutdown_timer(jme); + + jme_stop_pcc_timer(jme); + tasklet_disable(&jme->txclean_task); + tasklet_disable(&jme->rxclean_task); + tasklet_disable(&jme->rxempty_task); + + if (netif_carrier_ok(netdev)) { + jme_reset_ghc_speed(jme); + jme_disable_rx_engine(jme); + jme_disable_tx_engine(jme); jme_reset_mac_processor(jme); jme_free_rx_resources(jme); jme_free_tx_resources(jme); - if(jme->flags & JME_FLAG_POLL) + if (test_bit(JME_FLAG_POLL, &jme->flags)) jme_polling_mode(jme); + + netif_carrier_off(netdev); } jme_check_link(netdev, 0); - if(netif_carrier_ok(netdev)) { + if (netif_carrier_ok(netdev)) { rc = jme_setup_rx_resources(jme); - if(rc) { - jeprintk(netdev->name, - "Allocating resources for RX error" + if (rc) { + jeprintk(jme->pdev, "Allocating resources for RX error" ", Device STOPPED!\n"); - goto out; + goto out_enable_tasklet; } - rc = jme_setup_tx_resources(jme); - if(rc) { - jeprintk(netdev->name, - "Allocating resources for TX error" + if (rc) { + jeprintk(jme->pdev, "Allocating resources for TX error" ", Device STOPPED!\n"); goto err_out_free_rx_resources; } @@ -1139,16 +1309,22 @@ jme_link_change_tasklet(unsigned long arg) netif_start_queue(netdev); - if(jme->flags & JME_FLAG_POLL) + if (test_bit(JME_FLAG_POLL, &jme->flags)) jme_interrupt_mode(jme); jme_start_pcc_timer(jme); + } else if (jme_pseudo_hotplug_enabled(jme)) { + jme_start_shutdown_timer(jme); } - goto out; + goto out_enable_tasklet; err_out_free_rx_resources: jme_free_rx_resources(jme); +out_enable_tasklet: + tasklet_enable(&jme->txclean_task); + tasklet_hi_enable(&jme->rxclean_task); + tasklet_hi_enable(&jme->rxempty_task); out: atomic_inc(&jme->link_changing); } @@ -1156,7 +1332,7 @@ out: static void jme_rx_clean_tasklet(unsigned long arg) { - struct jme_adapter *jme = (struct jme_adapter*)arg; + struct jme_adapter *jme = (struct jme_adapter *)arg; struct dynpcc_info *dpi = &(jme->dpi); jme_process_receive(jme, jme->rx_ring_size); @@ -1173,14 +1349,14 @@ jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); - while(atomic_read(&jme->rx_empty) > 0) { + while (atomic_read(&jme->rx_empty) > 0) { atomic_dec(&jme->rx_empty); ++(NET_STAT(jme).rx_dropped); jme_restart_rx_engine(jme); } atomic_inc(&jme->rx_empty); - if(rest) { + if (rest) { JME_RX_COMPLETE(netdev, holder); jme_interrupt_mode(jme); } @@ -1192,19 +1368,19 @@ jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) static void jme_rx_empty_tasklet(unsigned long arg) { - struct jme_adapter *jme = (struct jme_adapter*)arg; + struct jme_adapter *jme = (struct jme_adapter *)arg; - if(unlikely(atomic_read(&jme->link_changing) != 1)) + if (unlikely(atomic_read(&jme->link_changing) != 1)) return; - if(unlikely(!netif_carrier_ok(jme->dev))) + if (unlikely(!netif_carrier_ok(jme->dev))) return; - queue_dbg(jme->dev->name, "RX Queue Full!\n"); + msg_rx_status(jme, "RX Queue Full!\n"); jme_rx_clean_tasklet(arg); - while(atomic_read(&jme->rx_empty) > 0) { + while (atomic_read(&jme->rx_empty) > 0) { atomic_dec(&jme->rx_empty); ++(NET_STAT(jme).rx_dropped); jme_restart_rx_engine(jme); @@ -1218,12 +1394,10 @@ jme_wake_queue_if_stopped(struct jme_adapter *jme) struct jme_ring *txring = jme->txring; smp_wmb(); - if(unlikely(netif_queue_stopped(jme->dev) && + if (unlikely(netif_queue_stopped(jme->dev) && atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { - - queue_dbg(jme->dev->name, "TX Queue Waked.\n"); + msg_tx_done(jme, "TX Queue Waked.\n"); netif_wake_queue(jme->dev); - } } @@ -1231,40 +1405,39 @@ jme_wake_queue_if_stopped(struct jme_adapter *jme) static void jme_tx_clean_tasklet(unsigned long arg) { - struct jme_adapter *jme = (struct jme_adapter*)arg; + struct jme_adapter *jme = (struct jme_adapter *)arg; struct jme_ring *txring = &(jme->txring[0]); - volatile struct txdesc *txdesc = txring->desc; + struct txdesc *txdesc = txring->desc; struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; int i, j, cnt = 0, max, err, mask; - if(unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) + tx_dbg(jme, "Into txclean.\n"); + + if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) goto out; - if(unlikely(atomic_read(&jme->link_changing) != 1)) + if (unlikely(atomic_read(&jme->link_changing) != 1)) goto out; - if(unlikely(!netif_carrier_ok(jme->dev))) + if (unlikely(!netif_carrier_ok(jme->dev))) goto out; max = jme->tx_ring_size - atomic_read(&txring->nr_free); mask = jme->tx_ring_mask; - tx_dbg(jme->dev->name, "Tx Tasklet: In\n"); - - for(i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { + for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { ctxbi = txbi + i; - if(likely(ctxbi->skb && + if (likely(ctxbi->skb && !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { - err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; + tx_dbg(jme, "txclean: %d+%d@%lu\n", + i, ctxbi->nr_desc, jiffies); - tx_dbg(jme->dev->name, - "Tx Tasklet: Clean %d+%d\n", - i, ctxbi->nr_desc); + err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; - for(j = 1 ; j < ctxbi->nr_desc ; ++j) { + for (j = 1 ; j < ctxbi->nr_desc ; ++j) { ttxbi = txbi + ((i + j) & (mask)); txdesc[(i + j) & (mask)].dw[0] = 0; @@ -1281,9 +1454,9 @@ jme_tx_clean_tasklet(unsigned long arg) cnt += ctxbi->nr_desc; - if(unlikely(err)) + if (unlikely(err)) { ++(NET_STAT(jme).tx_carrier_errors); - else { + } else { ++(NET_STAT(jme).tx_packets); NET_STAT(jme).tx_bytes += ctxbi->len; } @@ -1291,16 +1464,8 @@ jme_tx_clean_tasklet(unsigned long arg) ctxbi->skb = NULL; ctxbi->len = 0; ctxbi->start_xmit = 0; - } - else { - if(!ctxbi->skb) - tx_dbg(jme->dev->name, - "Tx Tasklet:" - " Stopped due to no skb.\n"); - else - tx_dbg(jme->dev->name, - "Tx Tasklet:" - "Stopped due to not done.\n"); + + } else { break; } @@ -1309,10 +1474,7 @@ jme_tx_clean_tasklet(unsigned long arg) ctxbi->nr_desc = 0; } - tx_dbg(jme->dev->name, - "Tx Tasklet: Stop %d Jiffies %lu\n", - i, jiffies); - + tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies); atomic_set(&txring->next_to_clean, i); atomic_add(cnt, &txring->nr_free); @@ -1323,14 +1485,14 @@ out: } static void -jme_intr_msi(struct jme_adapter *jme, __u32 intrstat) +jme_intr_msi(struct jme_adapter *jme, u32 intrstat) { /* * Disable interrupt */ jwrite32f(jme, JME_IENC, INTR_ENABLE); - if(intrstat & (INTR_LINKCH | INTR_SWINTR)) { + if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { /* * Link change event is critical * all other events are ignored @@ -1340,41 +1502,40 @@ jme_intr_msi(struct jme_adapter *jme, __u32 intrstat) goto out_reenable; } - if(intrstat & INTR_TMINTR) { + if (intrstat & INTR_TMINTR) { jwrite32(jme, JME_IEVE, INTR_TMINTR); tasklet_schedule(&jme->pcc_task); } - if(intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { + if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); tasklet_schedule(&jme->txclean_task); } - if((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { + if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP)) | INTR_RX0); } - if(jme->flags & JME_FLAG_POLL) { - if(intrstat & INTR_RX0EMP) + if (test_bit(JME_FLAG_POLL, &jme->flags)) { + if (intrstat & INTR_RX0EMP) atomic_inc(&jme->rx_empty); - if((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { - if(likely(JME_RX_SCHEDULE_PREP(jme))) { + if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { + if (likely(JME_RX_SCHEDULE_PREP(jme))) { jme_polling_mode(jme); JME_RX_SCHEDULE(jme); } } - } - else { - if(intrstat & INTR_RX0EMP) { + } else { + if (intrstat & INTR_RX0EMP) { atomic_inc(&jme->rx_empty); - tasklet_schedule(&jme->rxempty_task); + tasklet_hi_schedule(&jme->rxempty_task); + } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { + tasklet_hi_schedule(&jme->rxclean_task); } - else if(intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) - tasklet_schedule(&jme->rxclean_task); } out_reenable: @@ -1382,56 +1543,53 @@ out_reenable: * Re-enable interrupt */ jwrite32f(jme, JME_IENS, INTR_ENABLE); - - } static irqreturn_t jme_intr(int irq, void *dev_id) { - struct net_device *netdev = dev_id; - struct jme_adapter *jme = netdev_priv(netdev); - __u32 intrstat; + struct net_device *netdev = dev_id; + struct jme_adapter *jme = netdev_priv(netdev); + u32 intrstat; intrstat = jread32(jme, JME_IEVE); /* * Check if it's really an interrupt for us */ - if(unlikely(intrstat == 0)) + if (unlikely(intrstat == 0)) return IRQ_NONE; /* * Check if the device still exist */ - if(unlikely(intrstat == ~((typeof(intrstat))0))) - return IRQ_NONE; + if (unlikely(intrstat == ~((typeof(intrstat))0))) + return IRQ_NONE; jme_intr_msi(jme, intrstat); - return IRQ_HANDLED; + return IRQ_HANDLED; } static irqreturn_t jme_msi(int irq, void *dev_id) { - struct net_device *netdev = dev_id; - struct jme_adapter *jme = netdev_priv(netdev); - __u32 intrstat; + struct net_device *netdev = dev_id; + struct jme_adapter *jme = netdev_priv(netdev); + u32 intrstat; pci_dma_sync_single_for_cpu(jme->pdev, jme->shadow_dma, - sizeof(__u32) * SHADOW_REG_NR, + sizeof(u32) * SHADOW_REG_NR, PCI_DMA_FROMDEVICE); intrstat = jme->shadow_regs[SHADOW_IEVE]; jme->shadow_regs[SHADOW_IEVE] = 0; jme_intr_msi(jme, intrstat); - return IRQ_HANDLED; + return IRQ_HANDLED; } - static void jme_reset_link(struct jme_adapter *jme) { @@ -1441,93 +1599,80 @@ jme_reset_link(struct jme_adapter *jme) static void jme_restart_an(struct jme_adapter *jme) { - __u32 bmcr; - unsigned long flags; + u32 bmcr; - spin_lock_irqsave(&jme->phy_lock, flags); + spin_lock_bh(&jme->phy_lock); bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); - spin_unlock_irqrestore(&jme->phy_lock, flags); + spin_unlock_bh(&jme->phy_lock); } static int jme_request_irq(struct jme_adapter *jme) { int rc; - struct net_device *netdev = jme->dev; - irq_handler_t handler = jme_intr; - int irq_flags = IRQF_SHARED; - - if (!pci_enable_msi(jme->pdev)) { - jme->flags |= JME_FLAG_MSI; - handler = jme_msi; - irq_flags = 0; - } - - rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, - netdev); - if(rc) { - jeprintk(netdev->name, + struct net_device *netdev = jme->dev; + irq_handler_t handler = jme_intr; + int irq_flags = IRQF_SHARED; + + if (!pci_enable_msi(jme->pdev)) { + set_bit(JME_FLAG_MSI, &jme->flags); + handler = jme_msi; + irq_flags = 0; + } + + rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, + netdev); + if (rc) { + jeprintk(jme->pdev, "Unable to request %s interrupt (return: %d)\n", - jme->flags & JME_FLAG_MSI ? "MSI":"INTx", rc); + test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", + rc); - if(jme->flags & JME_FLAG_MSI) { - pci_disable_msi(jme->pdev); - jme->flags &= ~JME_FLAG_MSI; + if (test_bit(JME_FLAG_MSI, &jme->flags)) { + pci_disable_msi(jme->pdev); + clear_bit(JME_FLAG_MSI, &jme->flags); } - } - else { + } else { netdev->irq = jme->pdev->irq; } - return rc; + return rc; } static void jme_free_irq(struct jme_adapter *jme) { - free_irq(jme->pdev->irq, jme->dev); - if (jme->flags & JME_FLAG_MSI) { - pci_disable_msi(jme->pdev); - jme->flags &= ~JME_FLAG_MSI; + free_irq(jme->pdev->irq, jme->dev); + if (test_bit(JME_FLAG_MSI, &jme->flags)) { + pci_disable_msi(jme->pdev); + clear_bit(JME_FLAG_MSI, &jme->flags); jme->dev->irq = jme->pdev->irq; - } + } } static int jme_open(struct net_device *netdev) { struct jme_adapter *jme = netdev_priv(netdev); - int rc, timeout = 10; - - while( - --timeout > 0 && - ( - atomic_read(&jme->link_changing) != 1 || - atomic_read(&jme->rx_cleaning) != 1 || - atomic_read(&jme->tx_cleaning) != 1 - ) - ) - msleep(1); - - if(!timeout) { - rc = -EBUSY; - goto err_out; - } + int rc; jme_clear_pm(jme); - jme_reset_mac_processor(jme); JME_NAPI_ENABLE(jme); + tasklet_enable(&jme->txclean_task); + tasklet_hi_enable(&jme->rxclean_task); + tasklet_hi_enable(&jme->rxempty_task); + rc = jme_request_irq(jme); - if(rc) + if (rc) goto err_out; jme_enable_shadow(jme); jme_start_irq(jme); - if(jme->flags & JME_FLAG_SSET) + if (test_bit(JME_FLAG_SSET, &jme->flags)) jme_set_settings(netdev, &jme->old_ecmd); else jme_reset_phy_processor(jme); @@ -1545,7 +1690,7 @@ err_out: static void jme_set_100m_half(struct jme_adapter *jme) { - __u32 bmcr, tmp; + u32 bmcr, tmp; bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | @@ -1555,7 +1700,7 @@ jme_set_100m_half(struct jme_adapter *jme) if (bmcr != tmp) jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); - if(jme->fpgaver) + if (jme->fpgaver) jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); else jwrite32(jme, JME_GHC, GHC_SPEED_100M); @@ -1565,23 +1710,22 @@ jme_set_100m_half(struct jme_adapter *jme) static void jme_wait_link(struct jme_adapter *jme) { - __u32 phylink, to = JME_WAIT_LINK_TIME; + u32 phylink, to = JME_WAIT_LINK_TIME; mdelay(1000); phylink = jme_linkstat_from_phy(jme); - while(!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { + while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { mdelay(10); phylink = jme_linkstat_from_phy(jme); } } -static void +static inline void jme_phy_off(struct jme_adapter *jme) { jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); } - static int jme_close(struct net_device *netdev) { @@ -1601,6 +1745,9 @@ jme_close(struct net_device *netdev) tasklet_kill(&jme->rxclean_task); tasklet_kill(&jme->rxempty_task); + jme_reset_ghc_speed(jme); + jme_disable_rx_engine(jme); + jme_disable_tx_engine(jme); jme_reset_mac_processor(jme); jme_free_rx_resources(jme); jme_free_tx_resources(jme); @@ -1620,7 +1767,7 @@ jme_alloc_txdesc(struct jme_adapter *jme, idx = txring->next_to_use; nr_alloc = skb_shinfo(skb)->nr_frags + 2; - if(unlikely(atomic_read(&txring->nr_free) < nr_alloc)) + if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) return -1; atomic_sub(nr_alloc, &txring->nr_free); @@ -1632,12 +1779,12 @@ jme_alloc_txdesc(struct jme_adapter *jme, static void jme_fill_tx_map(struct pci_dev *pdev, - volatile struct txdesc *txdesc, + struct txdesc *txdesc, struct jme_buffer_info *txbi, struct page *page, - __u32 page_offset, - __u32 len, - __u8 hidma) + u32 page_offset, + u32 len, + u8 hidma) { dma_addr_t dmaaddr; @@ -1655,7 +1802,7 @@ jme_fill_tx_map(struct pci_dev *pdev, txdesc->dw[0] = 0; txdesc->dw[1] = 0; txdesc->desc2.flags = TXFLAG_OWN; - txdesc->desc2.flags |= (hidma)?TXFLAG_64BIT:0; + txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; txdesc->desc2.datalen = cpu_to_le16(len); txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); txdesc->desc2.bufaddrl = cpu_to_le32( @@ -1669,16 +1816,16 @@ static void jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) { struct jme_ring *txring = jme->txring; - volatile struct txdesc *txdesc = txring->desc, *ctxdesc; + struct txdesc *txdesc = txring->desc, *ctxdesc; struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; - __u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; + u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; int i, nr_frags = skb_shinfo(skb)->nr_frags; int mask = jme->tx_ring_mask; struct skb_frag_struct *frag; - __u32 len; + u32 len; - for(i = 0 ; i < nr_frags ; ++i) { - frag = &skb_shinfo(skb)->frags[i]; + for (i = 0 ; i < nr_frags ; ++i) { + frag = &skb_shinfo(skb)->frags[i]; ctxdesc = txdesc + ((idx + i + 2) & (mask)); ctxbi = txbi + ((idx + i + 2) & (mask)); @@ -1686,7 +1833,7 @@ jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) frag->page_offset, frag->size, hidma); } - len = skb_is_nonlinear(skb)?skb_headlen(skb):skb->len; + len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; ctxdesc = txdesc + ((idx + 1) & (mask)); ctxbi = txbi + ((idx + 1) & (mask)); jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), @@ -1697,7 +1844,7 @@ jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) static int jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) { - if(unlikely(skb_shinfo(skb)->gso_size && + if (unlikely(skb_shinfo(skb)->gso_size && skb_header_cloned(skb) && pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { dev_kfree_skb(skb); @@ -1709,24 +1856,24 @@ jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) static int jme_tx_tso(struct sk_buff *skb, - volatile __u16 *mss, __u8 *flags) + u16 *mss, u8 *flags) { - if((*mss = (skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT))) { + *mss = skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT; + if (*mss) { *flags |= TXFLAG_LSEN; - if(skb->protocol == __constant_htons(ETH_P_IP)) { + if (skb->protocol == htons(ETH_P_IP)) { struct iphdr *iph = ip_hdr(skb); iph->check = 0; - tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, + tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, IPPROTO_TCP, 0); - } - else { + } else { struct ipv6hdr *ip6h = ipv6_hdr(skb); - tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, + tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, &ip6h->daddr, 0, IPPROTO_TCP, 0); @@ -1739,16 +1886,16 @@ jme_tx_tso(struct sk_buff *skb, } static void -jme_tx_csum(struct sk_buff *skb, __u8 *flags) +jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) { - if(skb->ip_summed == CHECKSUM_PARTIAL) { - __u8 ip_proto; + if (skb->ip_summed == CHECKSUM_PARTIAL) { + u8 ip_proto; switch (skb->protocol) { - case __constant_htons(ETH_P_IP): + case htons(ETH_P_IP): ip_proto = ip_hdr(skb)->protocol; break; - case __constant_htons(ETH_P_IPV6): + case htons(ETH_P_IPV6): ip_proto = ipv6_hdr(skb)->nexthdr; break; default: @@ -1756,7 +1903,7 @@ jme_tx_csum(struct sk_buff *skb, __u8 *flags) break; } - switch(ip_proto) { + switch (ip_proto) { case IPPROTO_TCP: *flags |= TXFLAG_TCPCS; break; @@ -1764,17 +1911,16 @@ jme_tx_csum(struct sk_buff *skb, __u8 *flags) *flags |= TXFLAG_UDPCS; break; default: - jeprintk("jme", "Error upper layer protocol.\n"); + msg_tx_err(jme, "Error upper layer protocol.\n"); break; } } } -__always_inline static void -jme_tx_vlan(struct sk_buff *skb, volatile __u16 *vlan, __u8 *flags) +static inline void +jme_tx_vlan(struct sk_buff *skb, u16 *vlan, u8 *flags) { - if(vlan_tx_tag_present(skb)) { - vlan_dbg("jme", "Tag found!(%04x)\n", vlan_tx_tag_get(skb)); + if (vlan_tx_tag_present(skb)) { *flags |= TXFLAG_TAGON; *vlan = vlan_tx_tag_get(skb); } @@ -1784,11 +1930,11 @@ static int jme_fill_first_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) { struct jme_ring *txring = jme->txring; - volatile struct txdesc *txdesc; + struct txdesc *txdesc; struct jme_buffer_info *txbi; - __u8 flags; + u8 flags; - txdesc = (volatile struct txdesc*)txring->desc + idx; + txdesc = (struct txdesc *)txring->desc + idx; txbi = txring->bufinf + idx; txdesc->dw[0] = 0; @@ -1805,9 +1951,11 @@ jme_fill_first_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) */ wmb(); flags = TXFLAG_OWN | TXFLAG_INT; - //Set checksum flags while not tso - if(jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) - jme_tx_csum(skb, &flags); + /* + * Set checksum flags while not tso + */ + if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) + jme_tx_csum(jme, skb, &flags); jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); txdesc->desc1.flags = flags; /* @@ -1818,7 +1966,8 @@ jme_fill_first_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; txbi->skb = skb; txbi->len = skb->len; - if(!(txbi->start_xmit = jiffies)) + txbi->start_xmit = jiffies; + if (!txbi->start_xmit) txbi->start_xmit = (0UL-1); return 0; @@ -1828,90 +1977,83 @@ static void jme_stop_queue_if_full(struct jme_adapter *jme) { struct jme_ring *txring = jme->txring; - struct jme_buffer_info *txbi = txring->bufinf; + struct jme_buffer_info *txbi = txring->bufinf; + int idx = atomic_read(&txring->next_to_clean); - txbi += atomic_read(&txring->next_to_clean); + txbi += idx; smp_wmb(); - if(unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { + if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { netif_stop_queue(jme->dev); - queue_dbg(jme->dev->name, "TX Queue Paused.\n"); + msg_tx_queued(jme, "TX Queue Paused.\n"); smp_wmb(); - if (atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold)) { + if (atomic_read(&txring->nr_free) + >= (jme->tx_wake_threshold)) { netif_wake_queue(jme->dev); - queue_dbg(jme->dev->name, "TX Queue Fast Waked.\n"); + msg_tx_queued(jme, "TX Queue Fast Waked.\n"); } } - if(unlikely( txbi->start_xmit && + if (unlikely(txbi->start_xmit && (jiffies - txbi->start_xmit) >= TX_TIMEOUT && txbi->skb)) { netif_stop_queue(jme->dev); - queue_dbg(jme->dev->name, "TX Queue Stopped @(%lu).\n", jiffies); + msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies); } } /* * This function is already protected by netif_tx_lock() */ + static int jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); int idx; - if(skb_shinfo(skb)->nr_frags) { - tx_dbg(netdev->name, "Frags: %d Headlen: %d Len: %d MSS: %d Sum:%d\n", - skb_shinfo(skb)->nr_frags, - skb_headlen(skb), - skb->len, - skb_shinfo(skb)->gso_size, - skb->ip_summed); - } - - if(unlikely(jme_expand_header(jme, skb))) { + if (unlikely(jme_expand_header(jme, skb))) { ++(NET_STAT(jme).tx_dropped); return NETDEV_TX_OK; } idx = jme_alloc_txdesc(jme, skb); - if(unlikely(idx<0)) { + if (unlikely(idx < 0)) { netif_stop_queue(netdev); - jeprintk(netdev->name, - "BUG! Tx ring full when queue awake!\n"); + msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n"); - return NETDEV_TX_BUSY; + return NETDEV_TX_BUSY; } jme_map_tx_skb(jme, skb, idx); jme_fill_first_tx_desc(jme, skb, idx); - tx_dbg(jme->dev->name, "Xmit: %d+%d @(%lu)\n", - idx, skb_shinfo(skb)->nr_frags + 2, jiffies); - jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0 | TXCS_QUEUE0S | TXCS_ENABLE); netdev->trans_start = jiffies; + tx_dbg(jme, "xmit: %d+%d@%lu\n", idx, + skb_shinfo(skb)->nr_frags + 2, + jiffies); jme_stop_queue_if_full(jme); - return NETDEV_TX_OK; + return NETDEV_TX_OK; } static int jme_set_macaddr(struct net_device *netdev, void *p) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); struct sockaddr *addr = p; - __u32 val; + u32 val; - if(netif_running(netdev)) + if (netif_running(netdev)) return -EBUSY; - spin_lock(&jme->macaddr_lock); + spin_lock_bh(&jme->macaddr_lock); memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); val = (addr->sa_data[3] & 0xff) << 24 | @@ -1922,7 +2064,7 @@ jme_set_macaddr(struct net_device *netdev, void *p) val = (addr->sa_data[5] & 0xff) << 8 | (addr->sa_data[4] & 0xff); jwrite32(jme, JME_RXUMA_HI, val); - spin_unlock(&jme->macaddr_lock); + spin_unlock_bh(&jme->macaddr_lock); return 0; } @@ -1933,19 +2075,16 @@ jme_set_multi(struct net_device *netdev) struct jme_adapter *jme = netdev_priv(netdev); u32 mc_hash[2] = {}; int i; - unsigned long flags; - spin_lock_irqsave(&jme->rxmcs_lock, flags); + spin_lock_bh(&jme->rxmcs_lock); jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; - if (netdev->flags & IFF_PROMISC) { + if (netdev->flags & IFF_PROMISC) { jme->reg_rxmcs |= RXMCS_ALLFRAME; - } - else if (netdev->flags & IFF_ALLMULTI) { + } else if (netdev->flags & IFF_ALLMULTI) { jme->reg_rxmcs |= RXMCS_ALLMULFRAME; - } - else if(netdev->flags & IFF_MULTICAST) { + } else if (netdev->flags & IFF_MULTICAST) { struct dev_mc_list *mclist; int bit_nr; @@ -1954,9 +2093,9 @@ jme_set_multi(struct net_device *netdev) mclist && i < netdev->mc_count; ++i, mclist = mclist->next) { - bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; - mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); - } + bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; + mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); + } jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); @@ -1965,58 +2104,98 @@ jme_set_multi(struct net_device *netdev) wmb(); jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); - spin_unlock_irqrestore(&jme->rxmcs_lock, flags); + spin_unlock_bh(&jme->rxmcs_lock); } static int jme_change_mtu(struct net_device *netdev, int new_mtu) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); - if(new_mtu == jme->old_mtu) + if (new_mtu == jme->old_mtu) return 0; - if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || - ((new_mtu) < IPV6_MIN_MTU)) - return -EINVAL; + if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || + ((new_mtu) < IPV6_MIN_MTU)) + return -EINVAL; - if(new_mtu > 4000) { + if (new_mtu > 4000) { jme->reg_rxcs &= ~RXCS_FIFOTHNP; jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; jme_restart_rx_engine(jme); - } - else { + } else { jme->reg_rxcs &= ~RXCS_FIFOTHNP; jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; jme_restart_rx_engine(jme); } - if(new_mtu > 1900) { + if (new_mtu > 1900) { netdev->features &= ~(NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6); - } - else { - if(jme->flags & JME_FLAG_TXCSUM) + } else { + if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) netdev->features |= NETIF_F_HW_CSUM; - if(jme->flags & JME_FLAG_TSO) + if (test_bit(JME_FLAG_TSO, &jme->flags)) netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; } - netdev->mtu = new_mtu; - jme_reset_link(jme); + netdev->mtu = new_mtu; + jme_reset_link(jme); return 0; } +static int +jme_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) +{ + struct jme_adapter *jme = netdev_priv(netdev); + struct jme_spi_op spiop; + int rc; + + switch (cmd) { + case JMESPIIOCTL: + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + + copy_from_user(&spiop, ifr->ifr_data, + sizeof(struct jme_spi_op)); + spiop.kwbuf = kmalloc(spiop.wn, GFP_KERNEL); + if (!spiop.kwbuf) { + rc = -ENOMEM; + goto out; + } + spiop.krbuf = kmalloc(spiop.rn, GFP_KERNEL); + if (!spiop.krbuf) { + rc = -ENOMEM; + goto out_free1; + } + copy_from_user(spiop.kwbuf, spiop.uwbuf, spiop.wn); + rc = jme_spi_op(jme, &spiop); + if (rc) + goto out_free; + copy_to_user(spiop.urbuf, spiop.krbuf, spiop.rn); +out_free: + kfree(spiop.krbuf); +out_free1: + kfree(spiop.kwbuf); +out: + return rc; + default: + break; + } + + return -EOPNOTSUPP; +} + static void jme_tx_timeout(struct net_device *netdev) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); jme->phylink = 0; jme_reset_phy_processor(jme); - if(jme->flags & JME_FLAG_SSET) + if (test_bit(JME_FLAG_SSET, &jme->flags)) jme_set_settings(netdev, &jme->old_ecmd); /* @@ -2037,43 +2216,43 @@ static void jme_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); - strcpy(info->driver, DRV_NAME); - strcpy(info->version, DRV_VERSION); - strcpy(info->bus_info, pci_name(jme->pdev)); + strcpy(info->driver, DRV_NAME); + strcpy(info->version, DRV_VERSION); + strcpy(info->bus_info, pci_name(jme->pdev)); } static int jme_get_regs_len(struct net_device *netdev) { - return JME_REG_LEN; + return JME_REG_LEN; } static void -mmapio_memcpy(struct jme_adapter *jme, __u32 *p, __u32 reg, int len) +mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) { int i; - for(i = 0 ; i < len ; i += 4) + for (i = 0 ; i < len ; i += 4) p[i >> 2] = jread32(jme, reg + i); } static void -mdio_memcpy(struct jme_adapter *jme, __u32 *p, int reg_nr) +mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) { int i; - __u16 *p16 = (__u16*)p; + u16 *p16 = (u16 *)p; - for(i = 0 ; i < reg_nr ; ++i) + for (i = 0 ; i < reg_nr ; ++i) p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); } static void jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) { - struct jme_adapter *jme = netdev_priv(netdev); - __u32 *p32 = (__u32*)p; + struct jme_adapter *jme = netdev_priv(netdev); + u32 *p32 = (u32 *)p; memset(p, 0xFF, JME_REG_LEN); @@ -2101,7 +2280,7 @@ jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) ecmd->tx_coalesce_usecs = PCC_TX_TO; ecmd->tx_max_coalesced_frames = PCC_TX_CNT; - if(jme->flags & JME_FLAG_POLL) { + if (test_bit(JME_FLAG_POLL, &jme->flags)) { ecmd->use_adaptive_rx_coalesce = false; ecmd->rx_coalesce_usecs = 0; ecmd->rx_max_coalesced_frames = 0; @@ -2110,7 +2289,7 @@ jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) ecmd->use_adaptive_rx_coalesce = true; - switch(jme->dpi.cur) { + switch (jme->dpi.cur) { case PCC_P1: ecmd->rx_coalesce_usecs = PCC_P1_TO; ecmd->rx_max_coalesced_frames = PCC_P1_CNT; @@ -2136,12 +2315,12 @@ jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) struct jme_adapter *jme = netdev_priv(netdev); struct dynpcc_info *dpi = &(jme->dpi); - if(netif_running(netdev)) + if (netif_running(netdev)) return -EBUSY; - if(ecmd->use_adaptive_rx_coalesce - && (jme->flags & JME_FLAG_POLL)) { - jme->flags &= ~JME_FLAG_POLL; + if (ecmd->use_adaptive_rx_coalesce + && test_bit(JME_FLAG_POLL, &jme->flags)) { + clear_bit(JME_FLAG_POLL, &jme->flags); jme->jme_rx = netif_rx; jme->jme_vlan_rx = vlan_hwaccel_rx; dpi->cur = PCC_P1; @@ -2149,10 +2328,9 @@ jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) dpi->cnt = 0; jme_set_rx_pcc(jme, PCC_P1); jme_interrupt_mode(jme); - } - else if(!(ecmd->use_adaptive_rx_coalesce) - && !(jme->flags & JME_FLAG_POLL)) { - jme->flags |= JME_FLAG_POLL; + } else if (!(ecmd->use_adaptive_rx_coalesce) + && !(test_bit(JME_FLAG_POLL, &jme->flags))) { + set_bit(JME_FLAG_POLL, &jme->flags); jme->jme_rx = netif_receive_skb; jme->jme_vlan_rx = vlan_hwaccel_receive_skb; jme_interrupt_mode(jme); @@ -2166,15 +2344,14 @@ jme_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd) { struct jme_adapter *jme = netdev_priv(netdev); - unsigned long flags; - __u32 val; + u32 val; ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; - spin_lock_irqsave(&jme->phy_lock, flags); - val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); - spin_unlock_irqrestore(&jme->phy_lock, flags); + spin_lock_bh(&jme->phy_lock); + val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); + spin_unlock_bh(&jme->phy_lock); ecmd->autoneg = (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; @@ -2185,13 +2362,12 @@ jme_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd) { struct jme_adapter *jme = netdev_priv(netdev); - unsigned long flags; - __u32 val; + u32 val; - if( ((jme->reg_txpfc & TXPFC_PF_EN) != 0) != + if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ (ecmd->tx_pause != 0)) { - if(ecmd->tx_pause) + if (ecmd->tx_pause) jme->reg_txpfc |= TXPFC_PF_EN; else jme->reg_txpfc &= ~TXPFC_PF_EN; @@ -2199,25 +2375,25 @@ jme_set_pauseparam(struct net_device *netdev, jwrite32(jme, JME_TXPFC, jme->reg_txpfc); } - spin_lock_irqsave(&jme->rxmcs_lock, flags); - if( ((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) != + spin_lock_bh(&jme->rxmcs_lock); + if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ (ecmd->rx_pause != 0)) { - if(ecmd->rx_pause) + if (ecmd->rx_pause) jme->reg_rxmcs |= RXMCS_FLOWCTRL; else jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); } - spin_unlock_irqrestore(&jme->rxmcs_lock, flags); + spin_unlock_bh(&jme->rxmcs_lock); - spin_lock_irqsave(&jme->phy_lock, flags); - val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); - if( ((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) != + spin_lock_bh(&jme->phy_lock); + val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); + if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ (ecmd->autoneg != 0)) { - if(ecmd->autoneg) + if (ecmd->autoneg) val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); else val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); @@ -2225,7 +2401,7 @@ jme_set_pauseparam(struct net_device *netdev, jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, val); } - spin_unlock_irqrestore(&jme->phy_lock, flags); + spin_unlock_bh(&jme->phy_lock); return 0; } @@ -2240,10 +2416,10 @@ jme_get_wol(struct net_device *netdev, wol->wolopts = 0; - if(jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) + if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) wol->wolopts |= WAKE_PHY; - if(jme->reg_pmcs & PMCS_MFEN) + if (jme->reg_pmcs & PMCS_MFEN) wol->wolopts |= WAKE_MAGIC; } @@ -2254,7 +2430,7 @@ jme_set_wol(struct net_device *netdev, { struct jme_adapter *jme = netdev_priv(netdev); - if(wol->wolopts & (WAKE_MAGICSECURE | + if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | @@ -2263,12 +2439,13 @@ jme_set_wol(struct net_device *netdev, jme->reg_pmcs = 0; - if(wol->wolopts & WAKE_PHY) + if (wol->wolopts & WAKE_PHY) jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; - if(wol->wolopts & WAKE_MAGIC) + if (wol->wolopts & WAKE_MAGIC) jme->reg_pmcs |= PMCS_MFEN; + jwrite32(jme, JME_PMCS, jme->reg_pmcs); return 0; } @@ -2279,11 +2456,10 @@ jme_get_settings(struct net_device *netdev, { struct jme_adapter *jme = netdev_priv(netdev); int rc; - unsigned long flags; - spin_lock_irqsave(&jme->phy_lock, flags); + spin_lock_bh(&jme->phy_lock); rc = mii_ethtool_gset(&(jme->mii_if), ecmd); - spin_unlock_irqrestore(&jme->phy_lock, flags); + spin_unlock_bh(&jme->phy_lock); return rc; } @@ -2292,33 +2468,32 @@ jme_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) { struct jme_adapter *jme = netdev_priv(netdev); - int rc, fdc=0; - unsigned long flags; + int rc, fdc = 0; - if(ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) + if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) return -EINVAL; - if(jme->mii_if.force_media && + if (jme->mii_if.force_media && ecmd->autoneg != AUTONEG_ENABLE && (jme->mii_if.full_duplex != ecmd->duplex)) fdc = 1; - spin_lock_irqsave(&jme->phy_lock, flags); + spin_lock_bh(&jme->phy_lock); rc = mii_ethtool_sset(&(jme->mii_if), ecmd); - spin_unlock_irqrestore(&jme->phy_lock, flags); + spin_unlock_bh(&jme->phy_lock); - if(!rc && fdc) + if (!rc && fdc) jme_reset_link(jme); - if(!rc) { - jme->flags |= JME_FLAG_SSET; + if (!rc) { + set_bit(JME_FLAG_SSET, &jme->flags); jme->old_ecmd = *ecmd; } return rc; } -static __u32 +static u32 jme_get_link(struct net_device *netdev) { struct jme_adapter *jme = netdev_priv(netdev); @@ -2326,26 +2501,38 @@ jme_get_link(struct net_device *netdev) } static u32 -jme_get_rx_csum(struct net_device *netdev) +jme_get_msglevel(struct net_device *netdev) +{ + struct jme_adapter *jme = netdev_priv(netdev); + return jme->msg_enable; +} + +static void +jme_set_msglevel(struct net_device *netdev, u32 value) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); + jme->msg_enable = value; +} +static u32 +jme_get_rx_csum(struct net_device *netdev) +{ + struct jme_adapter *jme = netdev_priv(netdev); return jme->reg_rxmcs & RXMCS_CHECKSUM; } static int jme_set_rx_csum(struct net_device *netdev, u32 on) { - struct jme_adapter *jme = netdev_priv(netdev); - unsigned long flags; + struct jme_adapter *jme = netdev_priv(netdev); - spin_lock_irqsave(&jme->rxmcs_lock, flags); - if(on) + spin_lock_bh(&jme->rxmcs_lock); + if (on) jme->reg_rxmcs |= RXMCS_CHECKSUM; else jme->reg_rxmcs &= ~RXMCS_CHECKSUM; jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); - spin_unlock_irqrestore(&jme->rxmcs_lock, flags); + spin_unlock_bh(&jme->rxmcs_lock); return 0; } @@ -2353,15 +2540,14 @@ jme_set_rx_csum(struct net_device *netdev, u32 on) static int jme_set_tx_csum(struct net_device *netdev, u32 on) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); - if(on) { - jme->flags |= JME_FLAG_TXCSUM; - if(netdev->mtu <= 1900) + if (on) { + set_bit(JME_FLAG_TXCSUM, &jme->flags); + if (netdev->mtu <= 1900) netdev->features |= NETIF_F_HW_CSUM; - } - else { - jme->flags &= ~JME_FLAG_TXCSUM; + } else { + clear_bit(JME_FLAG_TXCSUM, &jme->flags); netdev->features &= ~NETIF_F_HW_CSUM; } @@ -2371,43 +2557,42 @@ jme_set_tx_csum(struct net_device *netdev, u32 on) static int jme_set_tso(struct net_device *netdev, u32 on) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); - if (on) { - jme->flags |= JME_FLAG_TSO; - if(netdev->mtu <= 1900) + if (on) { + set_bit(JME_FLAG_TSO, &jme->flags); + if (netdev->mtu <= 1900) netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; - } - else { - jme->flags &= ~JME_FLAG_TSO; - netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); + } else { + clear_bit(JME_FLAG_TSO, &jme->flags); + netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); } - return 0; + return 0; } static int jme_nway_reset(struct net_device *netdev) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); jme_restart_an(jme); return 0; } -static __u8 +static u8 jme_smb_read(struct jme_adapter *jme, unsigned int addr) { - __u32 val; + u32 val; int to; val = jread32(jme, JME_SMBCSR); to = JME_SMB_BUSY_TIMEOUT; - while((val & SMBCSR_BUSY) && --to) { + while ((val & SMBCSR_BUSY) && --to) { msleep(1); val = jread32(jme, JME_SMBCSR); } - if(!to) { - jeprintk(jme->dev->name, "SMB Bus Busy.\n"); + if (!to) { + msg_hw(jme, "SMB Bus Busy.\n"); return 0xFF; } @@ -2418,12 +2603,12 @@ jme_smb_read(struct jme_adapter *jme, unsigned int addr) val = jread32(jme, JME_SMBINTF); to = JME_SMB_BUSY_TIMEOUT; - while((val & SMBINTF_HWCMD) && --to) { + while ((val & SMBINTF_HWCMD) && --to) { msleep(1); val = jread32(jme, JME_SMBINTF); } - if(!to) { - jeprintk(jme->dev->name, "SMB Bus Busy.\n"); + if (!to) { + msg_hw(jme, "SMB Bus Busy.\n"); return 0xFF; } @@ -2431,19 +2616,19 @@ jme_smb_read(struct jme_adapter *jme, unsigned int addr) } static void -jme_smb_write(struct jme_adapter *jme, unsigned int addr, __u8 data) +jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) { - __u32 val; + u32 val; int to; val = jread32(jme, JME_SMBCSR); to = JME_SMB_BUSY_TIMEOUT; - while((val & SMBCSR_BUSY) && --to) { + while ((val & SMBCSR_BUSY) && --to) { msleep(1); val = jread32(jme, JME_SMBCSR); } - if(!to) { - jeprintk(jme->dev->name, "SMB Bus Busy.\n"); + if (!to) { + msg_hw(jme, "SMB Bus Busy.\n"); return; } @@ -2455,12 +2640,12 @@ jme_smb_write(struct jme_adapter *jme, unsigned int addr, __u8 data) val = jread32(jme, JME_SMBINTF); to = JME_SMB_BUSY_TIMEOUT; - while((val & SMBINTF_HWCMD) && --to) { + while ((val & SMBINTF_HWCMD) && --to) { msleep(1); val = jread32(jme, JME_SMBINTF); } - if(!to) { - jeprintk(jme->dev->name, "SMB Bus Busy.\n"); + if (!to) { + msg_hw(jme, "SMB Bus Busy.\n"); return; } @@ -2470,24 +2655,24 @@ jme_smb_write(struct jme_adapter *jme, unsigned int addr, __u8 data) static int jme_get_eeprom_len(struct net_device *netdev) { - struct jme_adapter *jme = netdev_priv(netdev); - __u32 val; + struct jme_adapter *jme = netdev_priv(netdev); + u32 val; val = jread32(jme, JME_SMBCSR); - return (val & SMBCSR_EEPROMD)?JME_SMB_LEN:0; + return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; } static int jme_get_eeprom(struct net_device *netdev, struct ethtool_eeprom *eeprom, u8 *data) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); int i, offset = eeprom->offset, len = eeprom->len; /* * ethtool will check the boundary for us */ eeprom->magic = JME_EEPROM_MAGIC; - for(i = 0 ; i < len ; ++i) + for (i = 0 ; i < len ; ++i) data[i] = jme_smb_read(jme, i + offset); return 0; @@ -2497,7 +2682,7 @@ static int jme_set_eeprom(struct net_device *netdev, struct ethtool_eeprom *eeprom, u8 *data) { - struct jme_adapter *jme = netdev_priv(netdev); + struct jme_adapter *jme = netdev_priv(netdev); int i, offset = eeprom->offset, len = eeprom->len; if (eeprom->magic != JME_EEPROM_MAGIC) @@ -2506,25 +2691,27 @@ jme_set_eeprom(struct net_device *netdev, /* * ethtool will check the boundary for us */ - for(i = 0 ; i < len ; ++i) + for (i = 0 ; i < len ; ++i) jme_smb_write(jme, i + offset, data[i]); return 0; } static const struct ethtool_ops jme_ethtool_ops = { - .get_drvinfo = jme_get_drvinfo, + .get_drvinfo = jme_get_drvinfo, .get_regs_len = jme_get_regs_len, .get_regs = jme_get_regs, .get_coalesce = jme_get_coalesce, .set_coalesce = jme_set_coalesce, - .get_pauseparam = jme_get_pauseparam, - .set_pauseparam = jme_set_pauseparam, + .get_pauseparam = jme_get_pauseparam, + .set_pauseparam = jme_set_pauseparam, .get_wol = jme_get_wol, .set_wol = jme_set_wol, .get_settings = jme_get_settings, .set_settings = jme_set_settings, .get_link = jme_get_link, + .get_msglevel = jme_get_msglevel, + .set_msglevel = jme_set_msglevel, .get_rx_csum = jme_get_rx_csum, .set_rx_csum = jme_set_rx_csum, .set_tx_csum = jme_set_tx_csum, @@ -2539,46 +2726,34 @@ static const struct ethtool_ops jme_ethtool_ops = { static int jme_pci_dma64(struct pci_dev *pdev) { - if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) - if(!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) { - dprintk("jme", "64Bit DMA Selected.\n"); + if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) + if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) return 1; - } - if (!pci_set_dma_mask(pdev, DMA_40BIT_MASK)) - if(!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) { - dprintk("jme", "40Bit DMA Selected.\n"); + if (!pci_set_dma_mask(pdev, DMA_40BIT_MASK)) + if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) return 1; - } - if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) - if(!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) { - dprintk("jme", "32Bit DMA Selected.\n"); + if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) + if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) return 0; - } return -1; } -__always_inline static void +static inline void jme_phy_init(struct jme_adapter *jme) { - __u16 reg26; + u16 reg26; reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); } -__always_inline static void -jme_set_gmii(struct jme_adapter *jme) -{ - jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); -} - -static void +static inline void jme_check_hw_ver(struct jme_adapter *jme) { - __u32 chipmode; + u32 chipmode; chipmode = jread32(jme, JME_CHIPMODE); @@ -2593,33 +2768,34 @@ jme_init_one(struct pci_dev *pdev, int rc = 0, using_dac, i; struct net_device *netdev; struct jme_adapter *jme; - __u16 bmcr, bmsr; + u16 bmcr, bmsr; + u32 apmc; /* * set up PCI device basics */ rc = pci_enable_device(pdev); - if(rc) { - printk(KERN_ERR PFX "Cannot enable PCI device.\n"); + if (rc) { + jeprintk(pdev, "Cannot enable PCI device.\n"); goto err_out; } using_dac = jme_pci_dma64(pdev); - if(using_dac < 0) { - printk(KERN_ERR PFX "Cannot set PCI DMA Mask.\n"); + if (using_dac < 0) { + jeprintk(pdev, "Cannot set PCI DMA Mask.\n"); rc = -EIO; goto err_out_disable_pdev; } - if(!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { - printk(KERN_ERR PFX "No PCI resource region found.\n"); + if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { + jeprintk(pdev, "No PCI resource region found.\n"); rc = -ENOMEM; goto err_out_disable_pdev; } rc = pci_request_regions(pdev, DRV_NAME); - if(rc) { - printk(KERN_ERR PFX "Cannot obtain PCI resource region.\n"); + if (rc) { + jeprintk(pdev, "Cannot obtain PCI resource region.\n"); goto err_out_disable_pdev; } @@ -2629,8 +2805,8 @@ jme_init_one(struct pci_dev *pdev, * alloc and init net device */ netdev = alloc_etherdev(sizeof(*jme)); - if(!netdev) { - printk(KERN_ERR PFX "Cannot allocate netdev structure.\n"); + if (!netdev) { + jeprintk(pdev, "Cannot allocate netdev structure.\n"); rc = -ENOMEM; goto err_out_release_regions; } @@ -2640,6 +2816,7 @@ jme_init_one(struct pci_dev *pdev, netdev->set_mac_address = jme_set_macaddr; netdev->set_multicast_list = jme_set_multi; netdev->change_mtu = jme_change_mtu; + netdev->do_ioctl = jme_ioctl; netdev->ethtool_ops = &jme_ethtool_ops; netdev->tx_timeout = jme_tx_timeout; netdev->watchdog_timeo = TX_TIMEOUT; @@ -2651,7 +2828,7 @@ jme_init_one(struct pci_dev *pdev, NETIF_F_TSO6 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; - if(using_dac) + if (using_dac) netdev->features |= NETIF_F_HIGHDMA; SET_NETDEV_DEV(netdev, &pdev->dev); @@ -2672,22 +2849,31 @@ jme_init_one(struct pci_dev *pdev, jme->tx_wake_threshold = 1 << 9; jme->rx_ring_size = 1 << 9; jme->rx_ring_mask = jme->rx_ring_size - 1; + jme->msg_enable = JME_DEF_MSG_ENABLE; jme->regs = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); if (!(jme->regs)) { - printk(KERN_ERR PFX "Mapping PCI resource region error.\n"); + jeprintk(pdev, "Mapping PCI resource region error.\n"); rc = -ENOMEM; goto err_out_free_netdev; } jme->shadow_regs = pci_alloc_consistent(pdev, - sizeof(__u32) * SHADOW_REG_NR, - &(jme->shadow_dma)); + sizeof(u32) * SHADOW_REG_NR, + &(jme->shadow_dma)); if (!(jme->shadow_regs)) { - printk(KERN_ERR PFX "Allocating shadow register mapping error.\n"); + jeprintk(pdev, "Allocating shadow register mapping error.\n"); rc = -ENOMEM; goto err_out_unmap; } + if (no_pseudohp) { + apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; + jwrite32(jme, JME_APMC, apmc); + } else if (force_pseudohp) { + apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; + jwrite32(jme, JME_APMC, apmc); + } + NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) spin_lock_init(&jme->phy_lock); @@ -2714,63 +2900,63 @@ jme_init_one(struct pci_dev *pdev, tasklet_init(&jme->rxempty_task, &jme_rx_empty_tasklet, (unsigned long) jme); + tasklet_disable_nosync(&jme->txclean_task); + tasklet_disable_nosync(&jme->rxclean_task); + tasklet_disable_nosync(&jme->rxempty_task); jme->dpi.cur = PCC_P1; - if(pdev->device == JME_GE_DEVICE) - jme->reg_ghc = GHC_DPX | GHC_SPEED_1000M; - else - jme->reg_ghc = GHC_DPX | GHC_SPEED_100M; + jme->reg_ghc = 0; jme->reg_rxcs = RXCS_DEFAULT; jme->reg_rxmcs = RXMCS_DEFAULT; jme->reg_txpfc = 0; jme->reg_pmcs = PMCS_MFEN; - jme->flags = JME_FLAG_TXCSUM | JME_FLAG_TSO; + set_bit(JME_FLAG_TXCSUM, &jme->flags); + set_bit(JME_FLAG_TSO, &jme->flags); /* * Get Max Read Req Size from PCI Config Space */ - pci_read_config_byte(pdev, PCI_CONF_DCSR_MRRS, &jme->mrrs); - switch(jme->mrrs) { - case MRRS_128B: - jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; - break; - case MRRS_256B: - jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; - break; - default: - jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; - break; + pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); + jme->mrrs &= PCI_DCSR_MRRS_MASK; + switch (jme->mrrs) { + case MRRS_128B: + jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; + break; + case MRRS_256B: + jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; + break; + default: + jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; + break; }; - /* * Must check before reset_mac_processor */ jme_check_hw_ver(jme); jme->mii_if.dev = netdev; - if(jme->fpgaver) { + if (jme->fpgaver) { jme->mii_if.phy_id = 0; - for(i = 1 ; i < 32 ; ++i) { + for (i = 1 ; i < 32 ; ++i) { bmcr = jme_mdio_read(netdev, i, MII_BMCR); bmsr = jme_mdio_read(netdev, i, MII_BMSR); - if(bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { + if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { jme->mii_if.phy_id = i; break; } } - if(!jme->mii_if.phy_id) { + if (!jme->mii_if.phy_id) { rc = -EIO; - printk(KERN_ERR PFX "Can not find phy_id.\n"); + jeprintk(pdev, "Can not find phy_id.\n"); goto err_out_free_shadow; } jme->reg_ghc |= GHC_LINK_POLL; - } - else { + } else { jme->mii_if.phy_id = 1; } - if(pdev->device == JME_GE_DEVICE) + if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) jme->mii_if.supports_gmii = true; else jme->mii_if.supports_gmii = false; @@ -2778,9 +2964,9 @@ jme_init_one(struct pci_dev *pdev, jme->mii_if.mdio_write = jme_mdio_write; jme_clear_pm(jme); - if(jme->fpgaver) - jme_set_gmii(jme); - else + jme_set_gmii(jme); + pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); + if (!jme->fpgaver) jme_phy_init(jme); jme_phy_off(jme); @@ -2789,14 +2975,13 @@ jme_init_one(struct pci_dev *pdev, */ jme_reset_mac_processor(jme); rc = jme_reload_eeprom(jme); - if(rc) { - printk(KERN_ERR PFX + if (rc) { + jeprintk(pdev, "Reload eeprom for reading MAC Address error.\n"); goto err_out_free_shadow; } jme_load_macaddr(netdev); - /* * Tell stack that we are not ready to work until open() */ @@ -2807,27 +2992,29 @@ jme_init_one(struct pci_dev *pdev, * Register netdev */ rc = register_netdev(netdev); - if(rc) { - printk(KERN_ERR PFX "Cannot register net device.\n"); + if (rc) { + jeprintk(pdev, "Cannot register net device.\n"); goto err_out_free_shadow; } - jprintk(netdev->name, - "JMC250 gigabit%s ver:%u eth %02x:%02x:%02x:%02x:%02x:%02x\n", - (jme->fpgaver != 0)?" (FPGA)":"", - (jme->fpgaver != 0)?jme->fpgaver:jme->chipver, - netdev->dev_addr[0], - netdev->dev_addr[1], - netdev->dev_addr[2], - netdev->dev_addr[3], - netdev->dev_addr[4], - netdev->dev_addr[5]); + msg_probe(jme, + "JMC250 gigabit%s ver:%u rev:%1x.%1x " + "macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n", + (jme->fpgaver != 0) ? " (FPGA)" : "", + (jme->fpgaver != 0) ? jme->fpgaver : jme->chipver, + jme->rev & 0xf, (jme->rev >> 4) & 0xf, + netdev->dev_addr[0], + netdev->dev_addr[1], + netdev->dev_addr[2], + netdev->dev_addr[3], + netdev->dev_addr[4], + netdev->dev_addr[5]); return 0; err_out_free_shadow: pci_free_consistent(pdev, - sizeof(__u32) * SHADOW_REG_NR, + sizeof(u32) * SHADOW_REG_NR, jme->shadow_regs, jme->shadow_dma); err_out_unmap: @@ -2838,7 +3025,7 @@ err_out_free_netdev: err_out_release_regions: pci_release_regions(pdev); err_out_disable_pdev: - pci_disable_device(pdev); + pci_disable_device(pdev); err_out: return rc; } @@ -2851,7 +3038,7 @@ jme_remove_one(struct pci_dev *pdev) unregister_netdev(netdev); pci_free_consistent(pdev, - sizeof(__u32) * SHADOW_REG_NR, + sizeof(u32) * SHADOW_REG_NR, jme->shadow_regs, jme->shadow_dma); iounmap(jme->regs); @@ -2867,33 +3054,27 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state) { struct net_device *netdev = pci_get_drvdata(pdev); struct jme_adapter *jme = netdev_priv(netdev); - int timeout = 100; atomic_dec(&jme->link_changing); netif_device_detach(netdev); netif_stop_queue(netdev); jme_stop_irq(jme); - //jme_free_irq(jme); - while(--timeout > 0 && - ( - atomic_read(&jme->rx_cleaning) != 1 || - atomic_read(&jme->tx_cleaning) != 1 - )) { - mdelay(1); - } - if(!timeout) { - jeprintk(netdev->name, "Waiting tasklets timeout.\n"); - return -EBUSY; - } + tasklet_disable(&jme->txclean_task); + tasklet_disable(&jme->rxclean_task); + tasklet_disable(&jme->rxempty_task); + jme_disable_shadow(jme); - if(netif_carrier_ok(netdev)) { - if(jme->flags & JME_FLAG_POLL) + if (netif_carrier_ok(netdev)) { + if (test_bit(JME_FLAG_POLL, &jme->flags)) jme_polling_mode(jme); jme_stop_pcc_timer(jme); + jme_reset_ghc_speed(jme); + jme_disable_rx_engine(jme); + jme_disable_tx_engine(jme); jme_reset_mac_processor(jme); jme_free_rx_resources(jme); jme_free_tx_resources(jme); @@ -2901,26 +3082,24 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state) jme->phylink = 0; } + tasklet_enable(&jme->txclean_task); + tasklet_hi_enable(&jme->rxclean_task); + tasklet_hi_enable(&jme->rxempty_task); pci_save_state(pdev); - if(jme->reg_pmcs) { + if (jme->reg_pmcs) { jme_set_100m_half(jme); - if(jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) + if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) jme_wait_link(jme); jwrite32(jme, JME_PMCS, jme->reg_pmcs); - pci_enable_wake(pdev, PCI_D1, true); - pci_enable_wake(pdev, PCI_D3hot, true); + pci_enable_wake(pdev, PCI_D3cold, true); - } - else { + } else { jme_phy_off(jme); - pci_enable_wake(pdev, PCI_D1, false); - pci_enable_wake(pdev, PCI_D3hot, false); - pci_enable_wake(pdev, PCI_D3cold, false); } - pci_set_power_state(pdev, pci_choose_state(pdev, state)); + pci_set_power_state(pdev, PCI_D3cold); return 0; } @@ -2934,14 +3113,12 @@ jme_resume(struct pci_dev *pdev) jme_clear_pm(jme); pci_restore_state(pdev); - if(jme->flags & JME_FLAG_SSET) + if (test_bit(JME_FLAG_SSET, &jme->flags)) jme_set_settings(netdev, &jme->old_ecmd); else jme_reset_phy_processor(jme); - jme_reset_mac_processor(jme); jme_enable_shadow(jme); - //jme_request_irq(jme); jme_start_irq(jme); netif_device_attach(netdev); @@ -2953,19 +3130,19 @@ jme_resume(struct pci_dev *pdev) } static struct pci_device_id jme_pci_tbl[] = { - { PCI_VDEVICE(JMICRON, JME_GE_DEVICE) }, - { PCI_VDEVICE(JMICRON, JME_FE_DEVICE) }, + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, { } }; static struct pci_driver jme_driver = { - .name = DRV_NAME, - .id_table = jme_pci_tbl, - .probe = jme_init_one, - .remove = __devexit_p(jme_remove_one), + .name = DRV_NAME, + .id_table = jme_pci_tbl, + .probe = jme_init_one, + .remove = __devexit_p(jme_remove_one), #ifdef CONFIG_PM - .suspend = jme_suspend, - .resume = jme_resume, + .suspend = jme_suspend, + .resume = jme_resume, #endif /* CONFIG_PM */ }; diff --git a/jme.h b/jme.h index 043fb17..317a28e 100644 --- a/jme.h +++ b/jme.h @@ -21,69 +21,74 @@ * */ -#include +#ifndef __JME_H_INCLUDED__ +#define __JME_H_INCLUDEE__ #define DRV_NAME "jme" -#define DRV_VERSION "0.9e" -#define PFX DRV_NAME ": " +#define DRV_VERSION "1.0" +#define PFX DRV_NAME ": " -#define JME_GE_DEVICE 0x250 -#define JME_FE_DEVICE 0x260 +#define PCI_DEVICE_ID_JMICRON_JMC250 0x0250 +#define PCI_DEVICE_ID_JMICRON_JMC260 0x0260 -#ifdef DEBUG -#define dprintk(devname, fmt, args...) \ - printk(KERN_DEBUG "%s: " fmt, devname, ## args) -#else -#define dprintk(devname, fmt, args...) -#endif +/* + * Message related definitions + */ +#define JME_DEF_MSG_ENABLE \ + (NETIF_MSG_PROBE | \ + NETIF_MSG_LINK | \ + NETIF_MSG_RX_ERR | \ + NETIF_MSG_TX_ERR | \ + NETIF_MSG_HW) + +#define jeprintk(pdev, fmt, args...) \ + printk(KERN_ERR PFX fmt, ## args) #ifdef TX_DEBUG -#define tx_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) +#define tx_dbg(priv, fmt, args...) \ + printk(KERN_DEBUG "%s: " fmt, (priv)->dev->name, ## args) #else -#define tx_dbg(args...) +#define tx_dbg(priv, fmt, args...) #endif -#ifdef RX_DEBUG -#define rx_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) -#else -#define rx_dbg(args...) -#endif +#define jme_msg(msglvl, type, priv, fmt, args...) \ + if (netif_msg_##type(priv)) \ + printk(msglvl "%s: " fmt, (priv)->dev->name, ## args) -#ifdef QUEUE_DEBUG -#define queue_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) -#else -#define queue_dbg(args...) -#endif +#define msg_probe(priv, fmt, args...) \ + jme_msg(KERN_INFO, probe, priv, fmt, ## args) -#ifdef CSUM_DEBUG -#define csum_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) -#else -#define csum_dbg(args...) -#endif +#define msg_link(priv, fmt, args...) \ + jme_msg(KERN_INFO, link, priv, fmt, ## args) -#ifdef VLAN_DEBUG -#define vlan_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) -#else -#define vlan_dbg(args...) -#endif +#define msg_intr(priv, fmt, args...) \ + jme_msg(KERN_INFO, intr, priv, fmt, ## args) + +#define msg_rx_err(priv, fmt, args...) \ + jme_msg(KERN_ERR, rx_err, priv, fmt, ## args) -#define jprintk(devname, fmt, args...) \ - printk(KERN_INFO "%s: " fmt, devname, ## args) +#define msg_rx_status(priv, fmt, args...) \ + jme_msg(KERN_INFO, rx_status, priv, fmt, ## args) -#define jeprintk(devname, fmt, args...) \ - printk(KERN_ERR "%s: " fmt, devname, ## args) +#define msg_tx_err(priv, fmt, args...) \ + jme_msg(KERN_ERR, tx_err, priv, fmt, ## args) -#define DEFAULT_MSG_ENABLE \ - (NETIF_MSG_DRV | \ - NETIF_MSG_PROBE | \ - NETIF_MSG_LINK | \ - NETIF_MSG_TIMER | \ - NETIF_MSG_RX_ERR | \ - NETIF_MSG_TX_ERR) +#define msg_tx_done(priv, fmt, args...) \ + jme_msg(KERN_INFO, tx_done, priv, fmt, ## args) -#define PCI_CONF_DCSR_MRRS 0x59 -#define PCI_CONF_DCSR_MRRS_MASK 0x70 -enum pci_conf_dcsr_mrrs_vals { +#define msg_tx_queued(priv, fmt, args...) \ + jme_msg(KERN_INFO, tx_queued, priv, fmt, ## args) + +#define msg_hw(priv, fmt, args...) \ + jme_msg(KERN_ERR, hw, priv, fmt, ## args) + +/* + * Extra PCI Configuration space interface + */ +#define PCI_DCSR_MRRS 0x59 +#define PCI_DCSR_MRRS_MASK 0x70 + +enum pci_dcsr_mrrs_vals { MRRS_128B = 0x00, MRRS_256B = 0x10, MRRS_512B = 0x20, @@ -92,9 +97,44 @@ enum pci_conf_dcsr_mrrs_vals { MRRS_4096B = 0x50, }; -#define MAX_ETHERNET_JUMBO_PACKET_SIZE 9216 -#define MIN_ETHERNET_PACKET_SIZE 60 +#define PCI_SPI 0xB0 + +enum pci_spi_bits { + SPI_EN = 0x10, + SPI_MISO = 0x08, + SPI_MOSI = 0x04, + SPI_SCLK = 0x02, + SPI_CS = 0x01, +}; + +struct jme_spi_op { + void __user *uwbuf; + void __user *urbuf; + __u8 wn; /* Number of write actions */ + __u8 rn; /* Number of read actions */ + __u8 bitn; /* Number of bits per action */ + __u8 spd; /* The maxim acceptable speed of controller, in MHz.*/ + __u8 mode; /* CPOL, CPHA, and Duplex mode of SPI */ + + /* Internal use only */ + u8 *kwbuf; + u8 *krbuf; + u8 sr; + u16 halfclk; /* Half of clock cycle calculated from spd, in ns */ +}; +enum jme_spi_op_bits { + SPI_MODE_CPHA = 0x01, + SPI_MODE_CPOL = 0x02, + SPI_MODE_DUP = 0x80, +}; + +#define HALF_US 500 /* 500 ns */ +#define JMESPIIOCTL SIOCDEVPRIVATE + +/* + * Dynamic(adaptive)/Static PCC values + */ enum dynamic_pcc_values { PCC_OFF = 0, PCC_P1 = 1, @@ -120,8 +160,8 @@ struct dynpcc_info { unsigned char cnt; }; #define PCC_INTERVAL_US 100000 -#define PCC_INTERVAL (HZ / (1000000/PCC_INTERVAL_US)) -#define PCC_P3_THRESHOLD 2*1024*1024 +#define PCC_INTERVAL (HZ / (1000000 / PCC_INTERVAL_US)) +#define PCC_P3_THRESHOLD (2 * 1024 * 1024) #define PCC_P2_THRESHOLD 800 #define PCC_INTR_THRESHOLD 800 #define PCC_TX_TO 1000 @@ -130,72 +170,71 @@ struct dynpcc_info { /* * TX/RX Descriptors * - * TX/RX Ring DESC Count Must be multiple of 16 - * RX Ring DESC Count Must be <= 1024 + * TX/RX Ring DESC Count Must be multiple of 16 and <= 1024 */ #define RING_DESC_ALIGN 16 /* Descriptor alignment */ - #define TX_DESC_SIZE 16 #define TX_RING_NR 8 -#define TX_RING_ALLOC_SIZE(s) (s * TX_DESC_SIZE) + RING_DESC_ALIGN +#define TX_RING_ALLOC_SIZE(s) ((s * TX_DESC_SIZE) + RING_DESC_ALIGN) struct txdesc { union { - __u8 all[16]; - __u32 dw[4]; + __u8 all[16]; + __le32 dw[4]; struct { /* DW0 */ - __u16 vlan; - __u8 rsv1; - __u8 flags; + __le16 vlan; + __u8 rsv1; + __u8 flags; /* DW1 */ - __u16 datalen; - __u16 mss; + __le16 datalen; + __le16 mss; /* DW2 */ - __u16 pktsize; - __u16 rsv2; + __le16 pktsize; + __le16 rsv2; /* DW3 */ - __u32 bufaddr; + __le32 bufaddr; } desc1; struct { /* DW0 */ - __u16 rsv1; - __u8 rsv2; - __u8 flags; + __le16 rsv1; + __u8 rsv2; + __u8 flags; /* DW1 */ - __u16 datalen; - __u16 rsv3; + __le16 datalen; + __le16 rsv3; /* DW2 */ - __u32 bufaddrh; + __le32 bufaddrh; /* DW3 */ - __u32 bufaddrl; + __le32 bufaddrl; } desc2; struct { /* DW0 */ - __u8 ehdrsz; - __u8 rsv1; - __u8 rsv2; - __u8 flags; + __u8 ehdrsz; + __u8 rsv1; + __u8 rsv2; + __u8 flags; /* DW1 */ - __u16 trycnt; - __u16 segcnt; + __le16 trycnt; + __le16 segcnt; /* DW2 */ - __u16 pktsz; - __u16 rsv3; + __le16 pktsz; + __le16 rsv3; /* DW3 */ - __u32 bufaddrl; + __le32 bufaddrl; } descwb; }; }; + enum jme_txdesc_flags_bits { TXFLAG_OWN = 0x80, TXFLAG_INT = 0x40, @@ -206,6 +245,7 @@ enum jme_txdesc_flags_bits { TXFLAG_LSEN = 0x02, TXFLAG_TAGON = 0x01, }; + #define TXDESC_MSS_SHIFT 2 enum jme_rxdescwb_flags_bits { TXWBFLAG_OWN = 0x80, @@ -219,11 +259,9 @@ enum jme_rxdescwb_flags_bits { TXWBFLAG_COL, }; - #define RX_DESC_SIZE 16 #define RX_RING_NR 4 -#define RX_RING_ALLOC_SIZE(s) (s * RX_DESC_SIZE) + RING_DESC_ALIGN - +#define RX_RING_ALLOC_SIZE(s) ((s * RX_DESC_SIZE) + RING_DESC_ALIGN) #define RX_BUF_DMA_ALIGN 8 #define RX_PREPAD_SIZE 10 #define ETH_CRC_LEN 2 @@ -236,49 +274,51 @@ enum jme_rxdescwb_flags_bits { struct rxdesc { union { - __u8 all[16]; - __le32 dw[4]; + __u8 all[16]; + __le32 dw[4]; struct { /* DW0 */ - __le16 rsv2; - __u8 rsv1; - __u8 flags; + __le16 rsv2; + __u8 rsv1; + __u8 flags; /* DW1 */ - __le16 datalen; - __le16 wbcpl; + __le16 datalen; + __le16 wbcpl; /* DW2 */ - __le32 bufaddrh; + __le32 bufaddrh; /* DW3 */ - __le32 bufaddrl; + __le32 bufaddrl; } desc1; struct { /* DW0 */ - __le16 vlan; - __le16 flags; + __le16 vlan; + __le16 flags; /* DW1 */ - __le16 framesize; - __u8 errstat; - __u8 desccnt; + __le16 framesize; + __u8 errstat; + __u8 desccnt; /* DW2 */ - __le32 rsshash; + __le32 rsshash; /* DW3 */ - __u8 hashfun; - __u8 hashtype; - __le16 resrv; + __u8 hashfun; + __u8 hashtype; + __le16 resrv; } descwb; }; }; + enum jme_rxdesc_flags_bits { RXFLAG_OWN = 0x80, RXFLAG_INT = 0x40, RXFLAG_64BIT = 0x20, }; + enum jme_rxwbdesc_flags_bits { RXWBFLAG_OWN = 0x8000, RXWBFLAG_INT = 0x4000, @@ -300,10 +340,12 @@ enum jme_rxwbdesc_flags_bits { RXWBFLAG_DEST_MUL = 0x0002, RXWBFLAG_DEST_BRO = 0x0003, }; + enum jme_rxwbdesc_desccnt_mask { RXWBDCNT_WBCPL = 0x80, RXWBDCNT_DCNT = 0x7F, }; + enum jme_rxwbdesc_errstat_bits { RXWBERR_LIMIT = 0x80, RXWBERR_MIIER = 0x40, @@ -316,6 +358,9 @@ enum jme_rxwbdesc_errstat_bits { RXWBERR_ALLERR = 0xFF, }; +/* + * Buffer information corresponding to ring descriptors. + */ struct jme_buffer_info { struct sk_buff *skb; dma_addr_t mapping; @@ -324,49 +369,28 @@ struct jme_buffer_info { unsigned long start_xmit; }; +/* + * The structure holding buffer information and ring descriptors all together. + */ #define MAX_RING_DESC_NR 1024 struct jme_ring { - void* alloc; /* pointer to allocated memory */ - volatile void* desc; /* pointer to ring memory */ - dma_addr_t dmaalloc; /* phys address of ring alloc */ - dma_addr_t dma; /* phys address for ring dma */ + void *alloc; /* pointer to allocated memory */ + void *desc; /* pointer to ring memory */ + dma_addr_t dmaalloc; /* phys address of ring alloc */ + dma_addr_t dma; /* phys address for ring dma */ /* Buffer information corresponding to each descriptor */ struct jme_buffer_info bufinf[MAX_RING_DESC_NR]; - int next_to_use; - atomic_t next_to_clean; + int next_to_use; + atomic_t next_to_clean; atomic_t nr_free; }; -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) -#define NET_STAT(priv) priv->stats -#define NETDEV_GET_STATS(netdev, fun_ptr) \ - netdev->get_stats = fun_ptr -#define DECLARE_NET_DEVICE_STATS struct net_device_stats stats; -#else -#define NET_STAT(priv) priv->dev->stats +#define NET_STAT(priv) (priv->dev->stats) #define NETDEV_GET_STATS(netdev, fun_ptr) #define DECLARE_NET_DEVICE_STATS -#endif -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) -#define DECLARE_NAPI_STRUCT -#define NETIF_NAPI_SET(dev, napis, pollfn, q) \ - dev->poll = pollfn; \ - dev->weight = q; -#define JME_NAPI_HOLDER(holder) struct net_device *holder -#define JME_NAPI_WEIGHT(w) int *w -#define JME_NAPI_WEIGHT_VAL(w) *w -#define JME_NAPI_WEIGHT_SET(w, r) *w = r -#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev) -#define JME_NAPI_ENABLE(priv) netif_poll_enable(priv->dev); -#define JME_NAPI_DISABLE(priv) netif_poll_disable(priv->dev); -#define JME_RX_SCHEDULE_PREP(priv) \ - netif_rx_schedule_prep(priv->dev) -#define JME_RX_SCHEDULE(priv) \ - __netif_rx_schedule(priv->dev); -#else #define DECLARE_NAPI_STRUCT struct napi_struct napi; #define NETIF_NAPI_SET(dev, napis, pollfn, q) \ netif_napi_add(dev, napis, pollfn, q); @@ -377,24 +401,23 @@ struct jme_ring { #define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev, napis) #define JME_NAPI_ENABLE(priv) napi_enable(&priv->napi); #define JME_NAPI_DISABLE(priv) \ - if(!napi_disable_pending(&priv->napi)) \ + if (!napi_disable_pending(&priv->napi)) \ napi_disable(&priv->napi); #define JME_RX_SCHEDULE_PREP(priv) \ netif_rx_schedule_prep(priv->dev, &priv->napi) #define JME_RX_SCHEDULE(priv) \ __netif_rx_schedule(priv->dev, &priv->napi); -#endif /* * Jmac Adapter Private data */ #define SHADOW_REG_NR 8 struct jme_adapter { - struct pci_dev *pdev; - struct net_device *dev; - void __iomem *regs; + struct pci_dev *pdev; + struct net_device *dev; + void __iomem *regs; dma_addr_t shadow_dma; - __u32 *shadow_regs; + u32 *shadow_regs; struct mii_if_info mii_if; struct jme_ring rxring[RX_RING_NR]; struct jme_ring txring[TX_RING_NR]; @@ -406,25 +429,27 @@ struct jme_adapter { struct tasklet_struct txclean_task; struct tasklet_struct linkch_task; struct tasklet_struct pcc_task; - __u32 flags; - __u32 reg_txcs; - __u32 reg_txpfc; - __u32 reg_rxcs; - __u32 reg_rxmcs; - __u32 reg_ghc; - __u32 reg_pmcs; - __u32 phylink; - __u32 tx_ring_size; - __u32 tx_ring_mask; - __u32 tx_wake_threshold; - __u32 rx_ring_size; - __u32 rx_ring_mask; - __u8 mrrs; - __u32 fpgaver; - __u32 chipver; + unsigned long flags; + u32 reg_txcs; + u32 reg_txpfc; + u32 reg_rxcs; + u32 reg_rxmcs; + u32 reg_ghc; + u32 reg_pmcs; + u32 phylink; + u32 tx_ring_size; + u32 tx_ring_mask; + u32 tx_wake_threshold; + u32 rx_ring_size; + u32 rx_ring_mask; + u8 mrrs; + unsigned int fpgaver; + unsigned int chipver; + u8 rev; + u32 msg_enable; struct ethtool_cmd old_ecmd; unsigned int old_mtu; - struct vlan_group* vlgrp; + struct vlan_group *vlgrp; struct dynpcc_info dpi; atomic_t intr_sem; atomic_t link_changing; @@ -438,37 +463,31 @@ struct jme_adapter { DECLARE_NAPI_STRUCT DECLARE_NET_DEVICE_STATS }; + enum shadow_reg_val { SHADOW_IEVE = 0, }; + enum jme_flags_bits { - JME_FLAG_MSI = 0x00000001, - JME_FLAG_SSET = 0x00000002, - JME_FLAG_TXCSUM = 0x00000004, - JME_FLAG_TSO = 0x00000008, - JME_FLAG_POLL = 0x00000010, + JME_FLAG_MSI = 1, + JME_FLAG_SSET = 2, + JME_FLAG_TXCSUM = 3, + JME_FLAG_TSO = 4, + JME_FLAG_POLL = 5, + JME_FLAG_SHUTDOWN = 6, }; -#define WAIT_TASKLET_TIMEOUT 500 /* 500 ms */ -#define TX_TIMEOUT (5*HZ) + +#define TX_TIMEOUT (5 * HZ) #define JME_REG_LEN 0x500 +#define MAX_ETHERNET_JUMBO_PACKET_SIZE 9216 -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) -__always_inline static struct jme_adapter* -jme_napi_priv(struct net_device *holder) -{ - struct jme_adapter* jme; - jme = netdev_priv(holder); - return jme; -} -#else -__always_inline static struct jme_adapter* +static inline struct jme_adapter* jme_napi_priv(struct napi_struct *napi) { - struct jme_adapter* jme; + struct jme_adapter *jme; jme = container_of(napi, struct jme_adapter, napi); return jme; } -#endif /* * MMaped I/O Resters @@ -521,19 +540,22 @@ enum jme_iomap_regs { JME_SMBINTF = JME_PHY | 0x44, /* SMB Interface */ - JME_TMCSR = JME_MISC| 0x00, /* Timer Control/Status Register */ - JME_GPREG0 = JME_MISC| 0x08, /* General purpose REG-0 */ - JME_GPREG1 = JME_MISC| 0x0C, /* General purpose REG-1 */ - JME_IEVE = JME_MISC| 0x20, /* Interrupt Event Status */ - JME_IREQ = JME_MISC| 0x24, /* Interrupt Req Status(For Debug) */ - JME_IENS = JME_MISC| 0x28, /* Interrupt Enable - Setting Port */ - JME_IENC = JME_MISC| 0x2C, /* Interrupt Enable - Clear Port */ - JME_PCCRX0 = JME_MISC| 0x30, /* PCC Control for RX Queue 0 */ - JME_PCCTX = JME_MISC| 0x40, /* PCC Control for TX Queues */ - JME_CHIPMODE = JME_MISC| 0x44, /* Identify FPGA Version */ - JME_SHBA_HI = JME_MISC| 0x48, /* Shadow Register Base HI */ - JME_SHBA_LO = JME_MISC| 0x4C, /* Shadow Register Base LO */ - JME_PCCSRX0 = JME_MISC| 0x80, /* PCC Status of RX0 */ + JME_TMCSR = JME_MISC | 0x00, /* Timer Control/Status Register */ + JME_GPREG0 = JME_MISC | 0x08, /* General purpose REG-0 */ + JME_GPREG1 = JME_MISC | 0x0C, /* General purpose REG-1 */ + JME_IEVE = JME_MISC | 0x20, /* Interrupt Event Status */ + JME_IREQ = JME_MISC | 0x24, /* Intr Req Status(For Debug) */ + JME_IENS = JME_MISC | 0x28, /* Intr Enable - Setting Port */ + JME_IENC = JME_MISC | 0x2C, /* Interrupt Enable - Clear Port */ + JME_PCCRX0 = JME_MISC | 0x30, /* PCC Control for RX Queue 0 */ + JME_PCCTX = JME_MISC | 0x40, /* PCC Control for TX Queues */ + JME_CHIPMODE = JME_MISC | 0x44, /* Identify FPGA Version */ + JME_SHBA_HI = JME_MISC | 0x48, /* Shadow Register Base HI */ + JME_SHBA_LO = JME_MISC | 0x4C, /* Shadow Register Base LO */ + JME_TIMER1 = JME_MISC | 0x70, /* Timer1 */ + JME_TIMER2 = JME_MISC | 0x74, /* Timer2 */ + JME_APMC = JME_MISC | 0x7C, /* Aggressive Power Mode Control */ + JME_PCCSRX0 = JME_MISC | 0x80, /* PCC Status of RX0 */ }; /* @@ -553,6 +575,7 @@ enum jme_txcs_bits { TXCS_BURST = 0x00000004, TXCS_ENABLE = 0x00000001, }; + enum jme_txcs_value { TXCS_FIFOTH_16QW = 0x000000C0, TXCS_FIFOTH_12QW = 0x00000080, @@ -576,6 +599,7 @@ enum jme_txcs_value { TXCS_DEFAULT = TXCS_FIFOTH_4QW | TXCS_BURST, }; + #define JME_TX_DISABLE_TIMEOUT 10 /* 10 msec */ /* @@ -594,6 +618,7 @@ enum jme_txmcs_bit_masks { TXMCS_CRC = 0x00000002, TXMCS_PADDING = 0x00000001, }; + enum jme_txmcs_values { TXMCS_IFG2_6_4 = 0x00000000, TXMCS_IFG2_8_5 = 0x40000000, @@ -630,12 +655,12 @@ enum jme_txtrhd_bits_masks { TXTRHD_TXREN = 0x00000080, TXTRHD_TXRL = 0x0000007F, }; + enum jme_txtrhd_shifts { TXTRHD_TXP_SHIFT = 8, TXTRHD_TXRL_SHIFT = 0, }; - /* * RX Control/Status Bits */ @@ -656,6 +681,7 @@ enum jme_rxcs_bit_masks { RXCS_SUSPEND = 0x00000002, RXCS_ENABLE = 0x00000001, }; + enum jme_rxcs_values { RXCS_FIFOTHTP_16T = 0x00000000, RXCS_FIFOTHTP_32T = 0x10000000, @@ -709,6 +735,7 @@ enum jme_rxcs_values { RXCS_RETRYGAP_256ns | RXCS_RETRYCNT_32, }; + #define JME_RX_DISABLE_TIMEOUT 10 /* 10 msec */ /* @@ -738,11 +765,13 @@ enum jme_rxmcs_bits { */ #define WAKEUP_FRAME_NR 8 #define WAKEUP_FRAME_MASK_DWNR 4 + enum jme_wfoi_bit_masks { WFOI_MASK_SEL = 0x00000070, WFOI_CRC_SEL = 0x00000008, WFOI_FRAME_SEL = 0x00000007, }; + enum jme_wfoi_shifts { WFOI_MASK_SHIFT = 4, }; @@ -750,8 +779,7 @@ enum jme_wfoi_shifts { /* * SMI Related definitions */ -enum jme_smi_bit_mask -{ +enum jme_smi_bit_mask { SMI_DATA_MASK = 0xFFFF0000, SMI_REG_ADDR_MASK = 0x0000F800, SMI_PHY_ADDR_MASK = 0x000007C0, @@ -763,20 +791,23 @@ enum jme_smi_bit_mask SMI_OP_MDC = 0x00000002, /* Software CLK Control */ SMI_OP_MDEN = 0x00000001, /* Software access Enable */ }; -enum jme_smi_bit_shift -{ + +enum jme_smi_bit_shift { SMI_DATA_SHIFT = 16, SMI_REG_ADDR_SHIFT = 11, SMI_PHY_ADDR_SHIFT = 6, }; -__always_inline __u32 smi_reg_addr(int x) + +static inline u32 smi_reg_addr(int x) { - return (((x) << SMI_REG_ADDR_SHIFT) & SMI_REG_ADDR_MASK); + return (x << SMI_REG_ADDR_SHIFT) & SMI_REG_ADDR_MASK; } -__always_inline __u32 smi_phy_addr(int x) + +static inline u32 smi_phy_addr(int x) { - return (((x) << SMI_PHY_ADDR_SHIFT) & SMI_PHY_ADDR_MASK); + return (x << SMI_PHY_ADDR_SHIFT) & SMI_PHY_ADDR_MASK; } + #define JME_PHY_TIMEOUT 100 /* 100 msec */ #define JME_PHY_REG_NR 32 @@ -789,6 +820,7 @@ enum jme_ghc_bit_mask { GHC_SPEED = 0x00000030, GHC_LINK_POLL = 0x00000001, }; + enum jme_ghc_speed_val { GHC_SPEED_10M = 0x00000010, GHC_SPEED_100M = 0x00000020, @@ -834,11 +866,13 @@ enum jme_phy_link_bit_mask { PHY_LINK_AUTONEG_COMPLETE = 0x00000200, PHY_LINK_MDI_STAT = 0x00000040, }; + enum jme_phy_link_speed_val { PHY_LINK_SPEED_10M = 0x00000000, PHY_LINK_SPEED_100M = 0x00004000, PHY_LINK_SPEED_1000M = 0x00008000, }; + #define JME_SPDRSV_TIMEOUT 500 /* 500 us */ /* @@ -851,6 +885,7 @@ enum jme_smbcsr_bit_mask { SMBCSR_INITDONE = 0x00000010, SMBCSR_BUSY = 0x0000000F, }; + enum jme_smbintf_bit_mask { SMBINTF_HWDATR = 0xFF000000, SMBINTF_HWDATW = 0x00FF0000, @@ -862,15 +897,18 @@ enum jme_smbintf_bit_mask { SMBINTF_GPIOSDA = 0x00000002, SMBINTF_GPIOEN = 0x00000001, }; + enum jme_smbintf_vals { SMBINTF_HWRWN_READ = 0x00000020, SMBINTF_HWRWN_WRITE = 0x00000000, }; + enum jme_smbintf_shifts { SMBINTF_HWDATR_SHIFT = 24, SMBINTF_HWDATW_SHIFT = 16, SMBINTF_HWADDR_SHIFT = 8, }; + #define JME_EEPROM_RELOAD_TIMEOUT 2000 /* 2000 msec */ #define JME_SMB_BUSY_TIMEOUT 20 /* 20 msec */ #define JME_SMB_LEN 256 @@ -885,9 +923,8 @@ enum jme_tmcsr_bit_masks { TMCSR_CNT = 0x00FFFFFF, }; - /* - * General Purpost REG-0 + * General Purpose REG-0 */ enum jme_gpreg0_masks { GPREG0_DISSH = 0xFF000000, @@ -897,6 +934,7 @@ enum jme_gpreg0_masks { GPREG0_PCCTMR = 0x00000300, GPREG0_PHYADDR = 0x0000001F, }; + enum jme_gpreg0_vals { GPREG0_DISSH_DW7 = 0x80000000, GPREG0_DISSH_DW6 = 0x40000000, @@ -921,7 +959,6 @@ enum jme_gpreg0_vals { GPREG0_PHYADDR_1 = 0x00000001, GPREG0_DEFAULT = GPREG0_PCIRLMT_4 | -// GPREG0_PCCNOMUTCLR | GPREG0_PCCTMR_1us | GPREG0_PHYADDR_1, }; @@ -929,8 +966,7 @@ enum jme_gpreg0_vals { /* * Interrupt Status Bits */ -enum jme_interrupt_bits -{ +enum jme_interrupt_bits { INTR_SWINTR = 0x80000000, INTR_TMINTR = 0x40000000, INTR_LINKCH = 0x20000000, @@ -964,7 +1000,8 @@ enum jme_interrupt_bits INTR_TX1 = 0x00000002, INTR_TX0 = 0x00000001, }; -static const __u32 INTR_ENABLE = INTR_SWINTR | + +static const u32 INTR_ENABLE = INTR_SWINTR | INTR_TMINTR | INTR_LINKCH | INTR_PCCRX0TO | @@ -980,19 +1017,23 @@ enum jme_pccrx_masks { PCCRXTO_MASK = 0xFFFF0000, PCCRX_MASK = 0x0000FF00, }; + enum jme_pcctx_masks { PCCTXTO_MASK = 0xFFFF0000, PCCTX_MASK = 0x0000FF00, PCCTX_QS_MASK = 0x000000FF, }; + enum jme_pccrx_shifts { PCCRXTO_SHIFT = 16, PCCRX_SHIFT = 8, }; + enum jme_pcctx_shifts { PCCTXTO_SHIFT = 16, PCCTX_SHIFT = 8, }; + enum jme_pcctx_bits { PCCTXQ0_EN = 0x00000001, PCCTXQ1_EN = 0x00000002, @@ -1012,6 +1053,7 @@ enum jme_chipmode_bit_masks { CM_CHIPVER_MASK = 0x0000FF00, CM_CHIPMODE_MASK = 0x0000000F, }; + enum jme_chipmode_shifts { CM_FPGAVER_SHIFT = 16, CM_CHIPVER_SHIFT = 8, @@ -1024,24 +1066,97 @@ enum jme_shadow_base_address_bits { SHBA_POSTEN = 0x1, }; +/* + * Aggressive Power Mode Control + */ +enum jme_apmc_bits { + JME_APMC_PCIE_SD_EN = 0x40000000, + JME_APMC_PSEUDO_HP_EN = 0x20000000, + JME_APMC_EPIEN = 0x04000000, + JME_APMC_EPIEN_CTRL = 0x03000000, +}; + +enum jme_apmc_values { + JME_APMC_EPIEN_CTRL_EN = 0x02000000, + JME_APMC_EPIEN_CTRL_DIS = 0x01000000, +}; + +#define APMC_PHP_SHUTDOWN_DELAY (10 * 1000 * 1000) + +#ifdef REG_DEBUG +static char *MAC_REG_NAME[] = { + "JME_TXCS", "JME_TXDBA_LO", "JME_TXDBA_HI", "JME_TXQDC", + "JME_TXNDA", "JME_TXMCS", "JME_TXPFC", "JME_TXTRHD", + "JME_RXCS", "JME_RXDBA_LO", "JME_RXDBA_HI", "JME_RXQDC", + "JME_RXNDA", "JME_RXMCS", "JME_RXUMA_LO", "JME_RXUMA_HI", + "JME_RXMCHT_LO", "JME_RXMCHT_HI", "JME_WFODP", "JME_WFOI", + "JME_SMI", "JME_GHC", "UNKNOWN", "UNKNOWN", + "JME_PMCS"}; +static char *PE_REG_NAME[] = { + "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", + "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", + "UNKNOWN", "UNKNOWN", "JME_PHY_CS", "UNKNOWN", + "JME_PHY_LINK", "UNKNOWN", "UNKNOWN", "UNKNOWN", + "JME_SMBCSR", "JME_SMBINTF"}; +static char *MISC_REG_NAME[] = { + "JME_TMCSR", "JME_GPIO", "JME_GPREG0", "JME_GPREG1", + "JME_IEVE", "JME_IREQ", "JME_IENS", "JME_IENC", + "JME_PCCRX0", "JME_PCCRX1", "JME_PCCRX2", "JME_PCCRX3", + "JME_PCCTX0", "JME_CHIPMODE", "JME_SHBA_HI", "JME_SHBA_LO", + "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", + "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", + "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", + "JME_TIMER1", "JME_TIMER2", "UNKNOWN", "JME_APMC", + "JME_PCCSRX0"}; +static inline void reg_dbg(const struct jme_adapter *jme, + const char *msg, u32 val, u32 reg) +{ + const char *regname; + switch(reg & 0xF00) { + case 0x000: + regname = MAC_REG_NAME[(reg & 0xFF) >> 2]; + break; + case 0x400: + regname = PE_REG_NAME[(reg & 0xFF) >> 2]; + break; + case 0x800: + regname = MISC_REG_NAME[(reg & 0xFF) >>2]; + break; + default: + regname = PE_REG_NAME[0]; + } + printk(KERN_DEBUG "%s: %-20s %08x@%s\n", jme->dev->name, + msg, val, regname); +} +#else +static inline void reg_dbg(const struct jme_adapter *jme, + const char *msg, u32 val, u32 reg) {} +#endif + /* * Read/Write MMaped I/O Registers */ -__always_inline __u32 jread32(struct jme_adapter *jme, __u32 reg) +static inline u32 jread32(struct jme_adapter *jme, u32 reg) { - return le32_to_cpu(readl((__u8*)jme->regs + reg)); + return readl(jme->regs + reg); } -__always_inline void jwrite32(struct jme_adapter *jme, __u32 reg, __u32 val) + +static inline void jwrite32(struct jme_adapter *jme, u32 reg, u32 val) { - writel(cpu_to_le32(val), (__u8*)jme->regs + reg); + reg_dbg(jme, "REG WRITE", val, reg); + writel(val, jme->regs + reg); + reg_dbg(jme, "VAL AFTER WRITE", readl(jme->regs + reg), reg); } -__always_inline void jwrite32f(struct jme_adapter *jme, __u32 reg, __u32 val) + +static inline void jwrite32f(struct jme_adapter *jme, u32 reg, u32 val) { /* * Read after write should cause flush */ - writel(cpu_to_le32(val), (__u8*)jme->regs + reg); - readl((__u8*)jme->regs + reg); + reg_dbg(jme, "REG WRITE FLUSH", val, reg); + writel(val, jme->regs + reg); + readl(jme->regs + reg); + reg_dbg(jme, "VAL AFTER WRITE", readl(jme->regs + reg), reg); } /* @@ -1054,31 +1169,20 @@ enum jme_phy_reg17_bit_masks { PREG17_LNKUP = 0x0400, PREG17_MDI = 0x0040, }; + enum jme_phy_reg17_vals { PREG17_SPEED_10M = 0x0000, PREG17_SPEED_100M = 0x4000, PREG17_SPEED_1000M = 0x8000, }; + #define BMSR_ANCOMP 0x0020 /* - * Function prototypes for ethtool + * Function prototypes */ -static void jme_get_drvinfo(struct net_device *netdev, - struct ethtool_drvinfo *info); -static int jme_get_settings(struct net_device *netdev, - struct ethtool_cmd *ecmd); static int jme_set_settings(struct net_device *netdev, - struct ethtool_cmd *ecmd); -static u32 jme_get_link(struct net_device *netdev); - - -/* - * Function prototypes for netdev - */ -static int jme_open(struct net_device *netdev); -static int jme_close(struct net_device *netdev); -static int jme_start_xmit(struct sk_buff *skb, struct net_device *netdev); -static int jme_set_macaddr(struct net_device *netdev, void *p); + struct ethtool_cmd *ecmd); static void jme_set_multi(struct net_device *netdev); +#endif -- 2.39.3