From: Guo-Fu Tseng Date: Mon, 14 Feb 2011 17:48:02 +0000 (+0800) Subject: jme: Add interface to access extra PHY registers X-Git-Url: https://bbs.cooldavid.org/git/?p=jme.git;a=commitdiff_plain;h=8a76ab5f50c3d7e575e855e178962dd2dae2ed5c jme: Add interface to access extra PHY registers Add software interface to access JMicron extra PHY registers. Modified ethtool register dump implementation to dump extra PHY registers. --- diff --git a/jme.c b/jme.c index b883dc2..2852ba5 100644 --- a/jme.c +++ b/jme.c @@ -111,6 +111,36 @@ jme_mdio_write(struct net_device *netdev, pr_err("phy(%d) write timeout : %d\n", phy, reg); } +static int +jme_phyext_read(struct jme_adapter *jme, int reg) +{ + jme_mdio_write(jme->dev, jme->mii_if.phy_id, + JME_PHY_SPEC_ADDR_REG, + JME_PHY_SPEC_REG_READ | (reg & 0x3FFF)); + return jme_mdio_read(jme->dev, jme->mii_if.phy_id, + JME_PHY_SPEC_DATA_REG); +} + +static void +jme_phyext_write(struct jme_adapter *jme, int reg, int val) +{ + jme_mdio_write(jme->dev, jme->mii_if.phy_id, + JME_PHY_SPEC_DATA_REG, val); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, + JME_PHY_SPEC_ADDR_REG, + JME_PHY_SPEC_REG_WRITE | (reg & 0x3FFF)); +} + +static void +jme_phyext_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) +{ + int i; + u16 *p16 = (u16 *)p; + + for (i = 0 ; i < reg_nr ; ++i) + p16[i] = jme_phyext_read(jme, i); +} + static inline void jme_reset_phy_processor(struct jme_adapter *jme) { @@ -2453,6 +2483,9 @@ jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) p32 += 0x100 >> 2; mdio_memcpy(jme, p32, JME_PHY_REG_NR); + + p32 += 0x100 >> 2; + jme_phyext_memcpy(jme, p32, JME_PHY_SPEC_REG_NR); } static int diff --git a/jme.h b/jme.h index 2a466bc..c27a342 100644 --- a/jme.h +++ b/jme.h @@ -605,7 +605,7 @@ enum jme_flags_bits { }; #define TX_TIMEOUT (5 * HZ) -#define JME_REG_LEN 0x500 +#define JME_REG_LEN 0x600 #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9216 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) @@ -956,6 +956,7 @@ static inline u32 smi_phy_addr(int x) #define JME_PHY_TIMEOUT 100 /* 100 msec */ #define JME_PHY_REG_NR 32 +#define JME_PHY_SPEC_REG_NR 128 /* * Global Host Control @@ -1380,6 +1381,18 @@ enum jme_phy_reg17_vals { #define BMSR_ANCOMP 0x0020 +/* + * For extended PHY register interface + */ +enum jme_phy_spec_regs { + JME_PHY_SPEC_ADDR_REG = 0x1E, + JME_PHY_SPEC_DATA_REG = 0x1F, +}; +enum jme_phy_spec_addr_bits { + JME_PHY_SPEC_REG_READ = 0x4000u, + JME_PHY_SPEC_REG_WRITE = 0x8000u, +}; + /* * Workaround */