X-Git-Url: https://bbs.cooldavid.org/git/?p=jme.git;a=blobdiff_plain;f=jme.h;h=1f37cf3500feeba713049ee573b11461c0b385a1;hp=953b1dca0ed2fe790e1c842232bec35361c2fc52;hb=refs%2Fheads%2Fmsix_test;hpb=cdcdc9eb2783c559a7d88c2fd14f433b8a843c59 diff --git a/jme.h b/jme.h index 953b1dc..1f37cf3 100644 --- a/jme.h +++ b/jme.h @@ -24,9 +24,12 @@ #include #define DRV_NAME "jme" -#define DRV_VERSION "0.9b" +#define DRV_VERSION "0.9d-msix" #define PFX DRV_NAME ": " +#define JME_GE_DEVICE 0x250 +#define JME_FE_DEVICE 0x260 + #ifdef DEBUG #define dprintk(devname, fmt, args...) \ printk(KERN_DEBUG "%s: " fmt, devname, ## args) @@ -70,14 +73,6 @@ #define jeprintk(devname, fmt, args...) \ printk(KERN_ERR "%s: " fmt, devname, ## args) -#define DEFAULT_MSG_ENABLE \ - (NETIF_MSG_DRV | \ - NETIF_MSG_PROBE | \ - NETIF_MSG_LINK | \ - NETIF_MSG_TIMER | \ - NETIF_MSG_RX_ERR | \ - NETIF_MSG_TX_ERR) - #define PCI_CONF_DCSR_MRRS 0x59 #define PCI_CONF_DCSR_MRRS_MASK 0x70 enum pci_conf_dcsr_mrrs_vals { @@ -92,6 +87,54 @@ enum pci_conf_dcsr_mrrs_vals { #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9216 #define MIN_ETHERNET_PACKET_SIZE 60 + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) +#define NET_STAT(priv) priv->stats +#define NETDEV_GET_STATS(netdev, fun_ptr) \ + netdev->get_stats = fun_ptr +#define DECLARE_NET_DEVICE_STATS struct net_device_stats stats; +#else +#define NET_STAT(priv) priv->dev->stats +#define NETDEV_GET_STATS(netdev, fun_ptr) +#define DECLARE_NET_DEVICE_STATS +#endif + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) +#define DECLARE_NAPI_STRUCT +#define NETIF_NAPI_SET(dev, napis, pollfn, q) \ + dev->poll = pollfn; \ + dev->weight = q; +#define JME_NAPI_HOLDER(holder) struct net_device *holder +#define JME_NAPI_WEIGHT(w) int *w +#define JME_NAPI_WEIGHT_VAL(w) *w +#define JME_NAPI_WEIGHT_SET(w, r) *w = r +#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev) +#define JME_NAPI_ENABLE(priv) netif_poll_enable(priv->dev); +#define JME_NAPI_DISABLE(priv) netif_poll_disable(priv->dev); +#define JME_RX_SCHEDULE_PREP(priv) \ + netif_rx_schedule_prep(priv->dev) +#define JME_RX_SCHEDULE(priv) \ + __netif_rx_schedule(priv->dev); +#else +#define DECLARE_NAPI_STRUCT struct napi_struct napi; +#define NETIF_NAPI_SET(dev, napis, pollfn, q) \ + netif_napi_add(dev, napis, pollfn, q); +#define JME_NAPI_HOLDER(holder) struct napi_struct *holder +#define JME_NAPI_WEIGHT(w) int w +#define JME_NAPI_WEIGHT_VAL(w) w +#define JME_NAPI_WEIGHT_SET(w, r) +#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev, napis) +#define JME_NAPI_ENABLE(priv) napi_enable(&priv->napi); +#define JME_NAPI_DISABLE(priv) \ + if(!napi_disable_pending(&priv->napi)) \ + napi_disable(&priv->napi); +#define JME_RX_SCHEDULE_PREP(priv) \ + netif_rx_schedule_prep(priv->dev, &priv->napi) +#define JME_RX_SCHEDULE(priv) \ + __netif_rx_schedule(priv->dev, &priv->napi); +#endif + + enum dynamic_pcc_values { PCC_OFF = 0, PCC_P1 = 1, @@ -336,51 +379,13 @@ struct jme_ring { atomic_t nr_free; }; -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) -#define NET_STAT(priv) priv->stats -#define NETDEV_GET_STATS(netdev, fun_ptr) \ - netdev->get_stats = fun_ptr -#define DECLARE_NET_DEVICE_STATS struct net_device_stats stats; -#else -#define NET_STAT(priv) priv->dev->stats -#define NETDEV_GET_STATS(netdev, fun_ptr) -#define DECLARE_NET_DEVICE_STATS -#endif - -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) -#define DECLARE_NAPI_STRUCT -#define NETIF_NAPI_SET(dev, napis, pollfn, q) \ - dev->poll = pollfn; \ - dev->weight = q; -#define JME_NAPI_HOLDER(holder) struct net_device *holder -#define JME_NAPI_WEIGHT(w) int *w -#define JME_NAPI_WEIGHT_VAL(w) *w -#define JME_NAPI_WEIGHT_SET(w, r) *w = r -#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev) -#define JME_NAPI_ENABLE(priv) netif_poll_enable(priv->dev); -#define JME_NAPI_DISABLE(priv) netif_poll_disable(priv->dev); -#define JME_RX_SCHEDULE_PREP(priv) \ - netif_rx_schedule_prep(priv->dev) -#define JME_RX_SCHEDULE(priv) \ - __netif_rx_schedule(priv->dev); -#else -#define DECLARE_NAPI_STRUCT struct napi_struct napi; -#define NETIF_NAPI_SET(dev, napis, pollfn, q) \ - netif_napi_add(dev, napis, pollfn, q); -#define JME_NAPI_HOLDER(holder) struct napi_struct *holder -#define JME_NAPI_WEIGHT(w) int w -#define JME_NAPI_WEIGHT_VAL(w) w -#define JME_NAPI_WEIGHT_SET(w, r) -#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev, napis) -#define JME_NAPI_ENABLE(priv) napi_enable(&priv->napi); -#define JME_NAPI_DISABLE(priv) \ - if(!napi_disable_pending(&priv->napi)) \ - napi_disable(&priv->napi); -#define JME_RX_SCHEDULE_PREP(priv) \ - netif_rx_schedule_prep(priv->dev, &priv->napi) -#define JME_RX_SCHEDULE(priv) \ - __netif_rx_schedule(priv->dev, &priv->napi); -#endif +#define JME_MSIX_VEC_NR 3 +struct jme_msix_info { + irq_handler_t handler; + __u16 vector; + __u8 requested; + char name[16]; +}; /* * Jmac Adapter Private data @@ -403,6 +408,7 @@ struct jme_adapter { struct tasklet_struct txclean_task; struct tasklet_struct linkch_task; struct tasklet_struct pcc_task; + struct jme_msix_info msix[JME_MSIX_VEC_NR]; __u32 flags; __u32 reg_txcs; __u32 reg_txpfc; @@ -440,13 +446,15 @@ enum shadow_reg_val { }; enum jme_flags_bits { JME_FLAG_MSI = 0x00000001, - JME_FLAG_SSET = 0x00000002, - JME_FLAG_TXCSUM = 0x00000004, - JME_FLAG_TSO = 0x00000008, - JME_FLAG_POLL = 0x00000010, + JME_FLAG_MSIX = 0x00000002, + JME_FLAG_SSET = 0x00000004, + JME_FLAG_TXCSUM = 0x00000008, + JME_FLAG_TSO = 0x00000010, + JME_FLAG_POLL = 0x00000020, }; #define WAIT_TASKLET_TIMEOUT 500 /* 500 ms */ #define TX_TIMEOUT (5*HZ) +#define JME_REG_LEN 0x500 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) __always_inline static struct jme_adapter* @@ -514,11 +522,13 @@ enum jme_iomap_regs { JME_PHY_CS = JME_PHY | 0x28, /* PHY Ctrl and Status Register */ JME_PHY_LINK = JME_PHY | 0x30, /* PHY Link Status Register */ JME_SMBCSR = JME_PHY | 0x40, /* SMB Control and Status */ + JME_SMBINTF = JME_PHY | 0x44, /* SMB Interface */ JME_TMCSR = JME_MISC| 0x00, /* Timer Control/Status Register */ JME_GPREG0 = JME_MISC| 0x08, /* General purpose REG-0 */ JME_GPREG1 = JME_MISC| 0x0C, /* General purpose REG-1 */ + JME_MSIX_ENT = JME_MISC| 0x10, /* MSIX Entry table */ JME_IEVE = JME_MISC| 0x20, /* Interrupt Event Status */ JME_IREQ = JME_MISC| 0x24, /* Interrupt Req Status(For Debug) */ JME_IENS = JME_MISC| 0x28, /* Interrupt Enable - Setting Port */ @@ -772,7 +782,8 @@ __always_inline __u32 smi_phy_addr(int x) { return (((x) << SMI_PHY_ADDR_SHIFT) & SMI_PHY_ADDR_MASK); } -#define JME_PHY_TIMEOUT 1000 /* 1000 msec */ +#define JME_PHY_TIMEOUT 100 /* 100 msec */ +#define JME_PHY_REG_NR 32 /* * Global Host Control @@ -842,8 +853,33 @@ enum jme_smbcsr_bit_mask { SMBCSR_CNACK = 0x00020000, SMBCSR_RELOAD = 0x00010000, SMBCSR_EEPROMD = 0x00000020, + SMBCSR_INITDONE = 0x00000010, + SMBCSR_BUSY = 0x0000000F, +}; +enum jme_smbintf_bit_mask { + SMBINTF_HWDATR = 0xFF000000, + SMBINTF_HWDATW = 0x00FF0000, + SMBINTF_HWADDR = 0x0000FF00, + SMBINTF_HWRWN = 0x00000020, + SMBINTF_HWCMD = 0x00000010, + SMBINTF_FASTM = 0x00000008, + SMBINTF_GPIOSCL = 0x00000004, + SMBINTF_GPIOSDA = 0x00000002, + SMBINTF_GPIOEN = 0x00000001, +}; +enum jme_smbintf_vals { + SMBINTF_HWRWN_READ = 0x00000020, + SMBINTF_HWRWN_WRITE = 0x00000000, }; -#define JME_SMB_TIMEOUT 10 /* 10 msec */ +enum jme_smbintf_shifts { + SMBINTF_HWDATR_SHIFT = 24, + SMBINTF_HWDATW_SHIFT = 16, + SMBINTF_HWADDR_SHIFT = 8, +}; +#define JME_EEPROM_RELOAD_TIMEOUT 2000 /* 2000 msec */ +#define JME_SMB_BUSY_TIMEOUT 20 /* 20 msec */ +#define JME_SMB_LEN 256 +#define JME_EEPROM_MAGIC 0x250 /* * Timer Control/Status Register @@ -898,8 +934,7 @@ enum jme_gpreg0_vals { /* * Interrupt Status Bits */ -enum jme_interrupt_bits -{ +enum jme_interrupt_bits { INTR_SWINTR = 0x80000000, INTR_TMINTR = 0x40000000, INTR_LINKCH = 0x20000000, @@ -933,14 +968,25 @@ enum jme_interrupt_bits INTR_TX1 = 0x00000002, INTR_TX0 = 0x00000001, }; -static const __u32 INTR_ENABLE = INTR_SWINTR | - INTR_TMINTR | - INTR_LINKCH | - INTR_PCCRX0TO | - INTR_PCCRX0 | - INTR_PCCTXTO | - INTR_PCCTX | - INTR_RX0EMP; +enum jme_interrupt_enables { + INTR_ENABLE = INTR_SWINTR | + INTR_TMINTR | + INTR_LINKCH | + INTR_PCCRX0TO | + INTR_PCCRX0 | + INTR_PCCTXTO | + INTR_PCCTX | + INTR_RX0EMP, + + INTR_EN_TX = INTR_PCCTXTO | + INTR_PCCTX, + + INTR_EN_RX0 = INTR_PCCRX0TO | + INTR_PCCRX0 | + INTR_RX0EMP, + + INTR_EN_MISC = INTR_ENABLE & ~(INTR_EN_TX | INTR_EN_RX0), +}; /* * PCC Control Registers @@ -1028,7 +1074,7 @@ enum jme_phy_reg17_vals { PREG17_SPEED_100M = 0x4000, PREG17_SPEED_1000M = 0x8000, }; -#define BMCR_ANCOMP 0x0020 +#define BMSR_ANCOMP 0x0020 /* * Function prototypes for ethtool