Update driver version

[jme.git] / jme.h

diff --git a/jme.h b/jme.h
index 9089116c9de80ba271805ca652b7cc2b7d384659..cc060200355b2790f644b1c20de60baff64c20c2 100644 (file)
--- a/jme.h
+++ b/jme.h
@@ -27,7 +27,7 @@
 #include <linux/interrupt.h>
 
 #define DRV_NAME       "jme"
-#define DRV_VERSION    "1.0.8.1-jmmod"
+#define DRV_VERSION    "1.0.8.9-jmmod-noasd"
 #define PFX            DRV_NAME ": "
 
 #define PCI_DEVICE_ID_JMICRON_JMC250   0x0250
@@ -112,6 +112,27 @@ do {                                                                       \
 #define NETIF_F_IPV6_CSUM 0
 #endif
 
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
+#define __NO_BOOL__
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+#define __USE_NDO_FIX_FEATURES__
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,1,0)
+#define __UNIFY_VLAN_RX_PATH__
+#define __USE_NDO_SET_RX_MODE__
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+#define __USE_SKB_FRAG_API__
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)
+#define __NEW_FIX_FEATURES_TYPE__
+#endif
+
 /*
  * Extra PCI Configuration space interface
  */
@@ -160,7 +181,6 @@ enum jme_spi_op_bits {
 };
 
 #define HALF_US 500    /* 500 ns */
-#define JMESPIIOCTL    SIOCDEVPRIVATE
 
 #define PCI_PRIV_PE1           0xE4
 
@@ -587,7 +607,9 @@ struct jme_adapter {
        u32                     msg_enable;
        struct ethtool_cmd      old_ecmd;
        unsigned int            old_mtu;
+#ifndef __UNIFY_VLAN_RX_PATH__
        struct vlan_group       *vlgrp;
+#endif
        struct dynpcc_info      dpi;
        atomic_t                intr_sem;
        atomic_t                link_changing;
@@ -595,9 +617,11 @@ struct jme_adapter {
        atomic_t                rx_cleaning;
        atomic_t                rx_empty;
        int                     (*jme_rx)(struct sk_buff *skb);
+#ifndef __UNIFY_VLAN_RX_PATH__
        int                     (*jme_vlan_rx)(struct sk_buff *skb,
                                          struct vlan_group *grp,
                                          unsigned short vlan_tag);
+#endif
        DECLARE_NAPI_STRUCT
        DECLARE_NET_DEVICE_STATS
 };
@@ -614,8 +638,10 @@ jme_get_stats(struct net_device *netdev)
 enum jme_flags_bits {
        JME_FLAG_MSI            = 1,
        JME_FLAG_SSET           = 2,
+#ifndef __USE_NDO_FIX_FEATURES__
        JME_FLAG_TXCSUM         = 3,
        JME_FLAG_TSO            = 4,
+#endif
        JME_FLAG_POLL           = 5,
        JME_FLAG_SHUTDOWN       = 6,
 };
@@ -892,7 +918,7 @@ enum jme_rxcs_values {
        RXCS_RETRYCNT_60        = 0x00000F00,
 
        RXCS_DEFAULT            = RXCS_FIFOTHTP_128T |
-                                 RXCS_FIFOTHNP_128QW |
+                                 RXCS_FIFOTHNP_16QW |
                                  RXCS_DMAREQSZ_128B |
                                  RXCS_RETRYGAP_256ns |
                                  RXCS_RETRYCNT_32,
@@ -922,6 +948,25 @@ enum jme_rxmcs_bits {
                                  RXMCS_CHECKSUM,
 };
 
+/*     Extern PHY common register 2    */
+
+#define PHY_GAD_TEST_MODE_1                    0x00002000
+#define PHY_GAD_TEST_MODE_MSK                  0x0000E000
+#define JM_PHY_SPEC_REG_READ                   0x00004000
+#define JM_PHY_SPEC_REG_WRITE                  0x00008000
+#define PHY_CALIBRATION_DELAY                  20
+#define JM_PHY_SPEC_ADDR_REG                   0x1E
+#define JM_PHY_SPEC_DATA_REG                   0x1F
+
+#define JM_PHY_EXT_COMM_0_REG                  0x30
+#define JM_PHY_EXT_COMM_1_REG                  0x31
+#define JM_PHY_EXT_COMM_2_REG                  0x32
+#define JM_PHY_EXT_COMM_2_CALI_ENABLE          0x01
+#define JM_PHY_EXT_COMM_2_CALI_MODE_0          0x02
+#define JM_PHY_EXT_COMM_2_CALI_LATCH           0x10
+#define PCI_PRIV_SHARE_NICCTRL                 0xF5
+#define JME_FLAG_PHYEA_ENABLE                  0x2
+
 /*
  * Wakeup Frame setup interface registers
  */