Update version number

[jme.git] / jme.h

diff --git a/jme.h b/jme.h
index 2ea31868e66fdb05f0b0e3eb3ac65ed0689a0d05..9089116c9de80ba271805ca652b7cc2b7d384659 100644 (file)
--- a/jme.h
+++ b/jme.h
@@ -24,9 +24,10 @@
 
 #ifndef __JME_H_INCLUDED__
 #define __JME_H_INCLUDED__
+#include <linux/interrupt.h>
 
 #define DRV_NAME       "jme"
-#define DRV_VERSION    "1.0.7-jmmod"
+#define DRV_VERSION    "1.0.8.1-jmmod"
 #define PFX            DRV_NAME ": "
 
 #define PCI_DEVICE_ID_JMICRON_JMC250   0x0250
@@ -42,11 +43,11 @@
        NETIF_MSG_TX_ERR | \
        NETIF_MSG_HW)
 
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23)
+#ifndef pr_err
 #define pr_err(fmt, arg...) \
        printk(KERN_ERR fmt, ##arg)
 #endif
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
+#ifndef netdev_err
 #define netdev_err(netdev, fmt, arg...) \
        pr_err(fmt, ##arg)
 #endif
@@ -94,11 +95,15 @@ do {                                                                        \
 #define msg_hw(priv, fmt, args...) \
        jme_msg(KERN_ERR, hw, priv, fmt, ## args)
 
+#ifndef netif_info
 #define netif_info(priv, type, dev, fmt, args...) \
        msg_ ## type(priv, fmt, ## args)
+#endif
+#ifndef netif_err
 #define netif_err(priv, type, dev, fmt, args...) \
        msg_ ## type(priv, fmt, ## args)
 #endif
+#endif
 
 #ifndef NETIF_F_TSO6
 #define NETIF_F_TSO6 0
@@ -461,10 +466,10 @@ struct jme_ring {
        netdev->get_stats = fun_ptr
 #define DECLARE_NET_DEVICE_STATS struct net_device_stats stats;
 /*
- * CentOS 5.5 have *_hdr helpers back-ported
+ * CentOS 5.2 have *_hdr helpers back-ported
  */
 #ifdef RHEL_RELEASE_CODE
-#if RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,5)
+#if RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,2)
 #define __DEFINE_IPHDR_HELPERS__
 #endif
 #else
@@ -530,6 +535,17 @@ static inline struct tcphdr *tcp_hdr(const struct sk_buff *skb)
        __napi_schedule(&priv->napi);
 #endif
 
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
+#define JME_NEW_PM_API
+#endif
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26)
+static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep)
+{
+       return ep->speed;
+}
+#endif
+
 /*
  * Jmac Adapter Private data
  */
@@ -555,6 +571,7 @@ struct jme_adapter {
        u32                     reg_rxmcs;
        u32                     reg_ghc;
        u32                     reg_pmcs;
+       u32                     reg_gpreg1;
        u32                     phylink;
        u32                     tx_ring_size;
        u32                     tx_ring_mask;
@@ -798,6 +815,14 @@ enum jme_txtrhd_shifts {
        TXTRHD_TXRL_SHIFT       = 0,
 };
 
+enum jme_txtrhd_values {
+       TXTRHD_FULLDUPLEX       = 0x00000000,
+       TXTRHD_HALFDUPLEX       = TXTRHD_TXPEN |
+                                 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
+                                 TXTRHD_TXREN |
+                                 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL),
+};
+
 /*
  * RX Control/Status Bits
  */
@@ -953,6 +978,8 @@ static inline u32 smi_phy_addr(int x)
  */
 enum jme_ghc_bit_mask {
        GHC_SWRST               = 0x40000000,
+       GHC_TO_CLK_SRC          = 0x00C00000,
+       GHC_TXMAC_CLK_SRC       = 0x00300000,
        GHC_DPX                 = 0x00000040,
        GHC_SPEED               = 0x00000030,
        GHC_LINK_POLL           = 0x00000001,
@@ -982,6 +1009,7 @@ enum jme_ghc_txmac_clk {
  * Power management control and status register
  */
 enum jme_pmcs_bit_masks {
+       PMCS_STMASK     = 0xFFFF0000,
        PMCS_WF7DET     = 0x80000000,
        PMCS_WF6DET     = 0x40000000,
        PMCS_WF5DET     = 0x20000000,
@@ -993,6 +1021,7 @@ enum jme_pmcs_bit_masks {
        PMCS_LFDET      = 0x00040000,
        PMCS_LRDET      = 0x00020000,
        PMCS_MFDET      = 0x00010000,
+       PMCS_ENMASK     = 0x0000FFFF,
        PMCS_WF7EN      = 0x00008000,
        PMCS_WF6EN      = 0x00004000,
        PMCS_WF5EN      = 0x00002000,
@@ -1131,18 +1160,17 @@ enum jme_gpreg0_vals {
 
 /*
  * General Purpose REG-1
- * Note: All theses bits defined here are for
- *       Chip mode revision 0x11 only
  */
-enum jme_gpreg1_masks {
+enum jme_gpreg1_bit_masks {
+       GPREG1_RXCLKOFF         = 0x04000000,
+       GPREG1_PCREQN           = 0x00020000,
+       GPREG1_HALFMODEPATCH    = 0x00000040, /* For Chip revision 0x11 only */
+       GPREG1_RSSPATCH         = 0x00000020, /* For Chip revision 0x11 only */
        GPREG1_INTRDELAYUNIT    = 0x00000018,
        GPREG1_INTRDELAYENABLE  = 0x00000007,
 };
 
 enum jme_gpreg1_vals {
-       GPREG1_HALFMODEPATCH    = 0x00000040,
-       GPREG1_RSSPATCH         = 0x00000020,
-
        GPREG1_INTDLYUNIT_16NS  = 0x00000000,
        GPREG1_INTDLYUNIT_256NS = 0x00000008,
        GPREG1_INTDLYUNIT_1US   = 0x00000010,
@@ -1156,7 +1184,7 @@ enum jme_gpreg1_vals {
        GPREG1_INTDLYEN_6U      = 0x00000006,
        GPREG1_INTDLYEN_7U      = 0x00000007,
 
-       GPREG1_DEFAULT          = 0x00000000,
+       GPREG1_DEFAULT          = GPREG1_PCREQN,
 };
 
 /*
@@ -1388,6 +1416,7 @@ static inline int new_phy_power_ctrl(u8 chip_main_rev)
  */
 static int jme_set_settings(struct net_device *netdev,
                                struct ethtool_cmd *ecmd);
+static void jme_set_unicastaddr(struct net_device *netdev);
 static void jme_set_multi(struct net_device *netdev);
 
 #endif