2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/pci.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ethtool.h>
30 #include <linux/mii.h>
31 #include <linux/crc32.h>
32 #include <linux/delay.h>
33 #include <linux/spinlock.h>
36 #include <linux/ipv6.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/if_vlan.h>
40 #include <net/ip6_checksum.h>
43 static int force_pseudohp = -1;
44 static int no_pseudohp = -1;
45 static int no_extplug = -1;
46 module_param(force_pseudohp, int, 0);
47 MODULE_PARM_DESC(force_pseudohp,
48 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
49 module_param(no_pseudohp, int, 0);
50 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
51 module_param(no_extplug, int, 0);
52 MODULE_PARM_DESC(no_extplug,
53 "Do not use external plug signal for pseudo hot-plug.");
56 jme_mdio_read(struct net_device *netdev, int phy, int reg)
58 struct jme_adapter *jme = netdev_priv(netdev);
59 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
62 jwrite32(jme, JME_SMI, SMI_OP_REQ |
67 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
69 val = jread32(jme, JME_SMI);
70 if ((val & SMI_OP_REQ) == 0)
75 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
82 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
86 jme_mdio_write(struct net_device *netdev,
87 int phy, int reg, int val)
89 struct jme_adapter *jme = netdev_priv(netdev);
92 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
93 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
94 smi_phy_addr(phy) | smi_reg_addr(reg));
97 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
99 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
104 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
110 jme_reset_phy_processor(struct jme_adapter *jme)
114 jme_mdio_write(jme->dev,
116 MII_ADVERTISE, ADVERTISE_ALL |
117 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
119 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
120 jme_mdio_write(jme->dev,
123 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
125 val = jme_mdio_read(jme->dev,
129 jme_mdio_write(jme->dev,
131 MII_BMCR, val | BMCR_RESET);
137 jme_setup_wakeup_frame(struct jme_adapter *jme,
138 u32 *mask, u32 crc, int fnr)
145 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
147 jwrite32(jme, JME_WFODP, crc);
153 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
154 jwrite32(jme, JME_WFOI,
155 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
156 (fnr & WFOI_FRAME_SEL));
158 jwrite32(jme, JME_WFODP, mask[i]);
164 jme_reset_mac_processor(struct jme_adapter *jme)
166 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
167 u32 crc = 0xCDCDCDCD;
171 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
173 jwrite32(jme, JME_GHC, jme->reg_ghc);
175 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
176 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
177 jwrite32(jme, JME_RXQDC, 0x00000000);
178 jwrite32(jme, JME_RXNDA, 0x00000000);
179 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
180 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
181 jwrite32(jme, JME_TXQDC, 0x00000000);
182 jwrite32(jme, JME_TXNDA, 0x00000000);
184 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
185 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
186 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
187 jme_setup_wakeup_frame(jme, mask, crc, i);
189 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
191 gpreg0 = GPREG0_DEFAULT;
192 jwrite32(jme, JME_GPREG0, gpreg0);
193 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
197 jme_reset_ghc_speed(struct jme_adapter *jme)
199 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
200 jwrite32(jme, JME_GHC, jme->reg_ghc);
204 jme_clear_pm(struct jme_adapter *jme)
206 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
207 pci_set_power_state(jme->pdev, PCI_D0);
208 pci_enable_wake(jme->pdev, PCI_D0, false);
212 jme_reload_eeprom(struct jme_adapter *jme)
217 val = jread32(jme, JME_SMBCSR);
219 if (val & SMBCSR_EEPROMD) {
221 jwrite32(jme, JME_SMBCSR, val);
222 val |= SMBCSR_RELOAD;
223 jwrite32(jme, JME_SMBCSR, val);
226 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
228 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
233 jeprintk(jme->pdev, "eeprom reload timeout\n");
242 jme_load_macaddr(struct net_device *netdev)
244 struct jme_adapter *jme = netdev_priv(netdev);
245 unsigned char macaddr[6];
248 spin_lock_bh(&jme->macaddr_lock);
249 val = jread32(jme, JME_RXUMA_LO);
250 macaddr[0] = (val >> 0) & 0xFF;
251 macaddr[1] = (val >> 8) & 0xFF;
252 macaddr[2] = (val >> 16) & 0xFF;
253 macaddr[3] = (val >> 24) & 0xFF;
254 val = jread32(jme, JME_RXUMA_HI);
255 macaddr[4] = (val >> 0) & 0xFF;
256 macaddr[5] = (val >> 8) & 0xFF;
257 memcpy(netdev->dev_addr, macaddr, 6);
258 spin_unlock_bh(&jme->macaddr_lock);
262 jme_set_rx_pcc(struct jme_adapter *jme, int p)
266 jwrite32(jme, JME_PCCRX0,
267 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
268 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
271 jwrite32(jme, JME_PCCRX0,
272 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
273 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
276 jwrite32(jme, JME_PCCRX0,
277 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
278 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
281 jwrite32(jme, JME_PCCRX0,
282 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
283 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
290 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
291 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
292 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
294 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
299 jme_start_irq(struct jme_adapter *jme)
301 register struct dynpcc_info *dpi = &(jme->dpi);
303 jme_set_rx_pcc(jme, PCC_P1);
305 dpi->attempt = PCC_P1;
308 jwrite32(jme, JME_PCCTX,
309 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
310 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
317 jwrite32(jme, JME_IENS, INTR_ENABLE);
321 jme_stop_irq(struct jme_adapter *jme)
326 jwrite32f(jme, JME_IENC, INTR_ENABLE);
330 jme_linkstat_from_phy(struct jme_adapter *jme)
334 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
335 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
336 if (bmsr & BMSR_ANCOMP)
337 phylink |= PHY_LINK_AUTONEG_COMPLETE;
343 jme_set_phyfifoa(struct jme_adapter *jme)
345 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
349 jme_set_phyfifob(struct jme_adapter *jme)
351 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
355 jme_check_link(struct net_device *netdev, int testonly)
357 struct jme_adapter *jme = netdev_priv(netdev);
358 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
365 phylink = jme_linkstat_from_phy(jme);
367 phylink = jread32(jme, JME_PHY_LINK);
369 if (phylink & PHY_LINK_UP) {
370 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
372 * If we did not enable AN
373 * Speed/Duplex Info should be obtained from SMI
375 phylink = PHY_LINK_UP;
377 bmcr = jme_mdio_read(jme->dev,
381 phylink |= ((bmcr & BMCR_SPEED1000) &&
382 (bmcr & BMCR_SPEED100) == 0) ?
383 PHY_LINK_SPEED_1000M :
384 (bmcr & BMCR_SPEED100) ?
385 PHY_LINK_SPEED_100M :
388 phylink |= (bmcr & BMCR_FULLDPLX) ?
391 strcat(linkmsg, "Forced: ");
394 * Keep polling for speed/duplex resolve complete
396 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
402 phylink = jme_linkstat_from_phy(jme);
404 phylink = jread32(jme, JME_PHY_LINK);
408 "Waiting speed resolve timeout.\n");
410 strcat(linkmsg, "ANed: ");
413 if (jme->phylink == phylink) {
420 jme->phylink = phylink;
422 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
423 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
424 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
425 switch (phylink & PHY_LINK_SPEED_MASK) {
426 case PHY_LINK_SPEED_10M:
427 ghc |= GHC_SPEED_10M |
428 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
429 strcat(linkmsg, "10 Mbps, ");
431 case PHY_LINK_SPEED_100M:
432 ghc |= GHC_SPEED_100M |
433 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
434 strcat(linkmsg, "100 Mbps, ");
436 case PHY_LINK_SPEED_1000M:
437 ghc |= GHC_SPEED_1000M |
438 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
439 strcat(linkmsg, "1000 Mbps, ");
445 if (phylink & PHY_LINK_DUPLEX) {
446 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
449 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
453 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
454 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
456 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
459 gpreg1 = GPREG1_DEFAULT;
460 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
461 if (!(phylink & PHY_LINK_DUPLEX))
462 gpreg1 |= GPREG1_HALFMODEPATCH;
463 switch (phylink & PHY_LINK_SPEED_MASK) {
464 case PHY_LINK_SPEED_10M:
465 jme_set_phyfifoa(jme);
466 gpreg1 |= GPREG1_RSSPATCH;
468 case PHY_LINK_SPEED_100M:
469 jme_set_phyfifob(jme);
470 gpreg1 |= GPREG1_RSSPATCH;
472 case PHY_LINK_SPEED_1000M:
473 jme_set_phyfifoa(jme);
480 jwrite32(jme, JME_GPREG1, gpreg1);
481 jwrite32(jme, JME_GHC, ghc);
484 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
487 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
490 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
491 msg_link(jme, "Link is up at %s.\n", linkmsg);
493 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
495 netif_carrier_on(netdev);
500 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
501 msg_link(jme, "Link is down.\n");
503 netif_info(jme, link, jme->dev, "Link is down.\n");
506 netif_carrier_off(netdev);
514 jme_setup_tx_resources(struct jme_adapter *jme)
516 struct jme_ring *txring = &(jme->txring[0]);
518 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
519 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
529 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
531 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
532 txring->next_to_use = 0;
533 atomic_set(&txring->next_to_clean, 0);
534 atomic_set(&txring->nr_free, jme->tx_ring_size);
536 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
537 jme->tx_ring_size, GFP_ATOMIC);
538 if (unlikely(!(txring->bufinf)))
539 goto err_free_txring;
542 * Initialize Transmit Descriptors
544 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
545 memset(txring->bufinf, 0,
546 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
551 dma_free_coherent(&(jme->pdev->dev),
552 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
558 txring->dmaalloc = 0;
560 txring->bufinf = NULL;
566 jme_free_tx_resources(struct jme_adapter *jme)
569 struct jme_ring *txring = &(jme->txring[0]);
570 struct jme_buffer_info *txbi;
573 if (txring->bufinf) {
574 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
575 txbi = txring->bufinf + i;
577 dev_kfree_skb(txbi->skb);
583 txbi->start_xmit = 0;
585 kfree(txring->bufinf);
588 dma_free_coherent(&(jme->pdev->dev),
589 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
593 txring->alloc = NULL;
595 txring->dmaalloc = 0;
597 txring->bufinf = NULL;
599 txring->next_to_use = 0;
600 atomic_set(&txring->next_to_clean, 0);
601 atomic_set(&txring->nr_free, 0);
605 jme_enable_tx_engine(struct jme_adapter *jme)
610 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
614 * Setup TX Queue 0 DMA Bass Address
616 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
617 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
618 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
621 * Setup TX Descptor Count
623 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
629 jwrite32(jme, JME_TXCS, jme->reg_txcs |
636 jme_restart_tx_engine(struct jme_adapter *jme)
641 jwrite32(jme, JME_TXCS, jme->reg_txcs |
647 jme_disable_tx_engine(struct jme_adapter *jme)
655 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
658 val = jread32(jme, JME_TXCS);
659 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
661 val = jread32(jme, JME_TXCS);
666 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
670 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
672 struct jme_ring *rxring = &(jme->rxring[0]);
673 register struct rxdesc *rxdesc = rxring->desc;
674 struct jme_buffer_info *rxbi = rxring->bufinf;
680 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
681 rxdesc->desc1.bufaddrl = cpu_to_le32(
682 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
683 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
684 if (jme->dev->features & NETIF_F_HIGHDMA)
685 rxdesc->desc1.flags = RXFLAG_64BIT;
687 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
691 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
693 struct jme_ring *rxring = &(jme->rxring[0]);
694 struct jme_buffer_info *rxbi = rxring->bufinf + i;
697 skb = netdev_alloc_skb(jme->dev,
698 jme->dev->mtu + RX_EXTRA_LEN);
701 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
706 rxbi->len = skb_tailroom(skb);
707 rxbi->mapping = pci_map_page(jme->pdev,
708 virt_to_page(skb->data),
709 offset_in_page(skb->data),
717 jme_free_rx_buf(struct jme_adapter *jme, int i)
719 struct jme_ring *rxring = &(jme->rxring[0]);
720 struct jme_buffer_info *rxbi = rxring->bufinf;
724 pci_unmap_page(jme->pdev,
728 dev_kfree_skb(rxbi->skb);
736 jme_free_rx_resources(struct jme_adapter *jme)
739 struct jme_ring *rxring = &(jme->rxring[0]);
742 if (rxring->bufinf) {
743 for (i = 0 ; i < jme->rx_ring_size ; ++i)
744 jme_free_rx_buf(jme, i);
745 kfree(rxring->bufinf);
748 dma_free_coherent(&(jme->pdev->dev),
749 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
752 rxring->alloc = NULL;
754 rxring->dmaalloc = 0;
756 rxring->bufinf = NULL;
758 rxring->next_to_use = 0;
759 atomic_set(&rxring->next_to_clean, 0);
763 jme_setup_rx_resources(struct jme_adapter *jme)
766 struct jme_ring *rxring = &(jme->rxring[0]);
768 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
769 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
778 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
780 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
781 rxring->next_to_use = 0;
782 atomic_set(&rxring->next_to_clean, 0);
784 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
785 jme->rx_ring_size, GFP_ATOMIC);
786 if (unlikely(!(rxring->bufinf)))
787 goto err_free_rxring;
790 * Initiallize Receive Descriptors
792 memset(rxring->bufinf, 0,
793 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
794 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
795 if (unlikely(jme_make_new_rx_buf(jme, i))) {
796 jme_free_rx_resources(jme);
800 jme_set_clean_rxdesc(jme, i);
806 dma_free_coherent(&(jme->pdev->dev),
807 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
812 rxring->dmaalloc = 0;
814 rxring->bufinf = NULL;
820 jme_enable_rx_engine(struct jme_adapter *jme)
825 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
830 * Setup RX DMA Bass Address
832 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
833 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
834 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
837 * Setup RX Descriptor Count
839 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
842 * Setup Unicast Filter
844 jme_set_multi(jme->dev);
850 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
857 jme_restart_rx_engine(struct jme_adapter *jme)
862 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
869 jme_disable_rx_engine(struct jme_adapter *jme)
877 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
880 val = jread32(jme, JME_RXCS);
881 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
883 val = jread32(jme, JME_RXCS);
888 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
893 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
895 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
898 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
899 == RXWBFLAG_TCPON)) {
900 if (flags & RXWBFLAG_IPV4)
901 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
902 msg_rx_err(jme, "TCP Checksum error\n");
904 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
909 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
910 == RXWBFLAG_UDPON)) {
911 if (flags & RXWBFLAG_IPV4)
912 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
913 msg_rx_err(jme, "UDP Checksum error.\n");
915 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
920 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
922 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
923 msg_rx_err(jme, "IPv4 Checksum error.\n");
925 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
934 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
936 struct jme_ring *rxring = &(jme->rxring[0]);
937 struct rxdesc *rxdesc = rxring->desc;
938 struct jme_buffer_info *rxbi = rxring->bufinf;
946 pci_dma_sync_single_for_cpu(jme->pdev,
951 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
952 pci_dma_sync_single_for_device(jme->pdev,
957 ++(NET_STAT(jme).rx_dropped);
959 framesize = le16_to_cpu(rxdesc->descwb.framesize)
962 skb_reserve(skb, RX_PREPAD_SIZE);
963 skb_put(skb, framesize);
964 skb->protocol = eth_type_trans(skb, jme->dev);
966 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
967 skb->ip_summed = CHECKSUM_UNNECESSARY;
969 skb->ip_summed = CHECKSUM_NONE;
971 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
972 spin_lock(&jme->vlgrp_lock);
974 jme->jme_vlan_rx(skb, jme->vlgrp,
975 le16_to_cpu(rxdesc->descwb.vlan));
976 spin_unlock(&jme->vlgrp_lock);
977 NET_STAT(jme).rx_bytes += 4;
979 spin_unlock(&jme->vlgrp_lock);
986 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
987 cpu_to_le16(RXWBFLAG_DEST_MUL))
988 ++(NET_STAT(jme).multicast);
990 NET_STAT(jme).rx_bytes += framesize;
991 ++(NET_STAT(jme).rx_packets);
994 jme_set_clean_rxdesc(jme, idx);
999 jme_process_receive(struct jme_adapter *jme, int limit)
1001 struct jme_ring *rxring = &(jme->rxring[0]);
1002 struct rxdesc *rxdesc = rxring->desc;
1003 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1005 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1008 if (unlikely(atomic_read(&jme->link_changing) != 1))
1011 if (unlikely(!netif_carrier_ok(jme->dev)))
1014 i = atomic_read(&rxring->next_to_clean);
1016 rxdesc = rxring->desc;
1019 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1020 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1024 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1026 if (unlikely(desccnt > 1 ||
1027 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1029 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1030 ++(NET_STAT(jme).rx_crc_errors);
1031 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1032 ++(NET_STAT(jme).rx_fifo_errors);
1034 ++(NET_STAT(jme).rx_errors);
1037 limit -= desccnt - 1;
1039 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1040 jme_set_clean_rxdesc(jme, j);
1041 j = (j + 1) & (mask);
1045 jme_alloc_and_feed_skb(jme, i);
1048 i = (i + desccnt) & (mask);
1052 atomic_set(&rxring->next_to_clean, i);
1055 atomic_inc(&jme->rx_cleaning);
1057 return limit > 0 ? limit : 0;
1062 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1064 if (likely(atmp == dpi->cur)) {
1069 if (dpi->attempt == atmp) {
1072 dpi->attempt = atmp;
1079 jme_dynamic_pcc(struct jme_adapter *jme)
1081 register struct dynpcc_info *dpi = &(jme->dpi);
1083 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1084 jme_attempt_pcc(dpi, PCC_P3);
1085 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1086 dpi->intr_cnt > PCC_INTR_THRESHOLD)
1087 jme_attempt_pcc(dpi, PCC_P2);
1089 jme_attempt_pcc(dpi, PCC_P1);
1091 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1092 if (dpi->attempt < dpi->cur)
1093 tasklet_schedule(&jme->rxclean_task);
1094 jme_set_rx_pcc(jme, dpi->attempt);
1095 dpi->cur = dpi->attempt;
1101 jme_start_pcc_timer(struct jme_adapter *jme)
1103 struct dynpcc_info *dpi = &(jme->dpi);
1104 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1105 dpi->last_pkts = NET_STAT(jme).rx_packets;
1107 jwrite32(jme, JME_TMCSR,
1108 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1112 jme_stop_pcc_timer(struct jme_adapter *jme)
1114 jwrite32(jme, JME_TMCSR, 0);
1118 jme_shutdown_nic(struct jme_adapter *jme)
1122 phylink = jme_linkstat_from_phy(jme);
1124 if (!(phylink & PHY_LINK_UP)) {
1126 * Disable all interrupt before issue timer
1129 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1134 jme_pcc_tasklet(unsigned long arg)
1136 struct jme_adapter *jme = (struct jme_adapter *)arg;
1137 struct net_device *netdev = jme->dev;
1139 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1140 jme_shutdown_nic(jme);
1144 if (unlikely(!netif_carrier_ok(netdev) ||
1145 (atomic_read(&jme->link_changing) != 1)
1147 jme_stop_pcc_timer(jme);
1151 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1152 jme_dynamic_pcc(jme);
1154 jme_start_pcc_timer(jme);
1158 jme_polling_mode(struct jme_adapter *jme)
1160 jme_set_rx_pcc(jme, PCC_OFF);
1164 jme_interrupt_mode(struct jme_adapter *jme)
1166 jme_set_rx_pcc(jme, PCC_P1);
1170 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1173 apmc = jread32(jme, JME_APMC);
1174 return apmc & JME_APMC_PSEUDO_HP_EN;
1178 jme_start_shutdown_timer(struct jme_adapter *jme)
1182 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1183 apmc &= ~JME_APMC_EPIEN_CTRL;
1185 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1188 jwrite32f(jme, JME_APMC, apmc);
1190 jwrite32f(jme, JME_TIMER2, 0);
1191 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1192 jwrite32(jme, JME_TMCSR,
1193 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1197 jme_stop_shutdown_timer(struct jme_adapter *jme)
1201 jwrite32f(jme, JME_TMCSR, 0);
1202 jwrite32f(jme, JME_TIMER2, 0);
1203 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1205 apmc = jread32(jme, JME_APMC);
1206 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1207 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1209 jwrite32f(jme, JME_APMC, apmc);
1213 jme_link_change_tasklet(unsigned long arg)
1215 struct jme_adapter *jme = (struct jme_adapter *)arg;
1216 struct net_device *netdev = jme->dev;
1219 while (!atomic_dec_and_test(&jme->link_changing)) {
1220 atomic_inc(&jme->link_changing);
1221 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1222 msg_intr(jme, "Get link change lock failed.\n");
1224 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1226 while (atomic_read(&jme->link_changing) != 1)
1227 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1228 msg_intr(jme, "Waiting link change lock.\n");
1230 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1234 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1237 jme->old_mtu = netdev->mtu;
1238 netif_stop_queue(netdev);
1239 if (jme_pseudo_hotplug_enabled(jme))
1240 jme_stop_shutdown_timer(jme);
1242 jme_stop_pcc_timer(jme);
1243 tasklet_disable(&jme->txclean_task);
1244 tasklet_disable(&jme->rxclean_task);
1245 tasklet_disable(&jme->rxempty_task);
1247 if (netif_carrier_ok(netdev)) {
1248 jme_reset_ghc_speed(jme);
1249 jme_disable_rx_engine(jme);
1250 jme_disable_tx_engine(jme);
1251 jme_reset_mac_processor(jme);
1252 jme_free_rx_resources(jme);
1253 jme_free_tx_resources(jme);
1255 if (test_bit(JME_FLAG_POLL, &jme->flags))
1256 jme_polling_mode(jme);
1258 netif_carrier_off(netdev);
1261 jme_check_link(netdev, 0);
1262 if (netif_carrier_ok(netdev)) {
1263 rc = jme_setup_rx_resources(jme);
1265 jeprintk(jme->pdev, "Allocating resources for RX error"
1266 ", Device STOPPED!\n");
1267 goto out_enable_tasklet;
1270 rc = jme_setup_tx_resources(jme);
1272 jeprintk(jme->pdev, "Allocating resources for TX error"
1273 ", Device STOPPED!\n");
1274 goto err_out_free_rx_resources;
1277 jme_enable_rx_engine(jme);
1278 jme_enable_tx_engine(jme);
1280 netif_start_queue(netdev);
1282 if (test_bit(JME_FLAG_POLL, &jme->flags))
1283 jme_interrupt_mode(jme);
1285 jme_start_pcc_timer(jme);
1286 } else if (jme_pseudo_hotplug_enabled(jme)) {
1287 jme_start_shutdown_timer(jme);
1290 goto out_enable_tasklet;
1292 err_out_free_rx_resources:
1293 jme_free_rx_resources(jme);
1295 tasklet_enable(&jme->txclean_task);
1296 tasklet_hi_enable(&jme->rxclean_task);
1297 tasklet_hi_enable(&jme->rxempty_task);
1299 atomic_inc(&jme->link_changing);
1303 jme_rx_clean_tasklet(unsigned long arg)
1305 struct jme_adapter *jme = (struct jme_adapter *)arg;
1306 struct dynpcc_info *dpi = &(jme->dpi);
1308 jme_process_receive(jme, jme->rx_ring_size);
1314 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1316 struct jme_adapter *jme = jme_napi_priv(holder);
1320 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1322 while (atomic_read(&jme->rx_empty) > 0) {
1323 atomic_dec(&jme->rx_empty);
1324 ++(NET_STAT(jme).rx_dropped);
1325 jme_restart_rx_engine(jme);
1327 atomic_inc(&jme->rx_empty);
1330 JME_RX_COMPLETE(netdev, holder);
1331 jme_interrupt_mode(jme);
1334 JME_NAPI_WEIGHT_SET(budget, rest);
1335 return JME_NAPI_WEIGHT_VAL(budget) - rest;
1339 jme_rx_empty_tasklet(unsigned long arg)
1341 struct jme_adapter *jme = (struct jme_adapter *)arg;
1343 if (unlikely(atomic_read(&jme->link_changing) != 1))
1346 if (unlikely(!netif_carrier_ok(jme->dev)))
1349 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1350 msg_rx_status(jme, "RX Queue Full!\n");
1352 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1355 jme_rx_clean_tasklet(arg);
1357 while (atomic_read(&jme->rx_empty) > 0) {
1358 atomic_dec(&jme->rx_empty);
1359 ++(NET_STAT(jme).rx_dropped);
1360 jme_restart_rx_engine(jme);
1362 atomic_inc(&jme->rx_empty);
1366 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1368 struct jme_ring *txring = &(jme->txring[0]);
1371 if (unlikely(netif_queue_stopped(jme->dev) &&
1372 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1373 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1374 msg_tx_done(jme, "TX Queue Waked.\n");
1376 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1378 netif_wake_queue(jme->dev);
1384 jme_tx_clean_tasklet(unsigned long arg)
1386 struct jme_adapter *jme = (struct jme_adapter *)arg;
1387 struct jme_ring *txring = &(jme->txring[0]);
1388 struct txdesc *txdesc = txring->desc;
1389 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1390 int i, j, cnt = 0, max, err, mask;
1392 tx_dbg(jme, "Into txclean.\n");
1394 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1397 if (unlikely(atomic_read(&jme->link_changing) != 1))
1400 if (unlikely(!netif_carrier_ok(jme->dev)))
1403 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1404 mask = jme->tx_ring_mask;
1406 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1410 if (likely(ctxbi->skb &&
1411 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1413 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1414 i, ctxbi->nr_desc, jiffies);
1416 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1418 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1419 ttxbi = txbi + ((i + j) & (mask));
1420 txdesc[(i + j) & (mask)].dw[0] = 0;
1422 pci_unmap_page(jme->pdev,
1431 dev_kfree_skb(ctxbi->skb);
1433 cnt += ctxbi->nr_desc;
1435 if (unlikely(err)) {
1436 ++(NET_STAT(jme).tx_carrier_errors);
1438 ++(NET_STAT(jme).tx_packets);
1439 NET_STAT(jme).tx_bytes += ctxbi->len;
1444 ctxbi->start_xmit = 0;
1450 i = (i + ctxbi->nr_desc) & mask;
1455 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
1456 atomic_set(&txring->next_to_clean, i);
1457 atomic_add(cnt, &txring->nr_free);
1459 jme_wake_queue_if_stopped(jme);
1462 atomic_inc(&jme->tx_cleaning);
1466 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1471 jwrite32f(jme, JME_IENC, INTR_ENABLE);
1473 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1475 * Link change event is critical
1476 * all other events are ignored
1478 jwrite32(jme, JME_IEVE, intrstat);
1479 tasklet_schedule(&jme->linkch_task);
1483 if (intrstat & INTR_TMINTR) {
1484 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1485 tasklet_schedule(&jme->pcc_task);
1488 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1489 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1490 tasklet_schedule(&jme->txclean_task);
1493 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1494 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1500 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1501 if (intrstat & INTR_RX0EMP)
1502 atomic_inc(&jme->rx_empty);
1504 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1505 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1506 jme_polling_mode(jme);
1507 JME_RX_SCHEDULE(jme);
1511 if (intrstat & INTR_RX0EMP) {
1512 atomic_inc(&jme->rx_empty);
1513 tasklet_hi_schedule(&jme->rxempty_task);
1514 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1515 tasklet_hi_schedule(&jme->rxclean_task);
1521 * Re-enable interrupt
1523 jwrite32f(jme, JME_IENS, INTR_ENABLE);
1526 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1528 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1531 jme_intr(int irq, void *dev_id)
1534 struct net_device *netdev = dev_id;
1535 struct jme_adapter *jme = netdev_priv(netdev);
1538 intrstat = jread32(jme, JME_IEVE);
1541 * Check if it's really an interrupt for us
1543 if (unlikely((intrstat & INTR_ENABLE) == 0))
1547 * Check if the device still exist
1549 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1552 jme_intr_msi(jme, intrstat);
1557 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1559 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1562 jme_msi(int irq, void *dev_id)
1565 struct net_device *netdev = dev_id;
1566 struct jme_adapter *jme = netdev_priv(netdev);
1569 intrstat = jread32(jme, JME_IEVE);
1571 jme_intr_msi(jme, intrstat);
1577 jme_reset_link(struct jme_adapter *jme)
1579 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1583 jme_restart_an(struct jme_adapter *jme)
1587 spin_lock_bh(&jme->phy_lock);
1588 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1589 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1590 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1591 spin_unlock_bh(&jme->phy_lock);
1595 jme_request_irq(struct jme_adapter *jme)
1598 struct net_device *netdev = jme->dev;
1599 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1600 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1601 int irq_flags = SA_SHIRQ;
1603 irq_handler_t handler = jme_intr;
1604 int irq_flags = IRQF_SHARED;
1607 if (!pci_enable_msi(jme->pdev)) {
1608 set_bit(JME_FLAG_MSI, &jme->flags);
1613 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1617 "Unable to request %s interrupt (return: %d)\n",
1618 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1621 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1622 pci_disable_msi(jme->pdev);
1623 clear_bit(JME_FLAG_MSI, &jme->flags);
1626 netdev->irq = jme->pdev->irq;
1633 jme_free_irq(struct jme_adapter *jme)
1635 free_irq(jme->pdev->irq, jme->dev);
1636 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1637 pci_disable_msi(jme->pdev);
1638 clear_bit(JME_FLAG_MSI, &jme->flags);
1639 jme->dev->irq = jme->pdev->irq;
1644 jme_open(struct net_device *netdev)
1646 struct jme_adapter *jme = netdev_priv(netdev);
1650 JME_NAPI_ENABLE(jme);
1652 tasklet_enable(&jme->linkch_task);
1653 tasklet_enable(&jme->txclean_task);
1654 tasklet_hi_enable(&jme->rxclean_task);
1655 tasklet_hi_enable(&jme->rxempty_task);
1657 rc = jme_request_irq(jme);
1663 if (test_bit(JME_FLAG_SSET, &jme->flags))
1664 jme_set_settings(netdev, &jme->old_ecmd);
1666 jme_reset_phy_processor(jme);
1668 jme_reset_link(jme);
1673 netif_stop_queue(netdev);
1674 netif_carrier_off(netdev);
1680 jme_set_100m_half(struct jme_adapter *jme)
1684 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1685 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1686 BMCR_SPEED1000 | BMCR_FULLDPLX);
1687 tmp |= BMCR_SPEED100;
1690 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1693 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1695 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1698 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1700 jme_wait_link(struct jme_adapter *jme)
1702 u32 phylink, to = JME_WAIT_LINK_TIME;
1705 phylink = jme_linkstat_from_phy(jme);
1706 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1708 phylink = jme_linkstat_from_phy(jme);
1714 jme_phy_off(struct jme_adapter *jme)
1716 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1720 jme_close(struct net_device *netdev)
1722 struct jme_adapter *jme = netdev_priv(netdev);
1724 netif_stop_queue(netdev);
1725 netif_carrier_off(netdev);
1730 JME_NAPI_DISABLE(jme);
1732 tasklet_disable(&jme->linkch_task);
1733 tasklet_disable(&jme->txclean_task);
1734 tasklet_disable(&jme->rxclean_task);
1735 tasklet_disable(&jme->rxempty_task);
1737 jme_reset_ghc_speed(jme);
1738 jme_disable_rx_engine(jme);
1739 jme_disable_tx_engine(jme);
1740 jme_reset_mac_processor(jme);
1741 jme_free_rx_resources(jme);
1742 jme_free_tx_resources(jme);
1750 jme_alloc_txdesc(struct jme_adapter *jme,
1751 struct sk_buff *skb)
1753 struct jme_ring *txring = &(jme->txring[0]);
1754 int idx, nr_alloc, mask = jme->tx_ring_mask;
1756 idx = txring->next_to_use;
1757 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1759 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1762 atomic_sub(nr_alloc, &txring->nr_free);
1764 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1770 jme_fill_tx_map(struct pci_dev *pdev,
1771 struct txdesc *txdesc,
1772 struct jme_buffer_info *txbi,
1780 dmaaddr = pci_map_page(pdev,
1786 pci_dma_sync_single_for_device(pdev,
1793 txdesc->desc2.flags = TXFLAG_OWN;
1794 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
1795 txdesc->desc2.datalen = cpu_to_le16(len);
1796 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1797 txdesc->desc2.bufaddrl = cpu_to_le32(
1798 (__u64)dmaaddr & 0xFFFFFFFFUL);
1800 txbi->mapping = dmaaddr;
1805 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1807 struct jme_ring *txring = &(jme->txring[0]);
1808 struct txdesc *txdesc = txring->desc, *ctxdesc;
1809 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1810 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1811 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1812 int mask = jme->tx_ring_mask;
1813 struct skb_frag_struct *frag;
1816 for (i = 0 ; i < nr_frags ; ++i) {
1817 frag = &skb_shinfo(skb)->frags[i];
1818 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1819 ctxbi = txbi + ((idx + i + 2) & (mask));
1821 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1822 frag->page_offset, frag->size, hidma);
1825 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1826 ctxdesc = txdesc + ((idx + 1) & (mask));
1827 ctxbi = txbi + ((idx + 1) & (mask));
1828 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1829 offset_in_page(skb->data), len, hidma);
1834 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1837 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1838 skb_shinfo(skb)->tso_size
1840 skb_shinfo(skb)->gso_size
1842 && skb_header_cloned(skb) &&
1843 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1852 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1854 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1855 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1857 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1860 *flags |= TXFLAG_LSEN;
1862 if (skb->protocol == htons(ETH_P_IP)) {
1863 struct iphdr *iph = ip_hdr(skb);
1866 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1871 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1873 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1886 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1888 #ifdef CHECKSUM_PARTIAL
1889 if (skb->ip_summed == CHECKSUM_PARTIAL)
1891 if (skb->ip_summed == CHECKSUM_HW)
1896 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1897 if (skb->protocol == htons(ETH_P_IP))
1898 ip_proto = ip_hdr(skb)->protocol;
1899 else if (skb->protocol == htons(ETH_P_IPV6))
1900 ip_proto = ipv6_hdr(skb)->nexthdr;
1904 switch (skb->protocol) {
1905 case htons(ETH_P_IP):
1906 ip_proto = ip_hdr(skb)->protocol;
1908 case htons(ETH_P_IPV6):
1909 ip_proto = ipv6_hdr(skb)->nexthdr;
1919 *flags |= TXFLAG_TCPCS;
1922 *flags |= TXFLAG_UDPCS;
1925 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1926 msg_tx_err(jme, "Error upper layer protocol.\n");
1928 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1936 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1938 if (vlan_tx_tag_present(skb)) {
1939 *flags |= TXFLAG_TAGON;
1940 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1945 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1947 struct jme_ring *txring = &(jme->txring[0]);
1948 struct txdesc *txdesc;
1949 struct jme_buffer_info *txbi;
1952 txdesc = (struct txdesc *)txring->desc + idx;
1953 txbi = txring->bufinf + idx;
1959 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1961 * Set OWN bit at final.
1962 * When kernel transmit faster than NIC.
1963 * And NIC trying to send this descriptor before we tell
1964 * it to start sending this TX queue.
1965 * Other fields are already filled correctly.
1968 flags = TXFLAG_OWN | TXFLAG_INT;
1970 * Set checksum flags while not tso
1972 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1973 jme_tx_csum(jme, skb, &flags);
1974 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1975 jme_map_tx_skb(jme, skb, idx);
1976 txdesc->desc1.flags = flags;
1978 * Set tx buffer info after telling NIC to send
1979 * For better tx_clean timing
1982 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1984 txbi->len = skb->len;
1985 txbi->start_xmit = jiffies;
1986 if (!txbi->start_xmit)
1987 txbi->start_xmit = (0UL-1);
1993 jme_stop_queue_if_full(struct jme_adapter *jme)
1995 struct jme_ring *txring = &(jme->txring[0]);
1996 struct jme_buffer_info *txbi = txring->bufinf;
1997 int idx = atomic_read(&txring->next_to_clean);
2002 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2003 netif_stop_queue(jme->dev);
2004 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2005 msg_tx_queued(jme, "TX Queue Paused.\n");
2007 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2010 if (atomic_read(&txring->nr_free)
2011 >= (jme->tx_wake_threshold)) {
2012 netif_wake_queue(jme->dev);
2013 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2014 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
2016 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2021 if (unlikely(txbi->start_xmit &&
2022 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2024 netif_stop_queue(jme->dev);
2025 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2026 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2028 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2034 * This function is already protected by netif_tx_lock()
2037 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2042 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2044 struct jme_adapter *jme = netdev_priv(netdev);
2047 if (unlikely(jme_expand_header(jme, skb))) {
2048 ++(NET_STAT(jme).tx_dropped);
2049 return NETDEV_TX_OK;
2052 idx = jme_alloc_txdesc(jme, skb);
2054 if (unlikely(idx < 0)) {
2055 netif_stop_queue(netdev);
2056 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2057 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
2059 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2062 return NETDEV_TX_BUSY;
2065 jme_fill_tx_desc(jme, skb, idx);
2067 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2068 TXCS_SELECT_QUEUE0 |
2071 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2072 netdev->trans_start = jiffies;
2075 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2076 skb_shinfo(skb)->nr_frags + 2,
2078 jme_stop_queue_if_full(jme);
2080 return NETDEV_TX_OK;
2084 jme_set_macaddr(struct net_device *netdev, void *p)
2086 struct jme_adapter *jme = netdev_priv(netdev);
2087 struct sockaddr *addr = p;
2090 if (netif_running(netdev))
2093 spin_lock_bh(&jme->macaddr_lock);
2094 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2096 val = (addr->sa_data[3] & 0xff) << 24 |
2097 (addr->sa_data[2] & 0xff) << 16 |
2098 (addr->sa_data[1] & 0xff) << 8 |
2099 (addr->sa_data[0] & 0xff);
2100 jwrite32(jme, JME_RXUMA_LO, val);
2101 val = (addr->sa_data[5] & 0xff) << 8 |
2102 (addr->sa_data[4] & 0xff);
2103 jwrite32(jme, JME_RXUMA_HI, val);
2104 spin_unlock_bh(&jme->macaddr_lock);
2110 jme_set_multi(struct net_device *netdev)
2112 struct jme_adapter *jme = netdev_priv(netdev);
2113 u32 mc_hash[2] = {};
2114 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2118 spin_lock_bh(&jme->rxmcs_lock);
2120 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2122 if (netdev->flags & IFF_PROMISC) {
2123 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2124 } else if (netdev->flags & IFF_ALLMULTI) {
2125 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2126 } else if (netdev->flags & IFF_MULTICAST) {
2127 struct dev_mc_list *mclist;
2130 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2131 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2132 for (i = 0, mclist = netdev->mc_list;
2133 mclist && i < netdev->mc_count;
2134 ++i, mclist = mclist->next) {
2136 netdev_for_each_mc_addr(mclist, netdev) {
2138 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2139 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2142 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2143 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2147 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2149 spin_unlock_bh(&jme->rxmcs_lock);
2153 jme_change_mtu(struct net_device *netdev, int new_mtu)
2155 struct jme_adapter *jme = netdev_priv(netdev);
2157 if (new_mtu == jme->old_mtu)
2160 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2161 ((new_mtu) < IPV6_MIN_MTU))
2164 if (new_mtu > 4000) {
2165 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2166 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2167 jme_restart_rx_engine(jme);
2169 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2170 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2171 jme_restart_rx_engine(jme);
2174 if (new_mtu > 1900) {
2175 netdev->features &= ~(NETIF_F_HW_CSUM |
2182 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2183 netdev->features |= NETIF_F_HW_CSUM;
2184 if (test_bit(JME_FLAG_TSO, &jme->flags))
2185 netdev->features |= NETIF_F_TSO
2192 netdev->mtu = new_mtu;
2193 jme_reset_link(jme);
2199 jme_tx_timeout(struct net_device *netdev)
2201 struct jme_adapter *jme = netdev_priv(netdev);
2204 jme_reset_phy_processor(jme);
2205 if (test_bit(JME_FLAG_SSET, &jme->flags))
2206 jme_set_settings(netdev, &jme->old_ecmd);
2209 * Force to Reset the link again
2211 jme_reset_link(jme);
2215 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2217 struct jme_adapter *jme = netdev_priv(netdev);
2219 spin_lock_bh(&jme->vlgrp_lock);
2221 spin_unlock_bh(&jme->vlgrp_lock);
2224 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2226 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2228 struct jme_adapter *jme = netdev_priv(netdev);
2230 spin_lock_bh(&jme->vlgrp_lock);
2232 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2233 jme->vlgrp->vlan_devices[vid] = NULL;
2235 vlan_group_set_device(jme->vlgrp, vid, NULL);
2238 spin_unlock_bh(&jme->vlgrp_lock);
2243 jme_get_drvinfo(struct net_device *netdev,
2244 struct ethtool_drvinfo *info)
2246 struct jme_adapter *jme = netdev_priv(netdev);
2248 strcpy(info->driver, DRV_NAME);
2249 strcpy(info->version, DRV_VERSION);
2250 strcpy(info->bus_info, pci_name(jme->pdev));
2254 jme_get_regs_len(struct net_device *netdev)
2260 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2264 for (i = 0 ; i < len ; i += 4)
2265 p[i >> 2] = jread32(jme, reg + i);
2269 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2272 u16 *p16 = (u16 *)p;
2274 for (i = 0 ; i < reg_nr ; ++i)
2275 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2279 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2281 struct jme_adapter *jme = netdev_priv(netdev);
2282 u32 *p32 = (u32 *)p;
2284 memset(p, 0xFF, JME_REG_LEN);
2287 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2290 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2293 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2296 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2299 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2303 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2305 struct jme_adapter *jme = netdev_priv(netdev);
2307 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2308 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2310 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2311 ecmd->use_adaptive_rx_coalesce = false;
2312 ecmd->rx_coalesce_usecs = 0;
2313 ecmd->rx_max_coalesced_frames = 0;
2317 ecmd->use_adaptive_rx_coalesce = true;
2319 switch (jme->dpi.cur) {
2321 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2322 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2325 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2326 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2329 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2330 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2340 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2342 struct jme_adapter *jme = netdev_priv(netdev);
2343 struct dynpcc_info *dpi = &(jme->dpi);
2345 if (netif_running(netdev))
2348 if (ecmd->use_adaptive_rx_coalesce &&
2349 test_bit(JME_FLAG_POLL, &jme->flags)) {
2350 clear_bit(JME_FLAG_POLL, &jme->flags);
2351 jme->jme_rx = netif_rx;
2352 jme->jme_vlan_rx = vlan_hwaccel_rx;
2354 dpi->attempt = PCC_P1;
2356 jme_set_rx_pcc(jme, PCC_P1);
2357 jme_interrupt_mode(jme);
2358 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2359 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2360 set_bit(JME_FLAG_POLL, &jme->flags);
2361 jme->jme_rx = netif_receive_skb;
2362 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2363 jme_interrupt_mode(jme);
2370 jme_get_pauseparam(struct net_device *netdev,
2371 struct ethtool_pauseparam *ecmd)
2373 struct jme_adapter *jme = netdev_priv(netdev);
2376 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2377 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2379 spin_lock_bh(&jme->phy_lock);
2380 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2381 spin_unlock_bh(&jme->phy_lock);
2384 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2388 jme_set_pauseparam(struct net_device *netdev,
2389 struct ethtool_pauseparam *ecmd)
2391 struct jme_adapter *jme = netdev_priv(netdev);
2394 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2395 (ecmd->tx_pause != 0)) {
2398 jme->reg_txpfc |= TXPFC_PF_EN;
2400 jme->reg_txpfc &= ~TXPFC_PF_EN;
2402 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2405 spin_lock_bh(&jme->rxmcs_lock);
2406 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2407 (ecmd->rx_pause != 0)) {
2410 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2412 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2414 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2416 spin_unlock_bh(&jme->rxmcs_lock);
2418 spin_lock_bh(&jme->phy_lock);
2419 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2420 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2421 (ecmd->autoneg != 0)) {
2424 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2426 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2428 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2429 MII_ADVERTISE, val);
2431 spin_unlock_bh(&jme->phy_lock);
2437 jme_get_wol(struct net_device *netdev,
2438 struct ethtool_wolinfo *wol)
2440 struct jme_adapter *jme = netdev_priv(netdev);
2442 wol->supported = WAKE_MAGIC | WAKE_PHY;
2446 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2447 wol->wolopts |= WAKE_PHY;
2449 if (jme->reg_pmcs & PMCS_MFEN)
2450 wol->wolopts |= WAKE_MAGIC;
2455 jme_set_wol(struct net_device *netdev,
2456 struct ethtool_wolinfo *wol)
2458 struct jme_adapter *jme = netdev_priv(netdev);
2460 if (wol->wolopts & (WAKE_MAGICSECURE |
2469 if (wol->wolopts & WAKE_PHY)
2470 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2472 if (wol->wolopts & WAKE_MAGIC)
2473 jme->reg_pmcs |= PMCS_MFEN;
2475 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2481 jme_get_settings(struct net_device *netdev,
2482 struct ethtool_cmd *ecmd)
2484 struct jme_adapter *jme = netdev_priv(netdev);
2487 spin_lock_bh(&jme->phy_lock);
2488 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2489 spin_unlock_bh(&jme->phy_lock);
2494 jme_set_settings(struct net_device *netdev,
2495 struct ethtool_cmd *ecmd)
2497 struct jme_adapter *jme = netdev_priv(netdev);
2500 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2503 if (jme->mii_if.force_media &&
2504 ecmd->autoneg != AUTONEG_ENABLE &&
2505 (jme->mii_if.full_duplex != ecmd->duplex))
2508 spin_lock_bh(&jme->phy_lock);
2509 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2510 spin_unlock_bh(&jme->phy_lock);
2513 jme_reset_link(jme);
2516 set_bit(JME_FLAG_SSET, &jme->flags);
2517 jme->old_ecmd = *ecmd;
2524 jme_get_link(struct net_device *netdev)
2526 struct jme_adapter *jme = netdev_priv(netdev);
2527 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2531 jme_get_msglevel(struct net_device *netdev)
2533 struct jme_adapter *jme = netdev_priv(netdev);
2534 return jme->msg_enable;
2538 jme_set_msglevel(struct net_device *netdev, u32 value)
2540 struct jme_adapter *jme = netdev_priv(netdev);
2541 jme->msg_enable = value;
2545 jme_get_rx_csum(struct net_device *netdev)
2547 struct jme_adapter *jme = netdev_priv(netdev);
2548 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2552 jme_set_rx_csum(struct net_device *netdev, u32 on)
2554 struct jme_adapter *jme = netdev_priv(netdev);
2556 spin_lock_bh(&jme->rxmcs_lock);
2558 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2560 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2561 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2562 spin_unlock_bh(&jme->rxmcs_lock);
2568 jme_set_tx_csum(struct net_device *netdev, u32 on)
2570 struct jme_adapter *jme = netdev_priv(netdev);
2573 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2574 if (netdev->mtu <= 1900)
2575 netdev->features |= NETIF_F_HW_CSUM;
2577 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2578 netdev->features &= ~NETIF_F_HW_CSUM;
2585 jme_set_tso(struct net_device *netdev, u32 on)
2587 struct jme_adapter *jme = netdev_priv(netdev);
2590 set_bit(JME_FLAG_TSO, &jme->flags);
2591 if (netdev->mtu <= 1900)
2592 netdev->features |= NETIF_F_TSO
2598 clear_bit(JME_FLAG_TSO, &jme->flags);
2599 netdev->features &= ~(NETIF_F_TSO
2610 jme_nway_reset(struct net_device *netdev)
2612 struct jme_adapter *jme = netdev_priv(netdev);
2613 jme_restart_an(jme);
2618 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2623 val = jread32(jme, JME_SMBCSR);
2624 to = JME_SMB_BUSY_TIMEOUT;
2625 while ((val & SMBCSR_BUSY) && --to) {
2627 val = jread32(jme, JME_SMBCSR);
2630 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2631 msg_hw(jme, "SMB Bus Busy.\n");
2633 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2638 jwrite32(jme, JME_SMBINTF,
2639 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2640 SMBINTF_HWRWN_READ |
2643 val = jread32(jme, JME_SMBINTF);
2644 to = JME_SMB_BUSY_TIMEOUT;
2645 while ((val & SMBINTF_HWCMD) && --to) {
2647 val = jread32(jme, JME_SMBINTF);
2650 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2651 msg_hw(jme, "SMB Bus Busy.\n");
2653 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2658 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2662 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2667 val = jread32(jme, JME_SMBCSR);
2668 to = JME_SMB_BUSY_TIMEOUT;
2669 while ((val & SMBCSR_BUSY) && --to) {
2671 val = jread32(jme, JME_SMBCSR);
2674 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2675 msg_hw(jme, "SMB Bus Busy.\n");
2677 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2682 jwrite32(jme, JME_SMBINTF,
2683 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2684 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2685 SMBINTF_HWRWN_WRITE |
2688 val = jread32(jme, JME_SMBINTF);
2689 to = JME_SMB_BUSY_TIMEOUT;
2690 while ((val & SMBINTF_HWCMD) && --to) {
2692 val = jread32(jme, JME_SMBINTF);
2695 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2696 msg_hw(jme, "SMB Bus Busy.\n");
2698 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2707 jme_get_eeprom_len(struct net_device *netdev)
2709 struct jme_adapter *jme = netdev_priv(netdev);
2711 val = jread32(jme, JME_SMBCSR);
2712 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2716 jme_get_eeprom(struct net_device *netdev,
2717 struct ethtool_eeprom *eeprom, u8 *data)
2719 struct jme_adapter *jme = netdev_priv(netdev);
2720 int i, offset = eeprom->offset, len = eeprom->len;
2723 * ethtool will check the boundary for us
2725 eeprom->magic = JME_EEPROM_MAGIC;
2726 for (i = 0 ; i < len ; ++i)
2727 data[i] = jme_smb_read(jme, i + offset);
2733 jme_set_eeprom(struct net_device *netdev,
2734 struct ethtool_eeprom *eeprom, u8 *data)
2736 struct jme_adapter *jme = netdev_priv(netdev);
2737 int i, offset = eeprom->offset, len = eeprom->len;
2739 if (eeprom->magic != JME_EEPROM_MAGIC)
2743 * ethtool will check the boundary for us
2745 for (i = 0 ; i < len ; ++i)
2746 jme_smb_write(jme, i + offset, data[i]);
2751 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2752 static struct ethtool_ops jme_ethtool_ops = {
2754 static const struct ethtool_ops jme_ethtool_ops = {
2756 .get_drvinfo = jme_get_drvinfo,
2757 .get_regs_len = jme_get_regs_len,
2758 .get_regs = jme_get_regs,
2759 .get_coalesce = jme_get_coalesce,
2760 .set_coalesce = jme_set_coalesce,
2761 .get_pauseparam = jme_get_pauseparam,
2762 .set_pauseparam = jme_set_pauseparam,
2763 .get_wol = jme_get_wol,
2764 .set_wol = jme_set_wol,
2765 .get_settings = jme_get_settings,
2766 .set_settings = jme_set_settings,
2767 .get_link = jme_get_link,
2768 .get_msglevel = jme_get_msglevel,
2769 .set_msglevel = jme_set_msglevel,
2770 .get_rx_csum = jme_get_rx_csum,
2771 .set_rx_csum = jme_set_rx_csum,
2772 .set_tx_csum = jme_set_tx_csum,
2773 .set_tso = jme_set_tso,
2774 .set_sg = ethtool_op_set_sg,
2775 .nway_reset = jme_nway_reset,
2776 .get_eeprom_len = jme_get_eeprom_len,
2777 .get_eeprom = jme_get_eeprom,
2778 .set_eeprom = jme_set_eeprom,
2782 jme_pci_dma64(struct pci_dev *pdev)
2784 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2785 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2786 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2788 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2791 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2792 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2794 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2798 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2799 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2800 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2802 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2805 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2806 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2808 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2812 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2813 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2814 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2816 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2817 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2825 jme_phy_init(struct jme_adapter *jme)
2829 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2830 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2834 jme_check_hw_ver(struct jme_adapter *jme)
2838 chipmode = jread32(jme, JME_CHIPMODE);
2840 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2841 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2844 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2845 static const struct net_device_ops jme_netdev_ops = {
2846 .ndo_open = jme_open,
2847 .ndo_stop = jme_close,
2848 .ndo_validate_addr = eth_validate_addr,
2849 .ndo_start_xmit = jme_start_xmit,
2850 .ndo_set_mac_address = jme_set_macaddr,
2851 .ndo_set_multicast_list = jme_set_multi,
2852 .ndo_change_mtu = jme_change_mtu,
2853 .ndo_tx_timeout = jme_tx_timeout,
2854 .ndo_vlan_rx_register = jme_vlan_rx_register,
2858 static int __devinit
2859 jme_init_one(struct pci_dev *pdev,
2860 const struct pci_device_id *ent)
2862 int rc = 0, using_dac, i;
2863 struct net_device *netdev;
2864 struct jme_adapter *jme;
2869 * set up PCI device basics
2871 rc = pci_enable_device(pdev);
2873 jeprintk(pdev, "Cannot enable PCI device.\n");
2877 using_dac = jme_pci_dma64(pdev);
2878 if (using_dac < 0) {
2879 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
2881 goto err_out_disable_pdev;
2884 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2885 jeprintk(pdev, "No PCI resource region found.\n");
2887 goto err_out_disable_pdev;
2890 rc = pci_request_regions(pdev, DRV_NAME);
2892 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
2893 goto err_out_disable_pdev;
2896 pci_set_master(pdev);
2899 * alloc and init net device
2901 netdev = alloc_etherdev(sizeof(*jme));
2903 jeprintk(pdev, "Cannot allocate netdev structure.\n");
2905 goto err_out_release_regions;
2907 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2908 netdev->netdev_ops = &jme_netdev_ops;
2910 netdev->open = jme_open;
2911 netdev->stop = jme_close;
2912 netdev->hard_start_xmit = jme_start_xmit;
2913 netdev->set_mac_address = jme_set_macaddr;
2914 netdev->set_multicast_list = jme_set_multi;
2915 netdev->change_mtu = jme_change_mtu;
2916 netdev->tx_timeout = jme_tx_timeout;
2917 netdev->vlan_rx_register = jme_vlan_rx_register;
2918 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2919 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2921 NETDEV_GET_STATS(netdev, &jme_get_stats);
2923 netdev->ethtool_ops = &jme_ethtool_ops;
2924 netdev->watchdog_timeo = TX_TIMEOUT;
2925 netdev->features = NETIF_F_HW_CSUM |
2931 NETIF_F_HW_VLAN_TX |
2934 netdev->features |= NETIF_F_HIGHDMA;
2936 SET_NETDEV_DEV(netdev, &pdev->dev);
2937 pci_set_drvdata(pdev, netdev);
2942 jme = netdev_priv(netdev);
2945 jme->jme_rx = netif_rx;
2946 jme->jme_vlan_rx = vlan_hwaccel_rx;
2947 jme->old_mtu = netdev->mtu = 1500;
2949 jme->tx_ring_size = 1 << 10;
2950 jme->tx_ring_mask = jme->tx_ring_size - 1;
2951 jme->tx_wake_threshold = 1 << 9;
2952 jme->rx_ring_size = 1 << 9;
2953 jme->rx_ring_mask = jme->rx_ring_size - 1;
2954 jme->msg_enable = JME_DEF_MSG_ENABLE;
2955 jme->regs = ioremap(pci_resource_start(pdev, 0),
2956 pci_resource_len(pdev, 0));
2958 jeprintk(pdev, "Mapping PCI resource region error.\n");
2960 goto err_out_free_netdev;
2964 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2965 jwrite32(jme, JME_APMC, apmc);
2966 } else if (force_pseudohp) {
2967 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2968 jwrite32(jme, JME_APMC, apmc);
2971 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
2973 spin_lock_init(&jme->phy_lock);
2974 spin_lock_init(&jme->macaddr_lock);
2975 spin_lock_init(&jme->rxmcs_lock);
2976 spin_lock_init(&jme->vlgrp_lock);
2978 atomic_set(&jme->link_changing, 1);
2979 atomic_set(&jme->rx_cleaning, 1);
2980 atomic_set(&jme->tx_cleaning, 1);
2981 atomic_set(&jme->rx_empty, 1);
2983 tasklet_init(&jme->pcc_task,
2985 (unsigned long) jme);
2986 tasklet_init(&jme->linkch_task,
2987 jme_link_change_tasklet,
2988 (unsigned long) jme);
2989 tasklet_init(&jme->txclean_task,
2990 jme_tx_clean_tasklet,
2991 (unsigned long) jme);
2992 tasklet_init(&jme->rxclean_task,
2993 jme_rx_clean_tasklet,
2994 (unsigned long) jme);
2995 tasklet_init(&jme->rxempty_task,
2996 jme_rx_empty_tasklet,
2997 (unsigned long) jme);
2998 tasklet_disable_nosync(&jme->linkch_task);
2999 tasklet_disable_nosync(&jme->txclean_task);
3000 tasklet_disable_nosync(&jme->rxclean_task);
3001 tasklet_disable_nosync(&jme->rxempty_task);
3002 jme->dpi.cur = PCC_P1;
3005 jme->reg_rxcs = RXCS_DEFAULT;
3006 jme->reg_rxmcs = RXMCS_DEFAULT;
3008 jme->reg_pmcs = PMCS_MFEN;
3009 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3010 set_bit(JME_FLAG_TSO, &jme->flags);
3013 * Get Max Read Req Size from PCI Config Space
3015 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3016 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3017 switch (jme->mrrs) {
3019 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3022 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3025 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3030 * Must check before reset_mac_processor
3032 jme_check_hw_ver(jme);
3033 jme->mii_if.dev = netdev;
3035 jme->mii_if.phy_id = 0;
3036 for (i = 1 ; i < 32 ; ++i) {
3037 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3038 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3039 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3040 jme->mii_if.phy_id = i;
3045 if (!jme->mii_if.phy_id) {
3047 jeprintk(pdev, "Can not find phy_id.\n");
3051 jme->reg_ghc |= GHC_LINK_POLL;
3053 jme->mii_if.phy_id = 1;
3055 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3056 jme->mii_if.supports_gmii = true;
3058 jme->mii_if.supports_gmii = false;
3059 jme->mii_if.mdio_read = jme_mdio_read;
3060 jme->mii_if.mdio_write = jme_mdio_write;
3063 jme_set_phyfifoa(jme);
3064 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3070 * Reset MAC processor and reload EEPROM for MAC Address
3072 jme_reset_mac_processor(jme);
3073 rc = jme_reload_eeprom(jme);
3076 "Reload eeprom for reading MAC Address error.\n");
3079 jme_load_macaddr(netdev);
3082 * Tell stack that we are not ready to work until open()
3084 netif_carrier_off(netdev);
3085 netif_stop_queue(netdev);
3090 rc = register_netdev(netdev);
3092 jeprintk(pdev, "Cannot register net device.\n");
3096 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3097 msg_probe(jme, "%s%s ver:%x rev:%x "
3098 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3099 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3100 "JMC250 Gigabit Ethernet" :
3101 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3102 "JMC260 Fast Ethernet" : "Unknown",
3103 (jme->fpgaver != 0) ? " (FPGA)" : "",
3104 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3106 netdev->dev_addr[0],
3107 netdev->dev_addr[1],
3108 netdev->dev_addr[2],
3109 netdev->dev_addr[3],
3110 netdev->dev_addr[4],
3111 netdev->dev_addr[5]);
3113 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3114 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3115 "JMC250 Gigabit Ethernet" :
3116 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3117 "JMC260 Fast Ethernet" : "Unknown",
3118 (jme->fpgaver != 0) ? " (FPGA)" : "",
3119 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3120 jme->rev, netdev->dev_addr);
3127 err_out_free_netdev:
3128 pci_set_drvdata(pdev, NULL);
3129 free_netdev(netdev);
3130 err_out_release_regions:
3131 pci_release_regions(pdev);
3132 err_out_disable_pdev:
3133 pci_disable_device(pdev);
3138 static void __devexit
3139 jme_remove_one(struct pci_dev *pdev)
3141 struct net_device *netdev = pci_get_drvdata(pdev);
3142 struct jme_adapter *jme = netdev_priv(netdev);
3144 unregister_netdev(netdev);
3146 pci_set_drvdata(pdev, NULL);
3147 free_netdev(netdev);
3148 pci_release_regions(pdev);
3149 pci_disable_device(pdev);
3155 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3157 struct net_device *netdev = pci_get_drvdata(pdev);
3158 struct jme_adapter *jme = netdev_priv(netdev);
3160 atomic_dec(&jme->link_changing);
3162 netif_device_detach(netdev);
3163 netif_stop_queue(netdev);
3166 tasklet_disable(&jme->txclean_task);
3167 tasklet_disable(&jme->rxclean_task);
3168 tasklet_disable(&jme->rxempty_task);
3170 if (netif_carrier_ok(netdev)) {
3171 if (test_bit(JME_FLAG_POLL, &jme->flags))
3172 jme_polling_mode(jme);
3174 jme_stop_pcc_timer(jme);
3175 jme_reset_ghc_speed(jme);
3176 jme_disable_rx_engine(jme);
3177 jme_disable_tx_engine(jme);
3178 jme_reset_mac_processor(jme);
3179 jme_free_rx_resources(jme);
3180 jme_free_tx_resources(jme);
3181 netif_carrier_off(netdev);
3185 tasklet_enable(&jme->txclean_task);
3186 tasklet_hi_enable(&jme->rxclean_task);
3187 tasklet_hi_enable(&jme->rxempty_task);
3189 pci_save_state(pdev);
3190 if (jme->reg_pmcs) {
3191 jme_set_100m_half(jme);
3193 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3196 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3198 pci_enable_wake(pdev, PCI_D3cold, true);
3202 pci_set_power_state(pdev, PCI_D3cold);
3208 jme_resume(struct pci_dev *pdev)
3210 struct net_device *netdev = pci_get_drvdata(pdev);
3211 struct jme_adapter *jme = netdev_priv(netdev);
3214 pci_restore_state(pdev);
3216 if (test_bit(JME_FLAG_SSET, &jme->flags))
3217 jme_set_settings(netdev, &jme->old_ecmd);
3219 jme_reset_phy_processor(jme);
3222 netif_device_attach(netdev);
3224 atomic_inc(&jme->link_changing);
3226 jme_reset_link(jme);
3232 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3233 static struct pci_device_id jme_pci_tbl[] = {
3235 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3237 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3238 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3242 static struct pci_driver jme_driver = {
3244 .id_table = jme_pci_tbl,
3245 .probe = jme_init_one,
3246 .remove = __devexit_p(jme_remove_one),
3248 .suspend = jme_suspend,
3249 .resume = jme_resume,
3250 #endif /* CONFIG_PM */
3254 jme_init_module(void)
3256 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
3257 "driver version %s\n", DRV_VERSION);
3258 return pci_register_driver(&jme_driver);
3262 jme_cleanup_module(void)
3264 pci_unregister_driver(&jme_driver);
3267 module_init(jme_init_module);
3268 module_exit(jme_cleanup_module);
3270 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3271 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3272 MODULE_LICENSE("GPL");
3273 MODULE_VERSION(DRV_VERSION);
3274 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);