jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  *
   7  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  */
  23
  24 /*
  25  * TODO:
  26  *      -  Decode register dump for ethtool.
  27  */
  28
  29 #include <linux/version.h>
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include "jme.h"
  47
  48 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
  49 static struct net_device_stats *
  50 jme_get_stats(struct net_device *netdev)
  51 {
  52         struct jme_adapter *jme = netdev_priv(netdev);
  53         return &jme->stats;
  54 }
  55 #endif
  56
  57 static int
  58 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  59 {
  60         struct jme_adapter *jme = netdev_priv(netdev);
  61         int i, val, again = (reg == MII_BMSR)?1:0;
  62
  63 read_again:
  64         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  65                                 smi_phy_addr(phy) |
  66                                 smi_reg_addr(reg));
  67
  68         wmb();
  69         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  70                 udelay(20);
  71                 val = jread32(jme, JME_SMI);
  72                 if ((val & SMI_OP_REQ) == 0)
  73                         break;
  74         }
  75
  76         if (i == 0) {
  77                 jeprintk("jme", "phy(%d) read timeout : %d\n", phy, reg);
  78                 return 0;
  79         }
  80
  81         if(again--)
  82                 goto read_again;
  83
  84         return ((val & SMI_DATA_MASK) >> SMI_DATA_SHIFT);
  85 }
  86
  87 static void
  88 jme_mdio_write(struct net_device *netdev,
  89                                 int phy, int reg, int val)
  90 {
  91         struct jme_adapter *jme = netdev_priv(netdev);
  92         int i;
  93
  94         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
  95                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
  96                 smi_phy_addr(phy) | smi_reg_addr(reg));
  97
  98         wmb();
  99         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 100                 udelay(20);
 101                 val = jread32(jme, JME_SMI);
 102                 if ((val & SMI_OP_REQ) == 0)
 103                         break;
 104         }
 105
 106         if (i == 0)
 107                 jeprintk("jme", "phy(%d) write timeout : %d\n", phy, reg);
 108
 109         return;
 110 }
 111
 112 __always_inline static void
 113 jme_reset_phy_processor(struct jme_adapter *jme)
 114 {
 115         __u32 val;
 116
 117         jme_mdio_write(jme->dev,
 118                         jme->mii_if.phy_id,
 119                         MII_ADVERTISE, ADVERTISE_ALL |
 120                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 121
 122         jme_mdio_write(jme->dev,
 123                         jme->mii_if.phy_id,
 124                         MII_CTRL1000,
 125                         ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 126
 127         val = jme_mdio_read(jme->dev,
 128                                 jme->mii_if.phy_id,
 129                                 MII_BMCR);
 130
 131         jme_mdio_write(jme->dev,
 132                         jme->mii_if.phy_id,
 133                         MII_BMCR, val | BMCR_RESET);
 134
 135         return;
 136 }
 137
 138 static void
 139 jme_setup_wakeup_frame(struct jme_adapter *jme,
 140                 __u32 *mask, __u32 crc, int fnr)
 141 {
 142         int i;
 143
 144         /*
 145          * Setup CRC pattern
 146          */
 147         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 148         wmb();
 149         jwrite32(jme, JME_WFODP, crc);
 150         wmb();
 151
 152         /*
 153          * Setup Mask
 154          */
 155         for(i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 156                 jwrite32(jme, JME_WFOI,
 157                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 158                                 (fnr & WFOI_FRAME_SEL));
 159                 wmb();
 160                 jwrite32(jme, JME_WFODP, mask[i]);
 161                 wmb();
 162         }
 163 }
 164
 165 __always_inline static void
 166 jme_reset_mac_processor(struct jme_adapter *jme)
 167 {
 168         __u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0,0,0,0};
 169         __u32 crc = 0xCDCDCDCD;
 170         __u32 gpreg0;
 171         int i;
 172
 173         jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
 174         udelay(2);
 175         jwrite32(jme, JME_GHC, jme->reg_ghc);
 176         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 177         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 178         for(i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 179                 jme_setup_wakeup_frame(jme, mask, crc, i);
 180         if(jme->fpgaver)
 181                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 182         else
 183                 gpreg0 = GPREG0_DEFAULT;
 184         jwrite32(jme, JME_GPREG0, gpreg0);
 185         jwrite32(jme, JME_GPREG1, 0);
 186 }
 187
 188 __always_inline static void
 189 jme_clear_pm(struct jme_adapter *jme)
 190 {
 191         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 192         pci_set_power_state(jme->pdev, PCI_D0);
 193         pci_enable_wake(jme->pdev, PCI_D0, false);
 194 }
 195
 196 static int
 197 jme_reload_eeprom(struct jme_adapter *jme)
 198 {
 199         __u32 val;
 200         int i;
 201
 202         val = jread32(jme, JME_SMBCSR);
 203
 204         if(val & SMBCSR_EEPROMD)
 205         {
 206                 val |= SMBCSR_CNACK;
 207                 jwrite32(jme, JME_SMBCSR, val);
 208                 val |= SMBCSR_RELOAD;
 209                 jwrite32(jme, JME_SMBCSR, val);
 210                 mdelay(12);
 211
 212                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i)
 213                 {
 214                         mdelay(1);
 215                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 216                                 break;
 217                 }
 218
 219                 if(i == 0) {
 220                         jeprintk("jme", "eeprom reload timeout\n");
 221                         return -EIO;
 222                 }
 223         }
 224
 225         return 0;
 226 }
 227
 228 static void
 229 jme_load_macaddr(struct net_device *netdev)
 230 {
 231         struct jme_adapter *jme = netdev_priv(netdev);
 232         unsigned char macaddr[6];
 233         __u32 val;
 234
 235         spin_lock(&jme->macaddr_lock);
 236         val = jread32(jme, JME_RXUMA_LO);
 237         macaddr[0] = (val >>  0) & 0xFF;
 238         macaddr[1] = (val >>  8) & 0xFF;
 239         macaddr[2] = (val >> 16) & 0xFF;
 240         macaddr[3] = (val >> 24) & 0xFF;
 241         val = jread32(jme, JME_RXUMA_HI);
 242         macaddr[4] = (val >>  0) & 0xFF;
 243         macaddr[5] = (val >>  8) & 0xFF;
 244         memcpy(netdev->dev_addr, macaddr, 6);
 245         spin_unlock(&jme->macaddr_lock);
 246 }
 247
 248 __always_inline static void
 249 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 250 {
 251         switch(p) {
 252         case PCC_OFF:
 253                 jwrite32(jme, JME_PCCRX0,
 254                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 255                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 256                 break;
 257         case PCC_P1:
 258                 jwrite32(jme, JME_PCCRX0,
 259                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 260                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 261                 break;
 262         case PCC_P2:
 263                 jwrite32(jme, JME_PCCRX0,
 264                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 265                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 266                 break;
 267         case PCC_P3:
 268                 jwrite32(jme, JME_PCCRX0,
 269                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 270                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 271                 break;
 272         default:
 273                 break;
 274         }
 275         wmb();
 276
 277         if(!(jme->flags & JME_FLAG_POLL))
 278                 dprintk(jme->dev->name, "Switched to PCC_P%d\n", p);
 279 }
 280
 281 static void
 282 jme_start_irq(struct jme_adapter *jme)
 283 {
 284         register struct dynpcc_info *dpi = &(jme->dpi);
 285
 286         jme_set_rx_pcc(jme, PCC_P1);
 287         dpi->cur                = PCC_P1;
 288         dpi->attempt            = PCC_P1;
 289         dpi->cnt                = 0;
 290
 291         jwrite32(jme, JME_PCCTX,
 292                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 293                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 294                         PCCTXQ0_EN
 295                 );
 296
 297         /*
 298          * Enable Interrupts
 299          */
 300         jwrite32(jme, JME_IENS, INTR_ENABLE);
 301 }
 302
 303 __always_inline static void
 304 jme_stop_irq(struct jme_adapter *jme)
 305 {
 306         /*
 307          * Disable Interrupts
 308          */
 309         jwrite32(jme, JME_IENC, INTR_ENABLE);
 310 }
 311
 312
 313 __always_inline static void
 314 jme_enable_shadow(struct jme_adapter *jme)
 315 {
 316         jwrite32(jme,
 317                  JME_SHBA_LO,
 318                  ((__u32)jme->shadow_dma & ~((__u32)0x1F)) | SHBA_POSTEN);
 319 }
 320
 321 __always_inline static void
 322 jme_disable_shadow(struct jme_adapter *jme)
 323 {
 324         jwrite32(jme, JME_SHBA_LO, 0x0);
 325 }
 326
 327 static __u32
 328 jme_linkstat_from_phy(struct jme_adapter *jme)
 329 {
 330         __u32 phylink, bmsr;
 331
 332         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 333         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 334         if(bmsr & BMCR_ANCOMP)
 335                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 336
 337         return phylink;
 338 }
 339
 340 static int
 341 jme_check_link(struct net_device *netdev, int testonly)
 342 {
 343         struct jme_adapter *jme = netdev_priv(netdev);
 344         __u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 345         char linkmsg[64];
 346         int rc = 0;
 347
 348         linkmsg[0] = '\0';
 349
 350         if(jme->fpgaver)
 351                 phylink = jme_linkstat_from_phy(jme);
 352         else
 353                 phylink = jread32(jme, JME_PHY_LINK);
 354
 355         if (phylink & PHY_LINK_UP) {
 356                 if(!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 357                         /*
 358                          * If we did not enable AN
 359                          * Speed/Duplex Info should be obtained from SMI
 360                          */
 361                         phylink = PHY_LINK_UP;
 362
 363                         bmcr = jme_mdio_read(jme->dev,
 364                                                 jme->mii_if.phy_id,
 365                                                 MII_BMCR);
 366
 367
 368                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 369                                         (bmcr & BMCR_SPEED100) == 0) ?
 370                                         PHY_LINK_SPEED_1000M :
 371                                         (bmcr & BMCR_SPEED100) ?
 372                                         PHY_LINK_SPEED_100M :
 373                                         PHY_LINK_SPEED_10M;
 374
 375                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 376                                          PHY_LINK_DUPLEX : 0;
 377
 378                         strcat(linkmsg, "Forced: ");
 379                 }
 380                 else {
 381                         /*
 382                          * Keep polling for speed/duplex resolve complete
 383                          */
 384                         while(!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 385                                 --cnt) {
 386
 387                                 udelay(1);
 388
 389                                 if(jme->fpgaver)
 390                                         phylink = jme_linkstat_from_phy(jme);
 391                                 else
 392                                         phylink = jread32(jme, JME_PHY_LINK);
 393                         }
 394
 395                         if(!cnt)
 396                                 jeprintk(netdev->name,
 397                                         "Waiting speed resolve timeout.\n");
 398
 399                         strcat(linkmsg, "ANed: ");
 400                 }
 401
 402                 if(jme->phylink == phylink) {
 403                         rc = 1;
 404                         goto out;
 405                 }
 406                 if(testonly)
 407                         goto out;
 408
 409                 jme->phylink = phylink;
 410
 411                 ghc = jme->reg_ghc & ~(GHC_SPEED_10M |
 412                                         GHC_SPEED_100M |
 413                                         GHC_SPEED_1000M |
 414                                         GHC_DPX);
 415                 switch(phylink & PHY_LINK_SPEED_MASK) {
 416                         case PHY_LINK_SPEED_10M:
 417                                 ghc |= GHC_SPEED_10M;
 418                                 strcat(linkmsg, "10 Mbps, ");
 419                                 break;
 420                         case PHY_LINK_SPEED_100M:
 421                                 ghc |= GHC_SPEED_100M;
 422                                 strcat(linkmsg, "100 Mbps, ");
 423                                 break;
 424                         case PHY_LINK_SPEED_1000M:
 425                                 ghc |= GHC_SPEED_1000M;
 426                                 strcat(linkmsg, "1000 Mbps, ");
 427                                 break;
 428                         default:
 429                                 break;
 430                 }
 431                 ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0;
 432
 433                 strcat(linkmsg, (phylink &PHY_LINK_DUPLEX) ?
 434                                         "Full-Duplex, " :
 435                                         "Half-Duplex, ");
 436
 437                 if(phylink & PHY_LINK_MDI_STAT)
 438                         strcat(linkmsg, "MDI-X");
 439                 else
 440                         strcat(linkmsg, "MDI");
 441
 442                 if(phylink & PHY_LINK_DUPLEX)
 443                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 444                 else {
 445                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 446                                                 TXMCS_BACKOFF |
 447                                                 TXMCS_CARRIERSENSE |
 448                                                 TXMCS_COLLISION);
 449                         jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
 450                                 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
 451                                 TXTRHD_TXREN |
 452                                 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
 453                 }
 454
 455                 jme->reg_ghc = ghc;
 456                 jwrite32(jme, JME_GHC, ghc);
 457
 458                 jprintk(netdev->name, "Link is up at %s.\n", linkmsg);
 459                 netif_carrier_on(netdev);
 460         }
 461         else {
 462                 if(testonly)
 463                         goto out;
 464
 465                 jprintk(netdev->name, "Link is down.\n");
 466                 jme->phylink = 0;
 467                 netif_carrier_off(netdev);
 468         }
 469
 470 out:
 471         return rc;
 472 }
 473
 474 static int
 475 jme_setup_tx_resources(struct jme_adapter *jme)
 476 {
 477         struct jme_ring *txring = &(jme->txring[0]);
 478
 479         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 480                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 481                                    &(txring->dmaalloc),
 482                                    GFP_ATOMIC);
 483
 484         if(!txring->alloc) {
 485                 txring->desc = NULL;
 486                 txring->dmaalloc = 0;
 487                 txring->dma = 0;
 488                 return -ENOMEM;
 489         }
 490
 491         /*
 492          * 16 Bytes align
 493          */
 494         txring->desc            = (void*)ALIGN((unsigned long)(txring->alloc),
 495                                                 RING_DESC_ALIGN);
 496         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 497         txring->next_to_use     = 0;
 498         atomic_set(&txring->next_to_clean, 0);
 499         atomic_set(&txring->nr_free, jme->tx_ring_size);
 500
 501         /*
 502          * Initialize Transmit Descriptors
 503          */
 504         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 505         memset(txring->bufinf, 0,
 506                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 507
 508         return 0;
 509 }
 510
 511 static void
 512 jme_free_tx_resources(struct jme_adapter *jme)
 513 {
 514         int i;
 515         struct jme_ring *txring = &(jme->txring[0]);
 516         struct jme_buffer_info *txbi = txring->bufinf;
 517
 518         if(txring->alloc) {
 519                 for(i = 0 ; i < jme->tx_ring_size ; ++i) {
 520                         txbi = txring->bufinf + i;
 521                         if(txbi->skb) {
 522                                 dev_kfree_skb(txbi->skb);
 523                                 txbi->skb = NULL;
 524                         }
 525                         txbi->mapping   = 0;
 526                         txbi->len       = 0;
 527                         txbi->nr_desc   = 0;
 528                 }
 529
 530                 dma_free_coherent(&(jme->pdev->dev),
 531                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 532                                   txring->alloc,
 533                                   txring->dmaalloc);
 534
 535                 txring->alloc           = NULL;
 536                 txring->desc            = NULL;
 537                 txring->dmaalloc        = 0;
 538                 txring->dma             = 0;
 539         }
 540         txring->next_to_use     = 0;
 541         atomic_set(&txring->next_to_clean, 0);
 542         atomic_set(&txring->nr_free, 0);
 543
 544 }
 545
 546 __always_inline static void
 547 jme_enable_tx_engine(struct jme_adapter *jme)
 548 {
 549         /*
 550          * Select Queue 0
 551          */
 552         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 553
 554         /*
 555          * Setup TX Queue 0 DMA Bass Address
 556          */
 557         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 558         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 559         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 560
 561         /*
 562          * Setup TX Descptor Count
 563          */
 564         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 565
 566         /*
 567          * Enable TX Engine
 568          */
 569         wmb();
 570         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 571                                 TXCS_SELECT_QUEUE0 |
 572                                 TXCS_ENABLE);
 573
 574 }
 575
 576 __always_inline static void
 577 jme_restart_tx_engine(struct jme_adapter *jme)
 578 {
 579         /*
 580          * Restart TX Engine
 581          */
 582         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 583                                 TXCS_SELECT_QUEUE0 |
 584                                 TXCS_ENABLE);
 585 }
 586
 587 __always_inline static void
 588 jme_disable_tx_engine(struct jme_adapter *jme)
 589 {
 590         int i;
 591         __u32 val;
 592
 593         /*
 594          * Disable TX Engine
 595          */
 596         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 597
 598         val = jread32(jme, JME_TXCS);
 599         for(i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i)
 600         {
 601                 mdelay(1);
 602                 val = jread32(jme, JME_TXCS);
 603         }
 604
 605         if(!i) {
 606                 jeprintk(jme->dev->name, "Disable TX engine timeout.\n");
 607                 jme_reset_mac_processor(jme);
 608         }
 609
 610
 611 }
 612
 613 static void
 614 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 615 {
 616         struct jme_ring *rxring = jme->rxring;
 617         register volatile struct rxdesc* rxdesc = rxring->desc;
 618         struct jme_buffer_info *rxbi = rxring->bufinf;
 619         rxdesc += i;
 620         rxbi += i;
 621
 622         rxdesc->dw[0] = 0;
 623         rxdesc->dw[1] = 0;
 624         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 625         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 626                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 627         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 628         if(jme->dev->features & NETIF_F_HIGHDMA)
 629                 rxdesc->desc1.flags = RXFLAG_64BIT;
 630         wmb();
 631         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 632 }
 633
 634 static int
 635 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 636 {
 637         struct jme_ring *rxring = &(jme->rxring[0]);
 638         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 639         unsigned long offset;
 640         struct sk_buff* skb;
 641
 642         skb = netdev_alloc_skb(jme->dev,
 643                 jme->dev->mtu + RX_EXTRA_LEN);
 644         if(unlikely(!skb))
 645                 return -ENOMEM;
 646
 647         if(unlikely(offset =
 648                         (unsigned long)(skb->data)
 649                         & ((unsigned long)RX_BUF_DMA_ALIGN - 1)))
 650                 skb_reserve(skb, RX_BUF_DMA_ALIGN - offset);
 651
 652         rxbi->skb = skb;
 653         rxbi->len = skb_tailroom(skb);
 654         rxbi->mapping = pci_map_page(jme->pdev,
 655                                         virt_to_page(skb->data),
 656                                         offset_in_page(skb->data),
 657                                         rxbi->len,
 658                                         PCI_DMA_FROMDEVICE);
 659
 660         return 0;
 661 }
 662
 663 static void
 664 jme_free_rx_buf(struct jme_adapter *jme, int i)
 665 {
 666         struct jme_ring *rxring = &(jme->rxring[0]);
 667         struct jme_buffer_info *rxbi = rxring->bufinf;
 668         rxbi += i;
 669
 670         if(rxbi->skb) {
 671                 pci_unmap_page(jme->pdev,
 672                                  rxbi->mapping,
 673                                  rxbi->len,
 674                                  PCI_DMA_FROMDEVICE);
 675                 dev_kfree_skb(rxbi->skb);
 676                 rxbi->skb = NULL;
 677                 rxbi->mapping = 0;
 678                 rxbi->len = 0;
 679         }
 680 }
 681
 682 static void
 683 jme_free_rx_resources(struct jme_adapter *jme)
 684 {
 685         int i;
 686         struct jme_ring *rxring = &(jme->rxring[0]);
 687
 688         if(rxring->alloc) {
 689                 for(i = 0 ; i < jme->rx_ring_size ; ++i)
 690                         jme_free_rx_buf(jme, i);
 691
 692                 dma_free_coherent(&(jme->pdev->dev),
 693                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 694                                   rxring->alloc,
 695                                   rxring->dmaalloc);
 696                 rxring->alloc    = NULL;
 697                 rxring->desc     = NULL;
 698                 rxring->dmaalloc = 0;
 699                 rxring->dma      = 0;
 700         }
 701         rxring->next_to_use   = 0;
 702         atomic_set(&rxring->next_to_clean, 0);
 703 }
 704
 705 static int
 706 jme_setup_rx_resources(struct jme_adapter *jme)
 707 {
 708         int i;
 709         struct jme_ring *rxring = &(jme->rxring[0]);
 710
 711         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 712                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 713                                    &(rxring->dmaalloc),
 714                                    GFP_ATOMIC);
 715         if(!rxring->alloc) {
 716                 rxring->desc = NULL;
 717                 rxring->dmaalloc = 0;
 718                 rxring->dma = 0;
 719                 return -ENOMEM;
 720         }
 721
 722         /*
 723          * 16 Bytes align
 724          */
 725         rxring->desc            = (void*)ALIGN((unsigned long)(rxring->alloc),
 726                                                 RING_DESC_ALIGN);
 727         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 728         rxring->next_to_use     = 0;
 729         atomic_set(&rxring->next_to_clean, 0);
 730
 731         /*
 732          * Initiallize Receive Descriptors
 733          */
 734         for(i = 0 ; i < jme->rx_ring_size ; ++i) {
 735                 if(unlikely(jme_make_new_rx_buf(jme, i))) {
 736                         jme_free_rx_resources(jme);
 737                         return -ENOMEM;
 738                 }
 739
 740                 jme_set_clean_rxdesc(jme, i);
 741         }
 742
 743         return 0;
 744 }
 745
 746 __always_inline static void
 747 jme_enable_rx_engine(struct jme_adapter *jme)
 748 {
 749         /*
 750          * Setup RX DMA Bass Address
 751          */
 752         jwrite32(jme, JME_RXDBA_LO, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL);
 753         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 754         jwrite32(jme, JME_RXNDA, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL);
 755
 756         /*
 757          * Setup RX Descriptor Count
 758          */
 759         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 760
 761         /*
 762          * Setup Unicast Filter
 763          */
 764         jme_set_multi(jme->dev);
 765
 766         /*
 767          * Enable RX Engine
 768          */
 769         wmb();
 770         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 771                                 RXCS_QUEUESEL_Q0 |
 772                                 RXCS_ENABLE |
 773                                 RXCS_QST);
 774 }
 775
 776 __always_inline static void
 777 jme_restart_rx_engine(struct jme_adapter *jme)
 778 {
 779         /*
 780          * Start RX Engine
 781          */
 782         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 783                                 RXCS_QUEUESEL_Q0 |
 784                                 RXCS_ENABLE |
 785                                 RXCS_QST);
 786 }
 787
 788
 789 __always_inline static void
 790 jme_disable_rx_engine(struct jme_adapter *jme)
 791 {
 792         int i;
 793         __u32 val;
 794
 795         /*
 796          * Disable RX Engine
 797          */
 798         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 799
 800         val = jread32(jme, JME_RXCS);
 801         for(i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i)
 802         {
 803                 mdelay(1);
 804                 val = jread32(jme, JME_RXCS);
 805         }
 806
 807         if(!i)
 808                 jeprintk(jme->dev->name, "Disable RX engine timeout.\n");
 809
 810 }
 811
 812 static int
 813 jme_rxsum_ok(struct jme_adapter *jme, __u16 flags)
 814 {
 815         if(!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
 816                 return false;
 817
 818         if(unlikely((flags & RXWBFLAG_TCPON) &&
 819         !(flags & RXWBFLAG_TCPCS))) {
 820                 csum_dbg(jme->dev->name, "TCP Checksum error.\n");
 821                 goto out_sumerr;
 822         }
 823
 824         if(unlikely((flags & RXWBFLAG_UDPON) &&
 825         !(flags & RXWBFLAG_UDPCS))) {
 826                 csum_dbg(jme->dev->name, "UDP Checksum error.\n");
 827                 goto out_sumerr;
 828         }
 829
 830         if(unlikely((flags & RXWBFLAG_IPV4) &&
 831         !(flags & RXWBFLAG_IPCS))) {
 832                 csum_dbg(jme->dev->name, "IPv4 Checksum error.\n");
 833                 goto out_sumerr;
 834         }
 835
 836         return true;
 837
 838 out_sumerr:
 839         csum_dbg(jme->dev->name, "%s%s%s%s\n",
 840                 (flags & RXWBFLAG_IPV4)?"IPv4 ":"",
 841                 (flags & RXWBFLAG_IPV6)?"IPv6 ":"",
 842                 (flags & RXWBFLAG_UDPON)?"UDP ":"",
 843                 (flags & RXWBFLAG_TCPON)?"TCP":"");
 844         return false;
 845 }
 846
 847 static void
 848 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 849 {
 850         struct jme_ring *rxring = &(jme->rxring[0]);
 851         volatile struct rxdesc *rxdesc = rxring->desc;
 852         struct jme_buffer_info *rxbi = rxring->bufinf;
 853         struct sk_buff *skb;
 854         int framesize;
 855
 856         rxdesc += idx;
 857         rxbi += idx;
 858
 859         skb = rxbi->skb;
 860         pci_dma_sync_single_for_cpu(jme->pdev,
 861                                         rxbi->mapping,
 862                                         rxbi->len,
 863                                         PCI_DMA_FROMDEVICE);
 864
 865         if(unlikely(jme_make_new_rx_buf(jme, idx))) {
 866                 pci_dma_sync_single_for_device(jme->pdev,
 867                                                 rxbi->mapping,
 868                                                 rxbi->len,
 869                                                 PCI_DMA_FROMDEVICE);
 870
 871                 ++(NET_STAT(jme).rx_dropped);
 872         }
 873         else {
 874                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
 875                                 - RX_PREPAD_SIZE;
 876
 877                 skb_reserve(skb, RX_PREPAD_SIZE);
 878                 skb_put(skb, framesize);
 879                 skb->protocol = eth_type_trans(skb, jme->dev);
 880
 881                 if(jme_rxsum_ok(jme, rxdesc->descwb.flags))
 882                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 883                 else
 884                         skb->ip_summed = CHECKSUM_NONE;
 885
 886
 887                 if(rxdesc->descwb.flags & RXWBFLAG_TAGON) {
 888                         vlan_dbg(jme->dev->name, "VLAN: %04x\n",
 889                                         rxdesc->descwb.vlan);
 890                         if(jme->vlgrp) {
 891                                 vlan_dbg(jme->dev->name,
 892                                         "VLAN Passed to kernel.\n");
 893                                 jme->jme_vlan_rx(skb, jme->vlgrp,
 894                                         le32_to_cpu(rxdesc->descwb.vlan));
 895                                 NET_STAT(jme).rx_bytes += 4;
 896                         }
 897                 }
 898                 else {
 899                         jme->jme_rx(skb);
 900                 }
 901
 902                 if((le16_to_cpu(rxdesc->descwb.flags) & RXWBFLAG_DEST) ==
 903                                 RXWBFLAG_DEST_MUL)
 904                         ++(NET_STAT(jme).multicast);
 905
 906                 jme->dev->last_rx = jiffies;
 907                 NET_STAT(jme).rx_bytes += framesize;
 908                 ++(NET_STAT(jme).rx_packets);
 909         }
 910
 911         jme_set_clean_rxdesc(jme, idx);
 912
 913 }
 914
 915
 916
 917 static int
 918 jme_process_receive(struct jme_adapter *jme, int limit)
 919 {
 920         struct jme_ring *rxring = &(jme->rxring[0]);
 921         volatile struct rxdesc *rxdesc = rxring->desc;
 922         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
 923
 924         if(unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
 925                 goto out_inc;
 926
 927         if(unlikely(atomic_read(&jme->link_changing) != 1))
 928                 goto out_inc;
 929
 930         if(unlikely(!netif_carrier_ok(jme->dev)))
 931                 goto out_inc;
 932
 933         i = atomic_read(&rxring->next_to_clean);
 934         while( limit-- > 0 )
 935         {
 936                 rxdesc = rxring->desc;
 937                 rxdesc += i;
 938
 939                 if((rxdesc->descwb.flags & RXWBFLAG_OWN) ||
 940                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
 941                         goto out;
 942
 943                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
 944
 945                 rx_dbg(jme->dev->name, "RX: Cleaning %d\n", i);
 946
 947                 if(unlikely(desccnt > 1 ||
 948                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
 949
 950                         if(rxdesc->descwb.errstat & RXWBERR_CRCERR)
 951                                 ++(NET_STAT(jme).rx_crc_errors);
 952                         else if(rxdesc->descwb.errstat & RXWBERR_OVERUN)
 953                                 ++(NET_STAT(jme).rx_fifo_errors);
 954                         else
 955                                 ++(NET_STAT(jme).rx_errors);
 956
 957                         if(desccnt > 1) {
 958                                 rx_dbg(jme->dev->name,
 959                                         "RX: More than one(%d) descriptor, "
 960                                         "framelen=%d\n",
 961                                         desccnt, le16_to_cpu(rxdesc->descwb.framesize));
 962                                 limit -= desccnt - 1;
 963                         }
 964
 965                         for(j = i, ccnt = desccnt ; ccnt-- ; ) {
 966                                 jme_set_clean_rxdesc(jme, j);
 967                                 j = (j + 1) & (mask);
 968                         }
 969
 970                 }
 971                 else {
 972                         jme_alloc_and_feed_skb(jme, i);
 973                 }
 974
 975                 i = (i + desccnt) & (mask);
 976         }
 977
 978
 979 out:
 980         rx_dbg(jme->dev->name, "RX: Stop at %d\n", i);
 981         rx_dbg(jme->dev->name, "RX: RXNDA offset %d\n",
 982                 (jread32(jme, JME_RXNDA) - jread32(jme, JME_RXDBA_LO))
 983                         >> 4);
 984
 985         atomic_set(&rxring->next_to_clean, i);
 986
 987 out_inc:
 988         atomic_inc(&jme->rx_cleaning);
 989
 990         return limit > 0 ? limit : 0;
 991
 992 }
 993
 994 static void
 995 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
 996 {
 997         if(likely(atmp == dpi->cur)) {
 998                 dpi->cnt = 0;
 999                 return;
1000         }
1001
1002         if(dpi->attempt == atmp) {
1003                 ++(dpi->cnt);
1004         }
1005         else {
1006                 dpi->attempt = atmp;
1007                 dpi->cnt = 0;
1008         }
1009
1010 }
1011
1012 static void
1013 jme_dynamic_pcc(struct jme_adapter *jme)
1014 {
1015         register struct dynpcc_info *dpi = &(jme->dpi);
1016
1017         if((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1018                 jme_attempt_pcc(dpi, PCC_P3);
1019         else if((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD
1020         || dpi->intr_cnt > PCC_INTR_THRESHOLD)
1021                 jme_attempt_pcc(dpi, PCC_P2);
1022         else
1023                 jme_attempt_pcc(dpi, PCC_P1);
1024
1025         if(unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1026                 jme_set_rx_pcc(jme, dpi->attempt);
1027                 dpi->cur = dpi->attempt;
1028                 dpi->cnt = 0;
1029         }
1030 }
1031
1032 static void
1033 jme_start_pcc_timer(struct jme_adapter *jme)
1034 {
1035         struct dynpcc_info *dpi = &(jme->dpi);
1036         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1037         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1038         dpi->intr_cnt           = 0;
1039         jwrite32(jme, JME_TMCSR,
1040                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1041 }
1042
1043 __always_inline static void
1044 jme_stop_pcc_timer(struct jme_adapter *jme)
1045 {
1046         jwrite32(jme, JME_TMCSR, 0);
1047 }
1048
1049 static void
1050 jme_pcc_tasklet(unsigned long arg)
1051 {
1052         struct jme_adapter *jme = (struct jme_adapter*)arg;
1053         struct net_device *netdev = jme->dev;
1054
1055
1056         if(unlikely(!netif_carrier_ok(netdev) ||
1057                 (atomic_read(&jme->link_changing) != 1)
1058         )) {
1059                 jme_stop_pcc_timer(jme);
1060                 return;
1061         }
1062
1063         if(!(jme->flags & JME_FLAG_POLL))
1064                 jme_dynamic_pcc(jme);
1065
1066         jme_start_pcc_timer(jme);
1067 }
1068
1069 __always_inline static void
1070 jme_polling_mode(struct jme_adapter *jme)
1071 {
1072         jme_set_rx_pcc(jme, PCC_OFF);
1073 }
1074
1075 __always_inline static void
1076 jme_interrupt_mode(struct jme_adapter *jme)
1077 {
1078         jme_set_rx_pcc(jme, PCC_P1);
1079 }
1080
1081 static void
1082 jme_link_change_tasklet(unsigned long arg)
1083 {
1084         struct jme_adapter *jme = (struct jme_adapter*)arg;
1085         struct net_device *netdev = jme->dev;
1086         int timeout = WAIT_TASKLET_TIMEOUT;
1087         int rc;
1088
1089         if(!atomic_dec_and_test(&jme->link_changing))
1090                 goto out;
1091
1092         if(jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1093                 goto out;
1094
1095         jme->old_mtu = netdev->mtu;
1096         netif_stop_queue(netdev);
1097
1098         while(--timeout > 0 &&
1099                 (
1100                 atomic_read(&jme->rx_cleaning) != 1 ||
1101                 atomic_read(&jme->tx_cleaning) != 1
1102                 )) {
1103
1104                 mdelay(1);
1105         }
1106
1107         if(netif_carrier_ok(netdev)) {
1108                 jme_stop_pcc_timer(jme);
1109                 jme_reset_mac_processor(jme);
1110                 jme_free_rx_resources(jme);
1111                 jme_free_tx_resources(jme);
1112
1113                 if(jme->flags & JME_FLAG_POLL)
1114                         jme_polling_mode(jme);
1115         }
1116
1117         jme_check_link(netdev, 0);
1118         if(netif_carrier_ok(netdev)) {
1119                 rc = jme_setup_rx_resources(jme);
1120                 if(rc) {
1121                         jeprintk(netdev->name,
1122                                 "Allocating resources for RX error"
1123                                 ", Device STOPPED!\n");
1124                         goto out;
1125                 }
1126
1127
1128                 rc = jme_setup_tx_resources(jme);
1129                 if(rc) {
1130                         jeprintk(netdev->name,
1131                                 "Allocating resources for TX error"
1132                                 ", Device STOPPED!\n");
1133                         goto err_out_free_rx_resources;
1134                 }
1135
1136                 jme_enable_rx_engine(jme);
1137                 jme_enable_tx_engine(jme);
1138
1139                 netif_start_queue(netdev);
1140
1141                 if(jme->flags & JME_FLAG_POLL)
1142                         jme_interrupt_mode(jme);
1143
1144                 jme_start_pcc_timer(jme);
1145         }
1146
1147         goto out;
1148
1149 err_out_free_rx_resources:
1150         jme_free_rx_resources(jme);
1151 out:
1152         atomic_inc(&jme->link_changing);
1153 }
1154
1155 static void
1156 jme_rx_clean_tasklet(unsigned long arg)
1157 {
1158         struct jme_adapter *jme = (struct jme_adapter*)arg;
1159         struct dynpcc_info *dpi = &(jme->dpi);
1160
1161         jme_process_receive(jme, jme->rx_ring_size);
1162         ++(dpi->intr_cnt);
1163
1164 }
1165
1166 static int
1167 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1168 {
1169         struct jme_adapter *jme = jme_napi_priv(holder);
1170         struct net_device *netdev = jme->dev;
1171         int rest;
1172
1173         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1174
1175         while(atomic_read(&jme->rx_empty) > 0) {
1176                 atomic_dec(&jme->rx_empty);
1177                 ++(NET_STAT(jme).rx_dropped);
1178                 jme_restart_rx_engine(jme);
1179         }
1180         atomic_inc(&jme->rx_empty);
1181
1182         if(rest) {
1183                 JME_RX_COMPLETE(netdev, holder);
1184                 jme_interrupt_mode(jme);
1185         }
1186
1187         JME_NAPI_WEIGHT_SET(budget, rest);
1188         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1189 }
1190
1191 static void
1192 jme_rx_empty_tasklet(unsigned long arg)
1193 {
1194         struct jme_adapter *jme = (struct jme_adapter*)arg;
1195
1196         if(unlikely(atomic_read(&jme->link_changing) != 1))
1197                 return;
1198
1199         if(unlikely(!netif_carrier_ok(jme->dev)))
1200                 return;
1201
1202         queue_dbg(jme->dev->name, "RX Queue Full!\n");
1203
1204         jme_rx_clean_tasklet(arg);
1205
1206         while(atomic_read(&jme->rx_empty) > 0) {
1207                 atomic_dec(&jme->rx_empty);
1208                 ++(NET_STAT(jme).rx_dropped);
1209                 jme_restart_rx_engine(jme);
1210         }
1211         atomic_inc(&jme->rx_empty);
1212 }
1213
1214 static void
1215 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1216 {
1217         struct jme_ring *txring = jme->txring;
1218
1219         smp_wmb();
1220         if(unlikely(netif_queue_stopped(jme->dev) &&
1221         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1222
1223                 queue_dbg(jme->dev->name, "TX Queue Waked.\n");
1224                 netif_wake_queue(jme->dev);
1225
1226         }
1227
1228 }
1229
1230 static void
1231 jme_tx_clean_tasklet(unsigned long arg)
1232 {
1233         struct jme_adapter *jme = (struct jme_adapter*)arg;
1234         struct jme_ring *txring = &(jme->txring[0]);
1235         volatile struct txdesc *txdesc = txring->desc;
1236         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1237         int i, j, cnt = 0, max, err, mask;
1238
1239         if(unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1240                 goto out;
1241
1242         if(unlikely(atomic_read(&jme->link_changing) != 1))
1243                 goto out;
1244
1245         if(unlikely(!netif_carrier_ok(jme->dev)))
1246                 goto out;
1247
1248         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1249         mask = jme->tx_ring_mask;
1250
1251         tx_dbg(jme->dev->name, "Tx Tasklet: In\n");
1252
1253         for(i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1254
1255                 ctxbi = txbi + i;
1256
1257                 if(likely(ctxbi->skb &&
1258                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1259
1260                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1261
1262                         tx_dbg(jme->dev->name,
1263                                 "Tx Tasklet: Clean %d+%d\n",
1264                                 i, ctxbi->nr_desc);
1265
1266                         for(j = 1 ; j < ctxbi->nr_desc ; ++j) {
1267                                 ttxbi = txbi + ((i + j) & (mask));
1268                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1269
1270                                 pci_unmap_page(jme->pdev,
1271                                                  ttxbi->mapping,
1272                                                  ttxbi->len,
1273                                                  PCI_DMA_TODEVICE);
1274
1275                                 ttxbi->mapping = 0;
1276                                 ttxbi->len = 0;
1277                         }
1278
1279                         dev_kfree_skb(ctxbi->skb);
1280
1281                         cnt += ctxbi->nr_desc;
1282
1283                         if(unlikely(err))
1284                                 ++(NET_STAT(jme).tx_carrier_errors);
1285                         else {
1286                                 ++(NET_STAT(jme).tx_packets);
1287                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1288                         }
1289
1290                         ctxbi->skb = NULL;
1291                         ctxbi->len = 0;
1292                         ctxbi->start_xmit = 0;
1293                 }
1294                 else {
1295                         if(!ctxbi->skb)
1296                                 tx_dbg(jme->dev->name,
1297                                         "Tx Tasklet:"
1298                                         " Stopped due to no skb.\n");
1299                         else
1300                                 tx_dbg(jme->dev->name,
1301                                         "Tx Tasklet:"
1302                                         "Stopped due to not done.\n");
1303                         break;
1304                 }
1305
1306                 i = (i + ctxbi->nr_desc) & mask;
1307
1308                 ctxbi->nr_desc = 0;
1309         }
1310
1311         tx_dbg(jme->dev->name,
1312                 "Tx Tasklet: Stop %d Jiffies %lu\n",
1313                 i, jiffies);
1314
1315         atomic_set(&txring->next_to_clean, i);
1316         atomic_add(cnt, &txring->nr_free);
1317
1318         jme_wake_queue_if_stopped(jme);
1319
1320 out:
1321         atomic_inc(&jme->tx_cleaning);
1322 }
1323
1324 static void
1325 jme_intr_msi(struct jme_adapter *jme, __u32 intrstat)
1326 {
1327         /*
1328          * Disable interrupt
1329          */
1330         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1331
1332         /*
1333          * Write 1 clear interrupt status
1334          */
1335         jwrite32f(jme, JME_IEVE, intrstat);
1336
1337         if(intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1338                 tasklet_schedule(&jme->linkch_task);
1339                 goto out_reenable;
1340         }
1341
1342         if(intrstat & INTR_TMINTR)
1343                 tasklet_schedule(&jme->pcc_task);
1344
1345         if(intrstat & (INTR_PCCTXTO | INTR_PCCTX))
1346                 tasklet_schedule(&jme->txclean_task);
1347
1348         if(jme->flags & JME_FLAG_POLL) {
1349                 if(intrstat & INTR_RX0EMP)
1350                         atomic_inc(&jme->rx_empty);
1351
1352                 if((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1353                         if(likely(JME_RX_SCHEDULE_PREP(jme))) {
1354                                 jme_polling_mode(jme);
1355                                 JME_RX_SCHEDULE(jme);
1356                         }
1357                 }
1358         }
1359         else {
1360                 if(intrstat & INTR_RX0EMP) {
1361                         atomic_inc(&jme->rx_empty);
1362                         tasklet_schedule(&jme->rxempty_task);
1363                 }
1364
1365                 if(intrstat & (INTR_PCCRX0TO | INTR_PCCRX0))
1366                         tasklet_schedule(&jme->rxclean_task);
1367         }
1368
1369 out_reenable:
1370         /*
1371          * Re-enable interrupt
1372          */
1373         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1374
1375
1376 }
1377
1378 static irqreturn_t
1379 jme_intr(int irq, void *dev_id)
1380 {
1381         struct net_device *netdev = dev_id;
1382         struct jme_adapter *jme = netdev_priv(netdev);
1383         __u32 intrstat;
1384
1385         intrstat = jread32(jme, JME_IEVE);
1386
1387         /*
1388          * Check if it's really an interrupt for us
1389          */
1390         if(unlikely(intrstat == 0))
1391                 return IRQ_NONE;
1392
1393         /*
1394          * Check if the device still exist
1395          */
1396         if(unlikely(intrstat == ~((typeof(intrstat))0)))
1397                 return IRQ_NONE;
1398
1399         jme_intr_msi(jme, intrstat);
1400
1401         return IRQ_HANDLED;
1402 }
1403
1404 static irqreturn_t
1405 jme_msi(int irq, void *dev_id)
1406 {
1407         struct net_device *netdev = dev_id;
1408         struct jme_adapter *jme = netdev_priv(netdev);
1409         __u32 intrstat;
1410
1411         pci_dma_sync_single_for_cpu(jme->pdev,
1412                                     jme->shadow_dma,
1413                                     sizeof(__u32) * SHADOW_REG_NR,
1414                                     PCI_DMA_FROMDEVICE);
1415         intrstat = jme->shadow_regs[SHADOW_IEVE];
1416         jme->shadow_regs[SHADOW_IEVE] = 0;
1417
1418         jme_intr_msi(jme, intrstat);
1419
1420         return IRQ_HANDLED;
1421 }
1422
1423
1424 static void
1425 jme_reset_link(struct jme_adapter *jme)
1426 {
1427         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1428 }
1429
1430 static void
1431 jme_restart_an(struct jme_adapter *jme)
1432 {
1433         __u32 bmcr;
1434         unsigned long flags;
1435
1436         spin_lock_irqsave(&jme->phy_lock, flags);
1437         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1438         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1439         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1440         spin_unlock_irqrestore(&jme->phy_lock, flags);
1441 }
1442
1443 static int
1444 jme_request_irq(struct jme_adapter *jme)
1445 {
1446         int rc;
1447         struct net_device *netdev = jme->dev;
1448         irq_handler_t handler = jme_intr;
1449         int irq_flags = IRQF_SHARED;
1450
1451         if (!pci_enable_msi(jme->pdev)) {
1452                 jme->flags |= JME_FLAG_MSI;
1453                 handler = jme_msi;
1454                 irq_flags = 0;
1455         }
1456
1457         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1458                           netdev);
1459         if(rc) {
1460                 jeprintk(netdev->name,
1461                         "Unable to request %s interrupt (return: %d)\n",
1462                         jme->flags & JME_FLAG_MSI ? "MSI":"INTx", rc);
1463
1464                 if(jme->flags & JME_FLAG_MSI) {
1465                         pci_disable_msi(jme->pdev);
1466                         jme->flags &= ~JME_FLAG_MSI;
1467                 }
1468         }
1469         else {
1470                 netdev->irq = jme->pdev->irq;
1471         }
1472
1473         return rc;
1474 }
1475
1476 static void
1477 jme_free_irq(struct jme_adapter *jme)
1478 {
1479         free_irq(jme->pdev->irq, jme->dev);
1480         if (jme->flags & JME_FLAG_MSI) {
1481                 pci_disable_msi(jme->pdev);
1482                 jme->flags &= ~JME_FLAG_MSI;
1483                 jme->dev->irq = jme->pdev->irq;
1484         }
1485 }
1486
1487 static int
1488 jme_open(struct net_device *netdev)
1489 {
1490         struct jme_adapter *jme = netdev_priv(netdev);
1491         int rc, timeout = 10;
1492
1493         while(
1494                 --timeout > 0 &&
1495                 (
1496                 atomic_read(&jme->link_changing) != 1 ||
1497                 atomic_read(&jme->rx_cleaning) != 1 ||
1498                 atomic_read(&jme->tx_cleaning) != 1
1499                 )
1500         )
1501                 msleep(1);
1502
1503         if(!timeout) {
1504                 rc = -EBUSY;
1505                 goto err_out;
1506         }
1507
1508         jme_clear_pm(jme);
1509         jme_reset_mac_processor(jme);
1510         JME_NAPI_ENABLE(jme);
1511
1512         rc = jme_request_irq(jme);
1513         if(rc)
1514                 goto err_out;
1515
1516         jme_enable_shadow(jme);
1517         jme_start_irq(jme);
1518
1519         if(jme->flags & JME_FLAG_SSET)
1520                 jme_set_settings(netdev, &jme->old_ecmd);
1521         else
1522                 jme_reset_phy_processor(jme);
1523
1524         jme_reset_link(jme);
1525
1526         return 0;
1527
1528 err_out:
1529         netif_stop_queue(netdev);
1530         netif_carrier_off(netdev);
1531         return rc;
1532 }
1533
1534 static void
1535 jme_set_100m_half(struct jme_adapter *jme)
1536 {
1537         __u32 bmcr, tmp;
1538
1539         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1540         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1541                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1542         tmp |= BMCR_SPEED100;
1543
1544         if (bmcr != tmp)
1545                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1546
1547         if(jme->fpgaver)
1548                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1549         else
1550                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1551 }
1552
1553 static void
1554 jme_phy_off(struct jme_adapter *jme)
1555 {
1556         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1557 }
1558
1559
1560 static int
1561 jme_close(struct net_device *netdev)
1562 {
1563         struct jme_adapter *jme = netdev_priv(netdev);
1564
1565         netif_stop_queue(netdev);
1566         netif_carrier_off(netdev);
1567
1568         jme_stop_irq(jme);
1569         jme_disable_shadow(jme);
1570         jme_free_irq(jme);
1571
1572         JME_NAPI_DISABLE(jme);
1573
1574         tasklet_kill(&jme->linkch_task);
1575         tasklet_kill(&jme->txclean_task);
1576         tasklet_kill(&jme->rxclean_task);
1577         tasklet_kill(&jme->rxempty_task);
1578
1579         jme_reset_mac_processor(jme);
1580         jme_free_rx_resources(jme);
1581         jme_free_tx_resources(jme);
1582         jme->phylink = 0;
1583         jme_phy_off(jme);
1584
1585         return 0;
1586 }
1587
1588 static int
1589 jme_alloc_txdesc(struct jme_adapter *jme,
1590                         struct sk_buff *skb)
1591 {
1592         struct jme_ring *txring = jme->txring;
1593         int idx, nr_alloc, mask = jme->tx_ring_mask;
1594
1595         idx = txring->next_to_use;
1596         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1597
1598         if(unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1599                 return -1;
1600
1601         atomic_sub(nr_alloc, &txring->nr_free);
1602
1603         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1604
1605         return idx;
1606 }
1607
1608 static void
1609 jme_fill_tx_map(struct pci_dev *pdev,
1610                 volatile struct txdesc *txdesc,
1611                 struct jme_buffer_info *txbi,
1612                 struct page *page,
1613                 __u32 page_offset,
1614                 __u32 len,
1615                 __u8 hidma)
1616 {
1617         dma_addr_t dmaaddr;
1618
1619         dmaaddr = pci_map_page(pdev,
1620                                 page,
1621                                 page_offset,
1622                                 len,
1623                                 PCI_DMA_TODEVICE);
1624
1625         pci_dma_sync_single_for_device(pdev,
1626                                        dmaaddr,
1627                                        len,
1628                                        PCI_DMA_TODEVICE);
1629
1630         txdesc->dw[0] = 0;
1631         txdesc->dw[1] = 0;
1632         txdesc->desc2.flags     = TXFLAG_OWN;
1633         txdesc->desc2.flags     |= (hidma)?TXFLAG_64BIT:0;
1634         txdesc->desc2.datalen   = cpu_to_le16(len);
1635         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1636         txdesc->desc2.bufaddrl  = cpu_to_le32(
1637                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1638
1639         txbi->mapping = dmaaddr;
1640         txbi->len = len;
1641 }
1642
1643 static void
1644 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1645 {
1646         struct jme_ring *txring = jme->txring;
1647         volatile struct txdesc *txdesc = txring->desc, *ctxdesc;
1648         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1649         __u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1650         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1651         int mask = jme->tx_ring_mask;
1652         struct skb_frag_struct *frag;
1653         __u32 len;
1654
1655         for(i = 0 ; i < nr_frags ; ++i) {
1656                 frag = &skb_shinfo(skb)->frags[i];
1657                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1658                 ctxbi = txbi + ((idx + i + 2) & (mask));
1659
1660                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1661                                  frag->page_offset, frag->size, hidma);
1662         }
1663
1664         len = skb_is_nonlinear(skb)?skb_headlen(skb):skb->len;
1665         ctxdesc = txdesc + ((idx + 1) & (mask));
1666         ctxbi = txbi + ((idx + 1) & (mask));
1667         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1668                         offset_in_page(skb->data), len, hidma);
1669
1670 }
1671
1672 static int
1673 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1674 {
1675         if(unlikely(skb_shinfo(skb)->gso_size &&
1676                         skb_header_cloned(skb) &&
1677                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1678                 dev_kfree_skb(skb);
1679                 return -1;
1680         }
1681
1682         return 0;
1683 }
1684
1685 static int
1686 jme_tx_tso(struct sk_buff *skb,
1687                 volatile __u16 *mss, __u8 *flags)
1688 {
1689         if((*mss = (skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT))) {
1690                 *flags |= TXFLAG_LSEN;
1691
1692                 if(skb->protocol == __constant_htons(ETH_P_IP)) {
1693                         struct iphdr *iph = ip_hdr(skb);
1694
1695                         iph->check = 0;
1696                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1697                                                                 iph->daddr, 0,
1698                                                                 IPPROTO_TCP,
1699                                                                 0);
1700                 }
1701                 else {
1702                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
1703
1704                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1705                                                                 &ip6h->daddr, 0,
1706                                                                 IPPROTO_TCP,
1707                                                                 0);
1708                 }
1709
1710                 return 0;
1711         }
1712
1713         return 1;
1714 }
1715
1716 static void
1717 jme_tx_csum(struct sk_buff *skb, __u8 *flags)
1718 {
1719         if(skb->ip_summed == CHECKSUM_PARTIAL) {
1720                 __u8 ip_proto;
1721
1722                 switch (skb->protocol) {
1723                 case __constant_htons(ETH_P_IP):
1724                         ip_proto = ip_hdr(skb)->protocol;
1725                         break;
1726                 case __constant_htons(ETH_P_IPV6):
1727                         ip_proto = ipv6_hdr(skb)->nexthdr;
1728                         break;
1729                 default:
1730                         ip_proto = 0;
1731                         break;
1732                 }
1733
1734                 switch(ip_proto) {
1735                 case IPPROTO_TCP:
1736                         *flags |= TXFLAG_TCPCS;
1737                         break;
1738                 case IPPROTO_UDP:
1739                         *flags |= TXFLAG_UDPCS;
1740                         break;
1741                 default:
1742                         jeprintk("jme", "Error upper layer protocol.\n");
1743                         break;
1744                 }
1745         }
1746 }
1747
1748 __always_inline static void
1749 jme_tx_vlan(struct sk_buff *skb, volatile __u16 *vlan, __u8 *flags)
1750 {
1751         if(vlan_tx_tag_present(skb)) {
1752                 vlan_dbg("jme", "Tag found!(%04x)\n", vlan_tx_tag_get(skb));
1753                 *flags |= TXFLAG_TAGON;
1754                 *vlan = vlan_tx_tag_get(skb);
1755         }
1756 }
1757
1758 static int
1759 jme_fill_first_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1760 {
1761         struct jme_ring *txring = jme->txring;
1762         volatile struct txdesc *txdesc;
1763         struct jme_buffer_info *txbi;
1764         __u8 flags;
1765
1766         txdesc = (volatile struct txdesc*)txring->desc + idx;
1767         txbi = txring->bufinf + idx;
1768
1769         txdesc->dw[0] = 0;
1770         txdesc->dw[1] = 0;
1771         txdesc->dw[2] = 0;
1772         txdesc->dw[3] = 0;
1773         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1774         /*
1775          * Set OWN bit at final.
1776          * When kernel transmit faster than NIC.
1777          * And NIC trying to send this descriptor before we tell
1778          * it to start sending this TX queue.
1779          * Other fields are already filled correctly.
1780          */
1781         wmb();
1782         flags = TXFLAG_OWN | TXFLAG_INT;
1783         //Set checksum flags while not tso
1784         if(jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1785                 jme_tx_csum(skb, &flags);
1786         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1787         txdesc->desc1.flags = flags;
1788         /*
1789          * Set tx buffer info after telling NIC to send
1790          * For better tx_clean timing
1791          */
1792         wmb();
1793         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1794         txbi->skb = skb;
1795         txbi->len = skb->len;
1796         if(!(txbi->start_xmit = jiffies))
1797                 txbi->start_xmit = 1;
1798
1799         return 0;
1800 }
1801
1802 static void
1803 jme_stop_queue_if_full(struct jme_adapter *jme)
1804 {
1805         struct jme_ring *txring = jme->txring;
1806         struct jme_buffer_info *txbi = txring->bufinf;
1807
1808         txbi += atomic_read(&txring->next_to_clean);
1809
1810         smp_wmb();
1811         if(unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
1812                 netif_stop_queue(jme->dev);
1813                 queue_dbg(jme->dev->name, "TX Queue Paused.\n");
1814                 smp_wmb();
1815                 if (atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold)) {
1816                         netif_wake_queue(jme->dev);
1817                         queue_dbg(jme->dev->name, "TX Queue Fast Waked.\n");
1818                 }
1819         }
1820
1821         if(unlikely(    txbi->start_xmit &&
1822                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
1823                         txbi->skb)) {
1824                 netif_stop_queue(jme->dev);
1825         }
1826 }
1827
1828 /*
1829  * This function is already protected by netif_tx_lock()
1830  */
1831 static int
1832 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1833 {
1834         struct jme_adapter *jme = netdev_priv(netdev);
1835         int idx;
1836
1837         if(skb_shinfo(skb)->nr_frags) {
1838                 tx_dbg(netdev->name, "Frags: %d Headlen: %d Len: %d MSS: %d Sum:%d\n",
1839                         skb_shinfo(skb)->nr_frags,
1840                         skb_headlen(skb),
1841                         skb->len,
1842                         skb_shinfo(skb)->gso_size,
1843                         skb->ip_summed);
1844         }
1845
1846         if(unlikely(jme_expand_header(jme, skb))) {
1847                 ++(NET_STAT(jme).tx_dropped);
1848                 return NETDEV_TX_OK;
1849         }
1850
1851         idx = jme_alloc_txdesc(jme, skb);
1852
1853         if(unlikely(idx<0)) {
1854                 netif_stop_queue(netdev);
1855                 jeprintk(netdev->name,
1856                                 "BUG! Tx ring full when queue awake!\n");
1857
1858                 return NETDEV_TX_BUSY;
1859         }
1860
1861         jme_map_tx_skb(jme, skb, idx);
1862         jme_fill_first_tx_desc(jme, skb, idx);
1863
1864         tx_dbg(jme->dev->name, "Xmit: %d+%d\n", idx, skb_shinfo(skb)->nr_frags + 2);
1865
1866         jwrite32(jme, JME_TXCS, jme->reg_txcs |
1867                                 TXCS_SELECT_QUEUE0 |
1868                                 TXCS_QUEUE0S |
1869                                 TXCS_ENABLE);
1870         netdev->trans_start = jiffies;
1871
1872         jme_stop_queue_if_full(jme);
1873
1874         return NETDEV_TX_OK;
1875 }
1876
1877 static int
1878 jme_set_macaddr(struct net_device *netdev, void *p)
1879 {
1880         struct jme_adapter *jme = netdev_priv(netdev);
1881         struct sockaddr *addr = p;
1882         __u32 val;
1883
1884         if(netif_running(netdev))
1885                 return -EBUSY;
1886
1887         spin_lock(&jme->macaddr_lock);
1888         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1889
1890         val = (addr->sa_data[3] & 0xff) << 24 |
1891               (addr->sa_data[2] & 0xff) << 16 |
1892               (addr->sa_data[1] & 0xff) <<  8 |
1893               (addr->sa_data[0] & 0xff);
1894         jwrite32(jme, JME_RXUMA_LO, val);
1895         val = (addr->sa_data[5] & 0xff) << 8 |
1896               (addr->sa_data[4] & 0xff);
1897         jwrite32(jme, JME_RXUMA_HI, val);
1898         spin_unlock(&jme->macaddr_lock);
1899
1900         return 0;
1901 }
1902
1903 static void
1904 jme_set_multi(struct net_device *netdev)
1905 {
1906         struct jme_adapter *jme = netdev_priv(netdev);
1907         u32 mc_hash[2] = {};
1908         int i;
1909         unsigned long flags;
1910
1911         spin_lock_irqsave(&jme->rxmcs_lock, flags);
1912
1913         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
1914
1915         if (netdev->flags & IFF_PROMISC) {
1916                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
1917         }
1918         else if (netdev->flags & IFF_ALLMULTI) {
1919                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
1920         }
1921         else if(netdev->flags & IFF_MULTICAST) {
1922                 struct dev_mc_list *mclist;
1923                 int bit_nr;
1924
1925                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
1926                 for (i = 0, mclist = netdev->mc_list;
1927                         mclist && i < netdev->mc_count;
1928                         ++i, mclist = mclist->next) {
1929
1930                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
1931                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
1932                 }
1933
1934                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
1935                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
1936         }
1937
1938         wmb();
1939         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
1940
1941         spin_unlock_irqrestore(&jme->rxmcs_lock, flags);
1942 }
1943
1944 static int
1945 jme_change_mtu(struct net_device *netdev, int new_mtu)
1946 {
1947         struct jme_adapter *jme = netdev_priv(netdev);
1948
1949         if(new_mtu == jme->old_mtu)
1950                 return 0;
1951
1952         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
1953                 ((new_mtu) < IPV6_MIN_MTU))
1954                 return -EINVAL;
1955
1956         if(new_mtu > 4000) {
1957                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
1958                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
1959                 jme_restart_rx_engine(jme);
1960         }
1961         else {
1962                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
1963                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
1964                 jme_restart_rx_engine(jme);
1965         }
1966
1967         if(new_mtu > 1900) {
1968                 netdev->features &= ~(NETIF_F_HW_CSUM |
1969                                 NETIF_F_TSO |
1970                                 NETIF_F_TSO6);
1971         }
1972         else {
1973                 if(jme->flags & JME_FLAG_TXCSUM)
1974                         netdev->features |= NETIF_F_HW_CSUM;
1975                 if(jme->flags & JME_FLAG_TSO)
1976                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
1977         }
1978
1979         netdev->mtu = new_mtu;
1980         jme_reset_link(jme);
1981
1982         return 0;
1983 }
1984
1985 static void
1986 jme_tx_timeout(struct net_device *netdev)
1987 {
1988         struct jme_adapter *jme = netdev_priv(netdev);
1989
1990         jme->phylink = 0;
1991         jme_reset_phy_processor(jme);
1992         if(jme->flags & JME_FLAG_SSET)
1993                 jme_set_settings(netdev, &jme->old_ecmd);
1994
1995         /*
1996          * Force to Reset the link again
1997          */
1998         jme_reset_link(jme);
1999 }
2000
2001 static void
2002 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2003 {
2004         struct jme_adapter *jme = netdev_priv(netdev);
2005
2006         jme->vlgrp = grp;
2007 }
2008
2009 static void
2010 jme_get_drvinfo(struct net_device *netdev,
2011                      struct ethtool_drvinfo *info)
2012 {
2013         struct jme_adapter *jme = netdev_priv(netdev);
2014
2015         strcpy(info->driver, DRV_NAME);
2016         strcpy(info->version, DRV_VERSION);
2017         strcpy(info->bus_info, pci_name(jme->pdev));
2018 }
2019
2020 static int
2021 jme_get_regs_len(struct net_device *netdev)
2022 {
2023         return JME_REG_LEN;
2024 }
2025
2026 static void
2027 mmapio_memcpy(struct jme_adapter *jme, __u32 *p, __u32 reg, int len)
2028 {
2029         int i;
2030
2031         for(i = 0 ; i < len ; i += 4)
2032                 p[i >> 2] = jread32(jme, reg + i);
2033 }
2034
2035 static void
2036 mdio_memcpy(struct jme_adapter *jme, __u32 *p, int reg_nr)
2037 {
2038         int i;
2039         __u16 *p16 = (__u16*)p;
2040
2041         for(i = 0 ; i < reg_nr ; ++i)
2042                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2043 }
2044
2045 static void
2046 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2047 {
2048         struct jme_adapter *jme = netdev_priv(netdev);
2049         __u32 *p32 = (__u32*)p;
2050
2051         memset(p, 0xFF, JME_REG_LEN);
2052
2053         regs->version = 1;
2054         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2055
2056         p32 += 0x100 >> 2;
2057         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2058
2059         p32 += 0x100 >> 2;
2060         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2061
2062         p32 += 0x100 >> 2;
2063         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2064
2065         p32 += 0x100 >> 2;
2066         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2067 }
2068
2069 static int
2070 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2071 {
2072         struct jme_adapter *jme = netdev_priv(netdev);
2073
2074         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2075         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2076
2077         if(jme->flags & JME_FLAG_POLL) {
2078                 ecmd->use_adaptive_rx_coalesce = false;
2079                 ecmd->rx_coalesce_usecs = 0;
2080                 ecmd->rx_max_coalesced_frames = 0;
2081                 return 0;
2082         }
2083
2084         ecmd->use_adaptive_rx_coalesce = true;
2085
2086         switch(jme->dpi.cur) {
2087         case PCC_P1:
2088                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2089                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2090                 break;
2091         case PCC_P2:
2092                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2093                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2094                 break;
2095         case PCC_P3:
2096                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2097                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2098                 break;
2099         default:
2100                 break;
2101         }
2102
2103         return 0;
2104 }
2105
2106 static int
2107 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2108 {
2109         struct jme_adapter *jme = netdev_priv(netdev);
2110         struct dynpcc_info *dpi = &(jme->dpi);
2111
2112         if(netif_running(netdev))
2113                 return -EBUSY;
2114
2115         if(ecmd->use_adaptive_rx_coalesce
2116         && (jme->flags & JME_FLAG_POLL)) {
2117                 jme->flags &= ~JME_FLAG_POLL;
2118                 jme->jme_rx = netif_rx;
2119                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2120                 dpi->cur                = PCC_P1;
2121                 dpi->attempt            = PCC_P1;
2122                 dpi->cnt                = 0;
2123                 jme_set_rx_pcc(jme, PCC_P1);
2124                 jme_interrupt_mode(jme);
2125         }
2126         else if(!(ecmd->use_adaptive_rx_coalesce)
2127         && !(jme->flags & JME_FLAG_POLL)) {
2128                 jme->flags |= JME_FLAG_POLL;
2129                 jme->jme_rx = netif_receive_skb;
2130                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2131                 jme_interrupt_mode(jme);
2132         }
2133
2134         return 0;
2135 }
2136
2137 static void
2138 jme_get_pauseparam(struct net_device *netdev,
2139                         struct ethtool_pauseparam *ecmd)
2140 {
2141         struct jme_adapter *jme = netdev_priv(netdev);
2142         unsigned long flags;
2143         __u32 val;
2144
2145         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2146         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2147
2148         spin_lock_irqsave(&jme->phy_lock, flags);
2149         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2150         spin_unlock_irqrestore(&jme->phy_lock, flags);
2151
2152         ecmd->autoneg =
2153                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2154 }
2155
2156 static int
2157 jme_set_pauseparam(struct net_device *netdev,
2158                         struct ethtool_pauseparam *ecmd)
2159 {
2160         struct jme_adapter *jme = netdev_priv(netdev);
2161         unsigned long flags;
2162         __u32 val;
2163
2164         if( ((jme->reg_txpfc & TXPFC_PF_EN) != 0) !=
2165                 (ecmd->tx_pause != 0)) {
2166
2167                 if(ecmd->tx_pause)
2168                         jme->reg_txpfc |= TXPFC_PF_EN;
2169                 else
2170                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2171
2172                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2173         }
2174
2175         spin_lock_irqsave(&jme->rxmcs_lock, flags);
2176         if( ((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) !=
2177                 (ecmd->rx_pause != 0)) {
2178
2179                 if(ecmd->rx_pause)
2180                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2181                 else
2182                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2183
2184                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2185         }
2186         spin_unlock_irqrestore(&jme->rxmcs_lock, flags);
2187
2188         spin_lock_irqsave(&jme->phy_lock, flags);
2189         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2190         if( ((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) !=
2191                 (ecmd->autoneg != 0)) {
2192
2193                 if(ecmd->autoneg)
2194                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2195                 else
2196                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2197
2198                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2199                                 MII_ADVERTISE, val);
2200         }
2201         spin_unlock_irqrestore(&jme->phy_lock, flags);
2202
2203         return 0;
2204 }
2205
2206 static void
2207 jme_get_wol(struct net_device *netdev,
2208                 struct ethtool_wolinfo *wol)
2209 {
2210         struct jme_adapter *jme = netdev_priv(netdev);
2211
2212         wol->supported = WAKE_MAGIC | WAKE_PHY;
2213
2214         wol->wolopts = 0;
2215
2216         if(jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2217                 wol->wolopts |= WAKE_PHY;
2218
2219         if(jme->reg_pmcs & PMCS_MFEN)
2220                 wol->wolopts |= WAKE_MAGIC;
2221
2222 }
2223
2224 static int
2225 jme_set_wol(struct net_device *netdev,
2226                 struct ethtool_wolinfo *wol)
2227 {
2228         struct jme_adapter *jme = netdev_priv(netdev);
2229
2230         if(wol->wolopts & (WAKE_MAGICSECURE |
2231                                 WAKE_UCAST |
2232                                 WAKE_MCAST |
2233                                 WAKE_BCAST |
2234                                 WAKE_ARP))
2235                 return -EOPNOTSUPP;
2236
2237         jme->reg_pmcs = 0;
2238
2239         if(wol->wolopts & WAKE_PHY)
2240                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2241
2242         if(wol->wolopts & WAKE_MAGIC)
2243                 jme->reg_pmcs |= PMCS_MFEN;
2244
2245
2246         return 0;
2247 }
2248
2249 static int
2250 jme_get_settings(struct net_device *netdev,
2251                      struct ethtool_cmd *ecmd)
2252 {
2253         struct jme_adapter *jme = netdev_priv(netdev);
2254         int rc;
2255         unsigned long flags;
2256
2257         spin_lock_irqsave(&jme->phy_lock, flags);
2258         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2259         spin_unlock_irqrestore(&jme->phy_lock, flags);
2260         return rc;
2261 }
2262
2263 static int
2264 jme_set_settings(struct net_device *netdev,
2265                      struct ethtool_cmd *ecmd)
2266 {
2267         struct jme_adapter *jme = netdev_priv(netdev);
2268         int rc, fdc=0;
2269         unsigned long flags;
2270
2271         if(ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2272                 return -EINVAL;
2273
2274         if(jme->mii_if.force_media &&
2275         ecmd->autoneg != AUTONEG_ENABLE &&
2276         (jme->mii_if.full_duplex != ecmd->duplex))
2277                 fdc = 1;
2278
2279         spin_lock_irqsave(&jme->phy_lock, flags);
2280         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2281         spin_unlock_irqrestore(&jme->phy_lock, flags);
2282
2283         if(!rc && fdc)
2284                 jme_reset_link(jme);
2285
2286         if(!rc) {
2287                 jme->flags |= JME_FLAG_SSET;
2288                 jme->old_ecmd = *ecmd;
2289         }
2290
2291         return rc;
2292 }
2293
2294 static __u32
2295 jme_get_link(struct net_device *netdev)
2296 {
2297         struct jme_adapter *jme = netdev_priv(netdev);
2298         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2299 }
2300
2301 static u32
2302 jme_get_rx_csum(struct net_device *netdev)
2303 {
2304         struct jme_adapter *jme = netdev_priv(netdev);
2305
2306         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2307 }
2308
2309 static int
2310 jme_set_rx_csum(struct net_device *netdev, u32 on)
2311 {
2312         struct jme_adapter *jme = netdev_priv(netdev);
2313         unsigned long flags;
2314
2315         spin_lock_irqsave(&jme->rxmcs_lock, flags);
2316         if(on)
2317                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2318         else
2319                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2320         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2321         spin_unlock_irqrestore(&jme->rxmcs_lock, flags);
2322
2323         return 0;
2324 }
2325
2326 static int
2327 jme_set_tx_csum(struct net_device *netdev, u32 on)
2328 {
2329         struct jme_adapter *jme = netdev_priv(netdev);
2330
2331         if(on) {
2332                 jme->flags |= JME_FLAG_TXCSUM;
2333                 if(netdev->mtu <= 1900)
2334                         netdev->features |= NETIF_F_HW_CSUM;
2335         }
2336         else {
2337                 jme->flags &= ~JME_FLAG_TXCSUM;
2338                 netdev->features &= ~NETIF_F_HW_CSUM;
2339         }
2340
2341         return 0;
2342 }
2343
2344 static int
2345 jme_set_tso(struct net_device *netdev, u32 on)
2346 {
2347         struct jme_adapter *jme = netdev_priv(netdev);
2348
2349         if (on) {
2350                 jme->flags |= JME_FLAG_TSO;
2351                 if(netdev->mtu <= 1900)
2352                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2353         }
2354         else {
2355                 jme->flags &= ~JME_FLAG_TSO;
2356                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2357         }
2358
2359         return 0;
2360 }
2361
2362 static int
2363 jme_nway_reset(struct net_device *netdev)
2364 {
2365         struct jme_adapter *jme = netdev_priv(netdev);
2366         jme_restart_an(jme);
2367         return 0;
2368 }
2369
2370 static __u8
2371 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2372 {
2373         __u32 val;
2374         int to;
2375
2376         val = jread32(jme, JME_SMBCSR);
2377         to = JME_SMB_BUSY_TIMEOUT;
2378         while((val & SMBCSR_BUSY) && --to) {
2379                 msleep(1);
2380                 val = jread32(jme, JME_SMBCSR);
2381         }
2382         if(!to) {
2383                 jeprintk(jme->dev->name, "SMB Bus Busy.\n");
2384                 return 0xFF;
2385         }
2386
2387         jwrite32(jme, JME_SMBINTF,
2388                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2389                 SMBINTF_HWRWN_READ |
2390                 SMBINTF_HWCMD);
2391
2392         val = jread32(jme, JME_SMBINTF);
2393         to = JME_SMB_BUSY_TIMEOUT;
2394         while((val & SMBINTF_HWCMD) && --to) {
2395                 msleep(1);
2396                 val = jread32(jme, JME_SMBINTF);
2397         }
2398         if(!to) {
2399                 jeprintk(jme->dev->name, "SMB Bus Busy.\n");
2400                 return 0xFF;
2401         }
2402
2403         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2404 }
2405
2406 static void
2407 jme_smb_write(struct jme_adapter *jme, unsigned int addr, __u8 data)
2408 {
2409         __u32 val;
2410         int to;
2411
2412         val = jread32(jme, JME_SMBCSR);
2413         to = JME_SMB_BUSY_TIMEOUT;
2414         while((val & SMBCSR_BUSY) && --to) {
2415                 msleep(1);
2416                 val = jread32(jme, JME_SMBCSR);
2417         }
2418         if(!to) {
2419                 jeprintk(jme->dev->name, "SMB Bus Busy.\n");
2420                 return;
2421         }
2422
2423         jwrite32(jme, JME_SMBINTF,
2424                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2425                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2426                 SMBINTF_HWRWN_WRITE |
2427                 SMBINTF_HWCMD);
2428
2429         val = jread32(jme, JME_SMBINTF);
2430         to = JME_SMB_BUSY_TIMEOUT;
2431         while((val & SMBINTF_HWCMD) && --to) {
2432                 msleep(1);
2433                 val = jread32(jme, JME_SMBINTF);
2434         }
2435         if(!to) {
2436                 jeprintk(jme->dev->name, "SMB Bus Busy.\n");
2437                 return;
2438         }
2439
2440         mdelay(2);
2441 }
2442
2443 static int
2444 jme_get_eeprom_len(struct net_device *netdev)
2445 {
2446         struct jme_adapter *jme = netdev_priv(netdev);
2447         __u32 val;
2448         val = jread32(jme, JME_SMBCSR);
2449         return (val & SMBCSR_EEPROMD)?JME_SMB_LEN:0;
2450 }
2451
2452 static int
2453 jme_get_eeprom(struct net_device *netdev,
2454                 struct ethtool_eeprom *eeprom, u8 *data)
2455 {
2456         struct jme_adapter *jme = netdev_priv(netdev);
2457         int i, offset = eeprom->offset, len = eeprom->len;
2458
2459         /*
2460          * ethtool will check boundary for us
2461          */
2462         eeprom->magic = JME_EEPROM_MAGIC;
2463         for(i = 0 ; i < len ; ++i)
2464                 data[i] = jme_smb_read(jme, i + offset);
2465
2466         return 0;
2467 }
2468
2469 static int
2470 jme_set_eeprom(struct net_device *netdev,
2471                 struct ethtool_eeprom *eeprom, u8 *data)
2472 {
2473         struct jme_adapter *jme = netdev_priv(netdev);
2474         int i, offset = eeprom->offset, len = eeprom->len;
2475
2476         if (eeprom->magic != JME_EEPROM_MAGIC)
2477                 return -EINVAL;
2478
2479         /*
2480          * ethtool will check boundary for us
2481          */
2482         for(i = 0 ; i < len ; ++i)
2483                 jme_smb_write(jme, i + offset, data[i]);
2484
2485         return 0;
2486 }
2487
2488 static const struct ethtool_ops jme_ethtool_ops = {
2489         .get_drvinfo            = jme_get_drvinfo,
2490         .get_regs_len           = jme_get_regs_len,
2491         .get_regs               = jme_get_regs,
2492         .get_coalesce           = jme_get_coalesce,
2493         .set_coalesce           = jme_set_coalesce,
2494         .get_pauseparam         = jme_get_pauseparam,
2495         .set_pauseparam         = jme_set_pauseparam,
2496         .get_wol                = jme_get_wol,
2497         .set_wol                = jme_set_wol,
2498         .get_settings           = jme_get_settings,
2499         .set_settings           = jme_set_settings,
2500         .get_link               = jme_get_link,
2501         .get_rx_csum            = jme_get_rx_csum,
2502         .set_rx_csum            = jme_set_rx_csum,
2503         .set_tx_csum            = jme_set_tx_csum,
2504         .set_tso                = jme_set_tso,
2505         .set_sg                 = ethtool_op_set_sg,
2506         .nway_reset             = jme_nway_reset,
2507         .get_eeprom_len         = jme_get_eeprom_len,
2508         .get_eeprom             = jme_get_eeprom,
2509         .set_eeprom             = jme_set_eeprom,
2510 };
2511
2512 static int
2513 jme_pci_dma64(struct pci_dev *pdev)
2514 {
2515         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK))
2516                 if(!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2517                         dprintk("jme", "64Bit DMA Selected.\n");
2518                         return 1;
2519                 }
2520
2521         if (!pci_set_dma_mask(pdev, DMA_40BIT_MASK))
2522                 if(!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) {
2523                         dprintk("jme", "40Bit DMA Selected.\n");
2524                         return 1;
2525                 }
2526
2527         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2528                 if(!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
2529                         dprintk("jme", "32Bit DMA Selected.\n");
2530                         return 0;
2531                 }
2532
2533         return -1;
2534 }
2535
2536 __always_inline static void
2537 jme_phy_init(struct jme_adapter *jme)
2538 {
2539         __u16 reg26;
2540
2541         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2542         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2543 }
2544
2545 __always_inline static void
2546 jme_set_gmii(struct jme_adapter *jme)
2547 {
2548         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
2549 }
2550
2551 static void
2552 jme_check_hw_ver(struct jme_adapter *jme)
2553 {
2554         __u32 chipmode;
2555
2556         chipmode = jread32(jme, JME_CHIPMODE);
2557
2558         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2559         jme->chipver = (chipmode & CM_CHIPVER_MASK) >> CM_CHIPVER_SHIFT;
2560 }
2561
2562 static int __devinit
2563 jme_init_one(struct pci_dev *pdev,
2564              const struct pci_device_id *ent)
2565 {
2566         int rc = 0, using_dac, i;
2567         struct net_device *netdev;
2568         struct jme_adapter *jme;
2569         __u16 bmcr, bmsr;
2570
2571         /*
2572          * set up PCI device basics
2573          */
2574         rc = pci_enable_device(pdev);
2575         if(rc) {
2576                 printk(KERN_ERR PFX "Cannot enable PCI device.\n");
2577                 goto err_out;
2578         }
2579
2580         using_dac = jme_pci_dma64(pdev);
2581         if(using_dac < 0) {
2582                 printk(KERN_ERR PFX "Cannot set PCI DMA Mask.\n");
2583                 rc = -EIO;
2584                 goto err_out_disable_pdev;
2585         }
2586
2587         if(!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2588                 printk(KERN_ERR PFX "No PCI resource region found.\n");
2589                 rc = -ENOMEM;
2590                 goto err_out_disable_pdev;
2591         }
2592
2593         rc = pci_request_regions(pdev, DRV_NAME);
2594         if(rc) {
2595                 printk(KERN_ERR PFX "Cannot obtain PCI resource region.\n");
2596                 goto err_out_disable_pdev;
2597         }
2598
2599         pci_set_master(pdev);
2600
2601         /*
2602          * alloc and init net device
2603          */
2604         netdev = alloc_etherdev(sizeof(*jme));
2605         if(!netdev) {
2606                 printk(KERN_ERR PFX "Cannot allocate netdev structure.\n");
2607                 rc = -ENOMEM;
2608                 goto err_out_release_regions;
2609         }
2610         netdev->open                    = jme_open;
2611         netdev->stop                    = jme_close;
2612         netdev->hard_start_xmit         = jme_start_xmit;
2613         netdev->set_mac_address         = jme_set_macaddr;
2614         netdev->set_multicast_list      = jme_set_multi;
2615         netdev->change_mtu              = jme_change_mtu;
2616         netdev->ethtool_ops             = &jme_ethtool_ops;
2617         netdev->tx_timeout              = jme_tx_timeout;
2618         netdev->watchdog_timeo          = TX_TIMEOUT;
2619         netdev->vlan_rx_register        = jme_vlan_rx_register;
2620         NETDEV_GET_STATS(netdev, &jme_get_stats);
2621         netdev->features                =       NETIF_F_HW_CSUM |
2622                                                 NETIF_F_SG |
2623                                                 NETIF_F_TSO |
2624                                                 NETIF_F_TSO6 |
2625                                                 NETIF_F_HW_VLAN_TX |
2626                                                 NETIF_F_HW_VLAN_RX;
2627         if(using_dac)
2628                 netdev->features        |=      NETIF_F_HIGHDMA;
2629
2630         SET_NETDEV_DEV(netdev, &pdev->dev);
2631         pci_set_drvdata(pdev, netdev);
2632
2633         /*
2634          * init adapter info
2635          */
2636         jme = netdev_priv(netdev);
2637         jme->pdev = pdev;
2638         jme->dev = netdev;
2639         jme->jme_rx = netif_rx;
2640         jme->jme_vlan_rx = vlan_hwaccel_rx;
2641         jme->old_mtu = netdev->mtu = 1500;
2642         jme->phylink = 0;
2643         jme->tx_ring_size = 1 << 10;
2644         jme->tx_ring_mask = jme->tx_ring_size - 1;
2645         jme->tx_wake_threshold = 1 << 9;
2646         jme->rx_ring_size = 1 << 9;
2647         jme->rx_ring_mask = jme->rx_ring_size - 1;
2648         jme->regs = ioremap(pci_resource_start(pdev, 0),
2649                              pci_resource_len(pdev, 0));
2650         if (!(jme->regs)) {
2651                 printk(KERN_ERR PFX "Mapping PCI resource region error.\n");
2652                 rc = -ENOMEM;
2653                 goto err_out_free_netdev;
2654         }
2655         jme->shadow_regs = pci_alloc_consistent(pdev,
2656                                                 sizeof(__u32) * SHADOW_REG_NR,
2657                                                 &(jme->shadow_dma));
2658         if (!(jme->shadow_regs)) {
2659                 printk(KERN_ERR PFX "Allocating shadow register mapping error.\n");
2660                 rc = -ENOMEM;
2661                 goto err_out_unmap;
2662         }
2663
2664         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
2665
2666         spin_lock_init(&jme->phy_lock);
2667         spin_lock_init(&jme->macaddr_lock);
2668         spin_lock_init(&jme->rxmcs_lock);
2669
2670         atomic_set(&jme->link_changing, 1);
2671         atomic_set(&jme->rx_cleaning, 1);
2672         atomic_set(&jme->tx_cleaning, 1);
2673         atomic_set(&jme->rx_empty, 1);
2674
2675         tasklet_init(&jme->pcc_task,
2676                      &jme_pcc_tasklet,
2677                      (unsigned long) jme);
2678         tasklet_init(&jme->linkch_task,
2679                      &jme_link_change_tasklet,
2680                      (unsigned long) jme);
2681         tasklet_init(&jme->txclean_task,
2682                      &jme_tx_clean_tasklet,
2683                      (unsigned long) jme);
2684         tasklet_init(&jme->rxclean_task,
2685                      &jme_rx_clean_tasklet,
2686                      (unsigned long) jme);
2687         tasklet_init(&jme->rxempty_task,
2688                      &jme_rx_empty_tasklet,
2689                      (unsigned long) jme);
2690         jme->dpi.cur = PCC_P1;
2691
2692         jme->reg_ghc = GHC_DPX | GHC_SPEED_1000M;
2693         jme->reg_rxcs = RXCS_DEFAULT;
2694         jme->reg_rxmcs = RXMCS_DEFAULT;
2695         jme->reg_txpfc = 0;
2696         jme->reg_pmcs = PMCS_LFEN | PMCS_LREN | PMCS_MFEN;
2697         jme->flags = JME_FLAG_TXCSUM | JME_FLAG_TSO;
2698
2699         /*
2700          * Get Max Read Req Size from PCI Config Space
2701          */
2702         pci_read_config_byte(pdev, PCI_CONF_DCSR_MRRS, &jme->mrrs);
2703         switch(jme->mrrs) {
2704                 case MRRS_128B:
2705                         jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
2706                         break;
2707                 case MRRS_256B:
2708                         jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
2709                         break;
2710                 default:
2711                         jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
2712                         break;
2713         };
2714
2715
2716         /*
2717          * Must check before reset_mac_processor
2718          */
2719         jme_check_hw_ver(jme);
2720         jme->mii_if.dev = netdev;
2721         if(jme->fpgaver) {
2722                 jme->mii_if.phy_id = 0;
2723                 for(i = 1 ; i < 32 ; ++i) {
2724                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
2725                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
2726                         if(bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
2727                                 jme->mii_if.phy_id = i;
2728                                 break;
2729                         }
2730                 }
2731
2732                 if(!jme->mii_if.phy_id) {
2733                         rc = -EIO;
2734                         printk(KERN_ERR PFX "Can not find phy_id.\n");
2735                          goto err_out_free_shadow;
2736                 }
2737
2738                 jme->reg_ghc |= GHC_LINK_POLL;
2739         }
2740         else {
2741                 jme->mii_if.phy_id = 1;
2742         }
2743         jme->mii_if.supports_gmii = 1;
2744         jme->mii_if.mdio_read = jme_mdio_read;
2745         jme->mii_if.mdio_write = jme_mdio_write;
2746
2747         jme_clear_pm(jme);
2748         if(jme->fpgaver)
2749                 jme_set_gmii(jme);
2750         else
2751                 jme_phy_init(jme);
2752         jme_phy_off(jme);
2753
2754         /*
2755          * Reset MAC processor and reload EEPROM for MAC Address
2756          */
2757         jme_reset_mac_processor(jme);
2758         rc = jme_reload_eeprom(jme);
2759         if(rc) {
2760                 printk(KERN_ERR PFX
2761                         "Reload eeprom for reading MAC Address error.\n");
2762                 goto err_out_free_shadow;
2763         }
2764         jme_load_macaddr(netdev);
2765
2766
2767         /*
2768          * Tell stack that we are not ready to work until open()
2769          */
2770         netif_carrier_off(netdev);
2771         netif_stop_queue(netdev);
2772
2773         /*
2774          * Register netdev
2775          */
2776         rc = register_netdev(netdev);
2777         if(rc) {
2778                 printk(KERN_ERR PFX "Cannot register net device.\n");
2779                 goto err_out_free_shadow;
2780         }
2781
2782         jprintk(netdev->name,
2783                 "JMC250 gigabit%s ver:%u eth %02x:%02x:%02x:%02x:%02x:%02x\n",
2784                 (jme->fpgaver != 0)?" (FPGA)":"",
2785                 (jme->fpgaver != 0)?jme->fpgaver:jme->chipver,
2786                 netdev->dev_addr[0],
2787                 netdev->dev_addr[1],
2788                 netdev->dev_addr[2],
2789                 netdev->dev_addr[3],
2790                 netdev->dev_addr[4],
2791                 netdev->dev_addr[5]);
2792
2793         return 0;
2794
2795 err_out_free_shadow:
2796         pci_free_consistent(pdev,
2797                             sizeof(__u32) * SHADOW_REG_NR,
2798                             jme->shadow_regs,
2799                             jme->shadow_dma);
2800 err_out_unmap:
2801         iounmap(jme->regs);
2802 err_out_free_netdev:
2803         pci_set_drvdata(pdev, NULL);
2804         free_netdev(netdev);
2805 err_out_release_regions:
2806         pci_release_regions(pdev);
2807 err_out_disable_pdev:
2808         pci_disable_device(pdev);
2809 err_out:
2810         return rc;
2811 }
2812
2813 static void __devexit
2814 jme_remove_one(struct pci_dev *pdev)
2815 {
2816         struct net_device *netdev = pci_get_drvdata(pdev);
2817         struct jme_adapter *jme = netdev_priv(netdev);
2818
2819         unregister_netdev(netdev);
2820         pci_free_consistent(pdev,
2821                             sizeof(__u32) * SHADOW_REG_NR,
2822                             jme->shadow_regs,
2823                             jme->shadow_dma);
2824         iounmap(jme->regs);
2825         pci_set_drvdata(pdev, NULL);
2826         free_netdev(netdev);
2827         pci_release_regions(pdev);
2828         pci_disable_device(pdev);
2829
2830 }
2831
2832 static int
2833 jme_suspend(struct pci_dev *pdev, pm_message_t state)
2834 {
2835         struct net_device *netdev = pci_get_drvdata(pdev);
2836         struct jme_adapter *jme = netdev_priv(netdev);
2837         int timeout = 100;
2838
2839         atomic_dec(&jme->link_changing);
2840
2841         netif_device_detach(netdev);
2842         netif_stop_queue(netdev);
2843         jme_stop_irq(jme);
2844         jme_free_irq(jme);
2845
2846         while(--timeout > 0 &&
2847         (
2848                 atomic_read(&jme->rx_cleaning) != 1 ||
2849                 atomic_read(&jme->tx_cleaning) != 1
2850         )) {
2851                 mdelay(1);
2852         }
2853         if(!timeout) {
2854                 jeprintk(netdev->name, "Waiting tasklets timeout.\n");
2855                 return -EBUSY;
2856         }
2857         jme_disable_shadow(jme);
2858
2859         if(netif_carrier_ok(netdev)) {
2860                 jme_stop_pcc_timer(jme);
2861                 jme_reset_mac_processor(jme);
2862                 jme_free_rx_resources(jme);
2863                 jme_free_tx_resources(jme);
2864                 netif_carrier_off(netdev);
2865                 jme->phylink = 0;
2866
2867                 if(jme->flags & JME_FLAG_POLL)
2868                         jme_polling_mode(jme);
2869         }
2870
2871
2872         pci_save_state(pdev);
2873         if(jme->reg_pmcs) {
2874                 jme_set_100m_half(jme);
2875                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2876                 pci_enable_wake(pdev, PCI_D3hot, true);
2877                 pci_enable_wake(pdev, PCI_D3cold, true);
2878         }
2879         else {
2880                 jme_phy_off(jme);
2881                 pci_enable_wake(pdev, PCI_D3hot, false);
2882                 pci_enable_wake(pdev, PCI_D3cold, false);
2883         }
2884         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2885
2886         return 0;
2887 }
2888
2889 static int
2890 jme_resume(struct pci_dev *pdev)
2891 {
2892         struct net_device *netdev = pci_get_drvdata(pdev);
2893         struct jme_adapter *jme = netdev_priv(netdev);
2894
2895         jme_clear_pm(jme);
2896         pci_restore_state(pdev);
2897
2898         if(jme->flags & JME_FLAG_SSET)
2899                 jme_set_settings(netdev, &jme->old_ecmd);
2900         else
2901                 jme_reset_phy_processor(jme);
2902
2903         jme_reset_mac_processor(jme);
2904         jme_enable_shadow(jme);
2905         jme_request_irq(jme);
2906         jme_start_irq(jme);
2907         netif_device_attach(netdev);
2908
2909         atomic_inc(&jme->link_changing);
2910
2911         jme_reset_link(jme);
2912
2913         return 0;
2914 }
2915
2916 static struct pci_device_id jme_pci_tbl[] = {
2917         { PCI_VDEVICE(JMICRON, 0x250) },
2918         { }
2919 };
2920
2921 static struct pci_driver jme_driver = {
2922         .name           = DRV_NAME,
2923         .id_table       = jme_pci_tbl,
2924         .probe          = jme_init_one,
2925         .remove         = __devexit_p(jme_remove_one),
2926 #ifdef CONFIG_PM
2927         .suspend        = jme_suspend,
2928         .resume         = jme_resume,
2929 #endif /* CONFIG_PM */
2930 };
2931
2932 static int __init
2933 jme_init_module(void)
2934 {
2935         printk(KERN_INFO PFX "JMicron JMC250 gigabit ethernet "
2936                "driver version %s\n", DRV_VERSION);
2937         return pci_register_driver(&jme_driver);
2938 }
2939
2940 static void __exit
2941 jme_cleanup_module(void)
2942 {
2943         pci_unregister_driver(&jme_driver);
2944 }
2945
2946 module_init(jme_init_module);
2947 module_exit(jme_cleanup_module);
2948
2949 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
2950 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
2951 MODULE_LICENSE("GPL");
2952 MODULE_VERSION(DRV_VERSION);
2953 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
2954