jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 static int
  63 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  64 {
  65         struct jme_adapter *jme = netdev_priv(netdev);
  66         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  67
  68 read_again:
  69         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  70                                 smi_phy_addr(phy) |
  71                                 smi_reg_addr(reg));
  72
  73         wmb();
  74         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  75                 udelay(20);
  76                 val = jread32(jme, JME_SMI);
  77                 if ((val & SMI_OP_REQ) == 0)
  78                         break;
  79         }
  80
  81         if (i == 0) {
  82                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  83                 return 0;
  84         }
  85
  86         if (again--)
  87                 goto read_again;
  88
  89         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
  90 }
  91
  92 static void
  93 jme_mdio_write(struct net_device *netdev,
  94                                 int phy, int reg, int val)
  95 {
  96         struct jme_adapter *jme = netdev_priv(netdev);
  97         int i;
  98
  99         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 100                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 101                 smi_phy_addr(phy) | smi_reg_addr(reg));
 102
 103         wmb();
 104         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 105                 udelay(20);
 106                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 107                         break;
 108         }
 109
 110         if (i == 0)
 111                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 112 }
 113
 114 static inline void
 115 jme_reset_phy_processor(struct jme_adapter *jme)
 116 {
 117         u32 val;
 118
 119         jme_mdio_write(jme->dev,
 120                         jme->mii_if.phy_id,
 121                         MII_ADVERTISE, ADVERTISE_ALL |
 122                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 123
 124         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 125                 jme_mdio_write(jme->dev,
 126                                 jme->mii_if.phy_id,
 127                                 MII_CTRL1000,
 128                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 129
 130         val = jme_mdio_read(jme->dev,
 131                                 jme->mii_if.phy_id,
 132                                 MII_BMCR);
 133
 134         jme_mdio_write(jme->dev,
 135                         jme->mii_if.phy_id,
 136                         MII_BMCR, val | BMCR_RESET);
 137 }
 138
 139 static void
 140 jme_setup_wakeup_frame(struct jme_adapter *jme,
 141                 u32 *mask, u32 crc, int fnr)
 142 {
 143         int i;
 144
 145         /*
 146          * Setup CRC pattern
 147          */
 148         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 149         wmb();
 150         jwrite32(jme, JME_WFODP, crc);
 151         wmb();
 152
 153         /*
 154          * Setup Mask
 155          */
 156         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 157                 jwrite32(jme, JME_WFOI,
 158                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 159                                 (fnr & WFOI_FRAME_SEL));
 160                 wmb();
 161                 jwrite32(jme, JME_WFODP, mask[i]);
 162                 wmb();
 163         }
 164 }
 165
 166 static inline void
 167 jme_reset_mac_processor(struct jme_adapter *jme)
 168 {
 169         u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 170         u32 crc = 0xCDCDCDCD;
 171         u32 gpreg0;
 172         int i;
 173
 174         jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
 175         udelay(2);
 176         jwrite32(jme, JME_GHC, jme->reg_ghc);
 177
 178         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 179         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 180         jwrite32(jme, JME_RXQDC, 0x00000000);
 181         jwrite32(jme, JME_RXNDA, 0x00000000);
 182         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 183         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 184         jwrite32(jme, JME_TXQDC, 0x00000000);
 185         jwrite32(jme, JME_TXNDA, 0x00000000);
 186
 187         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 188         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 189         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 190                 jme_setup_wakeup_frame(jme, mask, crc, i);
 191         if (jme->fpgaver)
 192                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 193         else
 194                 gpreg0 = GPREG0_DEFAULT;
 195         jwrite32(jme, JME_GPREG0, gpreg0);
 196         jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
 197 }
 198
 199 static inline void
 200 jme_reset_ghc_speed(struct jme_adapter *jme)
 201 {
 202         jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
 203         jwrite32(jme, JME_GHC, jme->reg_ghc);
 204 }
 205
 206 static inline void
 207 jme_clear_pm(struct jme_adapter *jme)
 208 {
 209         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 210         pci_set_power_state(jme->pdev, PCI_D0);
 211         pci_enable_wake(jme->pdev, PCI_D0, false);
 212 }
 213
 214 static int
 215 jme_reload_eeprom(struct jme_adapter *jme)
 216 {
 217         u32 val;
 218         int i;
 219
 220         val = jread32(jme, JME_SMBCSR);
 221
 222         if (val & SMBCSR_EEPROMD) {
 223                 val |= SMBCSR_CNACK;
 224                 jwrite32(jme, JME_SMBCSR, val);
 225                 val |= SMBCSR_RELOAD;
 226                 jwrite32(jme, JME_SMBCSR, val);
 227                 mdelay(12);
 228
 229                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 230                         mdelay(1);
 231                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 232                                 break;
 233                 }
 234
 235                 if (i == 0) {
 236                         pr_err("eeprom reload timeout\n");
 237                         return -EIO;
 238                 }
 239         }
 240
 241         return 0;
 242 }
 243
 244 static void
 245 jme_load_macaddr(struct net_device *netdev)
 246 {
 247         struct jme_adapter *jme = netdev_priv(netdev);
 248         unsigned char macaddr[6];
 249         u32 val;
 250
 251         spin_lock_bh(&jme->macaddr_lock);
 252         val = jread32(jme, JME_RXUMA_LO);
 253         macaddr[0] = (val >>  0) & 0xFF;
 254         macaddr[1] = (val >>  8) & 0xFF;
 255         macaddr[2] = (val >> 16) & 0xFF;
 256         macaddr[3] = (val >> 24) & 0xFF;
 257         val = jread32(jme, JME_RXUMA_HI);
 258         macaddr[4] = (val >>  0) & 0xFF;
 259         macaddr[5] = (val >>  8) & 0xFF;
 260         memcpy(netdev->dev_addr, macaddr, 6);
 261         spin_unlock_bh(&jme->macaddr_lock);
 262 }
 263
 264 static inline void
 265 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 266 {
 267         switch (p) {
 268         case PCC_OFF:
 269                 jwrite32(jme, JME_PCCRX0,
 270                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 271                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 272                 break;
 273         case PCC_P1:
 274                 jwrite32(jme, JME_PCCRX0,
 275                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 276                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 277                 break;
 278         case PCC_P2:
 279                 jwrite32(jme, JME_PCCRX0,
 280                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 281                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 282                 break;
 283         case PCC_P3:
 284                 jwrite32(jme, JME_PCCRX0,
 285                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 286                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 287                 break;
 288         default:
 289                 break;
 290         }
 291         wmb();
 292
 293         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 294                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 295 }
 296
 297 static void
 298 jme_start_irq(struct jme_adapter *jme)
 299 {
 300         register struct dynpcc_info *dpi = &(jme->dpi);
 301
 302         jme_set_rx_pcc(jme, PCC_P1);
 303         dpi->cur                = PCC_P1;
 304         dpi->attempt            = PCC_P1;
 305         dpi->cnt                = 0;
 306
 307         jwrite32(jme, JME_PCCTX,
 308                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 309                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 310                         PCCTXQ0_EN
 311                 );
 312
 313         /*
 314          * Enable Interrupts
 315          */
 316         jwrite32(jme, JME_IENS, INTR_ENABLE);
 317 }
 318
 319 static inline void
 320 jme_stop_irq(struct jme_adapter *jme)
 321 {
 322         /*
 323          * Disable Interrupts
 324          */
 325         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 326 }
 327
 328 static u32
 329 jme_linkstat_from_phy(struct jme_adapter *jme)
 330 {
 331         u32 phylink, bmsr;
 332
 333         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 334         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 335         if (bmsr & BMSR_ANCOMP)
 336                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 337
 338         return phylink;
 339 }
 340
 341 static inline void
 342 jme_set_phyfifoa(struct jme_adapter *jme)
 343 {
 344         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 345 }
 346
 347 static inline void
 348 jme_set_phyfifob(struct jme_adapter *jme)
 349 {
 350         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 351 }
 352
 353 static int
 354 jme_check_link(struct net_device *netdev, int testonly)
 355 {
 356         struct jme_adapter *jme = netdev_priv(netdev);
 357         u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
 358         char linkmsg[64];
 359         int rc = 0;
 360
 361         linkmsg[0] = '\0';
 362
 363         if (jme->fpgaver)
 364                 phylink = jme_linkstat_from_phy(jme);
 365         else
 366                 phylink = jread32(jme, JME_PHY_LINK);
 367
 368         if (phylink & PHY_LINK_UP) {
 369                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 370                         /*
 371                          * If we did not enable AN
 372                          * Speed/Duplex Info should be obtained from SMI
 373                          */
 374                         phylink = PHY_LINK_UP;
 375
 376                         bmcr = jme_mdio_read(jme->dev,
 377                                                 jme->mii_if.phy_id,
 378                                                 MII_BMCR);
 379
 380                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 381                                         (bmcr & BMCR_SPEED100) == 0) ?
 382                                         PHY_LINK_SPEED_1000M :
 383                                         (bmcr & BMCR_SPEED100) ?
 384                                         PHY_LINK_SPEED_100M :
 385                                         PHY_LINK_SPEED_10M;
 386
 387                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 388                                          PHY_LINK_DUPLEX : 0;
 389
 390                         strcat(linkmsg, "Forced: ");
 391                 } else {
 392                         /*
 393                          * Keep polling for speed/duplex resolve complete
 394                          */
 395                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 396                                 --cnt) {
 397
 398                                 udelay(1);
 399
 400                                 if (jme->fpgaver)
 401                                         phylink = jme_linkstat_from_phy(jme);
 402                                 else
 403                                         phylink = jread32(jme, JME_PHY_LINK);
 404                         }
 405                         if (!cnt)
 406                                 pr_err("Waiting speed resolve timeout\n");
 407
 408                         strcat(linkmsg, "ANed: ");
 409                 }
 410
 411                 if (jme->phylink == phylink) {
 412                         rc = 1;
 413                         goto out;
 414                 }
 415                 if (testonly)
 416                         goto out;
 417
 418                 jme->phylink = phylink;
 419
 420                 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
 421                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
 422                                 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
 423                 switch (phylink & PHY_LINK_SPEED_MASK) {
 424                 case PHY_LINK_SPEED_10M:
 425                         ghc |= GHC_SPEED_10M |
 426                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 427                         strcat(linkmsg, "10 Mbps, ");
 428                         break;
 429                 case PHY_LINK_SPEED_100M:
 430                         ghc |= GHC_SPEED_100M |
 431                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 432                         strcat(linkmsg, "100 Mbps, ");
 433                         break;
 434                 case PHY_LINK_SPEED_1000M:
 435                         ghc |= GHC_SPEED_1000M |
 436                                 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 437                         strcat(linkmsg, "1000 Mbps, ");
 438                         break;
 439                 default:
 440                         break;
 441                 }
 442
 443                 if (phylink & PHY_LINK_DUPLEX) {
 444                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 445                         ghc |= GHC_DPX;
 446                 } else {
 447                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 448                                                 TXMCS_BACKOFF |
 449                                                 TXMCS_CARRIERSENSE |
 450                                                 TXMCS_COLLISION);
 451                         jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
 452                                 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
 453                                 TXTRHD_TXREN |
 454                                 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
 455                 }
 456
 457                 gpreg1 = GPREG1_DEFAULT;
 458                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 459                         if (!(phylink & PHY_LINK_DUPLEX))
 460                                 gpreg1 |= GPREG1_HALFMODEPATCH;
 461                         switch (phylink & PHY_LINK_SPEED_MASK) {
 462                         case PHY_LINK_SPEED_10M:
 463                                 jme_set_phyfifoa(jme);
 464                                 gpreg1 |= GPREG1_RSSPATCH;
 465                                 break;
 466                         case PHY_LINK_SPEED_100M:
 467                                 jme_set_phyfifob(jme);
 468                                 gpreg1 |= GPREG1_RSSPATCH;
 469                                 break;
 470                         case PHY_LINK_SPEED_1000M:
 471                                 jme_set_phyfifoa(jme);
 472                                 break;
 473                         default:
 474                                 break;
 475                         }
 476                 }
 477
 478                 jwrite32(jme, JME_GPREG1, gpreg1);
 479                 jwrite32(jme, JME_GHC, ghc);
 480                 jme->reg_ghc = ghc;
 481
 482                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 483                                         "Full-Duplex, " :
 484                                         "Half-Duplex, ");
 485                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 486                                         "MDI-X" :
 487                                         "MDI");
 488                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 489                 netif_carrier_on(netdev);
 490         } else {
 491                 if (testonly)
 492                         goto out;
 493
 494                 netif_info(jme, link, jme->dev, "Link is down\n");
 495                 jme->phylink = 0;
 496                 netif_carrier_off(netdev);
 497         }
 498
 499 out:
 500         return rc;
 501 }
 502
 503 static int
 504 jme_setup_tx_resources(struct jme_adapter *jme)
 505 {
 506         struct jme_ring *txring = &(jme->txring[0]);
 507
 508         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 509                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 510                                    &(txring->dmaalloc),
 511                                    GFP_ATOMIC);
 512
 513         if (!txring->alloc)
 514                 goto err_set_null;
 515
 516         /*
 517          * 16 Bytes align
 518          */
 519         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 520                                                 RING_DESC_ALIGN);
 521         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 522         txring->next_to_use     = 0;
 523         atomic_set(&txring->next_to_clean, 0);
 524         atomic_set(&txring->nr_free, jme->tx_ring_size);
 525
 526         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 527                                         jme->tx_ring_size, GFP_ATOMIC);
 528         if (unlikely(!(txring->bufinf)))
 529                 goto err_free_txring;
 530
 531         /*
 532          * Initialize Transmit Descriptors
 533          */
 534         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 535         memset(txring->bufinf, 0,
 536                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 537
 538         return 0;
 539
 540 err_free_txring:
 541         dma_free_coherent(&(jme->pdev->dev),
 542                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 543                           txring->alloc,
 544                           txring->dmaalloc);
 545
 546 err_set_null:
 547         txring->desc = NULL;
 548         txring->dmaalloc = 0;
 549         txring->dma = 0;
 550         txring->bufinf = NULL;
 551
 552         return -ENOMEM;
 553 }
 554
 555 static void
 556 jme_free_tx_resources(struct jme_adapter *jme)
 557 {
 558         int i;
 559         struct jme_ring *txring = &(jme->txring[0]);
 560         struct jme_buffer_info *txbi;
 561
 562         if (txring->alloc) {
 563                 if (txring->bufinf) {
 564                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 565                                 txbi = txring->bufinf + i;
 566                                 if (txbi->skb) {
 567                                         dev_kfree_skb(txbi->skb);
 568                                         txbi->skb = NULL;
 569                                 }
 570                                 txbi->mapping           = 0;
 571                                 txbi->len               = 0;
 572                                 txbi->nr_desc           = 0;
 573                                 txbi->start_xmit        = 0;
 574                         }
 575                         kfree(txring->bufinf);
 576                 }
 577
 578                 dma_free_coherent(&(jme->pdev->dev),
 579                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 580                                   txring->alloc,
 581                                   txring->dmaalloc);
 582
 583                 txring->alloc           = NULL;
 584                 txring->desc            = NULL;
 585                 txring->dmaalloc        = 0;
 586                 txring->dma             = 0;
 587                 txring->bufinf          = NULL;
 588         }
 589         txring->next_to_use     = 0;
 590         atomic_set(&txring->next_to_clean, 0);
 591         atomic_set(&txring->nr_free, 0);
 592 }
 593
 594 static inline void
 595 jme_enable_tx_engine(struct jme_adapter *jme)
 596 {
 597         /*
 598          * Select Queue 0
 599          */
 600         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 601         wmb();
 602
 603         /*
 604          * Setup TX Queue 0 DMA Bass Address
 605          */
 606         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 607         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 608         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 609
 610         /*
 611          * Setup TX Descptor Count
 612          */
 613         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 614
 615         /*
 616          * Enable TX Engine
 617          */
 618         wmb();
 619         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 620                                 TXCS_SELECT_QUEUE0 |
 621                                 TXCS_ENABLE);
 622
 623 }
 624
 625 static inline void
 626 jme_restart_tx_engine(struct jme_adapter *jme)
 627 {
 628         /*
 629          * Restart TX Engine
 630          */
 631         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 632                                 TXCS_SELECT_QUEUE0 |
 633                                 TXCS_ENABLE);
 634 }
 635
 636 static inline void
 637 jme_disable_tx_engine(struct jme_adapter *jme)
 638 {
 639         int i;
 640         u32 val;
 641
 642         /*
 643          * Disable TX Engine
 644          */
 645         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 646         wmb();
 647
 648         val = jread32(jme, JME_TXCS);
 649         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 650                 mdelay(1);
 651                 val = jread32(jme, JME_TXCS);
 652                 rmb();
 653         }
 654
 655         if (!i)
 656                 pr_err("Disable TX engine timeout\n");
 657 }
 658
 659 static void
 660 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 661 {
 662         struct jme_ring *rxring = &(jme->rxring[0]);
 663         register struct rxdesc *rxdesc = rxring->desc;
 664         struct jme_buffer_info *rxbi = rxring->bufinf;
 665         rxdesc += i;
 666         rxbi += i;
 667
 668         rxdesc->dw[0] = 0;
 669         rxdesc->dw[1] = 0;
 670         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 671         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 672                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 673         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 674         if (jme->dev->features & NETIF_F_HIGHDMA)
 675                 rxdesc->desc1.flags = RXFLAG_64BIT;
 676         wmb();
 677         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 678 }
 679
 680 static int
 681 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 682 {
 683         struct jme_ring *rxring = &(jme->rxring[0]);
 684         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 685         struct sk_buff *skb;
 686
 687         skb = netdev_alloc_skb(jme->dev,
 688                 jme->dev->mtu + RX_EXTRA_LEN);
 689         if (unlikely(!skb))
 690                 return -ENOMEM;
 691 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 692         skb->dev = jme->dev;
 693 #endif
 694
 695         rxbi->skb = skb;
 696         rxbi->len = skb_tailroom(skb);
 697         rxbi->mapping = pci_map_page(jme->pdev,
 698                                         virt_to_page(skb->data),
 699                                         offset_in_page(skb->data),
 700                                         rxbi->len,
 701                                         PCI_DMA_FROMDEVICE);
 702
 703         return 0;
 704 }
 705
 706 static void
 707 jme_free_rx_buf(struct jme_adapter *jme, int i)
 708 {
 709         struct jme_ring *rxring = &(jme->rxring[0]);
 710         struct jme_buffer_info *rxbi = rxring->bufinf;
 711         rxbi += i;
 712
 713         if (rxbi->skb) {
 714                 pci_unmap_page(jme->pdev,
 715                                  rxbi->mapping,
 716                                  rxbi->len,
 717                                  PCI_DMA_FROMDEVICE);
 718                 dev_kfree_skb(rxbi->skb);
 719                 rxbi->skb = NULL;
 720                 rxbi->mapping = 0;
 721                 rxbi->len = 0;
 722         }
 723 }
 724
 725 static void
 726 jme_free_rx_resources(struct jme_adapter *jme)
 727 {
 728         int i;
 729         struct jme_ring *rxring = &(jme->rxring[0]);
 730
 731         if (rxring->alloc) {
 732                 if (rxring->bufinf) {
 733                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 734                                 jme_free_rx_buf(jme, i);
 735                         kfree(rxring->bufinf);
 736                 }
 737
 738                 dma_free_coherent(&(jme->pdev->dev),
 739                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 740                                   rxring->alloc,
 741                                   rxring->dmaalloc);
 742                 rxring->alloc    = NULL;
 743                 rxring->desc     = NULL;
 744                 rxring->dmaalloc = 0;
 745                 rxring->dma      = 0;
 746                 rxring->bufinf   = NULL;
 747         }
 748         rxring->next_to_use   = 0;
 749         atomic_set(&rxring->next_to_clean, 0);
 750 }
 751
 752 static int
 753 jme_setup_rx_resources(struct jme_adapter *jme)
 754 {
 755         int i;
 756         struct jme_ring *rxring = &(jme->rxring[0]);
 757
 758         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 759                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 760                                    &(rxring->dmaalloc),
 761                                    GFP_ATOMIC);
 762         if (!rxring->alloc)
 763                 goto err_set_null;
 764
 765         /*
 766          * 16 Bytes align
 767          */
 768         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 769                                                 RING_DESC_ALIGN);
 770         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 771         rxring->next_to_use     = 0;
 772         atomic_set(&rxring->next_to_clean, 0);
 773
 774         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 775                                         jme->rx_ring_size, GFP_ATOMIC);
 776         if (unlikely(!(rxring->bufinf)))
 777                 goto err_free_rxring;
 778
 779         /*
 780          * Initiallize Receive Descriptors
 781          */
 782         memset(rxring->bufinf, 0,
 783                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 784         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 785                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 786                         jme_free_rx_resources(jme);
 787                         return -ENOMEM;
 788                 }
 789
 790                 jme_set_clean_rxdesc(jme, i);
 791         }
 792
 793         return 0;
 794
 795 err_free_rxring:
 796         dma_free_coherent(&(jme->pdev->dev),
 797                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 798                           rxring->alloc,
 799                           rxring->dmaalloc);
 800 err_set_null:
 801         rxring->desc = NULL;
 802         rxring->dmaalloc = 0;
 803         rxring->dma = 0;
 804         rxring->bufinf = NULL;
 805
 806         return -ENOMEM;
 807 }
 808
 809 static inline void
 810 jme_enable_rx_engine(struct jme_adapter *jme)
 811 {
 812         /*
 813          * Select Queue 0
 814          */
 815         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 816                                 RXCS_QUEUESEL_Q0);
 817         wmb();
 818
 819         /*
 820          * Setup RX DMA Bass Address
 821          */
 822         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 823         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 824         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 825
 826         /*
 827          * Setup RX Descriptor Count
 828          */
 829         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 830
 831         /*
 832          * Setup Unicast Filter
 833          */
 834         jme_set_multi(jme->dev);
 835
 836         /*
 837          * Enable RX Engine
 838          */
 839         wmb();
 840         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 841                                 RXCS_QUEUESEL_Q0 |
 842                                 RXCS_ENABLE |
 843                                 RXCS_QST);
 844 }
 845
 846 static inline void
 847 jme_restart_rx_engine(struct jme_adapter *jme)
 848 {
 849         /*
 850          * Start RX Engine
 851          */
 852         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 853                                 RXCS_QUEUESEL_Q0 |
 854                                 RXCS_ENABLE |
 855                                 RXCS_QST);
 856 }
 857
 858 static inline void
 859 jme_disable_rx_engine(struct jme_adapter *jme)
 860 {
 861         int i;
 862         u32 val;
 863
 864         /*
 865          * Disable RX Engine
 866          */
 867         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 868         wmb();
 869
 870         val = jread32(jme, JME_RXCS);
 871         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 872                 mdelay(1);
 873                 val = jread32(jme, JME_RXCS);
 874                 rmb();
 875         }
 876
 877         if (!i)
 878                 pr_err("Disable RX engine timeout\n");
 879
 880 }
 881
 882 static int
 883 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
 884 {
 885         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
 886                 return false;
 887
 888         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
 889                         == RXWBFLAG_TCPON)) {
 890                 if (flags & RXWBFLAG_IPV4)
 891                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
 892                 return false;
 893         }
 894
 895         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
 896                         == RXWBFLAG_UDPON)) {
 897                 if (flags & RXWBFLAG_IPV4)
 898                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
 899                 return false;
 900         }
 901
 902         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
 903                         == RXWBFLAG_IPV4)) {
 904                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
 905                 return false;
 906         }
 907
 908         return true;
 909 }
 910
 911 static void
 912 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 913 {
 914         struct jme_ring *rxring = &(jme->rxring[0]);
 915         struct rxdesc *rxdesc = rxring->desc;
 916         struct jme_buffer_info *rxbi = rxring->bufinf;
 917         struct sk_buff *skb;
 918         int framesize;
 919
 920         rxdesc += idx;
 921         rxbi += idx;
 922
 923         skb = rxbi->skb;
 924         pci_dma_sync_single_for_cpu(jme->pdev,
 925                                         rxbi->mapping,
 926                                         rxbi->len,
 927                                         PCI_DMA_FROMDEVICE);
 928
 929         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
 930                 pci_dma_sync_single_for_device(jme->pdev,
 931                                                 rxbi->mapping,
 932                                                 rxbi->len,
 933                                                 PCI_DMA_FROMDEVICE);
 934
 935                 ++(NET_STAT(jme).rx_dropped);
 936         } else {
 937                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
 938                                 - RX_PREPAD_SIZE;
 939
 940                 skb_reserve(skb, RX_PREPAD_SIZE);
 941                 skb_put(skb, framesize);
 942                 skb->protocol = eth_type_trans(skb, jme->dev);
 943
 944                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
 945                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 946                 else
 947 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
 948                         skb->ip_summed = CHECKSUM_NONE;
 949 #else
 950                         skb_checksum_none_assert(skb);
 951 #endif
 952
 953                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
 954                         if (jme->vlgrp) {
 955                                 jme->jme_vlan_rx(skb, jme->vlgrp,
 956                                         le16_to_cpu(rxdesc->descwb.vlan));
 957                                 NET_STAT(jme).rx_bytes += 4;
 958                         } else {
 959                                 dev_kfree_skb(skb);
 960                         }
 961                 } else {
 962                         jme->jme_rx(skb);
 963                 }
 964
 965                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
 966                     cpu_to_le16(RXWBFLAG_DEST_MUL))
 967                         ++(NET_STAT(jme).multicast);
 968
 969                 NET_STAT(jme).rx_bytes += framesize;
 970                 ++(NET_STAT(jme).rx_packets);
 971         }
 972
 973         jme_set_clean_rxdesc(jme, idx);
 974
 975 }
 976
 977 static int
 978 jme_process_receive(struct jme_adapter *jme, int limit)
 979 {
 980         struct jme_ring *rxring = &(jme->rxring[0]);
 981         struct rxdesc *rxdesc = rxring->desc;
 982         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
 983
 984         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
 985                 goto out_inc;
 986
 987         if (unlikely(atomic_read(&jme->link_changing) != 1))
 988                 goto out_inc;
 989
 990         if (unlikely(!netif_carrier_ok(jme->dev)))
 991                 goto out_inc;
 992
 993         i = atomic_read(&rxring->next_to_clean);
 994         while (limit > 0) {
 995                 rxdesc = rxring->desc;
 996                 rxdesc += i;
 997
 998                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
 999                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1000                         goto out;
1001                 --limit;
1002
1003                 rmb();
1004                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1005
1006                 if (unlikely(desccnt > 1 ||
1007                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1008
1009                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1010                                 ++(NET_STAT(jme).rx_crc_errors);
1011                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1012                                 ++(NET_STAT(jme).rx_fifo_errors);
1013                         else
1014                                 ++(NET_STAT(jme).rx_errors);
1015
1016                         if (desccnt > 1)
1017                                 limit -= desccnt - 1;
1018
1019                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1020                                 jme_set_clean_rxdesc(jme, j);
1021                                 j = (j + 1) & (mask);
1022                         }
1023
1024                 } else {
1025                         jme_alloc_and_feed_skb(jme, i);
1026                 }
1027
1028                 i = (i + desccnt) & (mask);
1029         }
1030
1031 out:
1032         atomic_set(&rxring->next_to_clean, i);
1033
1034 out_inc:
1035         atomic_inc(&jme->rx_cleaning);
1036
1037         return limit > 0 ? limit : 0;
1038
1039 }
1040
1041 static void
1042 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1043 {
1044         if (likely(atmp == dpi->cur)) {
1045                 dpi->cnt = 0;
1046                 return;
1047         }
1048
1049         if (dpi->attempt == atmp) {
1050                 ++(dpi->cnt);
1051         } else {
1052                 dpi->attempt = atmp;
1053                 dpi->cnt = 0;
1054         }
1055
1056 }
1057
1058 static void
1059 jme_dynamic_pcc(struct jme_adapter *jme)
1060 {
1061         register struct dynpcc_info *dpi = &(jme->dpi);
1062
1063         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1064                 jme_attempt_pcc(dpi, PCC_P3);
1065         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1066                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1067                 jme_attempt_pcc(dpi, PCC_P2);
1068         else
1069                 jme_attempt_pcc(dpi, PCC_P1);
1070
1071         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1072                 if (dpi->attempt < dpi->cur)
1073                         tasklet_schedule(&jme->rxclean_task);
1074                 jme_set_rx_pcc(jme, dpi->attempt);
1075                 dpi->cur = dpi->attempt;
1076                 dpi->cnt = 0;
1077         }
1078 }
1079
1080 static void
1081 jme_start_pcc_timer(struct jme_adapter *jme)
1082 {
1083         struct dynpcc_info *dpi = &(jme->dpi);
1084         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1085         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1086         dpi->intr_cnt           = 0;
1087         jwrite32(jme, JME_TMCSR,
1088                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1089 }
1090
1091 static inline void
1092 jme_stop_pcc_timer(struct jme_adapter *jme)
1093 {
1094         jwrite32(jme, JME_TMCSR, 0);
1095 }
1096
1097 static void
1098 jme_shutdown_nic(struct jme_adapter *jme)
1099 {
1100         u32 phylink;
1101
1102         phylink = jme_linkstat_from_phy(jme);
1103
1104         if (!(phylink & PHY_LINK_UP)) {
1105                 /*
1106                  * Disable all interrupt before issue timer
1107                  */
1108                 jme_stop_irq(jme);
1109                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1110         }
1111 }
1112
1113 static void
1114 jme_pcc_tasklet(unsigned long arg)
1115 {
1116         struct jme_adapter *jme = (struct jme_adapter *)arg;
1117         struct net_device *netdev = jme->dev;
1118
1119         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1120                 jme_shutdown_nic(jme);
1121                 return;
1122         }
1123
1124         if (unlikely(!netif_carrier_ok(netdev) ||
1125                 (atomic_read(&jme->link_changing) != 1)
1126         )) {
1127                 jme_stop_pcc_timer(jme);
1128                 return;
1129         }
1130
1131         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1132                 jme_dynamic_pcc(jme);
1133
1134         jme_start_pcc_timer(jme);
1135 }
1136
1137 static inline void
1138 jme_polling_mode(struct jme_adapter *jme)
1139 {
1140         jme_set_rx_pcc(jme, PCC_OFF);
1141 }
1142
1143 static inline void
1144 jme_interrupt_mode(struct jme_adapter *jme)
1145 {
1146         jme_set_rx_pcc(jme, PCC_P1);
1147 }
1148
1149 static inline int
1150 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1151 {
1152         u32 apmc;
1153         apmc = jread32(jme, JME_APMC);
1154         return apmc & JME_APMC_PSEUDO_HP_EN;
1155 }
1156
1157 static void
1158 jme_start_shutdown_timer(struct jme_adapter *jme)
1159 {
1160         u32 apmc;
1161
1162         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1163         apmc &= ~JME_APMC_EPIEN_CTRL;
1164         if (!no_extplug) {
1165                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1166                 wmb();
1167         }
1168         jwrite32f(jme, JME_APMC, apmc);
1169
1170         jwrite32f(jme, JME_TIMER2, 0);
1171         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1172         jwrite32(jme, JME_TMCSR,
1173                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1174 }
1175
1176 static void
1177 jme_stop_shutdown_timer(struct jme_adapter *jme)
1178 {
1179         u32 apmc;
1180
1181         jwrite32f(jme, JME_TMCSR, 0);
1182         jwrite32f(jme, JME_TIMER2, 0);
1183         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1184
1185         apmc = jread32(jme, JME_APMC);
1186         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1187         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1188         wmb();
1189         jwrite32f(jme, JME_APMC, apmc);
1190 }
1191
1192 static void
1193 jme_link_change_tasklet(unsigned long arg)
1194 {
1195         struct jme_adapter *jme = (struct jme_adapter *)arg;
1196         struct net_device *netdev = jme->dev;
1197         int rc;
1198
1199         while (!atomic_dec_and_test(&jme->link_changing)) {
1200                 atomic_inc(&jme->link_changing);
1201                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1202                 while (atomic_read(&jme->link_changing) != 1)
1203                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1204         }
1205
1206         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1207                 goto out;
1208
1209         jme->old_mtu = netdev->mtu;
1210         netif_stop_queue(netdev);
1211         if (jme_pseudo_hotplug_enabled(jme))
1212                 jme_stop_shutdown_timer(jme);
1213
1214         jme_stop_pcc_timer(jme);
1215         tasklet_disable(&jme->txclean_task);
1216         tasklet_disable(&jme->rxclean_task);
1217         tasklet_disable(&jme->rxempty_task);
1218
1219         if (netif_carrier_ok(netdev)) {
1220                 jme_reset_ghc_speed(jme);
1221                 jme_disable_rx_engine(jme);
1222                 jme_disable_tx_engine(jme);
1223                 jme_reset_mac_processor(jme);
1224                 jme_free_rx_resources(jme);
1225                 jme_free_tx_resources(jme);
1226
1227                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1228                         jme_polling_mode(jme);
1229
1230                 netif_carrier_off(netdev);
1231         }
1232
1233         jme_check_link(netdev, 0);
1234         if (netif_carrier_ok(netdev)) {
1235                 rc = jme_setup_rx_resources(jme);
1236                 if (rc) {
1237                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1238                         goto out_enable_tasklet;
1239                 }
1240
1241                 rc = jme_setup_tx_resources(jme);
1242                 if (rc) {
1243                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1244                         goto err_out_free_rx_resources;
1245                 }
1246
1247                 jme_enable_rx_engine(jme);
1248                 jme_enable_tx_engine(jme);
1249
1250                 netif_start_queue(netdev);
1251
1252                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1253                         jme_interrupt_mode(jme);
1254
1255                 jme_start_pcc_timer(jme);
1256         } else if (jme_pseudo_hotplug_enabled(jme)) {
1257                 jme_start_shutdown_timer(jme);
1258         }
1259
1260         goto out_enable_tasklet;
1261
1262 err_out_free_rx_resources:
1263         jme_free_rx_resources(jme);
1264 out_enable_tasklet:
1265         tasklet_enable(&jme->txclean_task);
1266         tasklet_hi_enable(&jme->rxclean_task);
1267         tasklet_hi_enable(&jme->rxempty_task);
1268 out:
1269         atomic_inc(&jme->link_changing);
1270 }
1271
1272 static void
1273 jme_rx_clean_tasklet(unsigned long arg)
1274 {
1275         struct jme_adapter *jme = (struct jme_adapter *)arg;
1276         struct dynpcc_info *dpi = &(jme->dpi);
1277
1278         jme_process_receive(jme, jme->rx_ring_size);
1279         ++(dpi->intr_cnt);
1280
1281 }
1282
1283 static int
1284 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1285 {
1286         struct jme_adapter *jme = jme_napi_priv(holder);
1287         DECLARE_NETDEV
1288         int rest;
1289
1290         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1291
1292         while (atomic_read(&jme->rx_empty) > 0) {
1293                 atomic_dec(&jme->rx_empty);
1294                 ++(NET_STAT(jme).rx_dropped);
1295                 jme_restart_rx_engine(jme);
1296         }
1297         atomic_inc(&jme->rx_empty);
1298
1299         if (rest) {
1300                 JME_RX_COMPLETE(netdev, holder);
1301                 jme_interrupt_mode(jme);
1302         }
1303
1304         JME_NAPI_WEIGHT_SET(budget, rest);
1305         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1306 }
1307
1308 static void
1309 jme_rx_empty_tasklet(unsigned long arg)
1310 {
1311         struct jme_adapter *jme = (struct jme_adapter *)arg;
1312
1313         if (unlikely(atomic_read(&jme->link_changing) != 1))
1314                 return;
1315
1316         if (unlikely(!netif_carrier_ok(jme->dev)))
1317                 return;
1318
1319         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1320
1321         jme_rx_clean_tasklet(arg);
1322
1323         while (atomic_read(&jme->rx_empty) > 0) {
1324                 atomic_dec(&jme->rx_empty);
1325                 ++(NET_STAT(jme).rx_dropped);
1326                 jme_restart_rx_engine(jme);
1327         }
1328         atomic_inc(&jme->rx_empty);
1329 }
1330
1331 static void
1332 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1333 {
1334         struct jme_ring *txring = &(jme->txring[0]);
1335
1336         smp_wmb();
1337         if (unlikely(netif_queue_stopped(jme->dev) &&
1338         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1339                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1340                 netif_wake_queue(jme->dev);
1341         }
1342
1343 }
1344
1345 static void
1346 jme_tx_clean_tasklet(unsigned long arg)
1347 {
1348         struct jme_adapter *jme = (struct jme_adapter *)arg;
1349         struct jme_ring *txring = &(jme->txring[0]);
1350         struct txdesc *txdesc = txring->desc;
1351         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1352         int i, j, cnt = 0, max, err, mask;
1353
1354         tx_dbg(jme, "Into txclean\n");
1355
1356         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1357                 goto out;
1358
1359         if (unlikely(atomic_read(&jme->link_changing) != 1))
1360                 goto out;
1361
1362         if (unlikely(!netif_carrier_ok(jme->dev)))
1363                 goto out;
1364
1365         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1366         mask = jme->tx_ring_mask;
1367
1368         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1369
1370                 ctxbi = txbi + i;
1371
1372                 if (likely(ctxbi->skb &&
1373                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1374
1375                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1376                                i, ctxbi->nr_desc, jiffies);
1377
1378                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1379
1380                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1381                                 ttxbi = txbi + ((i + j) & (mask));
1382                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1383
1384                                 pci_unmap_page(jme->pdev,
1385                                                  ttxbi->mapping,
1386                                                  ttxbi->len,
1387                                                  PCI_DMA_TODEVICE);
1388
1389                                 ttxbi->mapping = 0;
1390                                 ttxbi->len = 0;
1391                         }
1392
1393                         dev_kfree_skb(ctxbi->skb);
1394
1395                         cnt += ctxbi->nr_desc;
1396
1397                         if (unlikely(err)) {
1398                                 ++(NET_STAT(jme).tx_carrier_errors);
1399                         } else {
1400                                 ++(NET_STAT(jme).tx_packets);
1401                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1402                         }
1403
1404                         ctxbi->skb = NULL;
1405                         ctxbi->len = 0;
1406                         ctxbi->start_xmit = 0;
1407
1408                 } else {
1409                         break;
1410                 }
1411
1412                 i = (i + ctxbi->nr_desc) & mask;
1413
1414                 ctxbi->nr_desc = 0;
1415         }
1416
1417         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1418         atomic_set(&txring->next_to_clean, i);
1419         atomic_add(cnt, &txring->nr_free);
1420
1421         jme_wake_queue_if_stopped(jme);
1422
1423 out:
1424         atomic_inc(&jme->tx_cleaning);
1425 }
1426
1427 static void
1428 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1429 {
1430         /*
1431          * Disable interrupt
1432          */
1433         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1434
1435         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1436                 /*
1437                  * Link change event is critical
1438                  * all other events are ignored
1439                  */
1440                 jwrite32(jme, JME_IEVE, intrstat);
1441                 tasklet_schedule(&jme->linkch_task);
1442                 goto out_reenable;
1443         }
1444
1445         if (intrstat & INTR_TMINTR) {
1446                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1447                 tasklet_schedule(&jme->pcc_task);
1448         }
1449
1450         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1451                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1452                 tasklet_schedule(&jme->txclean_task);
1453         }
1454
1455         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1456                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1457                                                      INTR_PCCRX0 |
1458                                                      INTR_RX0EMP)) |
1459                                         INTR_RX0);
1460         }
1461
1462         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1463                 if (intrstat & INTR_RX0EMP)
1464                         atomic_inc(&jme->rx_empty);
1465
1466                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1467                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1468                                 jme_polling_mode(jme);
1469                                 JME_RX_SCHEDULE(jme);
1470                         }
1471                 }
1472         } else {
1473                 if (intrstat & INTR_RX0EMP) {
1474                         atomic_inc(&jme->rx_empty);
1475                         tasklet_hi_schedule(&jme->rxempty_task);
1476                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1477                         tasklet_hi_schedule(&jme->rxclean_task);
1478                 }
1479         }
1480
1481 out_reenable:
1482         /*
1483          * Re-enable interrupt
1484          */
1485         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1486 }
1487
1488 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1489 static irqreturn_t
1490 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1491 #else
1492 static irqreturn_t
1493 jme_intr(int irq, void *dev_id)
1494 #endif
1495 {
1496         struct net_device *netdev = dev_id;
1497         struct jme_adapter *jme = netdev_priv(netdev);
1498         u32 intrstat;
1499
1500         intrstat = jread32(jme, JME_IEVE);
1501
1502         /*
1503          * Check if it's really an interrupt for us
1504          */
1505         if (unlikely((intrstat & INTR_ENABLE) == 0))
1506                 return IRQ_NONE;
1507
1508         /*
1509          * Check if the device still exist
1510          */
1511         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1512                 return IRQ_NONE;
1513
1514         jme_intr_msi(jme, intrstat);
1515
1516         return IRQ_HANDLED;
1517 }
1518
1519 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1520 static irqreturn_t
1521 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1522 #else
1523 static irqreturn_t
1524 jme_msi(int irq, void *dev_id)
1525 #endif
1526 {
1527         struct net_device *netdev = dev_id;
1528         struct jme_adapter *jme = netdev_priv(netdev);
1529         u32 intrstat;
1530
1531         intrstat = jread32(jme, JME_IEVE);
1532
1533         jme_intr_msi(jme, intrstat);
1534
1535         return IRQ_HANDLED;
1536 }
1537
1538 static void
1539 jme_reset_link(struct jme_adapter *jme)
1540 {
1541         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1542 }
1543
1544 static void
1545 jme_restart_an(struct jme_adapter *jme)
1546 {
1547         u32 bmcr;
1548
1549         spin_lock_bh(&jme->phy_lock);
1550         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1551         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1552         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1553         spin_unlock_bh(&jme->phy_lock);
1554 }
1555
1556 static int
1557 jme_request_irq(struct jme_adapter *jme)
1558 {
1559         int rc;
1560         struct net_device *netdev = jme->dev;
1561 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1562         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1563         int irq_flags = SA_SHIRQ;
1564 #else
1565         irq_handler_t handler = jme_intr;
1566         int irq_flags = IRQF_SHARED;
1567 #endif
1568
1569         if (!pci_enable_msi(jme->pdev)) {
1570                 set_bit(JME_FLAG_MSI, &jme->flags);
1571                 handler = jme_msi;
1572                 irq_flags = 0;
1573         }
1574
1575         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1576                           netdev);
1577         if (rc) {
1578                 netdev_err(netdev,
1579                            "Unable to request %s interrupt (return: %d)\n",
1580                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1581                            rc);
1582
1583                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1584                         pci_disable_msi(jme->pdev);
1585                         clear_bit(JME_FLAG_MSI, &jme->flags);
1586                 }
1587         } else {
1588                 netdev->irq = jme->pdev->irq;
1589         }
1590
1591         return rc;
1592 }
1593
1594 static void
1595 jme_free_irq(struct jme_adapter *jme)
1596 {
1597         free_irq(jme->pdev->irq, jme->dev);
1598         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1599                 pci_disable_msi(jme->pdev);
1600                 clear_bit(JME_FLAG_MSI, &jme->flags);
1601                 jme->dev->irq = jme->pdev->irq;
1602         }
1603 }
1604
1605 static inline void
1606 jme_phy_on(struct jme_adapter *jme)
1607 {
1608         u32 bmcr;
1609
1610         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1611         bmcr &= ~BMCR_PDOWN;
1612         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1613 }
1614
1615 static int
1616 jme_open(struct net_device *netdev)
1617 {
1618         struct jme_adapter *jme = netdev_priv(netdev);
1619         int rc;
1620
1621         jme_clear_pm(jme);
1622         JME_NAPI_ENABLE(jme);
1623
1624         tasklet_enable(&jme->linkch_task);
1625         tasklet_enable(&jme->txclean_task);
1626         tasklet_hi_enable(&jme->rxclean_task);
1627         tasklet_hi_enable(&jme->rxempty_task);
1628
1629         rc = jme_request_irq(jme);
1630         if (rc)
1631                 goto err_out;
1632
1633         jme_start_irq(jme);
1634
1635         if (test_bit(JME_FLAG_SSET, &jme->flags)) {
1636                 jme_phy_on(jme);
1637                 jme_set_settings(netdev, &jme->old_ecmd);
1638         } else {
1639                 jme_reset_phy_processor(jme);
1640         }
1641
1642         jme_reset_link(jme);
1643
1644         return 0;
1645
1646 err_out:
1647         netif_stop_queue(netdev);
1648         netif_carrier_off(netdev);
1649         return rc;
1650 }
1651
1652 #ifdef CONFIG_PM
1653 static void
1654 jme_set_100m_half(struct jme_adapter *jme)
1655 {
1656         u32 bmcr, tmp;
1657
1658         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1659         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1660                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1661         tmp |= BMCR_SPEED100;
1662
1663         if (bmcr != tmp)
1664                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1665
1666         if (jme->fpgaver)
1667                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1668         else
1669                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1670 }
1671
1672 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1673 static void
1674 jme_wait_link(struct jme_adapter *jme)
1675 {
1676         u32 phylink, to = JME_WAIT_LINK_TIME;
1677
1678         mdelay(1000);
1679         phylink = jme_linkstat_from_phy(jme);
1680         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1681                 mdelay(10);
1682                 phylink = jme_linkstat_from_phy(jme);
1683         }
1684 }
1685 #endif
1686
1687 static inline void
1688 jme_phy_off(struct jme_adapter *jme)
1689 {
1690         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1691 }
1692
1693 static int
1694 jme_close(struct net_device *netdev)
1695 {
1696         struct jme_adapter *jme = netdev_priv(netdev);
1697
1698         netif_stop_queue(netdev);
1699         netif_carrier_off(netdev);
1700
1701         jme_stop_irq(jme);
1702         jme_free_irq(jme);
1703
1704         JME_NAPI_DISABLE(jme);
1705
1706         tasklet_disable(&jme->linkch_task);
1707         tasklet_disable(&jme->txclean_task);
1708         tasklet_disable(&jme->rxclean_task);
1709         tasklet_disable(&jme->rxempty_task);
1710
1711         jme_reset_ghc_speed(jme);
1712         jme_disable_rx_engine(jme);
1713         jme_disable_tx_engine(jme);
1714         jme_reset_mac_processor(jme);
1715         jme_free_rx_resources(jme);
1716         jme_free_tx_resources(jme);
1717         jme->phylink = 0;
1718         jme_phy_off(jme);
1719
1720         return 0;
1721 }
1722
1723 static int
1724 jme_alloc_txdesc(struct jme_adapter *jme,
1725                         struct sk_buff *skb)
1726 {
1727         struct jme_ring *txring = &(jme->txring[0]);
1728         int idx, nr_alloc, mask = jme->tx_ring_mask;
1729
1730         idx = txring->next_to_use;
1731         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1732
1733         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1734                 return -1;
1735
1736         atomic_sub(nr_alloc, &txring->nr_free);
1737
1738         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1739
1740         return idx;
1741 }
1742
1743 static void
1744 jme_fill_tx_map(struct pci_dev *pdev,
1745                 struct txdesc *txdesc,
1746                 struct jme_buffer_info *txbi,
1747                 struct page *page,
1748                 u32 page_offset,
1749                 u32 len,
1750                 u8 hidma)
1751 {
1752         dma_addr_t dmaaddr;
1753
1754         dmaaddr = pci_map_page(pdev,
1755                                 page,
1756                                 page_offset,
1757                                 len,
1758                                 PCI_DMA_TODEVICE);
1759
1760         pci_dma_sync_single_for_device(pdev,
1761                                        dmaaddr,
1762                                        len,
1763                                        PCI_DMA_TODEVICE);
1764
1765         txdesc->dw[0] = 0;
1766         txdesc->dw[1] = 0;
1767         txdesc->desc2.flags     = TXFLAG_OWN;
1768         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1769         txdesc->desc2.datalen   = cpu_to_le16(len);
1770         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1771         txdesc->desc2.bufaddrl  = cpu_to_le32(
1772                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1773
1774         txbi->mapping = dmaaddr;
1775         txbi->len = len;
1776 }
1777
1778 static void
1779 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1780 {
1781         struct jme_ring *txring = &(jme->txring[0]);
1782         struct txdesc *txdesc = txring->desc, *ctxdesc;
1783         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1784         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1785         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1786         int mask = jme->tx_ring_mask;
1787         struct skb_frag_struct *frag;
1788         u32 len;
1789
1790         for (i = 0 ; i < nr_frags ; ++i) {
1791                 frag = &skb_shinfo(skb)->frags[i];
1792                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1793                 ctxbi = txbi + ((idx + i + 2) & (mask));
1794
1795                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1796                                  frag->page_offset, frag->size, hidma);
1797         }
1798
1799         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1800         ctxdesc = txdesc + ((idx + 1) & (mask));
1801         ctxbi = txbi + ((idx + 1) & (mask));
1802         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1803                         offset_in_page(skb->data), len, hidma);
1804
1805 }
1806
1807 static int
1808 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1809 {
1810         if (unlikely(
1811 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1812         skb_shinfo(skb)->tso_size
1813 #else
1814         skb_shinfo(skb)->gso_size
1815 #endif
1816                         && skb_header_cloned(skb) &&
1817                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1818                 dev_kfree_skb(skb);
1819                 return -1;
1820         }
1821
1822         return 0;
1823 }
1824
1825 static int
1826 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1827 {
1828 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1829         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1830 #else
1831         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1832 #endif
1833         if (*mss) {
1834                 *flags |= TXFLAG_LSEN;
1835
1836                 if (skb->protocol == htons(ETH_P_IP)) {
1837                         struct iphdr *iph = ip_hdr(skb);
1838
1839                         iph->check = 0;
1840                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1841                                                                 iph->daddr, 0,
1842                                                                 IPPROTO_TCP,
1843                                                                 0);
1844                 } else {
1845                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
1846
1847                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1848                                                                 &ip6h->daddr, 0,
1849                                                                 IPPROTO_TCP,
1850                                                                 0);
1851                 }
1852
1853                 return 0;
1854         }
1855
1856         return 1;
1857 }
1858
1859 static void
1860 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1861 {
1862 #ifdef CHECKSUM_PARTIAL
1863         if (skb->ip_summed == CHECKSUM_PARTIAL)
1864 #else
1865         if (skb->ip_summed == CHECKSUM_HW)
1866 #endif
1867         {
1868                 u8 ip_proto;
1869
1870 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1871                 if (skb->protocol == htons(ETH_P_IP))
1872                         ip_proto = ip_hdr(skb)->protocol;
1873                 else if (skb->protocol == htons(ETH_P_IPV6))
1874                         ip_proto = ipv6_hdr(skb)->nexthdr;
1875                 else
1876                         ip_proto = 0;
1877 #else
1878                 switch (skb->protocol) {
1879                 case htons(ETH_P_IP):
1880                         ip_proto = ip_hdr(skb)->protocol;
1881                         break;
1882                 case htons(ETH_P_IPV6):
1883                         ip_proto = ipv6_hdr(skb)->nexthdr;
1884                         break;
1885                 default:
1886                         ip_proto = 0;
1887                         break;
1888                 }
1889 #endif
1890
1891                 switch (ip_proto) {
1892                 case IPPROTO_TCP:
1893                         *flags |= TXFLAG_TCPCS;
1894                         break;
1895                 case IPPROTO_UDP:
1896                         *flags |= TXFLAG_UDPCS;
1897                         break;
1898                 default:
1899                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
1900                         break;
1901                 }
1902         }
1903 }
1904
1905 static inline void
1906 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1907 {
1908         if (vlan_tx_tag_present(skb)) {
1909                 *flags |= TXFLAG_TAGON;
1910                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1911         }
1912 }
1913
1914 static int
1915 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1916 {
1917         struct jme_ring *txring = &(jme->txring[0]);
1918         struct txdesc *txdesc;
1919         struct jme_buffer_info *txbi;
1920         u8 flags;
1921
1922         txdesc = (struct txdesc *)txring->desc + idx;
1923         txbi = txring->bufinf + idx;
1924
1925         txdesc->dw[0] = 0;
1926         txdesc->dw[1] = 0;
1927         txdesc->dw[2] = 0;
1928         txdesc->dw[3] = 0;
1929         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1930         /*
1931          * Set OWN bit at final.
1932          * When kernel transmit faster than NIC.
1933          * And NIC trying to send this descriptor before we tell
1934          * it to start sending this TX queue.
1935          * Other fields are already filled correctly.
1936          */
1937         wmb();
1938         flags = TXFLAG_OWN | TXFLAG_INT;
1939         /*
1940          * Set checksum flags while not tso
1941          */
1942         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1943                 jme_tx_csum(jme, skb, &flags);
1944         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1945         jme_map_tx_skb(jme, skb, idx);
1946         txdesc->desc1.flags = flags;
1947         /*
1948          * Set tx buffer info after telling NIC to send
1949          * For better tx_clean timing
1950          */
1951         wmb();
1952         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1953         txbi->skb = skb;
1954         txbi->len = skb->len;
1955         txbi->start_xmit = jiffies;
1956         if (!txbi->start_xmit)
1957                 txbi->start_xmit = (0UL-1);
1958
1959         return 0;
1960 }
1961
1962 static void
1963 jme_stop_queue_if_full(struct jme_adapter *jme)
1964 {
1965         struct jme_ring *txring = &(jme->txring[0]);
1966         struct jme_buffer_info *txbi = txring->bufinf;
1967         int idx = atomic_read(&txring->next_to_clean);
1968
1969         txbi += idx;
1970
1971         smp_wmb();
1972         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
1973                 netif_stop_queue(jme->dev);
1974                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
1975                 smp_wmb();
1976                 if (atomic_read(&txring->nr_free)
1977                         >= (jme->tx_wake_threshold)) {
1978                         netif_wake_queue(jme->dev);
1979                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
1980                 }
1981         }
1982
1983         if (unlikely(txbi->start_xmit &&
1984                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
1985                         txbi->skb)) {
1986                 netif_stop_queue(jme->dev);
1987                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
1988         }
1989 }
1990
1991 /*
1992  * This function is already protected by netif_tx_lock()
1993  */
1994
1995 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
1996 static int
1997 #else
1998 static netdev_tx_t
1999 #endif
2000 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2001 {
2002         struct jme_adapter *jme = netdev_priv(netdev);
2003         int idx;
2004
2005         if (unlikely(jme_expand_header(jme, skb))) {
2006                 ++(NET_STAT(jme).tx_dropped);
2007                 return NETDEV_TX_OK;
2008         }
2009
2010         idx = jme_alloc_txdesc(jme, skb);
2011
2012         if (unlikely(idx < 0)) {
2013                 netif_stop_queue(netdev);
2014                 netif_err(jme, tx_err, jme->dev,
2015                           "BUG! Tx ring full when queue awake!\n");
2016
2017                 return NETDEV_TX_BUSY;
2018         }
2019
2020         jme_fill_tx_desc(jme, skb, idx);
2021
2022         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2023                                 TXCS_SELECT_QUEUE0 |
2024                                 TXCS_QUEUE0S |
2025                                 TXCS_ENABLE);
2026 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2027         netdev->trans_start = jiffies;
2028 #endif
2029
2030         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2031                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2032         jme_stop_queue_if_full(jme);
2033
2034         return NETDEV_TX_OK;
2035 }
2036
2037 static int
2038 jme_set_macaddr(struct net_device *netdev, void *p)
2039 {
2040         struct jme_adapter *jme = netdev_priv(netdev);
2041         struct sockaddr *addr = p;
2042         u32 val;
2043
2044         if (netif_running(netdev))
2045                 return -EBUSY;
2046
2047         spin_lock_bh(&jme->macaddr_lock);
2048         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2049
2050         val = (addr->sa_data[3] & 0xff) << 24 |
2051               (addr->sa_data[2] & 0xff) << 16 |
2052               (addr->sa_data[1] & 0xff) <<  8 |
2053               (addr->sa_data[0] & 0xff);
2054         jwrite32(jme, JME_RXUMA_LO, val);
2055         val = (addr->sa_data[5] & 0xff) << 8 |
2056               (addr->sa_data[4] & 0xff);
2057         jwrite32(jme, JME_RXUMA_HI, val);
2058         spin_unlock_bh(&jme->macaddr_lock);
2059
2060         return 0;
2061 }
2062
2063 static void
2064 jme_set_multi(struct net_device *netdev)
2065 {
2066         struct jme_adapter *jme = netdev_priv(netdev);
2067         u32 mc_hash[2] = {};
2068 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2069         int i;
2070 #endif
2071
2072         spin_lock_bh(&jme->rxmcs_lock);
2073
2074         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2075
2076         if (netdev->flags & IFF_PROMISC) {
2077                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2078         } else if (netdev->flags & IFF_ALLMULTI) {
2079                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2080         } else if (netdev->flags & IFF_MULTICAST) {
2081 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2082                 struct dev_mc_list *mclist;
2083 #else
2084                 struct netdev_hw_addr *ha;
2085 #endif
2086                 int bit_nr;
2087
2088                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2089 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2090                 for (i = 0, mclist = netdev->mc_list;
2091                         mclist && i < netdev->mc_count;
2092                         ++i, mclist = mclist->next) {
2093 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2094                 netdev_for_each_mc_addr(mclist, netdev) {
2095 #else
2096                 netdev_for_each_mc_addr(ha, netdev) {
2097 #endif
2098 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2099                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2100 #else
2101                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2102 #endif
2103                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2104                 }
2105
2106                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2107                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2108         }
2109
2110         wmb();
2111         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2112
2113         spin_unlock_bh(&jme->rxmcs_lock);
2114 }
2115
2116 static int
2117 jme_change_mtu(struct net_device *netdev, int new_mtu)
2118 {
2119         struct jme_adapter *jme = netdev_priv(netdev);
2120
2121         if (new_mtu == jme->old_mtu)
2122                 return 0;
2123
2124         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2125                 ((new_mtu) < IPV6_MIN_MTU))
2126                 return -EINVAL;
2127
2128         if (new_mtu > 4000) {
2129                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2130                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2131                 jme_restart_rx_engine(jme);
2132         } else {
2133                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2134                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2135                 jme_restart_rx_engine(jme);
2136         }
2137
2138         if (new_mtu > 1900) {
2139                 netdev->features &= ~(NETIF_F_HW_CSUM |
2140                                 NETIF_F_TSO
2141 #ifdef NETIF_F_TSO6
2142                                 | NETIF_F_TSO6
2143 #endif
2144                                 );
2145         } else {
2146                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2147                         netdev->features |= NETIF_F_HW_CSUM;
2148                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2149                         netdev->features |= NETIF_F_TSO
2150 #ifdef NETIF_F_TSO6
2151                                 | NETIF_F_TSO6
2152 #endif
2153                                 ;
2154         }
2155
2156         netdev->mtu = new_mtu;
2157         jme_reset_link(jme);
2158
2159         return 0;
2160 }
2161
2162 static void
2163 jme_tx_timeout(struct net_device *netdev)
2164 {
2165         struct jme_adapter *jme = netdev_priv(netdev);
2166
2167         jme->phylink = 0;
2168         jme_reset_phy_processor(jme);
2169         if (test_bit(JME_FLAG_SSET, &jme->flags))
2170                 jme_set_settings(netdev, &jme->old_ecmd);
2171
2172         /*
2173          * Force to Reset the link again
2174          */
2175         jme_reset_link(jme);
2176 }
2177
2178 static inline void jme_pause_rx(struct jme_adapter *jme)
2179 {
2180         atomic_dec(&jme->link_changing);
2181
2182         jme_set_rx_pcc(jme, PCC_OFF);
2183         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2184                 JME_NAPI_DISABLE(jme);
2185         } else {
2186                 tasklet_disable(&jme->rxclean_task);
2187                 tasklet_disable(&jme->rxempty_task);
2188         }
2189 }
2190
2191 static inline void jme_resume_rx(struct jme_adapter *jme)
2192 {
2193         struct dynpcc_info *dpi = &(jme->dpi);
2194
2195         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2196                 JME_NAPI_ENABLE(jme);
2197         } else {
2198                 tasklet_hi_enable(&jme->rxclean_task);
2199                 tasklet_hi_enable(&jme->rxempty_task);
2200         }
2201         dpi->cur                = PCC_P1;
2202         dpi->attempt            = PCC_P1;
2203         dpi->cnt                = 0;
2204         jme_set_rx_pcc(jme, PCC_P1);
2205
2206         atomic_inc(&jme->link_changing);
2207 }
2208
2209 static void
2210 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2211 {
2212         struct jme_adapter *jme = netdev_priv(netdev);
2213
2214         jme_pause_rx(jme);
2215         jme->vlgrp = grp;
2216         jme_resume_rx(jme);
2217 }
2218
2219 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2220 static void
2221 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2222 {
2223         struct jme_adapter *jme = netdev_priv(netdev);
2224
2225         if(jme->vlgrp) {
2226                 jme_pause_rx(jme);
2227 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2228                 jme->vlgrp->vlan_devices[vid] = NULL;
2229 #else
2230                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2231 #endif
2232                 jme_resume_rx(jme);
2233         }
2234 }
2235 #endif
2236
2237 static void
2238 jme_get_drvinfo(struct net_device *netdev,
2239                      struct ethtool_drvinfo *info)
2240 {
2241         struct jme_adapter *jme = netdev_priv(netdev);
2242
2243         strcpy(info->driver, DRV_NAME);
2244         strcpy(info->version, DRV_VERSION);
2245         strcpy(info->bus_info, pci_name(jme->pdev));
2246 }
2247
2248 static int
2249 jme_get_regs_len(struct net_device *netdev)
2250 {
2251         return JME_REG_LEN;
2252 }
2253
2254 static void
2255 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2256 {
2257         int i;
2258
2259         for (i = 0 ; i < len ; i += 4)
2260                 p[i >> 2] = jread32(jme, reg + i);
2261 }
2262
2263 static void
2264 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2265 {
2266         int i;
2267         u16 *p16 = (u16 *)p;
2268
2269         for (i = 0 ; i < reg_nr ; ++i)
2270                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2271 }
2272
2273 static void
2274 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2275 {
2276         struct jme_adapter *jme = netdev_priv(netdev);
2277         u32 *p32 = (u32 *)p;
2278
2279         memset(p, 0xFF, JME_REG_LEN);
2280
2281         regs->version = 1;
2282         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2283
2284         p32 += 0x100 >> 2;
2285         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2286
2287         p32 += 0x100 >> 2;
2288         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2289
2290         p32 += 0x100 >> 2;
2291         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2292
2293         p32 += 0x100 >> 2;
2294         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2295 }
2296
2297 static int
2298 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2299 {
2300         struct jme_adapter *jme = netdev_priv(netdev);
2301
2302         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2303         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2304
2305         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2306                 ecmd->use_adaptive_rx_coalesce = false;
2307                 ecmd->rx_coalesce_usecs = 0;
2308                 ecmd->rx_max_coalesced_frames = 0;
2309                 return 0;
2310         }
2311
2312         ecmd->use_adaptive_rx_coalesce = true;
2313
2314         switch (jme->dpi.cur) {
2315         case PCC_P1:
2316                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2317                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2318                 break;
2319         case PCC_P2:
2320                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2321                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2322                 break;
2323         case PCC_P3:
2324                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2325                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2326                 break;
2327         default:
2328                 break;
2329         }
2330
2331         return 0;
2332 }
2333
2334 static int
2335 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2336 {
2337         struct jme_adapter *jme = netdev_priv(netdev);
2338         struct dynpcc_info *dpi = &(jme->dpi);
2339
2340         if (netif_running(netdev))
2341                 return -EBUSY;
2342
2343         if (ecmd->use_adaptive_rx_coalesce &&
2344             test_bit(JME_FLAG_POLL, &jme->flags)) {
2345                 clear_bit(JME_FLAG_POLL, &jme->flags);
2346                 jme->jme_rx = netif_rx;
2347                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2348                 dpi->cur                = PCC_P1;
2349                 dpi->attempt            = PCC_P1;
2350                 dpi->cnt                = 0;
2351                 jme_set_rx_pcc(jme, PCC_P1);
2352                 jme_interrupt_mode(jme);
2353         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2354                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2355                 set_bit(JME_FLAG_POLL, &jme->flags);
2356                 jme->jme_rx = netif_receive_skb;
2357                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2358                 jme_interrupt_mode(jme);
2359         }
2360
2361         return 0;
2362 }
2363
2364 static void
2365 jme_get_pauseparam(struct net_device *netdev,
2366                         struct ethtool_pauseparam *ecmd)
2367 {
2368         struct jme_adapter *jme = netdev_priv(netdev);
2369         u32 val;
2370
2371         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2372         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2373
2374         spin_lock_bh(&jme->phy_lock);
2375         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2376         spin_unlock_bh(&jme->phy_lock);
2377
2378         ecmd->autoneg =
2379                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2380 }
2381
2382 static int
2383 jme_set_pauseparam(struct net_device *netdev,
2384                         struct ethtool_pauseparam *ecmd)
2385 {
2386         struct jme_adapter *jme = netdev_priv(netdev);
2387         u32 val;
2388
2389         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2390                 (ecmd->tx_pause != 0)) {
2391
2392                 if (ecmd->tx_pause)
2393                         jme->reg_txpfc |= TXPFC_PF_EN;
2394                 else
2395                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2396
2397                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2398         }
2399
2400         spin_lock_bh(&jme->rxmcs_lock);
2401         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2402                 (ecmd->rx_pause != 0)) {
2403
2404                 if (ecmd->rx_pause)
2405                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2406                 else
2407                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2408
2409                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2410         }
2411         spin_unlock_bh(&jme->rxmcs_lock);
2412
2413         spin_lock_bh(&jme->phy_lock);
2414         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2415         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2416                 (ecmd->autoneg != 0)) {
2417
2418                 if (ecmd->autoneg)
2419                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2420                 else
2421                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2422
2423                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2424                                 MII_ADVERTISE, val);
2425         }
2426         spin_unlock_bh(&jme->phy_lock);
2427
2428         return 0;
2429 }
2430
2431 static void
2432 jme_get_wol(struct net_device *netdev,
2433                 struct ethtool_wolinfo *wol)
2434 {
2435         struct jme_adapter *jme = netdev_priv(netdev);
2436
2437         wol->supported = WAKE_MAGIC | WAKE_PHY;
2438
2439         wol->wolopts = 0;
2440
2441         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2442                 wol->wolopts |= WAKE_PHY;
2443
2444         if (jme->reg_pmcs & PMCS_MFEN)
2445                 wol->wolopts |= WAKE_MAGIC;
2446
2447 }
2448
2449 static int
2450 jme_set_wol(struct net_device *netdev,
2451                 struct ethtool_wolinfo *wol)
2452 {
2453         struct jme_adapter *jme = netdev_priv(netdev);
2454
2455         if (wol->wolopts & (WAKE_MAGICSECURE |
2456                                 WAKE_UCAST |
2457                                 WAKE_MCAST |
2458                                 WAKE_BCAST |
2459                                 WAKE_ARP))
2460                 return -EOPNOTSUPP;
2461
2462         jme->reg_pmcs = 0;
2463
2464         if (wol->wolopts & WAKE_PHY)
2465                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2466
2467         if (wol->wolopts & WAKE_MAGIC)
2468                 jme->reg_pmcs |= PMCS_MFEN;
2469
2470         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2471
2472         return 0;
2473 }
2474
2475 static int
2476 jme_get_settings(struct net_device *netdev,
2477                      struct ethtool_cmd *ecmd)
2478 {
2479         struct jme_adapter *jme = netdev_priv(netdev);
2480         int rc;
2481
2482         spin_lock_bh(&jme->phy_lock);
2483         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2484         spin_unlock_bh(&jme->phy_lock);
2485         return rc;
2486 }
2487
2488 static int
2489 jme_set_settings(struct net_device *netdev,
2490                      struct ethtool_cmd *ecmd)
2491 {
2492         struct jme_adapter *jme = netdev_priv(netdev);
2493         int rc, fdc = 0;
2494
2495         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2496                 return -EINVAL;
2497
2498         /*
2499          * Check If user changed duplex only while force_media.
2500          * Hardware would not generate link change interrupt.
2501          */
2502         if (jme->mii_if.force_media &&
2503         ecmd->autoneg != AUTONEG_ENABLE &&
2504         (jme->mii_if.full_duplex != ecmd->duplex))
2505                 fdc = 1;
2506
2507         spin_lock_bh(&jme->phy_lock);
2508         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2509         spin_unlock_bh(&jme->phy_lock);
2510
2511         if (!rc) {
2512                 if (fdc)
2513                         jme_reset_link(jme);
2514                 jme->old_ecmd = *ecmd;
2515                 set_bit(JME_FLAG_SSET, &jme->flags);
2516         }
2517
2518         return rc;
2519 }
2520
2521 static int
2522 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2523 {
2524         int rc;
2525         struct jme_adapter *jme = netdev_priv(netdev);
2526         struct mii_ioctl_data *mii_data = if_mii(rq);
2527         unsigned int duplex_chg;
2528
2529         if (cmd == SIOCSMIIREG) {
2530                 u16 val = mii_data->val_in;
2531                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2532                     (val & BMCR_SPEED1000))
2533                         return -EINVAL;
2534         }
2535
2536         spin_lock_bh(&jme->phy_lock);
2537         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2538         spin_unlock_bh(&jme->phy_lock);
2539
2540         if (!rc && (cmd == SIOCSMIIREG)) {
2541                 if (duplex_chg)
2542                         jme_reset_link(jme);
2543                 jme_get_settings(netdev, &jme->old_ecmd);
2544                 set_bit(JME_FLAG_SSET, &jme->flags);
2545         }
2546
2547         return rc;
2548 }
2549
2550 static u32
2551 jme_get_link(struct net_device *netdev)
2552 {
2553         struct jme_adapter *jme = netdev_priv(netdev);
2554         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2555 }
2556
2557 static u32
2558 jme_get_msglevel(struct net_device *netdev)
2559 {
2560         struct jme_adapter *jme = netdev_priv(netdev);
2561         return jme->msg_enable;
2562 }
2563
2564 static void
2565 jme_set_msglevel(struct net_device *netdev, u32 value)
2566 {
2567         struct jme_adapter *jme = netdev_priv(netdev);
2568         jme->msg_enable = value;
2569 }
2570
2571 static u32
2572 jme_get_rx_csum(struct net_device *netdev)
2573 {
2574         struct jme_adapter *jme = netdev_priv(netdev);
2575         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2576 }
2577
2578 static int
2579 jme_set_rx_csum(struct net_device *netdev, u32 on)
2580 {
2581         struct jme_adapter *jme = netdev_priv(netdev);
2582
2583         spin_lock_bh(&jme->rxmcs_lock);
2584         if (on)
2585                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2586         else
2587                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2588         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2589         spin_unlock_bh(&jme->rxmcs_lock);
2590
2591         return 0;
2592 }
2593
2594 static int
2595 jme_set_tx_csum(struct net_device *netdev, u32 on)
2596 {
2597         struct jme_adapter *jme = netdev_priv(netdev);
2598
2599         if (on) {
2600                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2601                 if (netdev->mtu <= 1900)
2602                         netdev->features |= NETIF_F_HW_CSUM;
2603         } else {
2604                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2605                 netdev->features &= ~NETIF_F_HW_CSUM;
2606         }
2607
2608         return 0;
2609 }
2610
2611 static int
2612 jme_set_tso(struct net_device *netdev, u32 on)
2613 {
2614         struct jme_adapter *jme = netdev_priv(netdev);
2615
2616         if (on) {
2617                 set_bit(JME_FLAG_TSO, &jme->flags);
2618                 if (netdev->mtu <= 1900)
2619                         netdev->features |= NETIF_F_TSO
2620 #ifdef NETIF_F_TSO6
2621                                 | NETIF_F_TSO6
2622 #endif
2623                                 ;
2624         } else {
2625                 clear_bit(JME_FLAG_TSO, &jme->flags);
2626                 netdev->features &= ~(NETIF_F_TSO
2627 #ifdef NETIF_F_TSO6
2628                                 | NETIF_F_TSO6
2629 #endif
2630                                 );
2631         }
2632
2633         return 0;
2634 }
2635
2636 static int
2637 jme_nway_reset(struct net_device *netdev)
2638 {
2639         struct jme_adapter *jme = netdev_priv(netdev);
2640         jme_restart_an(jme);
2641         return 0;
2642 }
2643
2644 static u8
2645 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2646 {
2647         u32 val;
2648         int to;
2649
2650         val = jread32(jme, JME_SMBCSR);
2651         to = JME_SMB_BUSY_TIMEOUT;
2652         while ((val & SMBCSR_BUSY) && --to) {
2653                 msleep(1);
2654                 val = jread32(jme, JME_SMBCSR);
2655         }
2656         if (!to) {
2657                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2658                 return 0xFF;
2659         }
2660
2661         jwrite32(jme, JME_SMBINTF,
2662                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2663                 SMBINTF_HWRWN_READ |
2664                 SMBINTF_HWCMD);
2665
2666         val = jread32(jme, JME_SMBINTF);
2667         to = JME_SMB_BUSY_TIMEOUT;
2668         while ((val & SMBINTF_HWCMD) && --to) {
2669                 msleep(1);
2670                 val = jread32(jme, JME_SMBINTF);
2671         }
2672         if (!to) {
2673                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2674                 return 0xFF;
2675         }
2676
2677         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2678 }
2679
2680 static void
2681 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2682 {
2683         u32 val;
2684         int to;
2685
2686         val = jread32(jme, JME_SMBCSR);
2687         to = JME_SMB_BUSY_TIMEOUT;
2688         while ((val & SMBCSR_BUSY) && --to) {
2689                 msleep(1);
2690                 val = jread32(jme, JME_SMBCSR);
2691         }
2692         if (!to) {
2693                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2694                 return;
2695         }
2696
2697         jwrite32(jme, JME_SMBINTF,
2698                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2699                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2700                 SMBINTF_HWRWN_WRITE |
2701                 SMBINTF_HWCMD);
2702
2703         val = jread32(jme, JME_SMBINTF);
2704         to = JME_SMB_BUSY_TIMEOUT;
2705         while ((val & SMBINTF_HWCMD) && --to) {
2706                 msleep(1);
2707                 val = jread32(jme, JME_SMBINTF);
2708         }
2709         if (!to) {
2710                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2711                 return;
2712         }
2713
2714         mdelay(2);
2715 }
2716
2717 static int
2718 jme_get_eeprom_len(struct net_device *netdev)
2719 {
2720         struct jme_adapter *jme = netdev_priv(netdev);
2721         u32 val;
2722         val = jread32(jme, JME_SMBCSR);
2723         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2724 }
2725
2726 static int
2727 jme_get_eeprom(struct net_device *netdev,
2728                 struct ethtool_eeprom *eeprom, u8 *data)
2729 {
2730         struct jme_adapter *jme = netdev_priv(netdev);
2731         int i, offset = eeprom->offset, len = eeprom->len;
2732
2733         /*
2734          * ethtool will check the boundary for us
2735          */
2736         eeprom->magic = JME_EEPROM_MAGIC;
2737         for (i = 0 ; i < len ; ++i)
2738                 data[i] = jme_smb_read(jme, i + offset);
2739
2740         return 0;
2741 }
2742
2743 static int
2744 jme_set_eeprom(struct net_device *netdev,
2745                 struct ethtool_eeprom *eeprom, u8 *data)
2746 {
2747         struct jme_adapter *jme = netdev_priv(netdev);
2748         int i, offset = eeprom->offset, len = eeprom->len;
2749
2750         if (eeprom->magic != JME_EEPROM_MAGIC)
2751                 return -EINVAL;
2752
2753         /*
2754          * ethtool will check the boundary for us
2755          */
2756         for (i = 0 ; i < len ; ++i)
2757                 jme_smb_write(jme, i + offset, data[i]);
2758
2759         return 0;
2760 }
2761
2762 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2763 static struct ethtool_ops jme_ethtool_ops = {
2764 #else
2765 static const struct ethtool_ops jme_ethtool_ops = {
2766 #endif
2767         .get_drvinfo            = jme_get_drvinfo,
2768         .get_regs_len           = jme_get_regs_len,
2769         .get_regs               = jme_get_regs,
2770         .get_coalesce           = jme_get_coalesce,
2771         .set_coalesce           = jme_set_coalesce,
2772         .get_pauseparam         = jme_get_pauseparam,
2773         .set_pauseparam         = jme_set_pauseparam,
2774         .get_wol                = jme_get_wol,
2775         .set_wol                = jme_set_wol,
2776         .get_settings           = jme_get_settings,
2777         .set_settings           = jme_set_settings,
2778         .get_link               = jme_get_link,
2779         .get_msglevel           = jme_get_msglevel,
2780         .set_msglevel           = jme_set_msglevel,
2781         .get_rx_csum            = jme_get_rx_csum,
2782         .set_rx_csum            = jme_set_rx_csum,
2783         .set_tx_csum            = jme_set_tx_csum,
2784         .set_tso                = jme_set_tso,
2785         .set_sg                 = ethtool_op_set_sg,
2786         .nway_reset             = jme_nway_reset,
2787         .get_eeprom_len         = jme_get_eeprom_len,
2788         .get_eeprom             = jme_get_eeprom,
2789         .set_eeprom             = jme_set_eeprom,
2790 };
2791
2792 static int
2793 jme_pci_dma64(struct pci_dev *pdev)
2794 {
2795         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2796 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2797             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2798 #else
2799             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2800 #endif
2801            )
2802 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2803                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2804 #else
2805                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2806 #endif
2807                         return 1;
2808
2809         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2810 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2811             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2812 #else
2813             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2814 #endif
2815            )
2816 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2817                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2818 #else
2819                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2820 #endif
2821                         return 1;
2822
2823 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2824         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2825                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2826 #else
2827         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2828                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2829 #endif
2830                         return 0;
2831
2832         return -1;
2833 }
2834
2835 static inline void
2836 jme_phy_init(struct jme_adapter *jme)
2837 {
2838         u16 reg26;
2839
2840         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2841         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2842 }
2843
2844 static inline void
2845 jme_check_hw_ver(struct jme_adapter *jme)
2846 {
2847         u32 chipmode;
2848
2849         chipmode = jread32(jme, JME_CHIPMODE);
2850
2851         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2852         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2853 }
2854
2855 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2856 static const struct net_device_ops jme_netdev_ops = {
2857         .ndo_open               = jme_open,
2858         .ndo_stop               = jme_close,
2859         .ndo_validate_addr      = eth_validate_addr,
2860         .ndo_do_ioctl           = jme_ioctl,
2861         .ndo_start_xmit         = jme_start_xmit,
2862         .ndo_set_mac_address    = jme_set_macaddr,
2863         .ndo_set_multicast_list = jme_set_multi,
2864         .ndo_change_mtu         = jme_change_mtu,
2865         .ndo_tx_timeout         = jme_tx_timeout,
2866         .ndo_vlan_rx_register   = jme_vlan_rx_register,
2867 };
2868 #endif
2869
2870 static int __devinit
2871 jme_init_one(struct pci_dev *pdev,
2872              const struct pci_device_id *ent)
2873 {
2874         int rc = 0, using_dac, i;
2875         struct net_device *netdev;
2876         struct jme_adapter *jme;
2877         u16 bmcr, bmsr;
2878         u32 apmc;
2879
2880         /*
2881          * set up PCI device basics
2882          */
2883         rc = pci_enable_device(pdev);
2884         if (rc) {
2885                 pr_err("Cannot enable PCI device\n");
2886                 goto err_out;
2887         }
2888
2889         using_dac = jme_pci_dma64(pdev);
2890         if (using_dac < 0) {
2891                 pr_err("Cannot set PCI DMA Mask\n");
2892                 rc = -EIO;
2893                 goto err_out_disable_pdev;
2894         }
2895
2896         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2897                 pr_err("No PCI resource region found\n");
2898                 rc = -ENOMEM;
2899                 goto err_out_disable_pdev;
2900         }
2901
2902         rc = pci_request_regions(pdev, DRV_NAME);
2903         if (rc) {
2904                 pr_err("Cannot obtain PCI resource region\n");
2905                 goto err_out_disable_pdev;
2906         }
2907
2908         pci_set_master(pdev);
2909
2910         /*
2911          * alloc and init net device
2912          */
2913         netdev = alloc_etherdev(sizeof(*jme));
2914         if (!netdev) {
2915                 pr_err("Cannot allocate netdev structure\n");
2916                 rc = -ENOMEM;
2917                 goto err_out_release_regions;
2918         }
2919 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2920         netdev->netdev_ops = &jme_netdev_ops;
2921 #else
2922         netdev->open                    = jme_open;
2923         netdev->stop                    = jme_close;
2924         netdev->do_ioctl                = jme_ioctl;
2925         netdev->hard_start_xmit         = jme_start_xmit;
2926         netdev->set_mac_address         = jme_set_macaddr;
2927         netdev->set_multicast_list      = jme_set_multi;
2928         netdev->change_mtu              = jme_change_mtu;
2929         netdev->tx_timeout              = jme_tx_timeout;
2930         netdev->vlan_rx_register        = jme_vlan_rx_register;
2931 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2932         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
2933 #endif
2934         NETDEV_GET_STATS(netdev, &jme_get_stats);
2935 #endif
2936         netdev->ethtool_ops             = &jme_ethtool_ops;
2937         netdev->watchdog_timeo          = TX_TIMEOUT;
2938         netdev->features                =       NETIF_F_HW_CSUM |
2939                                                 NETIF_F_SG |
2940                                                 NETIF_F_TSO |
2941 #ifdef NETIF_F_TSO6
2942                                                 NETIF_F_TSO6 |
2943 #endif
2944                                                 NETIF_F_HW_VLAN_TX |
2945                                                 NETIF_F_HW_VLAN_RX;
2946         if (using_dac)
2947                 netdev->features        |=      NETIF_F_HIGHDMA;
2948
2949         SET_NETDEV_DEV(netdev, &pdev->dev);
2950         pci_set_drvdata(pdev, netdev);
2951
2952         /*
2953          * init adapter info
2954          */
2955         jme = netdev_priv(netdev);
2956         jme->pdev = pdev;
2957         jme->dev = netdev;
2958         jme->jme_rx = netif_rx;
2959         jme->jme_vlan_rx = vlan_hwaccel_rx;
2960         jme->old_mtu = netdev->mtu = 1500;
2961         jme->phylink = 0;
2962         jme->tx_ring_size = 1 << 10;
2963         jme->tx_ring_mask = jme->tx_ring_size - 1;
2964         jme->tx_wake_threshold = 1 << 9;
2965         jme->rx_ring_size = 1 << 9;
2966         jme->rx_ring_mask = jme->rx_ring_size - 1;
2967         jme->msg_enable = JME_DEF_MSG_ENABLE;
2968         jme->regs = ioremap(pci_resource_start(pdev, 0),
2969                              pci_resource_len(pdev, 0));
2970         if (!(jme->regs)) {
2971                 pr_err("Mapping PCI resource region error\n");
2972                 rc = -ENOMEM;
2973                 goto err_out_free_netdev;
2974         }
2975
2976         if (no_pseudohp) {
2977                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2978                 jwrite32(jme, JME_APMC, apmc);
2979         } else if (force_pseudohp) {
2980                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2981                 jwrite32(jme, JME_APMC, apmc);
2982         }
2983
2984         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
2985
2986         spin_lock_init(&jme->phy_lock);
2987         spin_lock_init(&jme->macaddr_lock);
2988         spin_lock_init(&jme->rxmcs_lock);
2989
2990         atomic_set(&jme->link_changing, 1);
2991         atomic_set(&jme->rx_cleaning, 1);
2992         atomic_set(&jme->tx_cleaning, 1);
2993         atomic_set(&jme->rx_empty, 1);
2994
2995         tasklet_init(&jme->pcc_task,
2996                      jme_pcc_tasklet,
2997                      (unsigned long) jme);
2998         tasklet_init(&jme->linkch_task,
2999                      jme_link_change_tasklet,
3000                      (unsigned long) jme);
3001         tasklet_init(&jme->txclean_task,
3002                      jme_tx_clean_tasklet,
3003                      (unsigned long) jme);
3004         tasklet_init(&jme->rxclean_task,
3005                      jme_rx_clean_tasklet,
3006                      (unsigned long) jme);
3007         tasklet_init(&jme->rxempty_task,
3008                      jme_rx_empty_tasklet,
3009                      (unsigned long) jme);
3010         tasklet_disable_nosync(&jme->linkch_task);
3011         tasklet_disable_nosync(&jme->txclean_task);
3012         tasklet_disable_nosync(&jme->rxclean_task);
3013         tasklet_disable_nosync(&jme->rxempty_task);
3014         jme->dpi.cur = PCC_P1;
3015
3016         jme->reg_ghc = 0;
3017         jme->reg_rxcs = RXCS_DEFAULT;
3018         jme->reg_rxmcs = RXMCS_DEFAULT;
3019         jme->reg_txpfc = 0;
3020         jme->reg_pmcs = PMCS_MFEN;
3021         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3022         set_bit(JME_FLAG_TSO, &jme->flags);
3023
3024         /*
3025          * Get Max Read Req Size from PCI Config Space
3026          */
3027         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3028         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3029         switch (jme->mrrs) {
3030         case MRRS_128B:
3031                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3032                 break;
3033         case MRRS_256B:
3034                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3035                 break;
3036         default:
3037                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3038                 break;
3039         }
3040
3041         /*
3042          * Must check before reset_mac_processor
3043          */
3044         jme_check_hw_ver(jme);
3045         jme->mii_if.dev = netdev;
3046         if (jme->fpgaver) {
3047                 jme->mii_if.phy_id = 0;
3048                 for (i = 1 ; i < 32 ; ++i) {
3049                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3050                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3051                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3052                                 jme->mii_if.phy_id = i;
3053                                 break;
3054                         }
3055                 }
3056
3057                 if (!jme->mii_if.phy_id) {
3058                         rc = -EIO;
3059                         pr_err("Can not find phy_id\n");
3060                         goto err_out_unmap;
3061                 }
3062
3063                 jme->reg_ghc |= GHC_LINK_POLL;
3064         } else {
3065                 jme->mii_if.phy_id = 1;
3066         }
3067         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3068                 jme->mii_if.supports_gmii = true;
3069         else
3070                 jme->mii_if.supports_gmii = false;
3071         jme->mii_if.phy_id_mask = 0x1F;
3072         jme->mii_if.reg_num_mask = 0x1F;
3073         jme->mii_if.mdio_read = jme_mdio_read;
3074         jme->mii_if.mdio_write = jme_mdio_write;
3075
3076         jme_clear_pm(jme);
3077         jme_set_phyfifoa(jme);
3078         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3079         if (!jme->fpgaver)
3080                 jme_phy_init(jme);
3081         jme_phy_off(jme);
3082
3083         /*
3084          * Reset MAC processor and reload EEPROM for MAC Address
3085          */
3086         jme_reset_mac_processor(jme);
3087         rc = jme_reload_eeprom(jme);
3088         if (rc) {
3089                 pr_err("Reload eeprom for reading MAC Address error\n");
3090                 goto err_out_unmap;
3091         }
3092         jme_load_macaddr(netdev);
3093
3094         /*
3095          * Tell stack that we are not ready to work until open()
3096          */
3097         netif_carrier_off(netdev);
3098         netif_stop_queue(netdev);
3099
3100         /*
3101          * Register netdev
3102          */
3103         rc = register_netdev(netdev);
3104         if (rc) {
3105                 pr_err("Cannot register net device\n");
3106                 goto err_out_unmap;
3107         }
3108
3109         netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x "
3110                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3111                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3112                    "JMC250 Gigabit Ethernet" :
3113                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3114                    "JMC260 Fast Ethernet" : "Unknown",
3115                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3116                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3117                    jme->rev,
3118                    netdev->dev_addr[0],
3119                    netdev->dev_addr[1],
3120                    netdev->dev_addr[2],
3121                    netdev->dev_addr[3],
3122                    netdev->dev_addr[4],
3123                    netdev->dev_addr[5]);
3124
3125         return 0;
3126
3127 err_out_unmap:
3128         iounmap(jme->regs);
3129 err_out_free_netdev:
3130         pci_set_drvdata(pdev, NULL);
3131         free_netdev(netdev);
3132 err_out_release_regions:
3133         pci_release_regions(pdev);
3134 err_out_disable_pdev:
3135         pci_disable_device(pdev);
3136 err_out:
3137         return rc;
3138 }
3139
3140 static void __devexit
3141 jme_remove_one(struct pci_dev *pdev)
3142 {
3143         struct net_device *netdev = pci_get_drvdata(pdev);
3144         struct jme_adapter *jme = netdev_priv(netdev);
3145
3146         unregister_netdev(netdev);
3147         iounmap(jme->regs);
3148         pci_set_drvdata(pdev, NULL);
3149         free_netdev(netdev);
3150         pci_release_regions(pdev);
3151         pci_disable_device(pdev);
3152
3153 }
3154
3155 #ifdef CONFIG_PM
3156 static int
3157 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3158 {
3159         struct net_device *netdev = pci_get_drvdata(pdev);
3160         struct jme_adapter *jme = netdev_priv(netdev);
3161
3162         atomic_dec(&jme->link_changing);
3163
3164         netif_device_detach(netdev);
3165         netif_stop_queue(netdev);
3166         jme_stop_irq(jme);
3167
3168         tasklet_disable(&jme->txclean_task);
3169         tasklet_disable(&jme->rxclean_task);
3170         tasklet_disable(&jme->rxempty_task);
3171
3172         if (netif_carrier_ok(netdev)) {
3173                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3174                         jme_polling_mode(jme);
3175
3176                 jme_stop_pcc_timer(jme);
3177                 jme_reset_ghc_speed(jme);
3178                 jme_disable_rx_engine(jme);
3179                 jme_disable_tx_engine(jme);
3180                 jme_reset_mac_processor(jme);
3181                 jme_free_rx_resources(jme);
3182                 jme_free_tx_resources(jme);
3183                 netif_carrier_off(netdev);
3184                 jme->phylink = 0;
3185         }
3186
3187         tasklet_enable(&jme->txclean_task);
3188         tasklet_hi_enable(&jme->rxclean_task);
3189         tasklet_hi_enable(&jme->rxempty_task);
3190
3191         pci_save_state(pdev);
3192         if (jme->reg_pmcs) {
3193                 jme_set_100m_half(jme);
3194
3195                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3196                         jme_wait_link(jme);
3197
3198                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3199
3200                 pci_enable_wake(pdev, PCI_D3cold, true);
3201         } else {
3202                 jme_phy_off(jme);
3203         }
3204         pci_set_power_state(pdev, PCI_D3cold);
3205
3206         return 0;
3207 }
3208
3209 static int
3210 jme_resume(struct pci_dev *pdev)
3211 {
3212         struct net_device *netdev = pci_get_drvdata(pdev);
3213         struct jme_adapter *jme = netdev_priv(netdev);
3214
3215         jme_clear_pm(jme);
3216         pci_restore_state(pdev);
3217
3218         if (test_bit(JME_FLAG_SSET, &jme->flags)) {
3219                 jme_phy_on(jme);
3220                 jme_set_settings(netdev, &jme->old_ecmd);
3221         } else {
3222                 jme_reset_phy_processor(jme);
3223         }
3224
3225         jme_start_irq(jme);
3226         netif_device_attach(netdev);
3227
3228         atomic_inc(&jme->link_changing);
3229
3230         jme_reset_link(jme);
3231
3232         return 0;
3233 }
3234 #endif
3235
3236 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3237 static struct pci_device_id jme_pci_tbl[] = {
3238 #else
3239 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3240 #endif
3241         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3242         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3243         { }
3244 };
3245
3246 static struct pci_driver jme_driver = {
3247         .name           = DRV_NAME,
3248         .id_table       = jme_pci_tbl,
3249         .probe          = jme_init_one,
3250         .remove         = __devexit_p(jme_remove_one),
3251 #ifdef CONFIG_PM
3252         .suspend        = jme_suspend,
3253         .resume         = jme_resume,
3254 #endif /* CONFIG_PM */
3255 };
3256
3257 static int __init
3258 jme_init_module(void)
3259 {
3260         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3261         return pci_register_driver(&jme_driver);
3262 }
3263
3264 static void __exit
3265 jme_cleanup_module(void)
3266 {
3267         pci_unregister_driver(&jme_driver);
3268 }
3269
3270 module_init(jme_init_module);
3271 module_exit(jme_cleanup_module);
3272
3273 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3274 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3275 MODULE_LICENSE("GPL");
3276 MODULE_VERSION(DRV_VERSION);
3277 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3278