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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
6 | * | |
3bf61c55 GFT |
7 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
8 | * | |
d7699f87 GFT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | * | |
22 | */ | |
23 | ||
52a46ba8 JP |
24 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
25 | ||
d7699f87 GFT |
26 | #include <linux/module.h> |
27 | #include <linux/kernel.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/etherdevice.h> | |
31 | #include <linux/ethtool.h> | |
32 | #include <linux/mii.h> | |
33 | #include <linux/crc32.h> | |
4330c2f2 | 34 | #include <linux/delay.h> |
29bdd921 | 35 | #include <linux/spinlock.h> |
8c198884 GFT |
36 | #include <linux/in.h> |
37 | #include <linux/ip.h> | |
79ce639c GFT |
38 | #include <linux/ipv6.h> |
39 | #include <linux/tcp.h> | |
40 | #include <linux/udp.h> | |
42b1055e | 41 | #include <linux/if_vlan.h> |
6d641c63 | 42 | #include <linux/slab.h> |
94c5ea02 | 43 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
44 | #include "jme.h" |
45 | ||
cd0ff491 GFT |
46 | static int force_pseudohp = -1; |
47 | static int no_pseudohp = -1; | |
48 | static int no_extplug = -1; | |
49 | module_param(force_pseudohp, int, 0); | |
50 | MODULE_PARM_DESC(force_pseudohp, | |
51 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
52 | module_param(no_pseudohp, int, 0); | |
53 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
54 | module_param(no_extplug, int, 0); | |
55 | MODULE_PARM_DESC(no_extplug, | |
56 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 57 | |
3bf61c55 GFT |
58 | static int |
59 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
60 | { |
61 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 62 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 63 | |
186fc259 | 64 | read_again: |
cd0ff491 | 65 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
66 | smi_phy_addr(phy) | |
67 | smi_reg_addr(reg)); | |
d7699f87 GFT |
68 | |
69 | wmb(); | |
cd0ff491 | 70 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 71 | udelay(20); |
b3821cc5 GFT |
72 | val = jread32(jme, JME_SMI); |
73 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 74 | break; |
cd0ff491 | 75 | } |
d7699f87 | 76 | |
cd0ff491 | 77 | if (i == 0) { |
52a46ba8 | 78 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 79 | return 0; |
cd0ff491 | 80 | } |
d7699f87 | 81 | |
cd0ff491 | 82 | if (again--) |
186fc259 GFT |
83 | goto read_again; |
84 | ||
cd0ff491 | 85 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
86 | } |
87 | ||
3bf61c55 GFT |
88 | static void |
89 | jme_mdio_write(struct net_device *netdev, | |
90 | int phy, int reg, int val) | |
d7699f87 GFT |
91 | { |
92 | struct jme_adapter *jme = netdev_priv(netdev); | |
93 | int i; | |
94 | ||
3bf61c55 GFT |
95 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
96 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
97 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
98 | |
99 | wmb(); | |
cdcdc9eb GFT |
100 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
101 | udelay(20); | |
8d27293f | 102 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
103 | break; |
104 | } | |
d7699f87 | 105 | |
3bf61c55 | 106 | if (i == 0) |
52a46ba8 | 107 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
108 | } |
109 | ||
cd0ff491 | 110 | static inline void |
3bf61c55 | 111 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 112 | { |
cd0ff491 | 113 | u32 val; |
3bf61c55 GFT |
114 | |
115 | jme_mdio_write(jme->dev, | |
116 | jme->mii_if.phy_id, | |
8c198884 GFT |
117 | MII_ADVERTISE, ADVERTISE_ALL | |
118 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 119 | |
cd0ff491 | 120 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
121 | jme_mdio_write(jme->dev, |
122 | jme->mii_if.phy_id, | |
123 | MII_CTRL1000, | |
124 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 125 | |
fcf45b4c GFT |
126 | val = jme_mdio_read(jme->dev, |
127 | jme->mii_if.phy_id, | |
128 | MII_BMCR); | |
129 | ||
130 | jme_mdio_write(jme->dev, | |
131 | jme->mii_if.phy_id, | |
132 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
133 | } |
134 | ||
b3821cc5 GFT |
135 | static void |
136 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
cd0ff491 | 137 | u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
138 | { |
139 | int i; | |
140 | ||
141 | /* | |
142 | * Setup CRC pattern | |
143 | */ | |
144 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
145 | wmb(); | |
146 | jwrite32(jme, JME_WFODP, crc); | |
147 | wmb(); | |
148 | ||
149 | /* | |
150 | * Setup Mask | |
151 | */ | |
cd0ff491 | 152 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
153 | jwrite32(jme, JME_WFOI, |
154 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
155 | (fnr & WFOI_FRAME_SEL)); | |
156 | wmb(); | |
157 | jwrite32(jme, JME_WFODP, mask[i]); | |
158 | wmb(); | |
159 | } | |
160 | } | |
3bf61c55 | 161 | |
cd0ff491 | 162 | static inline void |
3bf61c55 GFT |
163 | jme_reset_mac_processor(struct jme_adapter *jme) |
164 | { | |
cd0ff491 GFT |
165 | u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
166 | u32 crc = 0xCDCDCDCD; | |
167 | u32 gpreg0; | |
b3821cc5 GFT |
168 | int i; |
169 | ||
3bf61c55 | 170 | jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); |
d7699f87 | 171 | udelay(2); |
3bf61c55 | 172 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
cd0ff491 GFT |
173 | |
174 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
175 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
176 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
177 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
178 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
179 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
180 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
181 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
182 | ||
4330c2f2 GFT |
183 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
184 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 185 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 186 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 187 | if (jme->fpgaver) |
cdcdc9eb GFT |
188 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
189 | else | |
190 | gpreg0 = GPREG0_DEFAULT; | |
191 | jwrite32(jme, JME_GPREG0, gpreg0); | |
9b9d55de | 192 | jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT); |
d7699f87 GFT |
193 | } |
194 | ||
cd0ff491 GFT |
195 | static inline void |
196 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
197 | { | |
198 | jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); | |
199 | jwrite32(jme, JME_GHC, jme->reg_ghc); | |
200 | } | |
201 | ||
202 | static inline void | |
3bf61c55 | 203 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 204 | { |
29bdd921 | 205 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 206 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 207 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
208 | } |
209 | ||
3bf61c55 GFT |
210 | static int |
211 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 212 | { |
cd0ff491 | 213 | u32 val; |
d7699f87 GFT |
214 | int i; |
215 | ||
216 | val = jread32(jme, JME_SMBCSR); | |
217 | ||
cd0ff491 | 218 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
219 | val |= SMBCSR_CNACK; |
220 | jwrite32(jme, JME_SMBCSR, val); | |
221 | val |= SMBCSR_RELOAD; | |
222 | jwrite32(jme, JME_SMBCSR, val); | |
223 | mdelay(12); | |
224 | ||
cd0ff491 | 225 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
226 | mdelay(1); |
227 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
228 | break; | |
229 | } | |
230 | ||
cd0ff491 | 231 | if (i == 0) { |
52a46ba8 | 232 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
233 | return -EIO; |
234 | } | |
235 | } | |
3bf61c55 | 236 | |
d7699f87 GFT |
237 | return 0; |
238 | } | |
239 | ||
3bf61c55 GFT |
240 | static void |
241 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
242 | { |
243 | struct jme_adapter *jme = netdev_priv(netdev); | |
244 | unsigned char macaddr[6]; | |
cd0ff491 | 245 | u32 val; |
d7699f87 | 246 | |
cd0ff491 | 247 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 248 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
249 | macaddr[0] = (val >> 0) & 0xFF; |
250 | macaddr[1] = (val >> 8) & 0xFF; | |
251 | macaddr[2] = (val >> 16) & 0xFF; | |
252 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 253 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
254 | macaddr[4] = (val >> 0) & 0xFF; |
255 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
256 | memcpy(netdev->dev_addr, macaddr, 6); |
257 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
258 | } |
259 | ||
cd0ff491 | 260 | static inline void |
3bf61c55 GFT |
261 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
262 | { | |
cd0ff491 | 263 | switch (p) { |
192570e0 GFT |
264 | case PCC_OFF: |
265 | jwrite32(jme, JME_PCCRX0, | |
266 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
267 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
268 | break; | |
3bf61c55 GFT |
269 | case PCC_P1: |
270 | jwrite32(jme, JME_PCCRX0, | |
271 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
272 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
273 | break; | |
274 | case PCC_P2: | |
275 | jwrite32(jme, JME_PCCRX0, | |
276 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
277 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
278 | break; | |
279 | case PCC_P3: | |
280 | jwrite32(jme, JME_PCCRX0, | |
281 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
282 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
283 | break; | |
284 | default: | |
285 | break; | |
286 | } | |
192570e0 | 287 | wmb(); |
3bf61c55 | 288 | |
cd0ff491 | 289 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
c97b5740 | 290 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
291 | } |
292 | ||
fcf45b4c | 293 | static void |
3bf61c55 | 294 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 295 | { |
3bf61c55 GFT |
296 | register struct dynpcc_info *dpi = &(jme->dpi); |
297 | ||
298 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
299 | dpi->cur = PCC_P1; |
300 | dpi->attempt = PCC_P1; | |
301 | dpi->cnt = 0; | |
302 | ||
303 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
304 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
305 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
306 | PCCTXQ0_EN |
307 | ); | |
308 | ||
d7699f87 GFT |
309 | /* |
310 | * Enable Interrupts | |
311 | */ | |
312 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
313 | } | |
314 | ||
cd0ff491 | 315 | static inline void |
3bf61c55 | 316 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
317 | { |
318 | /* | |
319 | * Disable Interrupts | |
320 | */ | |
cd0ff491 | 321 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
322 | } |
323 | ||
cd0ff491 | 324 | static u32 |
cdcdc9eb GFT |
325 | jme_linkstat_from_phy(struct jme_adapter *jme) |
326 | { | |
cd0ff491 | 327 | u32 phylink, bmsr; |
cdcdc9eb GFT |
328 | |
329 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
330 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 331 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
332 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
333 | ||
334 | return phylink; | |
335 | } | |
336 | ||
cd0ff491 | 337 | static inline void |
e882564f | 338 | jme_set_phyfifoa(struct jme_adapter *jme) |
cd0ff491 GFT |
339 | { |
340 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
341 | } | |
342 | ||
343 | static inline void | |
e882564f | 344 | jme_set_phyfifob(struct jme_adapter *jme) |
cd0ff491 GFT |
345 | { |
346 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
347 | } | |
348 | ||
fcf45b4c GFT |
349 | static int |
350 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
351 | { |
352 | struct jme_adapter *jme = netdev_priv(netdev); | |
9b9d55de | 353 | u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1; |
79ce639c | 354 | char linkmsg[64]; |
fcf45b4c | 355 | int rc = 0; |
d7699f87 | 356 | |
b3821cc5 | 357 | linkmsg[0] = '\0'; |
cdcdc9eb | 358 | |
cd0ff491 | 359 | if (jme->fpgaver) |
cdcdc9eb GFT |
360 | phylink = jme_linkstat_from_phy(jme); |
361 | else | |
362 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 363 | |
cd0ff491 GFT |
364 | if (phylink & PHY_LINK_UP) { |
365 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
366 | /* |
367 | * If we did not enable AN | |
368 | * Speed/Duplex Info should be obtained from SMI | |
369 | */ | |
370 | phylink = PHY_LINK_UP; | |
371 | ||
372 | bmcr = jme_mdio_read(jme->dev, | |
373 | jme->mii_if.phy_id, | |
374 | MII_BMCR); | |
375 | ||
376 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
377 | (bmcr & BMCR_SPEED100) == 0) ? | |
378 | PHY_LINK_SPEED_1000M : | |
379 | (bmcr & BMCR_SPEED100) ? | |
380 | PHY_LINK_SPEED_100M : | |
381 | PHY_LINK_SPEED_10M; | |
382 | ||
383 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
384 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 385 | |
b3821cc5 | 386 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 387 | } else { |
8c198884 GFT |
388 | /* |
389 | * Keep polling for speed/duplex resolve complete | |
390 | */ | |
cd0ff491 | 391 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
392 | --cnt) { |
393 | ||
394 | udelay(1); | |
8c198884 | 395 | |
cd0ff491 | 396 | if (jme->fpgaver) |
cdcdc9eb GFT |
397 | phylink = jme_linkstat_from_phy(jme); |
398 | else | |
399 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 400 | } |
cd0ff491 | 401 | if (!cnt) |
52a46ba8 | 402 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 403 | |
b3821cc5 | 404 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
405 | } |
406 | ||
cd0ff491 | 407 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
408 | rc = 1; |
409 | goto out; | |
410 | } | |
cd0ff491 | 411 | if (testonly) |
fcf45b4c GFT |
412 | goto out; |
413 | ||
414 | jme->phylink = phylink; | |
415 | ||
94c5ea02 GFT |
416 | ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX | |
417 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE | | |
418 | GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY); | |
cd0ff491 GFT |
419 | switch (phylink & PHY_LINK_SPEED_MASK) { |
420 | case PHY_LINK_SPEED_10M: | |
94c5ea02 GFT |
421 | ghc |= GHC_SPEED_10M | |
422 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
cd0ff491 | 423 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
424 | break; |
425 | case PHY_LINK_SPEED_100M: | |
94c5ea02 GFT |
426 | ghc |= GHC_SPEED_100M | |
427 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
cd0ff491 | 428 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
429 | break; |
430 | case PHY_LINK_SPEED_1000M: | |
94c5ea02 GFT |
431 | ghc |= GHC_SPEED_1000M | |
432 | GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
cd0ff491 | 433 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
434 | break; |
435 | default: | |
436 | break; | |
d7699f87 | 437 | } |
d7699f87 | 438 | |
cd0ff491 | 439 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 440 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
9b9d55de | 441 | ghc |= GHC_DPX; |
cd0ff491 | 442 | } else { |
d7699f87 | 443 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
444 | TXMCS_BACKOFF | |
445 | TXMCS_CARRIERSENSE | | |
446 | TXMCS_COLLISION); | |
8c198884 GFT |
447 | jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN | |
448 | ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) | | |
449 | TXTRHD_TXREN | | |
450 | ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL)); | |
451 | } | |
9b9d55de GFT |
452 | |
453 | gpreg1 = GPREG1_DEFAULT; | |
454 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { | |
455 | if (!(phylink & PHY_LINK_DUPLEX)) | |
456 | gpreg1 |= GPREG1_HALFMODEPATCH; | |
457 | switch (phylink & PHY_LINK_SPEED_MASK) { | |
458 | case PHY_LINK_SPEED_10M: | |
459 | jme_set_phyfifoa(jme); | |
460 | gpreg1 |= GPREG1_RSSPATCH; | |
461 | break; | |
462 | case PHY_LINK_SPEED_100M: | |
463 | jme_set_phyfifob(jme); | |
464 | gpreg1 |= GPREG1_RSSPATCH; | |
465 | break; | |
466 | case PHY_LINK_SPEED_1000M: | |
467 | jme_set_phyfifoa(jme); | |
468 | break; | |
469 | default: | |
470 | break; | |
471 | } | |
472 | } | |
d7699f87 | 473 | |
94c5ea02 | 474 | jwrite32(jme, JME_GPREG1, gpreg1); |
fcf45b4c | 475 | jwrite32(jme, JME_GHC, ghc); |
94c5ea02 | 476 | jme->reg_ghc = ghc; |
fcf45b4c | 477 | |
94c5ea02 GFT |
478 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
479 | "Full-Duplex, " : | |
480 | "Half-Duplex, "); | |
481 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
482 | "MDI-X" : | |
483 | "MDI"); | |
52a46ba8 | 484 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
485 | netif_carrier_on(netdev); |
486 | } else { | |
487 | if (testonly) | |
fcf45b4c GFT |
488 | goto out; |
489 | ||
52a46ba8 | 490 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 491 | jme->phylink = 0; |
cd0ff491 | 492 | netif_carrier_off(netdev); |
d7699f87 | 493 | } |
fcf45b4c GFT |
494 | |
495 | out: | |
496 | return rc; | |
d7699f87 GFT |
497 | } |
498 | ||
3bf61c55 GFT |
499 | static int |
500 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 501 | { |
d7699f87 GFT |
502 | struct jme_ring *txring = &(jme->txring[0]); |
503 | ||
504 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
505 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
506 | &(txring->dmaalloc), | |
507 | GFP_ATOMIC); | |
fcf45b4c | 508 | |
fa97b924 GFT |
509 | if (!txring->alloc) |
510 | goto err_set_null; | |
d7699f87 GFT |
511 | |
512 | /* | |
513 | * 16 Bytes align | |
514 | */ | |
cd0ff491 | 515 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 516 | RING_DESC_ALIGN); |
4330c2f2 | 517 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 518 | txring->next_to_use = 0; |
cdcdc9eb | 519 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 520 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 521 | |
fa97b924 GFT |
522 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
523 | jme->tx_ring_size, GFP_ATOMIC); | |
524 | if (unlikely(!(txring->bufinf))) | |
525 | goto err_free_txring; | |
526 | ||
d7699f87 | 527 | /* |
b3821cc5 | 528 | * Initialize Transmit Descriptors |
d7699f87 | 529 | */ |
b3821cc5 | 530 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 531 | memset(txring->bufinf, 0, |
b3821cc5 | 532 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
533 | |
534 | return 0; | |
fa97b924 GFT |
535 | |
536 | err_free_txring: | |
537 | dma_free_coherent(&(jme->pdev->dev), | |
538 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
539 | txring->alloc, | |
540 | txring->dmaalloc); | |
541 | ||
542 | err_set_null: | |
543 | txring->desc = NULL; | |
544 | txring->dmaalloc = 0; | |
545 | txring->dma = 0; | |
546 | txring->bufinf = NULL; | |
547 | ||
548 | return -ENOMEM; | |
d7699f87 GFT |
549 | } |
550 | ||
3bf61c55 GFT |
551 | static void |
552 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
553 | { |
554 | int i; | |
555 | struct jme_ring *txring = &(jme->txring[0]); | |
fa97b924 | 556 | struct jme_buffer_info *txbi; |
d7699f87 | 557 | |
cd0ff491 | 558 | if (txring->alloc) { |
fa97b924 GFT |
559 | if (txring->bufinf) { |
560 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
561 | txbi = txring->bufinf + i; | |
562 | if (txbi->skb) { | |
563 | dev_kfree_skb(txbi->skb); | |
564 | txbi->skb = NULL; | |
565 | } | |
566 | txbi->mapping = 0; | |
567 | txbi->len = 0; | |
568 | txbi->nr_desc = 0; | |
569 | txbi->start_xmit = 0; | |
d7699f87 | 570 | } |
fa97b924 | 571 | kfree(txring->bufinf); |
d7699f87 GFT |
572 | } |
573 | ||
574 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 575 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
576 | txring->alloc, |
577 | txring->dmaalloc); | |
3bf61c55 GFT |
578 | |
579 | txring->alloc = NULL; | |
580 | txring->desc = NULL; | |
581 | txring->dmaalloc = 0; | |
582 | txring->dma = 0; | |
fa97b924 | 583 | txring->bufinf = NULL; |
d7699f87 | 584 | } |
3bf61c55 | 585 | txring->next_to_use = 0; |
cdcdc9eb | 586 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 587 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
588 | } |
589 | ||
cd0ff491 | 590 | static inline void |
3bf61c55 | 591 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
592 | { |
593 | /* | |
594 | * Select Queue 0 | |
595 | */ | |
596 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 597 | wmb(); |
d7699f87 GFT |
598 | |
599 | /* | |
600 | * Setup TX Queue 0 DMA Bass Address | |
601 | */ | |
fcf45b4c | 602 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 603 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 604 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
605 | |
606 | /* | |
607 | * Setup TX Descptor Count | |
608 | */ | |
b3821cc5 | 609 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
610 | |
611 | /* | |
612 | * Enable TX Engine | |
613 | */ | |
614 | wmb(); | |
4330c2f2 GFT |
615 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
616 | TXCS_SELECT_QUEUE0 | | |
617 | TXCS_ENABLE); | |
d7699f87 GFT |
618 | |
619 | } | |
620 | ||
cd0ff491 | 621 | static inline void |
29bdd921 GFT |
622 | jme_restart_tx_engine(struct jme_adapter *jme) |
623 | { | |
624 | /* | |
625 | * Restart TX Engine | |
626 | */ | |
627 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
628 | TXCS_SELECT_QUEUE0 | | |
629 | TXCS_ENABLE); | |
630 | } | |
631 | ||
cd0ff491 | 632 | static inline void |
3bf61c55 | 633 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
634 | { |
635 | int i; | |
cd0ff491 | 636 | u32 val; |
d7699f87 GFT |
637 | |
638 | /* | |
639 | * Disable TX Engine | |
640 | */ | |
fcf45b4c | 641 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 642 | wmb(); |
d7699f87 GFT |
643 | |
644 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 645 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 646 | mdelay(1); |
d7699f87 | 647 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 648 | rmb(); |
d7699f87 GFT |
649 | } |
650 | ||
cd0ff491 | 651 | if (!i) |
52a46ba8 | 652 | pr_err("Disable TX engine timeout\n"); |
d7699f87 GFT |
653 | } |
654 | ||
3bf61c55 GFT |
655 | static void |
656 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 657 | { |
fa97b924 | 658 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 659 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
660 | struct jme_buffer_info *rxbi = rxring->bufinf; |
661 | rxdesc += i; | |
662 | rxbi += i; | |
663 | ||
664 | rxdesc->dw[0] = 0; | |
665 | rxdesc->dw[1] = 0; | |
3bf61c55 | 666 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
667 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
668 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 669 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 670 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 671 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 672 | wmb(); |
3bf61c55 | 673 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
674 | } |
675 | ||
3bf61c55 GFT |
676 | static int |
677 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
678 | { |
679 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 680 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 681 | struct sk_buff *skb; |
4330c2f2 | 682 | |
79ce639c GFT |
683 | skb = netdev_alloc_skb(jme->dev, |
684 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 685 | if (unlikely(!skb)) |
4330c2f2 | 686 | return -ENOMEM; |
3bf61c55 | 687 | |
4330c2f2 | 688 | rxbi->skb = skb; |
3bf61c55 | 689 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
690 | rxbi->mapping = pci_map_page(jme->pdev, |
691 | virt_to_page(skb->data), | |
692 | offset_in_page(skb->data), | |
693 | rxbi->len, | |
694 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
695 | |
696 | return 0; | |
697 | } | |
698 | ||
3bf61c55 GFT |
699 | static void |
700 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
701 | { |
702 | struct jme_ring *rxring = &(jme->rxring[0]); | |
703 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
704 | rxbi += i; | |
705 | ||
cd0ff491 | 706 | if (rxbi->skb) { |
b3821cc5 | 707 | pci_unmap_page(jme->pdev, |
4330c2f2 | 708 | rxbi->mapping, |
3bf61c55 | 709 | rxbi->len, |
4330c2f2 GFT |
710 | PCI_DMA_FROMDEVICE); |
711 | dev_kfree_skb(rxbi->skb); | |
712 | rxbi->skb = NULL; | |
713 | rxbi->mapping = 0; | |
3bf61c55 | 714 | rxbi->len = 0; |
4330c2f2 GFT |
715 | } |
716 | } | |
717 | ||
3bf61c55 GFT |
718 | static void |
719 | jme_free_rx_resources(struct jme_adapter *jme) | |
720 | { | |
721 | int i; | |
722 | struct jme_ring *rxring = &(jme->rxring[0]); | |
723 | ||
cd0ff491 | 724 | if (rxring->alloc) { |
fa97b924 GFT |
725 | if (rxring->bufinf) { |
726 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
727 | jme_free_rx_buf(jme, i); | |
728 | kfree(rxring->bufinf); | |
729 | } | |
3bf61c55 GFT |
730 | |
731 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 732 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
733 | rxring->alloc, |
734 | rxring->dmaalloc); | |
735 | rxring->alloc = NULL; | |
736 | rxring->desc = NULL; | |
737 | rxring->dmaalloc = 0; | |
738 | rxring->dma = 0; | |
fa97b924 | 739 | rxring->bufinf = NULL; |
3bf61c55 GFT |
740 | } |
741 | rxring->next_to_use = 0; | |
cdcdc9eb | 742 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
743 | } |
744 | ||
745 | static int | |
746 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
747 | { |
748 | int i; | |
749 | struct jme_ring *rxring = &(jme->rxring[0]); | |
750 | ||
751 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
752 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
753 | &(rxring->dmaalloc), | |
754 | GFP_ATOMIC); | |
fa97b924 GFT |
755 | if (!rxring->alloc) |
756 | goto err_set_null; | |
d7699f87 GFT |
757 | |
758 | /* | |
759 | * 16 Bytes align | |
760 | */ | |
cd0ff491 | 761 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 762 | RING_DESC_ALIGN); |
4330c2f2 | 763 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 764 | rxring->next_to_use = 0; |
cdcdc9eb | 765 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 766 | |
fa97b924 GFT |
767 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
768 | jme->rx_ring_size, GFP_ATOMIC); | |
769 | if (unlikely(!(rxring->bufinf))) | |
770 | goto err_free_rxring; | |
771 | ||
d7699f87 GFT |
772 | /* |
773 | * Initiallize Receive Descriptors | |
774 | */ | |
fa97b924 GFT |
775 | memset(rxring->bufinf, 0, |
776 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
777 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
778 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
779 | jme_free_rx_resources(jme); |
780 | return -ENOMEM; | |
781 | } | |
d7699f87 GFT |
782 | |
783 | jme_set_clean_rxdesc(jme, i); | |
784 | } | |
785 | ||
d7699f87 | 786 | return 0; |
fa97b924 GFT |
787 | |
788 | err_free_rxring: | |
789 | dma_free_coherent(&(jme->pdev->dev), | |
790 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
791 | rxring->alloc, | |
792 | rxring->dmaalloc); | |
793 | err_set_null: | |
794 | rxring->desc = NULL; | |
795 | rxring->dmaalloc = 0; | |
796 | rxring->dma = 0; | |
797 | rxring->bufinf = NULL; | |
798 | ||
799 | return -ENOMEM; | |
d7699f87 GFT |
800 | } |
801 | ||
cd0ff491 | 802 | static inline void |
3bf61c55 | 803 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 804 | { |
cd0ff491 GFT |
805 | /* |
806 | * Select Queue 0 | |
807 | */ | |
808 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
809 | RXCS_QUEUESEL_Q0); | |
810 | wmb(); | |
811 | ||
d7699f87 GFT |
812 | /* |
813 | * Setup RX DMA Bass Address | |
814 | */ | |
fa97b924 | 815 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 816 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
fa97b924 | 817 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
818 | |
819 | /* | |
b3821cc5 | 820 | * Setup RX Descriptor Count |
d7699f87 | 821 | */ |
b3821cc5 | 822 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 823 | |
3bf61c55 | 824 | /* |
d7699f87 GFT |
825 | * Setup Unicast Filter |
826 | */ | |
827 | jme_set_multi(jme->dev); | |
828 | ||
829 | /* | |
830 | * Enable RX Engine | |
831 | */ | |
832 | wmb(); | |
79ce639c | 833 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
834 | RXCS_QUEUESEL_Q0 | |
835 | RXCS_ENABLE | | |
836 | RXCS_QST); | |
d7699f87 GFT |
837 | } |
838 | ||
cd0ff491 | 839 | static inline void |
3bf61c55 | 840 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
841 | { |
842 | /* | |
3bf61c55 | 843 | * Start RX Engine |
4330c2f2 | 844 | */ |
79ce639c | 845 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
846 | RXCS_QUEUESEL_Q0 | |
847 | RXCS_ENABLE | | |
848 | RXCS_QST); | |
849 | } | |
850 | ||
cd0ff491 | 851 | static inline void |
3bf61c55 | 852 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
853 | { |
854 | int i; | |
cd0ff491 | 855 | u32 val; |
d7699f87 GFT |
856 | |
857 | /* | |
858 | * Disable RX Engine | |
859 | */ | |
29bdd921 | 860 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 861 | wmb(); |
d7699f87 GFT |
862 | |
863 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 864 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 865 | mdelay(1); |
d7699f87 | 866 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 867 | rmb(); |
d7699f87 GFT |
868 | } |
869 | ||
cd0ff491 | 870 | if (!i) |
52a46ba8 | 871 | pr_err("Disable RX engine timeout\n"); |
d7699f87 GFT |
872 | |
873 | } | |
874 | ||
192570e0 | 875 | static int |
cd0ff491 | 876 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) |
192570e0 | 877 | { |
cd0ff491 | 878 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
879 | return false; |
880 | ||
fa97b924 GFT |
881 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
882 | == RXWBFLAG_TCPON)) { | |
883 | if (flags & RXWBFLAG_IPV4) | |
c97b5740 | 884 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
fa97b924 | 885 | return false; |
192570e0 GFT |
886 | } |
887 | ||
fa97b924 GFT |
888 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
889 | == RXWBFLAG_UDPON)) { | |
890 | if (flags & RXWBFLAG_IPV4) | |
52a46ba8 | 891 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
fa97b924 | 892 | return false; |
192570e0 GFT |
893 | } |
894 | ||
fa97b924 GFT |
895 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
896 | == RXWBFLAG_IPV4)) { | |
52a46ba8 | 897 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
fa97b924 | 898 | return false; |
192570e0 GFT |
899 | } |
900 | ||
901 | return true; | |
902 | } | |
903 | ||
3bf61c55 | 904 | static void |
42b1055e | 905 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 906 | { |
d7699f87 | 907 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 908 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 909 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 910 | struct sk_buff *skb; |
3bf61c55 | 911 | int framesize; |
d7699f87 | 912 | |
3bf61c55 GFT |
913 | rxdesc += idx; |
914 | rxbi += idx; | |
d7699f87 | 915 | |
3bf61c55 GFT |
916 | skb = rxbi->skb; |
917 | pci_dma_sync_single_for_cpu(jme->pdev, | |
918 | rxbi->mapping, | |
919 | rxbi->len, | |
920 | PCI_DMA_FROMDEVICE); | |
921 | ||
cd0ff491 | 922 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
923 | pci_dma_sync_single_for_device(jme->pdev, |
924 | rxbi->mapping, | |
925 | rxbi->len, | |
926 | PCI_DMA_FROMDEVICE); | |
927 | ||
928 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 929 | } else { |
3bf61c55 GFT |
930 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
931 | - RX_PREPAD_SIZE; | |
932 | ||
933 | skb_reserve(skb, RX_PREPAD_SIZE); | |
934 | skb_put(skb, framesize); | |
935 | skb->protocol = eth_type_trans(skb, jme->dev); | |
936 | ||
94c5ea02 | 937 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags))) |
8c198884 | 938 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 939 | else |
97984ab7 | 940 | skb_checksum_none_assert(skb); |
8c198884 | 941 | |
94c5ea02 | 942 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 943 | if (jme->vlgrp) { |
cdcdc9eb | 944 | jme->jme_vlan_rx(skb, jme->vlgrp, |
94c5ea02 | 945 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 946 | NET_STAT(jme).rx_bytes += 4; |
c97b5740 | 947 | } else { |
c97b5740 | 948 | dev_kfree_skb(skb); |
b3821cc5 | 949 | } |
cd0ff491 | 950 | } else { |
cdcdc9eb | 951 | jme->jme_rx(skb); |
b3821cc5 | 952 | } |
3bf61c55 | 953 | |
94c5ea02 GFT |
954 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
955 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
956 | ++(NET_STAT(jme).multicast); |
957 | ||
3bf61c55 GFT |
958 | NET_STAT(jme).rx_bytes += framesize; |
959 | ++(NET_STAT(jme).rx_packets); | |
960 | } | |
961 | ||
962 | jme_set_clean_rxdesc(jme, idx); | |
963 | ||
964 | } | |
965 | ||
966 | static int | |
967 | jme_process_receive(struct jme_adapter *jme, int limit) | |
968 | { | |
969 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 970 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 971 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 972 | |
cd0ff491 | 973 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
974 | goto out_inc; |
975 | ||
cd0ff491 | 976 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
977 | goto out_inc; |
978 | ||
cd0ff491 | 979 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
980 | goto out_inc; |
981 | ||
cdcdc9eb | 982 | i = atomic_read(&rxring->next_to_clean); |
fa97b924 | 983 | while (limit > 0) { |
3bf61c55 GFT |
984 | rxdesc = rxring->desc; |
985 | rxdesc += i; | |
986 | ||
94c5ea02 | 987 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
988 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
989 | goto out; | |
fa97b924 | 990 | --limit; |
d7699f87 | 991 | |
4330c2f2 GFT |
992 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
993 | ||
cd0ff491 | 994 | if (unlikely(desccnt > 1 || |
192570e0 | 995 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 996 | |
cd0ff491 | 997 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 998 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 999 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1000 | ++(NET_STAT(jme).rx_fifo_errors); |
1001 | else | |
1002 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1003 | |
cd0ff491 | 1004 | if (desccnt > 1) |
3bf61c55 | 1005 | limit -= desccnt - 1; |
4330c2f2 | 1006 | |
cd0ff491 | 1007 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1008 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1009 | j = (j + 1) & (mask); |
4330c2f2 | 1010 | } |
3bf61c55 | 1011 | |
cd0ff491 | 1012 | } else { |
42b1055e | 1013 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1014 | } |
4330c2f2 | 1015 | |
b3821cc5 | 1016 | i = (i + desccnt) & (mask); |
3bf61c55 | 1017 | } |
4330c2f2 | 1018 | |
3bf61c55 | 1019 | out: |
cdcdc9eb | 1020 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1021 | |
192570e0 GFT |
1022 | out_inc: |
1023 | atomic_inc(&jme->rx_cleaning); | |
1024 | ||
3bf61c55 | 1025 | return limit > 0 ? limit : 0; |
4330c2f2 | 1026 | |
3bf61c55 | 1027 | } |
d7699f87 | 1028 | |
79ce639c GFT |
1029 | static void |
1030 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1031 | { | |
cd0ff491 | 1032 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1033 | dpi->cnt = 0; |
79ce639c | 1034 | return; |
192570e0 | 1035 | } |
79ce639c | 1036 | |
cd0ff491 | 1037 | if (dpi->attempt == atmp) { |
79ce639c | 1038 | ++(dpi->cnt); |
cd0ff491 | 1039 | } else { |
79ce639c GFT |
1040 | dpi->attempt = atmp; |
1041 | dpi->cnt = 0; | |
1042 | } | |
1043 | ||
1044 | } | |
1045 | ||
1046 | static void | |
1047 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1048 | { | |
1049 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1050 | ||
cd0ff491 | 1051 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1052 | jme_attempt_pcc(dpi, PCC_P3); |
c97b5740 GFT |
1053 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1054 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1055 | jme_attempt_pcc(dpi, PCC_P2); |
1056 | else | |
1057 | jme_attempt_pcc(dpi, PCC_P1); | |
1058 | ||
cd0ff491 GFT |
1059 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1060 | if (dpi->attempt < dpi->cur) | |
1061 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1062 | jme_set_rx_pcc(jme, dpi->attempt); |
1063 | dpi->cur = dpi->attempt; | |
1064 | dpi->cnt = 0; | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | static void | |
1069 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1070 | { | |
1071 | struct dynpcc_info *dpi = &(jme->dpi); | |
1072 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1073 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1074 | dpi->intr_cnt = 0; | |
1075 | jwrite32(jme, JME_TMCSR, | |
1076 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1077 | } | |
1078 | ||
cd0ff491 | 1079 | static inline void |
29bdd921 GFT |
1080 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1081 | { | |
1082 | jwrite32(jme, JME_TMCSR, 0); | |
1083 | } | |
1084 | ||
cd0ff491 GFT |
1085 | static void |
1086 | jme_shutdown_nic(struct jme_adapter *jme) | |
1087 | { | |
1088 | u32 phylink; | |
1089 | ||
1090 | phylink = jme_linkstat_from_phy(jme); | |
1091 | ||
1092 | if (!(phylink & PHY_LINK_UP)) { | |
1093 | /* | |
1094 | * Disable all interrupt before issue timer | |
1095 | */ | |
1096 | jme_stop_irq(jme); | |
1097 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1098 | } | |
1099 | } | |
1100 | ||
79ce639c GFT |
1101 | static void |
1102 | jme_pcc_tasklet(unsigned long arg) | |
1103 | { | |
cd0ff491 | 1104 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1105 | struct net_device *netdev = jme->dev; |
1106 | ||
cd0ff491 GFT |
1107 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1108 | jme_shutdown_nic(jme); | |
1109 | return; | |
1110 | } | |
29bdd921 | 1111 | |
cd0ff491 | 1112 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1113 | (atomic_read(&jme->link_changing) != 1) |
1114 | )) { | |
1115 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1116 | return; |
1117 | } | |
29bdd921 | 1118 | |
cd0ff491 | 1119 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1120 | jme_dynamic_pcc(jme); |
1121 | ||
79ce639c GFT |
1122 | jme_start_pcc_timer(jme); |
1123 | } | |
1124 | ||
cd0ff491 | 1125 | static inline void |
192570e0 GFT |
1126 | jme_polling_mode(struct jme_adapter *jme) |
1127 | { | |
1128 | jme_set_rx_pcc(jme, PCC_OFF); | |
1129 | } | |
1130 | ||
cd0ff491 | 1131 | static inline void |
192570e0 GFT |
1132 | jme_interrupt_mode(struct jme_adapter *jme) |
1133 | { | |
1134 | jme_set_rx_pcc(jme, PCC_P1); | |
1135 | } | |
1136 | ||
cd0ff491 GFT |
1137 | static inline int |
1138 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1139 | { | |
1140 | u32 apmc; | |
1141 | apmc = jread32(jme, JME_APMC); | |
1142 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1143 | } | |
1144 | ||
1145 | static void | |
1146 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1147 | { | |
1148 | u32 apmc; | |
1149 | ||
1150 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1151 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1152 | if (!no_extplug) { | |
1153 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1154 | wmb(); | |
1155 | } | |
1156 | jwrite32f(jme, JME_APMC, apmc); | |
1157 | ||
1158 | jwrite32f(jme, JME_TIMER2, 0); | |
1159 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1160 | jwrite32(jme, JME_TMCSR, | |
1161 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1162 | } | |
1163 | ||
1164 | static void | |
1165 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1166 | { | |
1167 | u32 apmc; | |
1168 | ||
1169 | jwrite32f(jme, JME_TMCSR, 0); | |
1170 | jwrite32f(jme, JME_TIMER2, 0); | |
1171 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1172 | ||
1173 | apmc = jread32(jme, JME_APMC); | |
1174 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1175 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1176 | wmb(); | |
1177 | jwrite32f(jme, JME_APMC, apmc); | |
1178 | } | |
1179 | ||
3bf61c55 GFT |
1180 | static void |
1181 | jme_link_change_tasklet(unsigned long arg) | |
1182 | { | |
cd0ff491 | 1183 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1184 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1185 | int rc; |
1186 | ||
cd0ff491 GFT |
1187 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1188 | atomic_inc(&jme->link_changing); | |
52a46ba8 | 1189 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
e882564f | 1190 | while (atomic_read(&jme->link_changing) != 1) |
52a46ba8 | 1191 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1192 | } |
fcf45b4c | 1193 | |
cd0ff491 | 1194 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1195 | goto out; |
1196 | ||
29bdd921 | 1197 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1198 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1199 | if (jme_pseudo_hotplug_enabled(jme)) |
1200 | jme_stop_shutdown_timer(jme); | |
1201 | ||
1202 | jme_stop_pcc_timer(jme); | |
1203 | tasklet_disable(&jme->txclean_task); | |
1204 | tasklet_disable(&jme->rxclean_task); | |
1205 | tasklet_disable(&jme->rxempty_task); | |
1206 | ||
1207 | if (netif_carrier_ok(netdev)) { | |
1208 | jme_reset_ghc_speed(jme); | |
1209 | jme_disable_rx_engine(jme); | |
1210 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1211 | jme_reset_mac_processor(jme); |
1212 | jme_free_rx_resources(jme); | |
1213 | jme_free_tx_resources(jme); | |
192570e0 | 1214 | |
cd0ff491 | 1215 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1216 | jme_polling_mode(jme); |
cd0ff491 GFT |
1217 | |
1218 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1219 | } |
1220 | ||
1221 | jme_check_link(netdev, 0); | |
cd0ff491 | 1222 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1223 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1224 | if (rc) { |
52a46ba8 | 1225 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1226 | goto out_enable_tasklet; |
fcf45b4c GFT |
1227 | } |
1228 | ||
fcf45b4c | 1229 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1230 | if (rc) { |
52a46ba8 | 1231 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1232 | goto err_out_free_rx_resources; |
1233 | } | |
1234 | ||
1235 | jme_enable_rx_engine(jme); | |
1236 | jme_enable_tx_engine(jme); | |
1237 | ||
1238 | netif_start_queue(netdev); | |
192570e0 | 1239 | |
cd0ff491 | 1240 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1241 | jme_interrupt_mode(jme); |
192570e0 | 1242 | |
79ce639c | 1243 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1244 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1245 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1246 | } |
1247 | ||
cd0ff491 | 1248 | goto out_enable_tasklet; |
fcf45b4c GFT |
1249 | |
1250 | err_out_free_rx_resources: | |
1251 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1252 | out_enable_tasklet: |
1253 | tasklet_enable(&jme->txclean_task); | |
1254 | tasklet_hi_enable(&jme->rxclean_task); | |
1255 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1256 | out: |
1257 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1258 | } |
d7699f87 | 1259 | |
3bf61c55 GFT |
1260 | static void |
1261 | jme_rx_clean_tasklet(unsigned long arg) | |
1262 | { | |
cd0ff491 | 1263 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1264 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1265 | |
192570e0 GFT |
1266 | jme_process_receive(jme, jme->rx_ring_size); |
1267 | ++(dpi->intr_cnt); | |
42b1055e | 1268 | |
192570e0 | 1269 | } |
fcf45b4c | 1270 | |
192570e0 | 1271 | static int |
cdcdc9eb | 1272 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1273 | { |
cdcdc9eb | 1274 | struct jme_adapter *jme = jme_napi_priv(holder); |
192570e0 | 1275 | int rest; |
fcf45b4c | 1276 | |
cdcdc9eb | 1277 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1278 | |
cd0ff491 | 1279 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1280 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1281 | ++(NET_STAT(jme).rx_dropped); |
1282 | jme_restart_rx_engine(jme); | |
1283 | } | |
1284 | atomic_inc(&jme->rx_empty); | |
1285 | ||
cd0ff491 | 1286 | if (rest) { |
cdcdc9eb | 1287 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1288 | jme_interrupt_mode(jme); |
1289 | } | |
1290 | ||
cdcdc9eb GFT |
1291 | JME_NAPI_WEIGHT_SET(budget, rest); |
1292 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1293 | } |
1294 | ||
1295 | static void | |
1296 | jme_rx_empty_tasklet(unsigned long arg) | |
1297 | { | |
cd0ff491 | 1298 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1299 | |
cd0ff491 | 1300 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1301 | return; |
1302 | ||
cd0ff491 | 1303 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1304 | return; |
1305 | ||
c97b5740 | 1306 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1307 | |
fcf45b4c | 1308 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1309 | |
cd0ff491 | 1310 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1311 | atomic_dec(&jme->rx_empty); |
1312 | ++(NET_STAT(jme).rx_dropped); | |
1313 | jme_restart_rx_engine(jme); | |
1314 | } | |
1315 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1316 | } |
1317 | ||
b3821cc5 GFT |
1318 | static void |
1319 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1320 | { | |
fa97b924 | 1321 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1322 | |
1323 | smp_wmb(); | |
cd0ff491 | 1324 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1325 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
52a46ba8 | 1326 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1327 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1328 | } |
1329 | ||
1330 | } | |
1331 | ||
3bf61c55 GFT |
1332 | static void |
1333 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1334 | { |
cd0ff491 | 1335 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1336 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1337 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1338 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1339 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1340 | |
52a46ba8 | 1341 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1342 | |
1343 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1344 | goto out; |
1345 | ||
cd0ff491 | 1346 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1347 | goto out; |
1348 | ||
cd0ff491 | 1349 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1350 | goto out; |
1351 | ||
b3821cc5 GFT |
1352 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1353 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1354 | |
cd0ff491 | 1355 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1356 | |
1357 | ctxbi = txbi + i; | |
1358 | ||
cd0ff491 | 1359 | if (likely(ctxbi->skb && |
b3821cc5 | 1360 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1361 | |
cd0ff491 | 1362 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
52a46ba8 | 1363 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1364 | |
cd0ff491 | 1365 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1366 | |
cd0ff491 | 1367 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1368 | ttxbi = txbi + ((i + j) & (mask)); |
1369 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1370 | |
b3821cc5 | 1371 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1372 | ttxbi->mapping, |
1373 | ttxbi->len, | |
1374 | PCI_DMA_TODEVICE); | |
1375 | ||
3bf61c55 GFT |
1376 | ttxbi->mapping = 0; |
1377 | ttxbi->len = 0; | |
1378 | } | |
1379 | ||
1380 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1381 | |
1382 | cnt += ctxbi->nr_desc; | |
1383 | ||
cd0ff491 | 1384 | if (unlikely(err)) { |
8c198884 | 1385 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1386 | } else { |
8c198884 | 1387 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1388 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1389 | } | |
1390 | ||
1391 | ctxbi->skb = NULL; | |
1392 | ctxbi->len = 0; | |
cdcdc9eb | 1393 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1394 | |
1395 | } else { | |
3bf61c55 GFT |
1396 | break; |
1397 | } | |
1398 | ||
b3821cc5 | 1399 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1400 | |
1401 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1402 | } |
1403 | ||
52a46ba8 | 1404 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1405 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1406 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1407 | |
b3821cc5 GFT |
1408 | jme_wake_queue_if_stopped(jme); |
1409 | ||
fcf45b4c GFT |
1410 | out: |
1411 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1412 | } |
1413 | ||
79ce639c | 1414 | static void |
cd0ff491 | 1415 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1416 | { |
3bf61c55 GFT |
1417 | /* |
1418 | * Disable interrupt | |
1419 | */ | |
1420 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1421 | |
cd0ff491 | 1422 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1423 | /* |
1424 | * Link change event is critical | |
1425 | * all other events are ignored | |
1426 | */ | |
1427 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1428 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1429 | goto out_reenable; |
fcf45b4c | 1430 | } |
d7699f87 | 1431 | |
cd0ff491 | 1432 | if (intrstat & INTR_TMINTR) { |
47220951 | 1433 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1434 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1435 | } |
79ce639c | 1436 | |
cd0ff491 | 1437 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1438 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1439 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1440 | } |
1441 | ||
cd0ff491 | 1442 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1443 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1444 | INTR_PCCRX0 | | |
1445 | INTR_RX0EMP)) | | |
1446 | INTR_RX0); | |
1447 | } | |
d7699f87 | 1448 | |
cd0ff491 GFT |
1449 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1450 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1451 | atomic_inc(&jme->rx_empty); |
1452 | ||
cd0ff491 GFT |
1453 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1454 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1455 | jme_polling_mode(jme); |
cdcdc9eb | 1456 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1457 | } |
1458 | } | |
cd0ff491 GFT |
1459 | } else { |
1460 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1461 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1462 | tasklet_hi_schedule(&jme->rxempty_task); |
1463 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1464 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1465 | } |
4330c2f2 | 1466 | } |
d7699f87 | 1467 | |
29bdd921 | 1468 | out_reenable: |
3bf61c55 | 1469 | /* |
fcf45b4c | 1470 | * Re-enable interrupt |
3bf61c55 | 1471 | */ |
fcf45b4c | 1472 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1473 | } |
1474 | ||
1475 | static irqreturn_t | |
1476 | jme_intr(int irq, void *dev_id) | |
1477 | { | |
cd0ff491 GFT |
1478 | struct net_device *netdev = dev_id; |
1479 | struct jme_adapter *jme = netdev_priv(netdev); | |
1480 | u32 intrstat; | |
79ce639c GFT |
1481 | |
1482 | intrstat = jread32(jme, JME_IEVE); | |
1483 | ||
1484 | /* | |
1485 | * Check if it's really an interrupt for us | |
1486 | */ | |
9b9d55de | 1487 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1488 | return IRQ_NONE; |
79ce639c GFT |
1489 | |
1490 | /* | |
1491 | * Check if the device still exist | |
1492 | */ | |
cd0ff491 GFT |
1493 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1494 | return IRQ_NONE; | |
79ce639c GFT |
1495 | |
1496 | jme_intr_msi(jme, intrstat); | |
1497 | ||
cd0ff491 | 1498 | return IRQ_HANDLED; |
d7699f87 GFT |
1499 | } |
1500 | ||
79ce639c GFT |
1501 | static irqreturn_t |
1502 | jme_msi(int irq, void *dev_id) | |
1503 | { | |
cd0ff491 GFT |
1504 | struct net_device *netdev = dev_id; |
1505 | struct jme_adapter *jme = netdev_priv(netdev); | |
1506 | u32 intrstat; | |
79ce639c | 1507 | |
fa97b924 | 1508 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1509 | |
1510 | jme_intr_msi(jme, intrstat); | |
1511 | ||
cd0ff491 | 1512 | return IRQ_HANDLED; |
79ce639c GFT |
1513 | } |
1514 | ||
79ce639c GFT |
1515 | static void |
1516 | jme_reset_link(struct jme_adapter *jme) | |
1517 | { | |
1518 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1519 | } | |
1520 | ||
fcf45b4c GFT |
1521 | static void |
1522 | jme_restart_an(struct jme_adapter *jme) | |
1523 | { | |
cd0ff491 | 1524 | u32 bmcr; |
fcf45b4c | 1525 | |
cd0ff491 | 1526 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1527 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1528 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1529 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1530 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1531 | } |
1532 | ||
1533 | static int | |
1534 | jme_request_irq(struct jme_adapter *jme) | |
1535 | { | |
1536 | int rc; | |
cd0ff491 GFT |
1537 | struct net_device *netdev = jme->dev; |
1538 | irq_handler_t handler = jme_intr; | |
1539 | int irq_flags = IRQF_SHARED; | |
1540 | ||
1541 | if (!pci_enable_msi(jme->pdev)) { | |
1542 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1543 | handler = jme_msi; | |
1544 | irq_flags = 0; | |
1545 | } | |
1546 | ||
1547 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1548 | netdev); | |
1549 | if (rc) { | |
52a46ba8 JP |
1550 | netdev_err(netdev, |
1551 | "Unable to request %s interrupt (return: %d)\n", | |
1552 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1553 | rc); | |
79ce639c | 1554 | |
cd0ff491 GFT |
1555 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1556 | pci_disable_msi(jme->pdev); | |
1557 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1558 | } |
cd0ff491 | 1559 | } else { |
79ce639c GFT |
1560 | netdev->irq = jme->pdev->irq; |
1561 | } | |
1562 | ||
cd0ff491 | 1563 | return rc; |
79ce639c GFT |
1564 | } |
1565 | ||
1566 | static void | |
1567 | jme_free_irq(struct jme_adapter *jme) | |
1568 | { | |
cd0ff491 GFT |
1569 | free_irq(jme->pdev->irq, jme->dev); |
1570 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1571 | pci_disable_msi(jme->pdev); | |
1572 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1573 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1574 | } |
fcf45b4c GFT |
1575 | } |
1576 | ||
48db98f7 GFT |
1577 | static inline void |
1578 | jme_phy_on(struct jme_adapter *jme) | |
1579 | { | |
1580 | u32 bmcr; | |
1581 | ||
1582 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1583 | bmcr &= ~BMCR_PDOWN; | |
1584 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1585 | } | |
1586 | ||
3bf61c55 GFT |
1587 | static int |
1588 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1589 | { |
1590 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1591 | int rc; |
79ce639c | 1592 | |
42b1055e | 1593 | jme_clear_pm(jme); |
cdcdc9eb | 1594 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1595 | |
fa97b924 | 1596 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1597 | tasklet_enable(&jme->txclean_task); |
1598 | tasklet_hi_enable(&jme->rxclean_task); | |
1599 | tasklet_hi_enable(&jme->rxempty_task); | |
1600 | ||
79ce639c | 1601 | rc = jme_request_irq(jme); |
cd0ff491 | 1602 | if (rc) |
4330c2f2 | 1603 | goto err_out; |
79ce639c | 1604 | |
d7699f87 | 1605 | jme_start_irq(jme); |
42b1055e | 1606 | |
48db98f7 GFT |
1607 | if (test_bit(JME_FLAG_SSET, &jme->flags)) { |
1608 | jme_phy_on(jme); | |
42b1055e | 1609 | jme_set_settings(netdev, &jme->old_ecmd); |
48db98f7 | 1610 | } else { |
42b1055e | 1611 | jme_reset_phy_processor(jme); |
48db98f7 | 1612 | } |
42b1055e | 1613 | |
29bdd921 | 1614 | jme_reset_link(jme); |
d7699f87 GFT |
1615 | |
1616 | return 0; | |
1617 | ||
d7699f87 GFT |
1618 | err_out: |
1619 | netif_stop_queue(netdev); | |
1620 | netif_carrier_off(netdev); | |
4330c2f2 | 1621 | return rc; |
d7699f87 GFT |
1622 | } |
1623 | ||
9b9d55de | 1624 | #ifdef CONFIG_PM |
42b1055e GFT |
1625 | static void |
1626 | jme_set_100m_half(struct jme_adapter *jme) | |
1627 | { | |
cd0ff491 | 1628 | u32 bmcr, tmp; |
42b1055e GFT |
1629 | |
1630 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1631 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1632 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1633 | tmp |= BMCR_SPEED100; | |
1634 | ||
1635 | if (bmcr != tmp) | |
1636 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1637 | ||
cd0ff491 | 1638 | if (jme->fpgaver) |
cdcdc9eb GFT |
1639 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1640 | else | |
1641 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1642 | } |
1643 | ||
47220951 GFT |
1644 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1645 | static void | |
1646 | jme_wait_link(struct jme_adapter *jme) | |
1647 | { | |
cd0ff491 | 1648 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1649 | |
1650 | mdelay(1000); | |
1651 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1652 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1653 | mdelay(10); |
1654 | phylink = jme_linkstat_from_phy(jme); | |
1655 | } | |
1656 | } | |
9b9d55de | 1657 | #endif |
47220951 | 1658 | |
cd0ff491 | 1659 | static inline void |
42b1055e GFT |
1660 | jme_phy_off(struct jme_adapter *jme) |
1661 | { | |
1662 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); | |
1663 | } | |
1664 | ||
3bf61c55 GFT |
1665 | static int |
1666 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1667 | { |
1668 | struct jme_adapter *jme = netdev_priv(netdev); | |
1669 | ||
1670 | netif_stop_queue(netdev); | |
1671 | netif_carrier_off(netdev); | |
1672 | ||
1673 | jme_stop_irq(jme); | |
79ce639c | 1674 | jme_free_irq(jme); |
d7699f87 | 1675 | |
cdcdc9eb | 1676 | JME_NAPI_DISABLE(jme); |
192570e0 | 1677 | |
fa97b924 GFT |
1678 | tasklet_disable(&jme->linkch_task); |
1679 | tasklet_disable(&jme->txclean_task); | |
1680 | tasklet_disable(&jme->rxclean_task); | |
1681 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1682 | |
cd0ff491 GFT |
1683 | jme_reset_ghc_speed(jme); |
1684 | jme_disable_rx_engine(jme); | |
1685 | jme_disable_tx_engine(jme); | |
8c198884 | 1686 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1687 | jme_free_rx_resources(jme); |
1688 | jme_free_tx_resources(jme); | |
42b1055e | 1689 | jme->phylink = 0; |
b3821cc5 GFT |
1690 | jme_phy_off(jme); |
1691 | ||
1692 | return 0; | |
1693 | } | |
1694 | ||
1695 | static int | |
1696 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1697 | struct sk_buff *skb) | |
1698 | { | |
fa97b924 | 1699 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1700 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1701 | ||
1702 | idx = txring->next_to_use; | |
1703 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1704 | ||
cd0ff491 | 1705 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1706 | return -1; |
1707 | ||
1708 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1709 | |
b3821cc5 GFT |
1710 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1711 | ||
1712 | return idx; | |
1713 | } | |
1714 | ||
1715 | static void | |
1716 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1717 | struct txdesc *txdesc, |
b3821cc5 GFT |
1718 | struct jme_buffer_info *txbi, |
1719 | struct page *page, | |
cd0ff491 GFT |
1720 | u32 page_offset, |
1721 | u32 len, | |
1722 | u8 hidma) | |
b3821cc5 GFT |
1723 | { |
1724 | dma_addr_t dmaaddr; | |
1725 | ||
1726 | dmaaddr = pci_map_page(pdev, | |
1727 | page, | |
1728 | page_offset, | |
1729 | len, | |
1730 | PCI_DMA_TODEVICE); | |
1731 | ||
1732 | pci_dma_sync_single_for_device(pdev, | |
1733 | dmaaddr, | |
1734 | len, | |
1735 | PCI_DMA_TODEVICE); | |
1736 | ||
1737 | txdesc->dw[0] = 0; | |
1738 | txdesc->dw[1] = 0; | |
1739 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1740 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1741 | txdesc->desc2.datalen = cpu_to_le16(len); |
1742 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1743 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1744 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1745 | ||
1746 | txbi->mapping = dmaaddr; | |
1747 | txbi->len = len; | |
1748 | } | |
1749 | ||
1750 | static void | |
1751 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1752 | { | |
fa97b924 | 1753 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1754 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1755 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1756 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1757 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1758 | int mask = jme->tx_ring_mask; | |
1759 | struct skb_frag_struct *frag; | |
cd0ff491 | 1760 | u32 len; |
b3821cc5 | 1761 | |
cd0ff491 GFT |
1762 | for (i = 0 ; i < nr_frags ; ++i) { |
1763 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1764 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1765 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1766 | ||
1767 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1768 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1769 | } |
b3821cc5 | 1770 | |
cd0ff491 | 1771 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1772 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1773 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1774 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1775 | offset_in_page(skb->data), len, hidma); | |
1776 | ||
1777 | } | |
1778 | ||
1779 | static int | |
1780 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1781 | { | |
cd0ff491 | 1782 | if (unlikely(skb_shinfo(skb)->gso_size && |
b3821cc5 GFT |
1783 | skb_header_cloned(skb) && |
1784 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
1785 | dev_kfree_skb(skb); | |
1786 | return -1; | |
1787 | } | |
1788 | ||
1789 | return 0; | |
1790 | } | |
1791 | ||
1792 | static int | |
94c5ea02 | 1793 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 1794 | { |
94c5ea02 | 1795 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); |
cd0ff491 | 1796 | if (*mss) { |
b3821cc5 GFT |
1797 | *flags |= TXFLAG_LSEN; |
1798 | ||
cd0ff491 | 1799 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1800 | struct iphdr *iph = ip_hdr(skb); |
1801 | ||
1802 | iph->check = 0; | |
cd0ff491 | 1803 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
1804 | iph->daddr, 0, |
1805 | IPPROTO_TCP, | |
1806 | 0); | |
cd0ff491 | 1807 | } else { |
b3821cc5 GFT |
1808 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1809 | ||
cd0ff491 | 1810 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
1811 | &ip6h->daddr, 0, |
1812 | IPPROTO_TCP, | |
1813 | 0); | |
1814 | } | |
1815 | ||
1816 | return 0; | |
1817 | } | |
1818 | ||
1819 | return 1; | |
1820 | } | |
1821 | ||
1822 | static void | |
cd0ff491 | 1823 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 1824 | { |
cd0ff491 GFT |
1825 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1826 | u8 ip_proto; | |
b3821cc5 GFT |
1827 | |
1828 | switch (skb->protocol) { | |
cd0ff491 | 1829 | case htons(ETH_P_IP): |
b3821cc5 GFT |
1830 | ip_proto = ip_hdr(skb)->protocol; |
1831 | break; | |
cd0ff491 | 1832 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
1833 | ip_proto = ipv6_hdr(skb)->nexthdr; |
1834 | break; | |
1835 | default: | |
1836 | ip_proto = 0; | |
1837 | break; | |
1838 | } | |
1839 | ||
cd0ff491 | 1840 | switch (ip_proto) { |
b3821cc5 GFT |
1841 | case IPPROTO_TCP: |
1842 | *flags |= TXFLAG_TCPCS; | |
1843 | break; | |
1844 | case IPPROTO_UDP: | |
1845 | *flags |= TXFLAG_UDPCS; | |
1846 | break; | |
1847 | default: | |
52a46ba8 | 1848 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
1849 | break; |
1850 | } | |
1851 | } | |
1852 | } | |
1853 | ||
cd0ff491 | 1854 | static inline void |
94c5ea02 | 1855 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 1856 | { |
cd0ff491 | 1857 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 1858 | *flags |= TXFLAG_TAGON; |
94c5ea02 | 1859 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 1860 | } |
b3821cc5 GFT |
1861 | } |
1862 | ||
1863 | static int | |
94c5ea02 | 1864 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 1865 | { |
fa97b924 | 1866 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1867 | struct txdesc *txdesc; |
b3821cc5 | 1868 | struct jme_buffer_info *txbi; |
cd0ff491 | 1869 | u8 flags; |
b3821cc5 | 1870 | |
cd0ff491 | 1871 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
1872 | txbi = txring->bufinf + idx; |
1873 | ||
1874 | txdesc->dw[0] = 0; | |
1875 | txdesc->dw[1] = 0; | |
1876 | txdesc->dw[2] = 0; | |
1877 | txdesc->dw[3] = 0; | |
1878 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
1879 | /* | |
1880 | * Set OWN bit at final. | |
1881 | * When kernel transmit faster than NIC. | |
1882 | * And NIC trying to send this descriptor before we tell | |
1883 | * it to start sending this TX queue. | |
1884 | * Other fields are already filled correctly. | |
1885 | */ | |
1886 | wmb(); | |
1887 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
1888 | /* |
1889 | * Set checksum flags while not tso | |
1890 | */ | |
1891 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
1892 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 1893 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
94c5ea02 | 1894 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
1895 | txdesc->desc1.flags = flags; |
1896 | /* | |
1897 | * Set tx buffer info after telling NIC to send | |
1898 | * For better tx_clean timing | |
1899 | */ | |
1900 | wmb(); | |
1901 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
1902 | txbi->skb = skb; | |
1903 | txbi->len = skb->len; | |
cd0ff491 GFT |
1904 | txbi->start_xmit = jiffies; |
1905 | if (!txbi->start_xmit) | |
8d27293f | 1906 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
1907 | |
1908 | return 0; | |
1909 | } | |
1910 | ||
b3821cc5 GFT |
1911 | static void |
1912 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
1913 | { | |
fa97b924 | 1914 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
1915 | struct jme_buffer_info *txbi = txring->bufinf; |
1916 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 1917 | |
cd0ff491 | 1918 | txbi += idx; |
b3821cc5 GFT |
1919 | |
1920 | smp_wmb(); | |
cd0ff491 | 1921 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 1922 | netif_stop_queue(jme->dev); |
52a46ba8 | 1923 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 1924 | smp_wmb(); |
cd0ff491 GFT |
1925 | if (atomic_read(&txring->nr_free) |
1926 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 1927 | netif_wake_queue(jme->dev); |
52a46ba8 | 1928 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
1929 | } |
1930 | } | |
1931 | ||
cd0ff491 | 1932 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
1933 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
1934 | txbi->skb)) { | |
1935 | netif_stop_queue(jme->dev); | |
52a46ba8 JP |
1936 | netif_info(jme, tx_queued, jme->dev, |
1937 | "TX Queue Stopped %d@%lu\n", idx, jiffies); | |
cdcdc9eb | 1938 | } |
b3821cc5 GFT |
1939 | } |
1940 | ||
3bf61c55 GFT |
1941 | /* |
1942 | * This function is already protected by netif_tx_lock() | |
1943 | */ | |
cd0ff491 | 1944 | |
c97b5740 | 1945 | static netdev_tx_t |
3bf61c55 | 1946 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 1947 | { |
cd0ff491 | 1948 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 1949 | int idx; |
d7699f87 | 1950 | |
cd0ff491 | 1951 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
1952 | ++(NET_STAT(jme).tx_dropped); |
1953 | return NETDEV_TX_OK; | |
1954 | } | |
1955 | ||
1956 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 1957 | |
cd0ff491 | 1958 | if (unlikely(idx < 0)) { |
b3821cc5 | 1959 | netif_stop_queue(netdev); |
52a46ba8 JP |
1960 | netif_err(jme, tx_err, jme->dev, |
1961 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 1962 | |
cd0ff491 | 1963 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
1964 | } |
1965 | ||
94c5ea02 | 1966 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 1967 | |
4330c2f2 GFT |
1968 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
1969 | TXCS_SELECT_QUEUE0 | | |
1970 | TXCS_QUEUE0S | | |
1971 | TXCS_ENABLE); | |
d7699f87 | 1972 | |
52a46ba8 JP |
1973 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
1974 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
1975 | jme_stop_queue_if_full(jme); |
1976 | ||
cd0ff491 | 1977 | return NETDEV_TX_OK; |
d7699f87 GFT |
1978 | } |
1979 | ||
3bf61c55 GFT |
1980 | static int |
1981 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 1982 | { |
cd0ff491 | 1983 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 1984 | struct sockaddr *addr = p; |
cd0ff491 | 1985 | u32 val; |
d7699f87 | 1986 | |
cd0ff491 | 1987 | if (netif_running(netdev)) |
d7699f87 GFT |
1988 | return -EBUSY; |
1989 | ||
cd0ff491 | 1990 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
1991 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
1992 | ||
186fc259 GFT |
1993 | val = (addr->sa_data[3] & 0xff) << 24 | |
1994 | (addr->sa_data[2] & 0xff) << 16 | | |
1995 | (addr->sa_data[1] & 0xff) << 8 | | |
1996 | (addr->sa_data[0] & 0xff); | |
4330c2f2 | 1997 | jwrite32(jme, JME_RXUMA_LO, val); |
186fc259 GFT |
1998 | val = (addr->sa_data[5] & 0xff) << 8 | |
1999 | (addr->sa_data[4] & 0xff); | |
4330c2f2 | 2000 | jwrite32(jme, JME_RXUMA_HI, val); |
cd0ff491 | 2001 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2002 | |
2003 | return 0; | |
2004 | } | |
2005 | ||
3bf61c55 GFT |
2006 | static void |
2007 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2008 | { |
3bf61c55 | 2009 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2010 | u32 mc_hash[2] = {}; |
d7699f87 | 2011 | |
cd0ff491 | 2012 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2013 | |
2014 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2015 | |
cd0ff491 | 2016 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2017 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2018 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2019 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2020 | } else if (netdev->flags & IFF_MULTICAST) { |
d401cb9a | 2021 | struct netdev_hw_addr *ha; |
3bf61c55 | 2022 | int bit_nr; |
d7699f87 | 2023 | |
8c198884 | 2024 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
d401cb9a JP |
2025 | netdev_for_each_mc_addr(ha, netdev) { |
2026 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
cd0ff491 GFT |
2027 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2028 | } | |
d7699f87 | 2029 | |
4330c2f2 GFT |
2030 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2031 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2032 | } |
2033 | ||
d7699f87 | 2034 | wmb(); |
8c198884 GFT |
2035 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2036 | ||
cd0ff491 | 2037 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2038 | } |
2039 | ||
3bf61c55 | 2040 | static int |
8c198884 | 2041 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2042 | { |
cd0ff491 | 2043 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2044 | |
cd0ff491 | 2045 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2046 | return 0; |
2047 | ||
cd0ff491 GFT |
2048 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2049 | ((new_mtu) < IPV6_MIN_MTU)) | |
2050 | return -EINVAL; | |
79ce639c | 2051 | |
cd0ff491 | 2052 | if (new_mtu > 4000) { |
79ce639c GFT |
2053 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2054 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2055 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2056 | } else { |
79ce639c GFT |
2057 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2058 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2059 | jme_restart_rx_engine(jme); | |
2060 | } | |
2061 | ||
cd0ff491 | 2062 | if (new_mtu > 1900) { |
b3821cc5 GFT |
2063 | netdev->features &= ~(NETIF_F_HW_CSUM | |
2064 | NETIF_F_TSO | | |
2065 | NETIF_F_TSO6); | |
cd0ff491 GFT |
2066 | } else { |
2067 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
b3821cc5 | 2068 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 | 2069 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
b3821cc5 | 2070 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2071 | } |
2072 | ||
cd0ff491 GFT |
2073 | netdev->mtu = new_mtu; |
2074 | jme_reset_link(jme); | |
79ce639c GFT |
2075 | |
2076 | return 0; | |
d7699f87 GFT |
2077 | } |
2078 | ||
8c198884 GFT |
2079 | static void |
2080 | jme_tx_timeout(struct net_device *netdev) | |
2081 | { | |
cd0ff491 | 2082 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2083 | |
cdcdc9eb GFT |
2084 | jme->phylink = 0; |
2085 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2086 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2087 | jme_set_settings(netdev, &jme->old_ecmd); |
2088 | ||
8c198884 | 2089 | /* |
cdcdc9eb | 2090 | * Force to Reset the link again |
8c198884 | 2091 | */ |
29bdd921 | 2092 | jme_reset_link(jme); |
8c198884 GFT |
2093 | } |
2094 | ||
f7f428e4 GFT |
2095 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2096 | { | |
2097 | atomic_dec(&jme->link_changing); | |
2098 | ||
2099 | jme_set_rx_pcc(jme, PCC_OFF); | |
2100 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2101 | JME_NAPI_DISABLE(jme); | |
2102 | } else { | |
2103 | tasklet_disable(&jme->rxclean_task); | |
2104 | tasklet_disable(&jme->rxempty_task); | |
2105 | } | |
2106 | } | |
2107 | ||
2108 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2109 | { | |
2110 | struct dynpcc_info *dpi = &(jme->dpi); | |
2111 | ||
2112 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2113 | JME_NAPI_ENABLE(jme); | |
2114 | } else { | |
2115 | tasklet_hi_enable(&jme->rxclean_task); | |
2116 | tasklet_hi_enable(&jme->rxempty_task); | |
2117 | } | |
2118 | dpi->cur = PCC_P1; | |
2119 | dpi->attempt = PCC_P1; | |
2120 | dpi->cnt = 0; | |
2121 | jme_set_rx_pcc(jme, PCC_P1); | |
2122 | ||
2123 | atomic_inc(&jme->link_changing); | |
2124 | } | |
2125 | ||
42b1055e GFT |
2126 | static void |
2127 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2128 | { | |
2129 | struct jme_adapter *jme = netdev_priv(netdev); | |
2130 | ||
f7f428e4 | 2131 | jme_pause_rx(jme); |
42b1055e | 2132 | jme->vlgrp = grp; |
f7f428e4 | 2133 | jme_resume_rx(jme); |
42b1055e GFT |
2134 | } |
2135 | ||
3bf61c55 GFT |
2136 | static void |
2137 | jme_get_drvinfo(struct net_device *netdev, | |
2138 | struct ethtool_drvinfo *info) | |
d7699f87 | 2139 | { |
cd0ff491 | 2140 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2141 | |
cd0ff491 GFT |
2142 | strcpy(info->driver, DRV_NAME); |
2143 | strcpy(info->version, DRV_VERSION); | |
2144 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2145 | } |
2146 | ||
8c198884 GFT |
2147 | static int |
2148 | jme_get_regs_len(struct net_device *netdev) | |
2149 | { | |
cd0ff491 | 2150 | return JME_REG_LEN; |
8c198884 GFT |
2151 | } |
2152 | ||
2153 | static void | |
cd0ff491 | 2154 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2155 | { |
2156 | int i; | |
2157 | ||
cd0ff491 | 2158 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2159 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2160 | } |
8c198884 | 2161 | |
186fc259 | 2162 | static void |
cd0ff491 | 2163 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2164 | { |
2165 | int i; | |
cd0ff491 | 2166 | u16 *p16 = (u16 *)p; |
186fc259 | 2167 | |
cd0ff491 | 2168 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2169 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2170 | } |
2171 | ||
2172 | static void | |
2173 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2174 | { | |
cd0ff491 GFT |
2175 | struct jme_adapter *jme = netdev_priv(netdev); |
2176 | u32 *p32 = (u32 *)p; | |
8c198884 | 2177 | |
186fc259 | 2178 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2179 | |
2180 | regs->version = 1; | |
2181 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2182 | ||
2183 | p32 += 0x100 >> 2; | |
2184 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2185 | ||
2186 | p32 += 0x100 >> 2; | |
2187 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2188 | ||
2189 | p32 += 0x100 >> 2; | |
2190 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2191 | ||
186fc259 GFT |
2192 | p32 += 0x100 >> 2; |
2193 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2194 | } |
2195 | ||
2196 | static int | |
2197 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2198 | { | |
2199 | struct jme_adapter *jme = netdev_priv(netdev); | |
2200 | ||
8c198884 GFT |
2201 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2202 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2203 | ||
cd0ff491 | 2204 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2205 | ecmd->use_adaptive_rx_coalesce = false; |
2206 | ecmd->rx_coalesce_usecs = 0; | |
2207 | ecmd->rx_max_coalesced_frames = 0; | |
2208 | return 0; | |
2209 | } | |
2210 | ||
2211 | ecmd->use_adaptive_rx_coalesce = true; | |
2212 | ||
cd0ff491 | 2213 | switch (jme->dpi.cur) { |
8c198884 GFT |
2214 | case PCC_P1: |
2215 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2216 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2217 | break; | |
2218 | case PCC_P2: | |
2219 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2220 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2221 | break; | |
2222 | case PCC_P3: | |
2223 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2224 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2225 | break; | |
2226 | default: | |
2227 | break; | |
2228 | } | |
2229 | ||
2230 | return 0; | |
2231 | } | |
2232 | ||
192570e0 GFT |
2233 | static int |
2234 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2235 | { | |
2236 | struct jme_adapter *jme = netdev_priv(netdev); | |
2237 | struct dynpcc_info *dpi = &(jme->dpi); | |
2238 | ||
cd0ff491 | 2239 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2240 | return -EBUSY; |
2241 | ||
c97b5740 GFT |
2242 | if (ecmd->use_adaptive_rx_coalesce && |
2243 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2244 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2245 | jme->jme_rx = netif_rx; |
2246 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2247 | dpi->cur = PCC_P1; |
2248 | dpi->attempt = PCC_P1; | |
2249 | dpi->cnt = 0; | |
2250 | jme_set_rx_pcc(jme, PCC_P1); | |
2251 | jme_interrupt_mode(jme); | |
c97b5740 GFT |
2252 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2253 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2254 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2255 | jme->jme_rx = netif_receive_skb; |
2256 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2257 | jme_interrupt_mode(jme); |
2258 | } | |
2259 | ||
2260 | return 0; | |
2261 | } | |
2262 | ||
8c198884 GFT |
2263 | static void |
2264 | jme_get_pauseparam(struct net_device *netdev, | |
2265 | struct ethtool_pauseparam *ecmd) | |
2266 | { | |
2267 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2268 | u32 val; |
8c198884 GFT |
2269 | |
2270 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2271 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2272 | ||
cd0ff491 GFT |
2273 | spin_lock_bh(&jme->phy_lock); |
2274 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2275 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2276 | |
2277 | ecmd->autoneg = | |
2278 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2279 | } |
2280 | ||
2281 | static int | |
2282 | jme_set_pauseparam(struct net_device *netdev, | |
2283 | struct ethtool_pauseparam *ecmd) | |
2284 | { | |
2285 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2286 | u32 val; |
8c198884 | 2287 | |
cd0ff491 | 2288 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2289 | (ecmd->tx_pause != 0)) { |
2290 | ||
cd0ff491 | 2291 | if (ecmd->tx_pause) |
8c198884 GFT |
2292 | jme->reg_txpfc |= TXPFC_PF_EN; |
2293 | else | |
2294 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2295 | ||
2296 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2297 | } | |
2298 | ||
cd0ff491 GFT |
2299 | spin_lock_bh(&jme->rxmcs_lock); |
2300 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2301 | (ecmd->rx_pause != 0)) { |
2302 | ||
cd0ff491 | 2303 | if (ecmd->rx_pause) |
8c198884 GFT |
2304 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2305 | else | |
2306 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2307 | ||
2308 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2309 | } | |
cd0ff491 | 2310 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2311 | |
cd0ff491 GFT |
2312 | spin_lock_bh(&jme->phy_lock); |
2313 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2314 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2315 | (ecmd->autoneg != 0)) { |
2316 | ||
cd0ff491 | 2317 | if (ecmd->autoneg) |
8c198884 GFT |
2318 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2319 | else | |
2320 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2321 | ||
b3821cc5 GFT |
2322 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2323 | MII_ADVERTISE, val); | |
8c198884 | 2324 | } |
cd0ff491 | 2325 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2326 | |
2327 | return 0; | |
2328 | } | |
2329 | ||
29bdd921 GFT |
2330 | static void |
2331 | jme_get_wol(struct net_device *netdev, | |
2332 | struct ethtool_wolinfo *wol) | |
2333 | { | |
2334 | struct jme_adapter *jme = netdev_priv(netdev); | |
2335 | ||
2336 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2337 | ||
2338 | wol->wolopts = 0; | |
2339 | ||
cd0ff491 | 2340 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2341 | wol->wolopts |= WAKE_PHY; |
2342 | ||
cd0ff491 | 2343 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2344 | wol->wolopts |= WAKE_MAGIC; |
2345 | ||
2346 | } | |
2347 | ||
2348 | static int | |
2349 | jme_set_wol(struct net_device *netdev, | |
2350 | struct ethtool_wolinfo *wol) | |
2351 | { | |
2352 | struct jme_adapter *jme = netdev_priv(netdev); | |
2353 | ||
cd0ff491 | 2354 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2355 | WAKE_UCAST | |
2356 | WAKE_MCAST | | |
2357 | WAKE_BCAST | | |
2358 | WAKE_ARP)) | |
2359 | return -EOPNOTSUPP; | |
2360 | ||
2361 | jme->reg_pmcs = 0; | |
2362 | ||
cd0ff491 | 2363 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2364 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2365 | ||
cd0ff491 | 2366 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2367 | jme->reg_pmcs |= PMCS_MFEN; |
2368 | ||
cd0ff491 | 2369 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2370 | |
29bdd921 GFT |
2371 | return 0; |
2372 | } | |
b3821cc5 | 2373 | |
3bf61c55 GFT |
2374 | static int |
2375 | jme_get_settings(struct net_device *netdev, | |
2376 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2377 | { |
2378 | struct jme_adapter *jme = netdev_priv(netdev); | |
2379 | int rc; | |
8c198884 | 2380 | |
cd0ff491 | 2381 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2382 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2383 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2384 | return rc; |
2385 | } | |
2386 | ||
3bf61c55 GFT |
2387 | static int |
2388 | jme_set_settings(struct net_device *netdev, | |
2389 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2390 | { |
2391 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2392 | int rc, fdc = 0; |
fcf45b4c | 2393 | |
cd0ff491 | 2394 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2395 | return -EINVAL; |
2396 | ||
cd0ff491 | 2397 | if (jme->mii_if.force_media && |
79ce639c GFT |
2398 | ecmd->autoneg != AUTONEG_ENABLE && |
2399 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2400 | fdc = 1; | |
2401 | ||
cd0ff491 | 2402 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2403 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2404 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2405 | |
cd0ff491 | 2406 | if (!rc && fdc) |
79ce639c GFT |
2407 | jme_reset_link(jme); |
2408 | ||
cd0ff491 GFT |
2409 | if (!rc) { |
2410 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2411 | jme->old_ecmd = *ecmd; |
2412 | } | |
2413 | ||
d7699f87 GFT |
2414 | return rc; |
2415 | } | |
2416 | ||
cd0ff491 | 2417 | static u32 |
3bf61c55 GFT |
2418 | jme_get_link(struct net_device *netdev) |
2419 | { | |
d7699f87 GFT |
2420 | struct jme_adapter *jme = netdev_priv(netdev); |
2421 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2422 | } | |
2423 | ||
8c198884 | 2424 | static u32 |
cd0ff491 GFT |
2425 | jme_get_msglevel(struct net_device *netdev) |
2426 | { | |
2427 | struct jme_adapter *jme = netdev_priv(netdev); | |
2428 | return jme->msg_enable; | |
2429 | } | |
2430 | ||
2431 | static void | |
2432 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2433 | { |
cd0ff491 GFT |
2434 | struct jme_adapter *jme = netdev_priv(netdev); |
2435 | jme->msg_enable = value; | |
2436 | } | |
8c198884 | 2437 | |
cd0ff491 GFT |
2438 | static u32 |
2439 | jme_get_rx_csum(struct net_device *netdev) | |
2440 | { | |
2441 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2442 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2443 | } | |
2444 | ||
2445 | static int | |
2446 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2447 | { | |
cd0ff491 | 2448 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2449 | |
cd0ff491 GFT |
2450 | spin_lock_bh(&jme->rxmcs_lock); |
2451 | if (on) | |
8c198884 GFT |
2452 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2453 | else | |
2454 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2455 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2456 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2457 | |
2458 | return 0; | |
2459 | } | |
2460 | ||
2461 | static int | |
2462 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2463 | { | |
cd0ff491 | 2464 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2465 | |
cd0ff491 GFT |
2466 | if (on) { |
2467 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2468 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2469 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 GFT |
2470 | } else { |
2471 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
8c198884 | 2472 | netdev->features &= ~NETIF_F_HW_CSUM; |
b3821cc5 | 2473 | } |
8c198884 GFT |
2474 | |
2475 | return 0; | |
2476 | } | |
2477 | ||
b3821cc5 GFT |
2478 | static int |
2479 | jme_set_tso(struct net_device *netdev, u32 on) | |
2480 | { | |
cd0ff491 | 2481 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2482 | |
cd0ff491 GFT |
2483 | if (on) { |
2484 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2485 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2486 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2487 | } else { |
2488 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
2489 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
b3821cc5 GFT |
2490 | } |
2491 | ||
cd0ff491 | 2492 | return 0; |
b3821cc5 GFT |
2493 | } |
2494 | ||
8c198884 GFT |
2495 | static int |
2496 | jme_nway_reset(struct net_device *netdev) | |
2497 | { | |
cd0ff491 | 2498 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2499 | jme_restart_an(jme); |
2500 | return 0; | |
2501 | } | |
2502 | ||
cd0ff491 | 2503 | static u8 |
186fc259 GFT |
2504 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2505 | { | |
cd0ff491 | 2506 | u32 val; |
186fc259 GFT |
2507 | int to; |
2508 | ||
2509 | val = jread32(jme, JME_SMBCSR); | |
2510 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2511 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2512 | msleep(1); |
2513 | val = jread32(jme, JME_SMBCSR); | |
2514 | } | |
cd0ff491 | 2515 | if (!to) { |
52a46ba8 | 2516 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2517 | return 0xFF; |
2518 | } | |
2519 | ||
2520 | jwrite32(jme, JME_SMBINTF, | |
2521 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2522 | SMBINTF_HWRWN_READ | | |
2523 | SMBINTF_HWCMD); | |
2524 | ||
2525 | val = jread32(jme, JME_SMBINTF); | |
2526 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2527 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2528 | msleep(1); |
2529 | val = jread32(jme, JME_SMBINTF); | |
2530 | } | |
cd0ff491 | 2531 | if (!to) { |
52a46ba8 | 2532 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2533 | return 0xFF; |
2534 | } | |
2535 | ||
2536 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2537 | } | |
2538 | ||
2539 | static void | |
cd0ff491 | 2540 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2541 | { |
cd0ff491 | 2542 | u32 val; |
186fc259 GFT |
2543 | int to; |
2544 | ||
2545 | val = jread32(jme, JME_SMBCSR); | |
2546 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2547 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2548 | msleep(1); |
2549 | val = jread32(jme, JME_SMBCSR); | |
2550 | } | |
cd0ff491 | 2551 | if (!to) { |
52a46ba8 | 2552 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2553 | return; |
2554 | } | |
2555 | ||
2556 | jwrite32(jme, JME_SMBINTF, | |
2557 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2558 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2559 | SMBINTF_HWRWN_WRITE | | |
2560 | SMBINTF_HWCMD); | |
2561 | ||
2562 | val = jread32(jme, JME_SMBINTF); | |
2563 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2564 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2565 | msleep(1); |
2566 | val = jread32(jme, JME_SMBINTF); | |
2567 | } | |
cd0ff491 | 2568 | if (!to) { |
52a46ba8 | 2569 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2570 | return; |
2571 | } | |
2572 | ||
2573 | mdelay(2); | |
2574 | } | |
2575 | ||
2576 | static int | |
2577 | jme_get_eeprom_len(struct net_device *netdev) | |
2578 | { | |
cd0ff491 GFT |
2579 | struct jme_adapter *jme = netdev_priv(netdev); |
2580 | u32 val; | |
186fc259 | 2581 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2582 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2583 | } |
2584 | ||
2585 | static int | |
2586 | jme_get_eeprom(struct net_device *netdev, | |
2587 | struct ethtool_eeprom *eeprom, u8 *data) | |
2588 | { | |
cd0ff491 | 2589 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2590 | int i, offset = eeprom->offset, len = eeprom->len; |
2591 | ||
2592 | /* | |
8d27293f | 2593 | * ethtool will check the boundary for us |
186fc259 GFT |
2594 | */ |
2595 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2596 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2597 | data[i] = jme_smb_read(jme, i + offset); |
2598 | ||
2599 | return 0; | |
2600 | } | |
2601 | ||
2602 | static int | |
2603 | jme_set_eeprom(struct net_device *netdev, | |
2604 | struct ethtool_eeprom *eeprom, u8 *data) | |
2605 | { | |
cd0ff491 | 2606 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2607 | int i, offset = eeprom->offset, len = eeprom->len; |
2608 | ||
2609 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2610 | return -EINVAL; | |
2611 | ||
2612 | /* | |
8d27293f | 2613 | * ethtool will check the boundary for us |
186fc259 | 2614 | */ |
cd0ff491 | 2615 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2616 | jme_smb_write(jme, i + offset, data[i]); |
2617 | ||
2618 | return 0; | |
2619 | } | |
2620 | ||
d7699f87 | 2621 | static const struct ethtool_ops jme_ethtool_ops = { |
cd0ff491 | 2622 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2623 | .get_regs_len = jme_get_regs_len, |
2624 | .get_regs = jme_get_regs, | |
2625 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2626 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2627 | .get_pauseparam = jme_get_pauseparam, |
2628 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2629 | .get_wol = jme_get_wol, |
2630 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2631 | .get_settings = jme_get_settings, |
2632 | .set_settings = jme_set_settings, | |
2633 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2634 | .get_msglevel = jme_get_msglevel, |
2635 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2636 | .get_rx_csum = jme_get_rx_csum, |
2637 | .set_rx_csum = jme_set_rx_csum, | |
2638 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2639 | .set_tso = jme_set_tso, |
2640 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2641 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2642 | .get_eeprom_len = jme_get_eeprom_len, |
2643 | .get_eeprom = jme_get_eeprom, | |
2644 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2645 | }; |
2646 | ||
3bf61c55 GFT |
2647 | static int |
2648 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2649 | { |
94c5ea02 | 2650 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2651 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
2652 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
3bf61c55 GFT |
2653 | return 1; |
2654 | ||
94c5ea02 | 2655 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2656 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))) |
2657 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
8c198884 GFT |
2658 | return 1; |
2659 | ||
fa97b924 GFT |
2660 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
2661 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3bf61c55 GFT |
2662 | return 0; |
2663 | ||
2664 | return -1; | |
2665 | } | |
2666 | ||
cd0ff491 | 2667 | static inline void |
cdcdc9eb GFT |
2668 | jme_phy_init(struct jme_adapter *jme) |
2669 | { | |
cd0ff491 | 2670 | u16 reg26; |
cdcdc9eb GFT |
2671 | |
2672 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2673 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2674 | } | |
2675 | ||
cd0ff491 | 2676 | static inline void |
cdcdc9eb | 2677 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2678 | { |
cd0ff491 | 2679 | u32 chipmode; |
cdcdc9eb GFT |
2680 | |
2681 | chipmode = jread32(jme, JME_CHIPMODE); | |
2682 | ||
2683 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
e882564f | 2684 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
42b1055e GFT |
2685 | } |
2686 | ||
94c5ea02 GFT |
2687 | static const struct net_device_ops jme_netdev_ops = { |
2688 | .ndo_open = jme_open, | |
2689 | .ndo_stop = jme_close, | |
2690 | .ndo_validate_addr = eth_validate_addr, | |
2691 | .ndo_start_xmit = jme_start_xmit, | |
2692 | .ndo_set_mac_address = jme_set_macaddr, | |
2693 | .ndo_set_multicast_list = jme_set_multi, | |
2694 | .ndo_change_mtu = jme_change_mtu, | |
2695 | .ndo_tx_timeout = jme_tx_timeout, | |
2696 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
2697 | }; | |
2698 | ||
3bf61c55 GFT |
2699 | static int __devinit |
2700 | jme_init_one(struct pci_dev *pdev, | |
2701 | const struct pci_device_id *ent) | |
2702 | { | |
cdcdc9eb | 2703 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2704 | struct net_device *netdev; |
2705 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2706 | u16 bmcr, bmsr; |
2707 | u32 apmc; | |
d7699f87 GFT |
2708 | |
2709 | /* | |
2710 | * set up PCI device basics | |
2711 | */ | |
4330c2f2 | 2712 | rc = pci_enable_device(pdev); |
cd0ff491 | 2713 | if (rc) { |
52a46ba8 | 2714 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
2715 | goto err_out; |
2716 | } | |
d7699f87 | 2717 | |
3bf61c55 | 2718 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 2719 | if (using_dac < 0) { |
52a46ba8 | 2720 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
2721 | rc = -EIO; |
2722 | goto err_out_disable_pdev; | |
2723 | } | |
2724 | ||
cd0ff491 | 2725 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
52a46ba8 | 2726 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
2727 | rc = -ENOMEM; |
2728 | goto err_out_disable_pdev; | |
2729 | } | |
d7699f87 | 2730 | |
4330c2f2 | 2731 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 2732 | if (rc) { |
52a46ba8 | 2733 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
2734 | goto err_out_disable_pdev; |
2735 | } | |
d7699f87 GFT |
2736 | |
2737 | pci_set_master(pdev); | |
2738 | ||
2739 | /* | |
2740 | * alloc and init net device | |
2741 | */ | |
3bf61c55 | 2742 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 2743 | if (!netdev) { |
52a46ba8 | 2744 | pr_err("Cannot allocate netdev structure\n"); |
4330c2f2 GFT |
2745 | rc = -ENOMEM; |
2746 | goto err_out_release_regions; | |
d7699f87 | 2747 | } |
94c5ea02 | 2748 | netdev->netdev_ops = &jme_netdev_ops; |
d7699f87 | 2749 | netdev->ethtool_ops = &jme_ethtool_ops; |
8c198884 | 2750 | netdev->watchdog_timeo = TX_TIMEOUT; |
42b1055e | 2751 | netdev->features = NETIF_F_HW_CSUM | |
b3821cc5 GFT |
2752 | NETIF_F_SG | |
2753 | NETIF_F_TSO | | |
2754 | NETIF_F_TSO6 | | |
42b1055e GFT |
2755 | NETIF_F_HW_VLAN_TX | |
2756 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 2757 | if (using_dac) |
8c198884 | 2758 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
2759 | |
2760 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2761 | pci_set_drvdata(pdev, netdev); | |
2762 | ||
2763 | /* | |
2764 | * init adapter info | |
2765 | */ | |
2766 | jme = netdev_priv(netdev); | |
2767 | jme->pdev = pdev; | |
2768 | jme->dev = netdev; | |
cdcdc9eb GFT |
2769 | jme->jme_rx = netif_rx; |
2770 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 2771 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 2772 | jme->phylink = 0; |
b3821cc5 GFT |
2773 | jme->tx_ring_size = 1 << 10; |
2774 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
2775 | jme->tx_wake_threshold = 1 << 9; | |
2776 | jme->rx_ring_size = 1 << 9; | |
2777 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 2778 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
2779 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
2780 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 2781 | if (!(jme->regs)) { |
52a46ba8 | 2782 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
2783 | rc = -ENOMEM; |
2784 | goto err_out_free_netdev; | |
2785 | } | |
4330c2f2 | 2786 | |
cd0ff491 GFT |
2787 | if (no_pseudohp) { |
2788 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2789 | jwrite32(jme, JME_APMC, apmc); | |
2790 | } else if (force_pseudohp) { | |
2791 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2792 | jwrite32(jme, JME_APMC, apmc); | |
2793 | } | |
2794 | ||
cdcdc9eb | 2795 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 2796 | |
d7699f87 | 2797 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 2798 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 2799 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 2800 | |
fcf45b4c GFT |
2801 | atomic_set(&jme->link_changing, 1); |
2802 | atomic_set(&jme->rx_cleaning, 1); | |
2803 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 2804 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 2805 | |
79ce639c | 2806 | tasklet_init(&jme->pcc_task, |
c97b5740 | 2807 | jme_pcc_tasklet, |
79ce639c | 2808 | (unsigned long) jme); |
4330c2f2 | 2809 | tasklet_init(&jme->linkch_task, |
c97b5740 | 2810 | jme_link_change_tasklet, |
4330c2f2 GFT |
2811 | (unsigned long) jme); |
2812 | tasklet_init(&jme->txclean_task, | |
c97b5740 | 2813 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
2814 | (unsigned long) jme); |
2815 | tasklet_init(&jme->rxclean_task, | |
c97b5740 | 2816 | jme_rx_clean_tasklet, |
4330c2f2 | 2817 | (unsigned long) jme); |
fcf45b4c | 2818 | tasklet_init(&jme->rxempty_task, |
c97b5740 | 2819 | jme_rx_empty_tasklet, |
fcf45b4c | 2820 | (unsigned long) jme); |
fa97b924 | 2821 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
2822 | tasklet_disable_nosync(&jme->txclean_task); |
2823 | tasklet_disable_nosync(&jme->rxclean_task); | |
2824 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
2825 | jme->dpi.cur = PCC_P1; |
2826 | ||
cd0ff491 | 2827 | jme->reg_ghc = 0; |
79ce639c | 2828 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
2829 | jme->reg_rxmcs = RXMCS_DEFAULT; |
2830 | jme->reg_txpfc = 0; | |
47220951 | 2831 | jme->reg_pmcs = PMCS_MFEN; |
cd0ff491 GFT |
2832 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
2833 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 2834 | |
fcf45b4c GFT |
2835 | /* |
2836 | * Get Max Read Req Size from PCI Config Space | |
2837 | */ | |
cd0ff491 GFT |
2838 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
2839 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
2840 | switch (jme->mrrs) { | |
2841 | case MRRS_128B: | |
2842 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
2843 | break; | |
2844 | case MRRS_256B: | |
2845 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
2846 | break; | |
2847 | default: | |
2848 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
2849 | break; | |
06527f9b | 2850 | } |
fcf45b4c | 2851 | |
d7699f87 | 2852 | /* |
cdcdc9eb | 2853 | * Must check before reset_mac_processor |
d7699f87 | 2854 | */ |
cdcdc9eb GFT |
2855 | jme_check_hw_ver(jme); |
2856 | jme->mii_if.dev = netdev; | |
cd0ff491 | 2857 | if (jme->fpgaver) { |
cdcdc9eb | 2858 | jme->mii_if.phy_id = 0; |
cd0ff491 | 2859 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
2860 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
2861 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 2862 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
2863 | jme->mii_if.phy_id = i; |
2864 | break; | |
2865 | } | |
2866 | } | |
2867 | ||
cd0ff491 | 2868 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 2869 | rc = -EIO; |
52a46ba8 JP |
2870 | pr_err("Can not find phy_id\n"); |
2871 | goto err_out_unmap; | |
cdcdc9eb GFT |
2872 | } |
2873 | ||
2874 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 2875 | } else { |
cdcdc9eb GFT |
2876 | jme->mii_if.phy_id = 1; |
2877 | } | |
cd0ff491 | 2878 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
2879 | jme->mii_if.supports_gmii = true; |
2880 | else | |
2881 | jme->mii_if.supports_gmii = false; | |
cdcdc9eb GFT |
2882 | jme->mii_if.mdio_read = jme_mdio_read; |
2883 | jme->mii_if.mdio_write = jme_mdio_write; | |
2884 | ||
d7699f87 | 2885 | jme_clear_pm(jme); |
e882564f | 2886 | jme_set_phyfifoa(jme); |
cd0ff491 GFT |
2887 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); |
2888 | if (!jme->fpgaver) | |
cdcdc9eb | 2889 | jme_phy_init(jme); |
42b1055e | 2890 | jme_phy_off(jme); |
cdcdc9eb GFT |
2891 | |
2892 | /* | |
2893 | * Reset MAC processor and reload EEPROM for MAC Address | |
2894 | */ | |
d7699f87 | 2895 | jme_reset_mac_processor(jme); |
4330c2f2 | 2896 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 2897 | if (rc) { |
52a46ba8 | 2898 | pr_err("Reload eeprom for reading MAC Address error\n"); |
fa97b924 | 2899 | goto err_out_unmap; |
4330c2f2 | 2900 | } |
d7699f87 GFT |
2901 | jme_load_macaddr(netdev); |
2902 | ||
d7699f87 GFT |
2903 | /* |
2904 | * Tell stack that we are not ready to work until open() | |
2905 | */ | |
2906 | netif_carrier_off(netdev); | |
2907 | netif_stop_queue(netdev); | |
2908 | ||
2909 | /* | |
2910 | * Register netdev | |
2911 | */ | |
4330c2f2 | 2912 | rc = register_netdev(netdev); |
cd0ff491 | 2913 | if (rc) { |
52a46ba8 | 2914 | pr_err("Cannot register net device\n"); |
fa97b924 | 2915 | goto err_out_unmap; |
4330c2f2 | 2916 | } |
d7699f87 | 2917 | |
c97b5740 GFT |
2918 | netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n", |
2919 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? | |
2920 | "JMC250 Gigabit Ethernet" : | |
2921 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
2922 | "JMC260 Fast Ethernet" : "Unknown", | |
2923 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
2924 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
2925 | jme->rev, netdev->dev_addr); | |
d7699f87 GFT |
2926 | |
2927 | return 0; | |
2928 | ||
2929 | err_out_unmap: | |
2930 | iounmap(jme->regs); | |
2931 | err_out_free_netdev: | |
2932 | pci_set_drvdata(pdev, NULL); | |
2933 | free_netdev(netdev); | |
4330c2f2 GFT |
2934 | err_out_release_regions: |
2935 | pci_release_regions(pdev); | |
d7699f87 | 2936 | err_out_disable_pdev: |
cd0ff491 | 2937 | pci_disable_device(pdev); |
d7699f87 | 2938 | err_out: |
4330c2f2 | 2939 | return rc; |
d7699f87 GFT |
2940 | } |
2941 | ||
3bf61c55 GFT |
2942 | static void __devexit |
2943 | jme_remove_one(struct pci_dev *pdev) | |
2944 | { | |
d7699f87 GFT |
2945 | struct net_device *netdev = pci_get_drvdata(pdev); |
2946 | struct jme_adapter *jme = netdev_priv(netdev); | |
2947 | ||
2948 | unregister_netdev(netdev); | |
2949 | iounmap(jme->regs); | |
2950 | pci_set_drvdata(pdev, NULL); | |
2951 | free_netdev(netdev); | |
2952 | pci_release_regions(pdev); | |
2953 | pci_disable_device(pdev); | |
2954 | ||
2955 | } | |
2956 | ||
9b9d55de | 2957 | #ifdef CONFIG_PM |
29bdd921 GFT |
2958 | static int |
2959 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
2960 | { | |
2961 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2962 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
2963 | |
2964 | atomic_dec(&jme->link_changing); | |
2965 | ||
2966 | netif_device_detach(netdev); | |
2967 | netif_stop_queue(netdev); | |
2968 | jme_stop_irq(jme); | |
29bdd921 | 2969 | |
cd0ff491 GFT |
2970 | tasklet_disable(&jme->txclean_task); |
2971 | tasklet_disable(&jme->rxclean_task); | |
2972 | tasklet_disable(&jme->rxempty_task); | |
2973 | ||
cd0ff491 GFT |
2974 | if (netif_carrier_ok(netdev)) { |
2975 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
2976 | jme_polling_mode(jme); |
2977 | ||
29bdd921 | 2978 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
2979 | jme_reset_ghc_speed(jme); |
2980 | jme_disable_rx_engine(jme); | |
2981 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
2982 | jme_reset_mac_processor(jme); |
2983 | jme_free_rx_resources(jme); | |
2984 | jme_free_tx_resources(jme); | |
2985 | netif_carrier_off(netdev); | |
2986 | jme->phylink = 0; | |
2987 | } | |
2988 | ||
cd0ff491 GFT |
2989 | tasklet_enable(&jme->txclean_task); |
2990 | tasklet_hi_enable(&jme->rxclean_task); | |
2991 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
2992 | |
2993 | pci_save_state(pdev); | |
cd0ff491 | 2994 | if (jme->reg_pmcs) { |
42b1055e | 2995 | jme_set_100m_half(jme); |
47220951 | 2996 | |
cd0ff491 | 2997 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
47220951 GFT |
2998 | jme_wait_link(jme); |
2999 | ||
29bdd921 | 3000 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
cd0ff491 | 3001 | |
42b1055e | 3002 | pci_enable_wake(pdev, PCI_D3cold, true); |
cd0ff491 | 3003 | } else { |
42b1055e | 3004 | jme_phy_off(jme); |
29bdd921 | 3005 | } |
cd0ff491 | 3006 | pci_set_power_state(pdev, PCI_D3cold); |
29bdd921 GFT |
3007 | |
3008 | return 0; | |
3009 | } | |
3010 | ||
3011 | static int | |
3012 | jme_resume(struct pci_dev *pdev) | |
3013 | { | |
3014 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3015 | struct jme_adapter *jme = netdev_priv(netdev); | |
3016 | ||
3017 | jme_clear_pm(jme); | |
3018 | pci_restore_state(pdev); | |
3019 | ||
48db98f7 GFT |
3020 | if (test_bit(JME_FLAG_SSET, &jme->flags)) { |
3021 | jme_phy_on(jme); | |
29bdd921 | 3022 | jme_set_settings(netdev, &jme->old_ecmd); |
48db98f7 | 3023 | } else { |
29bdd921 | 3024 | jme_reset_phy_processor(jme); |
48db98f7 | 3025 | } |
29bdd921 | 3026 | |
29bdd921 GFT |
3027 | jme_start_irq(jme); |
3028 | netif_device_attach(netdev); | |
3029 | ||
3030 | atomic_inc(&jme->link_changing); | |
3031 | ||
3032 | jme_reset_link(jme); | |
3033 | ||
3034 | return 0; | |
3035 | } | |
9b9d55de | 3036 | #endif |
29bdd921 | 3037 | |
c97b5740 | 3038 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { |
cd0ff491 GFT |
3039 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3040 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3041 | { } |
3042 | }; | |
3043 | ||
3044 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3045 | .name = DRV_NAME, |
3046 | .id_table = jme_pci_tbl, | |
3047 | .probe = jme_init_one, | |
3048 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3049 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3050 | .suspend = jme_suspend, |
3051 | .resume = jme_resume, | |
d7699f87 | 3052 | #endif /* CONFIG_PM */ |
d7699f87 GFT |
3053 | }; |
3054 | ||
3bf61c55 GFT |
3055 | static int __init |
3056 | jme_init_module(void) | |
d7699f87 | 3057 | { |
52a46ba8 | 3058 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3059 | return pci_register_driver(&jme_driver); |
3060 | } | |
3061 | ||
3bf61c55 GFT |
3062 | static void __exit |
3063 | jme_cleanup_module(void) | |
d7699f87 GFT |
3064 | { |
3065 | pci_unregister_driver(&jme_driver); | |
3066 | } | |
3067 | ||
3068 | module_init(jme_init_module); | |
3069 | module_exit(jme_cleanup_module); | |
3070 | ||
3bf61c55 | 3071 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3072 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3073 | MODULE_LICENSE("GPL"); | |
3074 | MODULE_VERSION(DRV_VERSION); | |
3075 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3076 |