From 9c9e792795f96d201d85188607261f9f8bbf3219 Mon Sep 17 00:00:00 2001 From: Adam Jackson Date: Mon, 5 Apr 2010 17:57:59 -0400 Subject: [PATCH] drm/i915: Set sync polarity correctly on DisplayPort Probably only matters for format-converting dongles, but might as well get it right all the time. Signed-off-by: Adam Jackson Signed-off-by: Eric Anholt --- drivers/gpu/drm/i915/intel_dp.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index fee54169493..79625bd9361 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -638,9 +638,12 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct intel_crtc *intel_crtc = to_intel_crtc(crtc); dp_priv->DP = (DP_VOLTAGE_0_4 | - DP_PRE_EMPHASIS_0 | - DP_SYNC_VS_HIGH | - DP_SYNC_HS_HIGH); + DP_PRE_EMPHASIS_0); + + if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) + dp_priv->DP |= DP_SYNC_HS_HIGH; + if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) + dp_priv->DP |= DP_SYNC_VS_HIGH; if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) dp_priv->DP |= DP_LINK_TRAIN_OFF_CPT; -- 2.39.3