From 5459148b098e3bbdc24376f1865045189a80a0af Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 16:34:34 +0900 Subject: [PATCH] ARM: SAMSUNG: Add s3c_gpio_cfgall_range() function Add a function to configure a range of GPIOs function and pull in one go, mainly for the SDHCI and framebuffer helpers which tend to do this. Signed-off-by: Ben Dooks [kgene.kim@samsung.com: Fix small comments] Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/gpio-config.c | 16 ++++++++++++++++ arch/arm/plat-samsung/include/plat/gpio-cfg.h | 19 +++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index fa180dcc41c..8a372110a85 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c @@ -56,6 +56,22 @@ int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, } EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range); +int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, + unsigned int cfg, s3c_gpio_pull_t pull) +{ + int ret; + + for (; nr > 0; nr--, start++) { + s3c_gpio_setpull(start, pull); + ret = s3c_gpio_cfgpin(start, cfg); + if (ret != 0) + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range); + unsigned s3c_gpio_getcfg(unsigned int pin) { struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 6e117dc2709..c84defd2950 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -153,6 +153,25 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); */ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); +/* configure `all` aspects of an gpio */ + +/** + * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull. + * @start: The gpio number to start at. + * @nr: The number of gpio to configure from @start. + * @cfg: The configuration to use + * @pull: The pull setting to use. + * + * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting + * @gpio and running for @size. + * + * @sa s3c_gpio_cfgpin + * @sa s3c_gpio_setpull + * @sa s3c_gpio_cfgpin_range + */ +extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, + unsigned int cfg, s3c_gpio_pull_t pull); + /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, -- 2.39.3