]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
V4L/DVB: tda10048: clear the uncorrected packet registers when saturated
authorGuillaume Audirac <guillaume.audirac@webag.fr>
Thu, 6 May 2010 12:07:04 +0000 (09:07 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 2 Aug 2010 18:35:39 +0000 (15:35 -0300)
Use the register CLUNC to reset the CPTU registers (LSB & MSB) when they
saturate at 0xFFFF. Fixes as well a few register typos.

Signed-off-by: Guillaume Audirac <guillaume.audirac@webag.fr>
Signed-off-by: Steven Toth <stoth@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/dvb/frontends/tda10048.c

index 9a0ba30ebb79ca2b680891e7175e9acb20320990..93f6a75c238eec25fbe2c8cfb905f08d113d5e2a 100644 (file)
@@ -50,8 +50,8 @@
 #define TDA10048_CONF_C4_1         0x1E
 #define TDA10048_CONF_C4_2         0x1F
 #define TDA10048_CODE_IN_RAM       0x20
-#define TDA10048_CHANNEL_INFO_1_R  0x22
-#define TDA10048_CHANNEL_INFO_2_R  0x23
+#define TDA10048_CHANNEL_INFO1_R   0x22
+#define TDA10048_CHANNEL_INFO2_R   0x23
 #define TDA10048_CHANNEL_INFO1     0x24
 #define TDA10048_CHANNEL_INFO2     0x25
 #define TDA10048_TIME_ERROR_R      0x26
@@ -64,8 +64,8 @@
 #define TDA10048_IT_STAT           0x32
 #define TDA10048_DSP_AD_LSB        0x3C
 #define TDA10048_DSP_AD_MSB        0x3D
-#define TDA10048_DSP_REF_LSB       0x3E
-#define TDA10048_DSP_REF_MSB       0x3F
+#define TDA10048_DSP_REG_LSB       0x3E
+#define TDA10048_DSP_REG_MSB       0x3F
 #define TDA10048_CONF_TRISTATE1    0x44
 #define TDA10048_CONF_TRISTATE2    0x45
 #define TDA10048_CONF_POLARITY     0x46
@@ -1033,6 +1033,9 @@ static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 
        *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
                tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
+       /* clear the uncorrected TS packets counter when saturated */
+       if (*ucblocks == 0xFFFF)
+               tda10048_writereg(state, TDA10048_UNCOR_CTRL, 0x80);
 
        return 0;
 }