Add the new locking calls to ensure that these are always exclusively
accessing the GPIO registers.
Fixes a possible race between two threads modifying the same GPIO bank,
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
void __iomem *base = ourchip->base;
void __iomem *regcon = base;
unsigned long con;
void __iomem *base = ourchip->base;
void __iomem *regcon = base;
unsigned long con;
switch (offset) {
case 6:
switch (offset) {
case 6:
+ s3c_gpio_lock(ourchip, flags);
+
con = __raw_readl(regcon);
con &= ~(0xf << con_4bit_shift(offset));
__raw_writel(con, regcon);
con = __raw_readl(regcon);
con &= ~(0xf << con_4bit_shift(offset));
__raw_writel(con, regcon);
+ s3c_gpio_unlock(ourchip, flags);
+
void __iomem *regcon = base;
unsigned long con;
unsigned long dat;
void __iomem *regcon = base;
unsigned long con;
unsigned long dat;
unsigned con_offset = offset;
switch (con_offset) {
unsigned con_offset = offset;
switch (con_offset) {
+ s3c_gpio_lock(ourchip, flags);
+
con = __raw_readl(regcon);
con &= ~(0xf << con_4bit_shift(con_offset));
con |= 0x1 << con_4bit_shift(con_offset);
con = __raw_readl(regcon);
con &= ~(0xf << con_4bit_shift(con_offset));
con |= 0x1 << con_4bit_shift(con_offset);
__raw_writel(con, regcon);
__raw_writel(dat, base + GPIODAT_OFF);
__raw_writel(con, regcon);
__raw_writel(dat, base + GPIODAT_OFF);
+ s3c_gpio_unlock(ourchip, flags);
+
{
void __iomem *reg = chip->base;
unsigned int shift;
{
void __iomem *reg = chip->base;
unsigned int shift;
+ s3c_gpio_lock(chip, flags);
+
con = __raw_readl(reg);
con &= ~(0xf << shift);
con |= cfg;
__raw_writel(con, reg);
con = __raw_readl(reg);
con &= ~(0xf << shift);
con |= cfg;
__raw_writel(con, reg);
+ s3c_gpio_unlock(chip, flags);
+