X-Git-Url: https://bbs.cooldavid.org/git/?a=blobdiff_plain;f=jme.h;h=c7a4b19a6c8d58c1421b0b86a00dec88f34b1d58;hb=0ede469cae20a61d6fdf59e7b1b7e81a26354016;hp=3d33ac9ae496a90520947466d4807ef59dc65050;hpb=7ee473a3a27e1a7b6bbe555a3516801111704787;p=jme.git diff --git a/jme.h b/jme.h index 3d33ac9..c7a4b19 100644 --- a/jme.h +++ b/jme.h @@ -22,10 +22,10 @@ */ #ifndef __JME_H_INCLUDED__ -#define __JME_H_INCLUDEE__ +#define __JME_H_INCLUDED__ #define DRV_NAME "jme" -#define DRV_VERSION "1.0.3" +#define DRV_VERSION "1.0.5" #define PFX DRV_NAME ": " #define PCI_DEVICE_ID_JMICRON_JMC250 0x0250 @@ -247,7 +247,7 @@ enum jme_txdesc_flags_bits { }; #define TXDESC_MSS_SHIFT 2 -enum jme_rxdescwb_flags_bits { +enum jme_txwbdesc_flags_bits { TXWBFLAG_OWN = 0x80, TXWBFLAG_INT = 0x40, TXWBFLAG_TMOUT = 0x20, @@ -372,7 +372,6 @@ struct jme_buffer_info { /* * The structure holding buffer information and ring descriptors all together. */ -#define MAX_RING_DESC_NR 1024 struct jme_ring { void *alloc; /* pointer to allocated memory */ void *desc; /* pointer to ring memory */ @@ -380,20 +379,48 @@ struct jme_ring { dma_addr_t dma; /* phys address for ring dma */ /* Buffer information corresponding to each descriptor */ - struct jme_buffer_info bufinf[MAX_RING_DESC_NR]; + struct jme_buffer_info *bufinf; int next_to_use; atomic_t next_to_clean; atomic_t nr_free; }; +#include +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) +#define false 0 +#define true 0 +#define netdev_alloc_skb(dev, len) dev_alloc_skb(len) +#define PCI_VENDOR_ID_JMICRON 0x197B +#endif + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,19) +#define PCI_VDEVICE(vendor, device) \ + PCI_VENDOR_ID_##vendor, (device), \ + PCI_ANY_ID, PCI_ANY_ID, 0, 0 +#endif + #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) #define NET_STAT(priv) priv->stats #define NETDEV_GET_STATS(netdev, fun_ptr) \ netdev->get_stats = fun_ptr #define DECLARE_NET_DEVICE_STATS struct net_device_stats stats; +static inline struct iphdr *ip_hdr(const struct sk_buff *skb) +{ + return skb->nh.iph; +} + +static inline struct ipv6hdr *ipv6_hdr(const struct sk_buff *skb) +{ + return skb->nh.ipv6h; +} + +static inline struct tcphdr *tcp_hdr(const struct sk_buff *skb) +{ + return skb->h.th; +} #else -#define NET_STAT(priv) priv->dev->stats +#define NET_STAT(priv) (priv->dev->stats) #define NETDEV_GET_STATS(netdev, fun_ptr) #define DECLARE_NET_DEVICE_STATS #endif @@ -407,6 +434,7 @@ struct jme_ring { #define JME_NAPI_WEIGHT(w) int *w #define JME_NAPI_WEIGHT_VAL(w) *w #define JME_NAPI_WEIGHT_SET(w, r) *w = r +#define DECLARE_NETDEV struct net_device *netdev = jme->dev; #define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev) #define JME_NAPI_ENABLE(priv) netif_poll_enable(priv->dev); #define JME_NAPI_DISABLE(priv) netif_poll_disable(priv->dev); @@ -422,27 +450,25 @@ struct jme_ring { #define JME_NAPI_WEIGHT(w) int w #define JME_NAPI_WEIGHT_VAL(w) w #define JME_NAPI_WEIGHT_SET(w, r) -#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev, napis) +#define DECLARE_NETDEV +#define JME_RX_COMPLETE(dev, napis) napi_complete(napis) #define JME_NAPI_ENABLE(priv) napi_enable(&priv->napi); #define JME_NAPI_DISABLE(priv) \ if (!napi_disable_pending(&priv->napi)) \ napi_disable(&priv->napi); #define JME_RX_SCHEDULE_PREP(priv) \ - netif_rx_schedule_prep(priv->dev, &priv->napi) + napi_schedule_prep(&priv->napi) #define JME_RX_SCHEDULE(priv) \ - __netif_rx_schedule(priv->dev, &priv->napi); + __napi_schedule(&priv->napi); #endif /* * Jmac Adapter Private data */ -#define SHADOW_REG_NR 8 struct jme_adapter { struct pci_dev *pdev; struct net_device *dev; void __iomem *regs; - dma_addr_t shadow_dma; - u32 *shadow_regs; struct mii_if_info mii_if; struct jme_ring rxring[RX_RING_NR]; struct jme_ring txring[TX_RING_NR]; @@ -489,9 +515,14 @@ struct jme_adapter { DECLARE_NET_DEVICE_STATS }; -enum shadow_reg_val { - SHADOW_IEVE = 0, -}; +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) +static struct net_device_stats * +jme_get_stats(struct net_device *netdev) +{ + struct jme_adapter *jme = netdev_priv(netdev); + return &jme->stats; +} +#endif enum jme_flags_bits { JME_FLAG_MSI = 1, @@ -850,16 +881,30 @@ static inline u32 smi_phy_addr(int x) * Global Host Control */ enum jme_ghc_bit_mask { - GHC_SWRST = 0x40000000, - GHC_DPX = 0x00000040, - GHC_SPEED = 0x00000030, - GHC_LINK_POLL = 0x00000001, + GHC_SWRST = 0x40000000, + GHC_DPX = 0x00000040, + GHC_SPEED = 0x00000030, + GHC_LINK_POLL = 0x00000001, }; enum jme_ghc_speed_val { - GHC_SPEED_10M = 0x00000010, - GHC_SPEED_100M = 0x00000020, - GHC_SPEED_1000M = 0x00000030, + GHC_SPEED_10M = 0x00000010, + GHC_SPEED_100M = 0x00000020, + GHC_SPEED_1000M = 0x00000030, +}; + +enum jme_ghc_to_clk { + GHC_TO_CLK_OFF = 0x00000000, + GHC_TO_CLK_GPHY = 0x00400000, + GHC_TO_CLK_PCIE = 0x00800000, + GHC_TO_CLK_INVALID = 0x00C00000, +}; + +enum jme_ghc_txmac_clk { + GHC_TXMAC_CLK_OFF = 0x00000000, + GHC_TXMAC_CLK_GPHY = 0x00100000, + GHC_TXMAC_CLK_PCIE = 0x00200000, + GHC_TXMAC_CLK_INVALID = 0x00300000, }; /* @@ -1124,13 +1169,6 @@ enum jme_chipmode_shifts { CM_CHIPREV_SHIFT = 8, }; -/* - * Shadow base address register bits - */ -enum jme_shadow_base_address_bits { - SHBA_POSTEN = 0x1, -}; - /* * Aggressive Power Mode Control */