tg3: Prevent tx BD corruption

[net-next-2.6.git] / drivers / net / tg3.h

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index b3347c41a1a3df0652b119cb3626407f2b71306d..bb8591ea330011e7629247ba865a9de7544e1d50 100644 (file)
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -214,9 +214,11 @@
 #define  DUAL_MAC_CTRL_ID               0x00000004
 #define TG3PCI_PRODID_ASICREV          0x000000bc
 #define  PROD_ID_ASIC_REV_MASK          0x0fffffff
-/* 0xc0 --> 0x100 unused */
+/* 0xc0 --> 0x110 unused */
 
-/* 0x100 --> 0x200 unused */
+#define TG3_CORR_ERR_STAT              0x00000110
+#define  TG3_CORR_ERR_STAT_CLEAR       0xffffffff
+/* 0x114 --> 0x200 unused */
 
 /* Mailbox registers */
 #define MAILBOX_INTERRUPT_0            0x00000200 /* 64-bit */
@@ -864,6 +866,7 @@
 #define  RCVLPC_STATSCTRL_ENABLE        0x00000001
 #define  RCVLPC_STATSCTRL_FASTUPD       0x00000002
 #define RCVLPC_STATS_ENABLE            0x00002018
+#define  RCVLPC_STATSENAB_ASF_FIX       0x00000002
 #define  RCVLPC_STATSENAB_DACK_FIX      0x00040000
 #define  RCVLPC_STATSENAB_LNGBRST_RFIX  0x00400000
 #define RCVLPC_STATS_INCMASK           0x0000201c
@@ -1696,11 +1699,23 @@
 #define PCIE_TRANSACTION_CFG           0x00007c04
 #define PCIE_TRANS_CFG_1SHOT_MSI        0x20000000
 #define PCIE_TRANS_CFG_LOM              0x00000020
+/* 0x7c08 --> 0x7d28 unused */
 
 #define PCIE_PWR_MGMT_THRESH           0x00007d28
 #define PCIE_PWR_MGMT_L1_THRESH_MSK     0x0000ff00
 #define PCIE_PWR_MGMT_L1_THRESH_4MS     0x0000ff00
 #define PCIE_PWR_MGMT_EXT_ASPM_TMR_EN   0x01000000
+/* 0x7d2c --> 0x7d54 unused */
+
+#define TG3_PCIE_LNKCTL                        0x00007d54
+#define  TG3_PCIE_LNKCTL_L1_PLL_PD_EN   0x00000008
+#define  TG3_PCIE_LNKCTL_L1_PLL_PD_DIS  0x00000080
+/* 0x7d58 --> 0x7e70 unused */
+
+#define TG3_PCIE_EIDLE_DELAY           0x00007e70
+#define  TG3_PCIE_EIDLE_DELAY_MASK      0x0000001f
+#define  TG3_PCIE_EIDLE_DELAY_13_CLKS   0x0000000c
+/* 0x7e74 --> 0x8000 unused */
 
 
 /* OTP bit definitions */
@@ -2641,6 +2656,7 @@ struct tg3 {
 #define TG3_FLG3_PHY_ENABLE_APD                0x00001000
 #define TG3_FLG3_5755_PLUS             0x00002000
 #define TG3_FLG3_NO_NVRAM              0x00004000
+#define TG3_FLG3_TOGGLE_10_100_L1PLLPD 0x00008000
 
        struct timer_list               timer;
        u16                             timer_counter;