[TG3]: Add 5709 PHY support.

[net-next-2.6.git] / drivers / net / tg3.h

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 2f5e00c9601609da2333229a04f1e912789d788e..9259d12fabd9caf99d2a51da37ef2cdfaaf35a92 100644 (file)
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1624,6 +1624,7 @@
 #define MII_TG3_DSP_RW_PORT            0x15 /* DSP coefficient read/write port */
 
 #define MII_TG3_DSP_ADDRESS            0x17 /* DSP address register */
+#define MII_TG3_EPHY_PTEST             0x17 /* 5906 PHY register */
 
 #define MII_TG3_AUX_CTRL               0x18 /* auxilliary control register */
 
@@ -1637,6 +1638,8 @@
 #define MII_TG3_AUX_STAT_100FULL       0x0500
 #define MII_TG3_AUX_STAT_1000HALF      0x0600
 #define MII_TG3_AUX_STAT_1000FULL      0x0700
+#define MII_TG3_AUX_STAT_100           0x0008
+#define MII_TG3_AUX_STAT_FULL          0x0001
 
 #define MII_TG3_ISTAT                  0x1a /* IRQ status register */
 #define MII_TG3_IMASK                  0x1b /* IRQ mask register */
@@ -1647,6 +1650,9 @@
 #define MII_TG3_INT_DUPLEXCHG          0x0008
 #define MII_TG3_INT_ANEG_PAGE_RX       0x0400
 
+#define MII_TG3_EPHY_TEST              0x1f /* 5906 PHY register */
+#define MII_TG3_EPHY_SHADOW_EN         0x80
+
 /* There are two ways to manage the TX descriptors on the tigon3.
  * Either the descriptors are in host DMA'able memory, or they
  * exist only in the cards on-chip SRAM.  All 16 send bds are under